WO2020132976A1 - Source de fréquence et dispositif de communication - Google Patents

Source de fréquence et dispositif de communication Download PDF

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Publication number
WO2020132976A1
WO2020132976A1 PCT/CN2018/124011 CN2018124011W WO2020132976A1 WO 2020132976 A1 WO2020132976 A1 WO 2020132976A1 CN 2018124011 W CN2018124011 W CN 2018124011W WO 2020132976 A1 WO2020132976 A1 WO 2020132976A1
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WO
WIPO (PCT)
Prior art keywords
loop filter
capacitor
switch
resistor
voltage
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Application number
PCT/CN2018/124011
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English (en)
Chinese (zh)
Inventor
康园园
何照辉
夏枢洋
Original Assignee
鹤壁天海电子信息系统有限公司
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Application filed by 鹤壁天海电子信息系统有限公司 filed Critical 鹤壁天海电子信息系统有限公司
Priority to PCT/CN2018/124011 priority Critical patent/WO2020132976A1/fr
Publication of WO2020132976A1 publication Critical patent/WO2020132976A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Definitions

  • This application relates to the field of communication technology, and in particular to a frequency source and communication equipment.
  • Frequency source is an electronic device or circuit set used to provide various signals. With the development of semiconductor technology, chip integration technology has been promoted in various frequency sources. In public network communications and mobile communication equipment, etc., the frequency source performance In areas where requirements are not very high, integrated frequency sources have been widely used. In the field of private network communications, due to the relatively high requirements for indicators and performance, the integrated chip indicators still do not meet the requirements, and most frequency sources still use the classic three-point capacitor oscillation circuit. At present, most frequency sources in the field of private network communications use discrete device-built voltage controlled oscillators (VCO, Voltage Controlled Oscillator) and phase-locked loop (PLL, Phase Locked Loop) and loop filter solutions.
  • VCO Voltage Controlled Oscillator
  • PLL Phase Locked Loop
  • the inventor of the present application found in the long-term research and development that most of the current duplex type frequency sources use the dual voltage controlled oscillator and the dual phase locked loop solution.
  • the principle of the receiving and transmitting frequency source channel circuit is basically the same, and the frequency source is divided into transmitting Frequency source and receiving frequency source; in duplex state, the transmitting frequency source and the receiving frequency source are working at the same time.
  • the control system only switches the frequency source back-end link and related switches, etc.
  • the frequency source does not do Control; this design does not have advantages in terms of the number of devices, product power consumption, and printed circuit board (PCB) area, and the cost is relatively high, which is not conducive to the development of miniaturization; locking in frequency switching In terms of time, the switching time between the transmitting and receiving states cannot exceed 2ms. If the frequency switching of the dual-channel voltage-controlled oscillator and the dual-phase phase-locked loop scheme is performed directly, the locking time cannot be less than 2ms.
  • the main problem solved by this application is to provide a frequency source and communication equipment, which can share a voltage-controlled oscillator and a phase-locked loop.
  • the transmitting and receiving frequency sources do not share a loop filter, reducing the circuit board area, shortening the locking time, and saving cost.
  • the technical solution adopted in this application is to provide a frequency source
  • the frequency source includes: a processor, a phase-locked loop, a loop filter fast lock circuit and a voltage-controlled oscillator, the processor is used to generate the target frequency and Control signal; PLL is used to output the pump voltage to the loop filter fast lock circuit according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator; the loop filter fast lock circuit is connected to the processor and the phase locked loop.
  • the voltage controlled oscillator is connected to the loop filter fast lock circuit and the phase locked loop, and is used to output a radio frequency signal according to the voltage control voltage and send the radio frequency signal to the phase lock Ring;
  • the loop filter fast lock circuit includes a switch and a loop filter circuit connected to each other, the switch is used to turn on the phase locked loop, the loop filter circuit and the voltage controlled oscillator, the loop filter circuit includes multiple loop filters In the duplex mode, the transmitting and receiving frequency sources use different loop filters; the loop filter circuit is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage control voltage.
  • the communication device includes: a frequency source, a transmitter and a receiver, and the frequency source is connected to the transmitter and the receiver, respectively, for transmitting The machine and the receiver provide signals.
  • the transmitter is used to modulate the carrier signal with the baseband signal to generate a radio frequency signal and transmit it.
  • the receiver is used to receive the radio frequency signal and demodulate the radio frequency signal to obtain the baseband signal.
  • the frequency source is the aforementioned frequency source.
  • the beneficial effects of the present application are: the target frequency and the control signal are generated by the processor, and the phase-locked loop outputs the pump voltage to the loop filter fast-lock circuit according to the target frequency and the frequency of the RF signal output by the voltage-controlled oscillator;
  • the loop filter fast lock circuit includes a switch and a loop filter circuit connected to each other. The switch turns on the phase locked loop, the loop filter circuit and the voltage controlled oscillator to form a phase locked loop.
  • the loop filter circuit inputs the pump voltage Perform filtering to remove interference signals from the pump voltage to output a voltage-controlled voltage; the voltage-controlled oscillator outputs a radio frequency signal according to the voltage-controlled voltage and sends the radio frequency signal to a phase-locked loop, which enables the transmission frequency source and the reception frequency source to be shared
  • the voltage-controlled oscillator and the phase-locked loop do not share the loop filter, which simplifies the circuit design, reduces the circuit board area, shortens the locking time, and saves costs.
  • FIG. 1 is a schematic structural diagram of an embodiment of a frequency source provided by this application.
  • FIG. 2 is a schematic structural diagram of another embodiment of a frequency source provided by this application.
  • FIG. 3 is a schematic structural diagram of a loop filter circuit in another embodiment of a frequency source provided by this application;
  • FIG. 4 is a schematic structural diagram of an embodiment of a communication device provided by this application.
  • FIG. 1 is a schematic structural diagram of an embodiment of a frequency source provided by the present application.
  • the frequency source includes: a processor 11, a phase-locked loop 12, a loop filter fast-lock circuit 13, and a voltage-controlled oscillator 14.
  • the frequency source can be a receiving frequency source and a receiving frequency source, which can provide signals for both the receiving device and the transmitting device; the processor 11 is used to generate the target frequency and control signal, and send the target frequency to the phase-locked loop 12 To generate a control signal to control the phase-locked loop 12 and the loop filter fast-lock circuit 13, the processor 11 may be a high-performance application processor 11 (OMAP, Open Multimedia Application Platform).
  • OMAP Open Multimedia Application Platform
  • the phase-locked loop 12 is connected to the processor 11 and used to output the pump voltage to the loop filter fast-lock circuit 13 according to the target frequency and the frequency of the radio frequency signal output by the voltage-controlled oscillator 14; the phase-locked loop 12 in this application includes phase discrimination (Not shown in the figure), the loop filter and the voltage controlled oscillator 14 are not integrated in the phase locked loop 12.
  • the phase discriminator divides the oscillation frequency output by the voltage controlled oscillator 14 and compares the divided oscillation frequency with the target frequency to output the pump voltage to the loop filter fast lock circuit 13;
  • the phase comparator includes a frequency divider for dividing the oscillation frequency and a phase comparator respectively connected to the frequency divider and the processor 11, and the phase comparator compares the phase of the frequency-divided oscillation frequency and the target frequency , Generating a pump voltage corresponding to the phase difference of the two signals.
  • the loop filter quick-lock circuit 13 is connected to the processor 11 and the phase-locked loop 12, and is used to output a stable voltage-controlled voltage according to the control signal and the pump voltage; the loop filter quick-lock circuit 13 includes a switch 131 and a loop connected to each other The filter circuit 132, the loop filter circuit 132 includes a plurality of loop filters (not shown in the figure), so that the transmit and receive frequency sources in the duplex mode respectively use different loop filters, and the switch 131 is used to turn on the lock The phase loop 12, the loop filter circuit 132, and the voltage controlled oscillator 14.
  • the loop filter circuit 132 is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage control voltage.
  • the loop filter is a low-pass filter, which can be a linear circuit composed of a resistor, a capacitor and an amplifier
  • the input of the loop filter circuit 132 is the output voltage of the phase detector, which can filter out high-frequency components and noise in the pump voltage, and output a stable voltage-controlled voltage to control the frequency of the voltage-controlled oscillator 14; the loop filter circuit 132 can improve the spectral purity of the pump voltage and improve the stability of the circuit.
  • the voltage controlled oscillator 14 is connected to the loop filter fast lock circuit 13 and the phase locked loop 12 to form a phase locked loop.
  • the voltage controlled oscillator 14 is used to output a radio frequency signal according to the voltage controlled voltage and send the radio frequency signal to the phase locked loop 12;
  • the voltage controlled oscillator 14 is an oscillator whose frequency is controlled by voltage. In the phase locked loop, the output of the voltage controlled oscillator 14 is used as the input of the phase detector.
  • the instantaneous frequency difference becomes smaller and smaller.
  • the phase-locked loop enters lock, and the instantaneous angular frequency difference of the phase-locked loop when locked is Zero, the two signals entering the phase detector have the same frequency, that is, the frequency of the voltage controlled oscillator 14 is equal to the target frequency.
  • a voltage proportional to this phase difference is taken as the error voltage to control the frequency of the voltage controlled oscillator 14, so that the frequency output by the voltage controlled oscillator 14 Equal to the target frequency.
  • the processor 11 generates a target frequency and a control signal, and the phase-locked loop 12 outputs a pump voltage to the loop filter quick lock circuit 13 according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator 14; the loop filter quick lock circuit 13 It includes a switch 131 and a loop filter circuit 132 connected to each other.
  • the switch 131 turns on the phase-locked loop 12, the loop filter circuit 132 and the voltage-controlled oscillator 14 to form a phase-locked loop.
  • the loop filter circuit 132 inputs The voltage of the pump voltage is filtered to filter out the interference signal in the pump voltage to output the voltage-controlled voltage; the voltage-controlled oscillator 14 outputs a radio frequency signal according to the voltage-controlled voltage and sends the radio frequency signal to the phase-locked loop 12 to enable the transmission frequency source.
  • the phase-locked loop 12 and the voltage-controlled oscillator 14 are shared with the receiving frequency source, and the loop filter is not shared.
  • the circuit design is simplified, the circuit board area is reduced, the locking time is shortened, and the cost is saved.
  • FIG. 2 is a schematic structural diagram of another embodiment of a frequency source provided by the present application.
  • the frequency source includes: a processor 21, a phase-locked loop 22, a loop filter fast-lock circuit 23, and a voltage-controlled oscillator 24.
  • the processor 21 is used to generate the target frequency and control signal; the phase-locked loop 22 is used to output the pump voltage to the loop filter fast lock circuit 23 according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator 24; the loop filter is fast
  • the lock circuit 23 is connected to the processor 21 and the phase-locked loop 22, and is used to output a stable voltage control voltage according to the control signal and the pump voltage.
  • the loop filter fast lock circuit 23 includes a switch 231 and a loop filter circuit 232 connected to each other.
  • the switch 231 is used to turn on the phase locked loop 22, the loop filter circuit 232, and the voltage controlled oscillator 24.
  • the loop filter circuit 232 includes multiple A loop filter, so that the transmission and reception frequency sources in the duplex mode use different loop filters; the loop filter circuit 232 is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage Control voltage.
  • the switch 231 is an analog switch. As shown in FIG. 3, the switch 231 includes a first switch 2311 and a second switch 2312.
  • the first switch 2311 and the second switch 2312 include two control signal input terminals (not shown) and Three output terminals; the first switch 2311 is respectively connected to the processor 21, the phase-locked loop 22 and the loop filter circuit 232, and the second switch 2312 is respectively connected to the processor 21, the loop filter circuit 232 and the voltage controlled oscillator 24,
  • the control signal input terminals of the first switch 2311 and the second switch 2312 respectively input the same signal, so that the output terminals of the first switch 2311 and the second switch 2312 output the same signal.
  • three different loop filters are used respectively, and the state is switched through the analog switch to realize the access circuit and the switching of the loop filter circuit 232.
  • the loop filter circuit 232 includes a first loop filter 2321, a second loop filter 2322, and a third loop filter 2323; a first loop filter 2321, a second loop filter 2322, and a third loop
  • the filter 2323 is connected to the first switch 2311 and the second switch 2312, respectively.
  • first pin, the second pin, and the third pin of the first switch 2311 are respectively connected to the input end of the first loop filter 2321, the input end of the second loop filter 2322, and the third loop The input terminals of the filter 2323 are connected.
  • the first pin, the second pin, and the third pin are the three output terminals of the first switch 2311; the first pin, the second pin, and the second pin of the second switch 2312
  • the three pins are respectively connected to the output end of the first loop filter 2321, the output end of the second loop filter 2322, and the output end of the third loop filter 2323.
  • the first pin, the second pin, and the third The three pins are respectively three output terminals of the second switch 2312.
  • the first loop filter 2321 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth One end of the capacitor C5 and the sixth capacitor C6, the first resistor R1, the second resistor R2, the first capacitor C1, and the second capacitor C2 are connected to the first pin of the first switch 2311, and the other end of the first resistor R1 is connected to the first One end of the three resistors R3 is connected, the other end of the second resistor R2 is connected to one end of the fourth resistor R4 and one end of the third capacitor C3, the other end of the third resistor R3 is grounded through the fourth capacitor C4, and the other end of the fourth resistor R4 One end and one end of the fifth capacitor C5 are connected to the first pin of the second switch 2312, the other end of the first capacitor C1 is grounded, the other end of the second capacitor C2 is connected to the other end of the first
  • the second loop filter 2322 includes a fifth resistor R5, a sixth resistor R6, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9, and one end of the fifth resistor R5, sixth resistor R6, and seventh capacitor C7 is connected To the second pin of the first switch 2311, the other end of the seventh capacitor C7 is grounded, the other end of the fifth resistor R5 is grounded through the eighth capacitor C8, and the other end of the sixth resistor R6 is connected to one end of the ninth capacitor C9 to The second pin of the second switch 2312, the other end of the ninth capacitor C9 is grounded.
  • the third loop filter 2323 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13 ,
  • the fourteenth capacitor C14 and the fifteenth capacitor C15, the tenth capacitor C10, the eleventh capacitor C11, the seventh resistor R7 and the eighth resistor R8 are connected to the third pin of the first switch 2311, the tenth capacitor
  • the other end of C10 is grounded, the other end of the eleventh capacitor C11 and the other end of the seventh resistor R7 are connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is grounded through the twelfth capacitor C12, and the eighth resistor R8
  • the other end of the thirteenth capacitor C13 is connected to one end of the tenth resistor R10, the other end of the thirteenth capacitor C13 and the other end of
  • the voltage-controlled oscillator 24 is connected to the loop filter fast lock circuit 23 and the phase-locked loop 22, and is used to output a radio frequency signal according to the voltage-controlled voltage and send the radio frequency signal to the phase-locked loop 22.
  • the voltage-controlled oscillator 24, the phase-locked loop 22 and the loop filter fast-lock circuit 23 are in the working state for a long time; the processor 21 controls the frequency of the phase-locked loop 22 according to the transceiver state and the single-duplex state of the device, respectively Point, loop filter fast lock circuit 23 access status and fast lock circuit 233 working mode, in order to achieve real-time control of frequency source and simplex and duplex mode control; in simplex and duplex mode, frequency The source works differently.
  • the frequency switching time can be within 7ms.
  • the frequency source is used to provide signals for the transmitting device or the receiving device (not shown in the figure).
  • the loop filter circuit 232 does not perform loop selection and is fixed.
  • the first loop filter 2321 is used for filtering.
  • the processor 21 controls the first pin of the first switch 2311 and the first pin of the second switch 2312 to output a high level, and the first loop filter 2321 passes
  • the first switch 2311 is connected to the phase-locked loop 22, and the first loop filter 2321 is connected to the voltage-controlled oscillator 24 through the second switch 2312, so that the phase-locked loop 22, the first loop filter 2321, and the voltage-controlled oscillator 24 is connected into a phase-locked loop, and the output frequency of the phase-locked loop is switched as needed to provide the frequency source required for transmission and reception.
  • the frequency switching time is relatively short, the allowable time is around 2ms, so a relatively short frequency switching time is required; when the loop filter circuit 232 is used for the first time, quick lock The circuit 233 will charge the voltage of the loop filter circuit 232 to the required level; when the loop filter circuit 232 is kept at the required level, the frequency source switches between the frequency points, and the 1ms frequency switching lock can be achieved time.
  • the first loop filter 2321 is a loop filter for receiving frequency sources
  • the second loop filter 2322 is a loop filter during state switching
  • the third loop filter 2323 is a transmit Loop filter for frequency source.
  • the loop filter fast lock circuit 23 works in the duplex mode, the loop filter circuit 232 performs switching between different loop filters according to the transmission state and the receive state, and the fast lock circuit 233 performs different functions according to whether the fast lock function is required
  • the operation of the phase-locked loop 22 performs frequency switching, and realizes the time-sharing lock of the transmission frequency source and the reception frequency source by the processor 21, and the frequency switching lock time is within 1ms, and the use of a single voltage-controlled oscillator 24 to achieve the duplex communication frequency source.
  • the loop filter circuit 232 When the frequency source works in the duplex mode and the fast lock circuit 233 is in the off state, when the working state of the frequency source changes, the loop filter circuit 232 performs jumper processing according to the actual transceiver state, and the processor 21 controls the first switch 2311 And the second pin of the second switch 2312 output a high level, the second loop filter 2322 is connected to the phase-locked loop 22 through the first switch 2311, and the second loop filter 2322 passes the second switch 2312 is connected to the voltage controlled oscillator 24; after a preset time, the processor 21 controls the first pin of the first switch 2311 and the second switch 2312 to output a high level to convert the working state of the frequency source to the receiving state, Or the processor 21 controls the third pins of the first switch 2311 and the second switch 2312 to output high level to convert the working state of the frequency source to the transmitting state.
  • the first switch 2311, the second switch 2312, and the third loop filter 2323 are connected to the circuit, and the first loop filter 2321 and the second loop filter 2322 are respectively connected to the switch 231 is disconnected, at this time the first loop filter 2321 maintains the level required by the receiving frequency source, and the fast lock circuit 233 will output the corresponding level for voltage maintenance; when the state is switched to the receiving state, the fast lock circuit The output of 233 is off.
  • the level of the receiving frequency source is basically the same as the level maintained by the first loop filter 2321.
  • the phase-locked loop 22 can quickly lock the receiving frequency point, and the locking time is within 1ms to realize the switching of the transmitting frequency source. The requirement of short-time handover to different frequencies of the receiving frequency source.
  • the first switch 2311, the second switch 2312, and the first loop filter 2321 are connected to the circuit, and the third loop filter 2323 and the second loop filter 2322 are disconnected from the switch 231, respectively
  • the third loop filter 2323 maintains the level required by the transmission frequency source, and at the same time, the fast lock circuit 233 outputs the corresponding level for voltage maintenance; when the state is switched to the transmission state, the output of the fast lock circuit 233 is turned off ,
  • the required level of the transmitting frequency source is basically the same as the level maintained by the third loop filter 2323, the PLL 22 can quickly lock the transmitting frequency point, and the locking time is within 1ms, so that the receiving frequency source is switched to the transmitting frequency The requirement of short-time handover between different sources.
  • the loop filter fast lock circuit 23 in this embodiment further includes a fast lock circuit 233 and a third switch 234.
  • the fast lock circuit 233 is connected to the third switch 234 and the processor 21, respectively.
  • the third switch 234 is connected to the first loop filter 2321 and the third loop filter 2323, respectively, for turning on the fast lock circuit 233 and the first loop filter 2321/ Three loop filter 2323.
  • the first pin and the third pin of the third switch 234 are connected to the first loop filter 2321 and the third loop filter 2323, respectively, and the second pin of the third switch 234 is grounded; specifically, the third switch The first and third pins of 234 are connected to the first and third pins of the second switch 2312, respectively.
  • the processor 21 controls the first pin of the third switch 234 to output a high level, and the fast lock circuit 233 pairs The first loop filter 2321 maintains the voltage so that the output voltage of the first loop filter 2321 is the preset first voltage value; when the transmission source is in the receiving state, the processor 21 controls the third of the third switch 234 The pin outputs a high level, and the fast lock circuit 233 charges the third loop filter 2323 so that the output voltage of the third loop filter 2323 is the preset second voltage value.
  • loop filter fast lock circuit 23 can respectively activate the transmit fast lock mode or the receive fast lock mode.
  • the loop filter fast lock circuit 23 starts the receive fast lock mode, and the fast lock circuit 233 charges the first loop filter 2321 to maintain the level of the first loop filter 2321 at the receiving frequency source Corresponding level; when entering the receiving state, the processor 21 configures the receiving frequency for the phase-locked loop 22 to achieve the stability of the receiving frequency source.
  • the loop filter fast lock circuit 23 Upon entering the transmission phase, the loop filter fast lock circuit 23 starts the transmission fast lock mode, and the fast lock circuit 233 charges the third loop filter 2323 to maintain the level of the third loop filter 2323 corresponding to the transmission frequency source
  • the processor 21 configures the transmission frequency for the phase-locked loop 22 to achieve the stability of the transmission frequency source.
  • the frequency source may also include a transmit buffer, a transmit link connected to the transmit buffer, a receive buffer, and a receive link connected to the receive buffer (not shown in the figure), the buffer (including the transmit buffer and (Receive buffer) is used to temporarily store the signal transmitted by the voltage controlled oscillator 24.
  • the circuit parameters of the first loop filter 2321 and the third loop filter 2323 can be the same, avoiding the transmission frequency
  • the two-way closed-loop debugging of the source and the receiving frequency source shortens the product development cycle.
  • a walkie-talkie for a walkie-talkie, it includes a miniature duplex walkie-talkie system with an area of 30*50mm 2 , which includes a complete radio frequency path and a control system.
  • An external microphone and speaker can be used for duplex business and
  • the frequency source adopts the frequency source in this embodiment.
  • the frequency source saves about 40% of the area, which provides protection for the design of the walkie-talkie module. At the same time, it is also an important turning point in the development of the frequency source.
  • a single phase-locked loop 22 and a single voltage-controlled oscillator 24 are adopted.
  • the transmission and reception share a single phase-locked loop 22 and a single voltage-controlled oscillator 24.
  • the transmission and reception do not share a loop filter.
  • PCB area and cost are better than the frequency source solution of the duplex model.
  • the PCB area is about 40% less than the frequency source solution of the duplex model, which is conducive to the miniaturization and integration of the frequency source.
  • the cost of the frequency source is reduced by 50% %, which is very helpful for price competition of products and cost reduction.
  • the single phase-locked loop 22 and the single voltage-controlled oscillator 24 use the switch 231, the loop filter circuit 232 voltage hold, and the frequency switching locking time technology to ensure the mutual switching time between the transmitting and receiving states Within 1ms, the problem of insufficient switching time between the transmitting and receiving states was solved.
  • FIG. 4 is a schematic structural diagram of an embodiment of a communication device provided by the present application.
  • the communication device includes a frequency source 41, a transmitter 42, and a receiver 43.
  • the frequency source 41 is connected to the transmitter 42 and the receiver 43 respectively, and is used to provide signals for the transmitter 42 and the receiver 43.
  • the transmitter 42 is used to modulate the carrier signal with the baseband signal to generate a radio frequency signal and transmit it;
  • the receiver 43 is used to receive a radio frequency signal and demodulate the radio frequency signal to obtain a baseband signal, where the frequency source is the frequency source in the foregoing embodiment.

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Abstract

La présente invention concerne une source de fréquence et un dispositif de communication. Un processeur dans la source de fréquence est utilisé pour générer une fréquence cible et un signal de commande ; une boucle à verrouillage de phase est utilisée pour délivrer en sortie une tension de pompe à un circuit à verrouillage rapide de filtre à boucle en fonction de la fréquence cible et d'une fréquence d'un signal radiofréquence émis par un oscillateur commandé en tension ; le circuit à verrouillage rapide de filtre à boucle est utilisé pour délivrer en sortie une tension commandée en tension en fonction du signal de commande et de la tension de pompe, et comprend un commutateur et un circuit de filtre à boucle, le commutateur étant utilisé pour conduire la boucle à verrouillage de phase, le circuit de filtre à boucle et l'oscillateur commandé en tension, et le circuit de filtre à boucle est utilisé pour filtrer la tension de pompe pour éliminer un signal d'interférence dans la tension de pompe de façon à délivrer une tension commandée en tension, de telle sorte que la transmission et la réception de signaux dans un mode duplex utilisent respectivement différents filtres à boucle ; et l'oscillateur commandé en tension est utilisé pour délivrer en sortie un signal radiofréquence à la boucle à verrouillage de phase en fonction de la tension commandée en tension. Au moyen du procédé, la présente invention peut partager un oscillateur commandé en tension et une boucle à verrouillage de phase, et une source de fréquence de transmission et une source de fréquence de réception ne partagent pas un filtre à boucle, raccourcissant ainsi le temps de verrouillage et économisant des coûts.
PCT/CN2018/124011 2018-12-26 2018-12-26 Source de fréquence et dispositif de communication WO2020132976A1 (fr)

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PCT/CN2018/124011 WO2020132976A1 (fr) 2018-12-26 2018-12-26 Source de fréquence et dispositif de communication

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Application Number Priority Date Filing Date Title
PCT/CN2018/124011 WO2020132976A1 (fr) 2018-12-26 2018-12-26 Source de fréquence et dispositif de communication

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1692561A (zh) * 2002-11-15 2005-11-02 高通股份有限公司 使用可变振幅本振信号的直接变频
US20060135071A1 (en) * 2004-12-21 2006-06-22 Samsung Electronics Co., Ltd. Noise removing apparatus for wireless transceiver
CN101138259A (zh) * 2005-03-10 2008-03-05 Posdata株式会社 用于处理基于车辆的终端的射频信号的装置
CN101814917A (zh) * 2009-02-19 2010-08-25 中国科学院微电子研究所 可实现频段选择的自校正锁相环频率综合器
CN104702279A (zh) * 2015-03-17 2015-06-10 东南大学 一种锁相环频率合成器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1692561A (zh) * 2002-11-15 2005-11-02 高通股份有限公司 使用可变振幅本振信号的直接变频
US20060135071A1 (en) * 2004-12-21 2006-06-22 Samsung Electronics Co., Ltd. Noise removing apparatus for wireless transceiver
CN101138259A (zh) * 2005-03-10 2008-03-05 Posdata株式会社 用于处理基于车辆的终端的射频信号的装置
CN101814917A (zh) * 2009-02-19 2010-08-25 中国科学院微电子研究所 可实现频段选择的自校正锁相环频率综合器
CN104702279A (zh) * 2015-03-17 2015-06-10 东南大学 一种锁相环频率合成器

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