WO2020132976A1

WO2020132976A1 - Frequency source and communication device

Info

Publication number: WO2020132976A1
Application number: PCT/CN2018/124011
Authority: WO
Inventors: 康园园; 何照辉; 夏枢洋
Original assignee: 鹤壁天海电子信息系统有限公司
Priority date: 2018-12-26
Filing date: 2018-12-26
Publication date: 2020-07-02

Abstract

Disclosed are a frequency source and a communication device. A processor in the frequency source is used for generating a target frequency and a control signal; a phase-locked loop is used for outputting a pump voltage to a loop filter fast-lock circuit according to the target frequency and a frequency of a radio frequency signal output by a voltage-controlled oscillator; the loop filter fast-lock circuit is used for outputting a voltage-controlled voltage according to the control signal and the pump voltage, and comprises a switch and a loop filter circuit, wherein the switch is used for conducting the phase-locked loop, the loop filter circuit and the voltage-controlled oscillator, and the loop filter circuit is used for filtering the pump voltage to filter out an interference signal in the pump voltage so as to output a voltage-controlled voltage, so that the transmission and receiving of signals in a duplex mode respectively use different loop filters; and the voltage-controlled oscillator is used for outputting a radio frequency signal to the phase-locked loop according to the voltage-controlled voltage. By means of the method, the present application can share a voltage-controlled oscillator and a phase-locked loop, and a transmission frequency source and a reception frequency source do not share a loop filter, thereby shortening the locking time and saving on costs.

Description

Frequency source and communication equipment

【Technical field】

This application relates to the field of communication technology, and in particular to a frequency source and communication equipment.

【Background technique】

Frequency source is an electronic device or circuit set used to provide various signals. With the development of semiconductor technology, chip integration technology has been promoted in various frequency sources. In public network communications and mobile communication equipment, etc., the frequency source performance In areas where requirements are not very high, integrated frequency sources have been widely used. In the field of private network communications, due to the relatively high requirements for indicators and performance, the integrated chip indicators still do not meet the requirements, and most frequency sources still use the classic three-point capacitor oscillation circuit. At present, most frequency sources in the field of private network communications use discrete device-built voltage controlled oscillators (VCO, Voltage Controlled Oscillator) and phase-locked loop (PLL, Phase Locked Loop) and loop filter solutions.

The inventor of the present application found in the long-term research and development that most of the current duplex type frequency sources use the dual voltage controlled oscillator and the dual phase locked loop solution. The principle of the receiving and transmitting frequency source channel circuit is basically the same, and the frequency source is divided into transmitting Frequency source and receiving frequency source; in duplex state, the transmitting frequency source and the receiving frequency source are working at the same time. When the transceiver is switched, the control system only switches the frequency source back-end link and related switches, etc. The frequency source does not do Control; this design does not have advantages in terms of the number of devices, product power consumption, and printed circuit board (PCB) area, and the cost is relatively high, which is not conducive to the development of miniaturization; locking in frequency switching In terms of time, the switching time between the transmitting and receiving states cannot exceed 2ms. If the frequency switching of the dual-channel voltage-controlled oscillator and the dual-phase phase-locked loop scheme is performed directly, the locking time cannot be less than 2ms.

[Invention content]

The main problem solved by this application is to provide a frequency source and communication equipment, which can share a voltage-controlled oscillator and a phase-locked loop. The transmitting and receiving frequency sources do not share a loop filter, reducing the circuit board area, shortening the locking time, and saving cost.

In order to solve the above technical problems, the technical solution adopted in this application is to provide a frequency source, the frequency source includes: a processor, a phase-locked loop, a loop filter fast lock circuit and a voltage-controlled oscillator, the processor is used to generate the target frequency and Control signal; PLL is used to output the pump voltage to the loop filter fast lock circuit according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator; the loop filter fast lock circuit is connected to the processor and the phase locked loop. Based on the control signal and pump voltage, a stable voltage control voltage is output; the voltage controlled oscillator is connected to the loop filter fast lock circuit and the phase locked loop, and is used to output a radio frequency signal according to the voltage control voltage and send the radio frequency signal to the phase lock Ring; wherein, the loop filter fast lock circuit includes a switch and a loop filter circuit connected to each other, the switch is used to turn on the phase locked loop, the loop filter circuit and the voltage controlled oscillator, the loop filter circuit includes multiple loop filters In the duplex mode, the transmitting and receiving frequency sources use different loop filters; the loop filter circuit is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage control voltage.

In order to solve the above technical problems, another technical solution adopted by the present application is to provide a communication device, the communication device includes: a frequency source, a transmitter and a receiver, and the frequency source is connected to the transmitter and the receiver, respectively, for transmitting The machine and the receiver provide signals. The transmitter is used to modulate the carrier signal with the baseband signal to generate a radio frequency signal and transmit it. The receiver is used to receive the radio frequency signal and demodulate the radio frequency signal to obtain the baseband signal. The frequency source is the aforementioned frequency source.

Through the above solution, the beneficial effects of the present application are: the target frequency and the control signal are generated by the processor, and the phase-locked loop outputs the pump voltage to the loop filter fast-lock circuit according to the target frequency and the frequency of the RF signal output by the voltage-controlled oscillator; The loop filter fast lock circuit includes a switch and a loop filter circuit connected to each other. The switch turns on the phase locked loop, the loop filter circuit and the voltage controlled oscillator to form a phase locked loop. The loop filter circuit inputs the pump voltage Perform filtering to remove interference signals from the pump voltage to output a voltage-controlled voltage; the voltage-controlled oscillator outputs a radio frequency signal according to the voltage-controlled voltage and sends the radio frequency signal to a phase-locked loop, which enables the transmission frequency source and the reception frequency source to be shared The voltage-controlled oscillator and the phase-locked loop do not share the loop filter, which simplifies the circuit design, reduces the circuit board area, shortens the locking time, and saves costs.

[Description of the drawings]

In order to more clearly explain the technical solutions in the embodiments of the present invention, the drawings required in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For a person of ordinary skill in the art, without paying any creative work, other drawings can be obtained based on these drawings. among them:

FIG. 1 is a schematic structural diagram of an embodiment of a frequency source provided by this application;

2 is a schematic structural diagram of another embodiment of a frequency source provided by this application;

3 is a schematic structural diagram of a loop filter circuit in another embodiment of a frequency source provided by this application;

4 is a schematic structural diagram of an embodiment of a communication device provided by this application.

【detailed description】

The technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative work fall within the scope of protection of the present application.

Referring to FIG. 1, FIG. 1 is a schematic structural diagram of an embodiment of a frequency source provided by the present application. The frequency source includes: a processor 11, a phase-locked loop 12, a loop filter fast-lock circuit 13, and a voltage-controlled oscillator 14.

The frequency source can be a receiving frequency source and a receiving frequency source, which can provide signals for both the receiving device and the transmitting device; the processor 11 is used to generate the target frequency and control signal, and send the target frequency to the phase-locked loop 12 To generate a control signal to control the phase-locked loop 12 and the loop filter fast-lock circuit 13, the processor 11 may be a high-performance application processor 11 (OMAP, Open Multimedia Application Platform).

The phase-locked loop 12 is connected to the processor 11 and used to output the pump voltage to the loop filter fast-lock circuit 13 according to the target frequency and the frequency of the radio frequency signal output by the voltage-controlled oscillator 14; the phase-locked loop 12 in this application includes phase discrimination (Not shown in the figure), the loop filter and the voltage controlled oscillator 14 are not integrated in the phase locked loop 12.

The phase discriminator divides the oscillation frequency output by the voltage controlled oscillator 14 and compares the divided oscillation frequency with the target frequency to output the pump voltage to the loop filter fast lock circuit 13; understandably, The phase comparator includes a frequency divider for dividing the oscillation frequency and a phase comparator respectively connected to the frequency divider and the processor 11, and the phase comparator compares the phase of the frequency-divided oscillation frequency and the target frequency , Generating a pump voltage corresponding to the phase difference of the two signals.

The loop filter quick-lock circuit 13 is connected to the processor 11 and the phase-locked loop 12, and is used to output a stable voltage-controlled voltage according to the control signal and the pump voltage; the loop filter quick-lock circuit 13 includes a switch 131 and a loop connected to each other The filter circuit 132, the loop filter circuit 132 includes a plurality of loop filters (not shown in the figure), so that the transmit and receive frequency sources in the duplex mode respectively use different loop filters, and the switch 131 is used to turn on the lock The phase loop 12, the loop filter circuit 132, and the voltage controlled oscillator 14.

The loop filter circuit 132 is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage control voltage. The loop filter is a low-pass filter, which can be a linear circuit composed of a resistor, a capacitor and an amplifier The input of the loop filter circuit 132 is the output voltage of the phase detector, which can filter out high-frequency components and noise in the pump voltage, and output a stable voltage-controlled voltage to control the frequency of the voltage-controlled oscillator 14; the loop filter circuit 132 can improve the spectral purity of the pump voltage and improve the stability of the circuit.

The voltage controlled oscillator 14 is connected to the loop filter fast lock circuit 13 and the phase locked loop 12 to form a phase locked loop. The voltage controlled oscillator 14 is used to output a radio frequency signal according to the voltage controlled voltage and send the radio frequency signal to the phase locked loop 12; The voltage controlled oscillator 14 is an oscillator whose frequency is controlled by voltage. In the phase locked loop, the output of the voltage controlled oscillator 14 is used as the input of the phase detector.

When the target frequency is constant, with the control process of the loop, the instantaneous frequency difference becomes smaller and smaller. When the instantaneous frequency difference is zero, the phase-locked loop enters lock, and the instantaneous angular frequency difference of the phase-locked loop when locked is Zero, the two signals entering the phase detector have the same frequency, that is, the frequency of the voltage controlled oscillator 14 is equal to the target frequency.

By comparing the phase difference between the target frequency and the output frequency of the voltage controlled oscillator 14, a voltage proportional to this phase difference is taken as the error voltage to control the frequency of the voltage controlled oscillator 14, so that the frequency output by the voltage controlled oscillator 14 Equal to the target frequency.

The processor 11 generates a target frequency and a control signal, and the phase-locked loop 12 outputs a pump voltage to the loop filter quick lock circuit 13 according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator 14; the loop filter quick lock circuit 13 It includes a switch 131 and a loop filter circuit 132 connected to each other. The switch 131 turns on the phase-locked loop 12, the loop filter circuit 132 and the voltage-controlled oscillator 14 to form a phase-locked loop. The loop filter circuit 132 inputs The voltage of the pump voltage is filtered to filter out the interference signal in the pump voltage to output the voltage-controlled voltage; the voltage-controlled oscillator 14 outputs a radio frequency signal according to the voltage-controlled voltage and sends the radio frequency signal to the phase-locked loop 12 to enable the transmission frequency source The phase-locked loop 12 and the voltage-controlled oscillator 14 are shared with the receiving frequency source, and the loop filter is not shared. The circuit design is simplified, the circuit board area is reduced, the locking time is shortened, and the cost is saved.

Referring to FIG. 2, FIG. 2 is a schematic structural diagram of another embodiment of a frequency source provided by the present application. The frequency source includes: a processor 21, a phase-locked loop 22, a loop filter fast-lock circuit 23, and a voltage-controlled oscillator 24.

The processor 21 is used to generate the target frequency and control signal; the phase-locked loop 22 is used to output the pump voltage to the loop filter fast lock circuit 23 according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator 24; the loop filter is fast The lock circuit 23 is connected to the processor 21 and the phase-locked loop 22, and is used to output a stable voltage control voltage according to the control signal and the pump voltage.

The loop filter fast lock circuit 23 includes a switch 231 and a loop filter circuit 232 connected to each other. The switch 231 is used to turn on the phase locked loop 22, the loop filter circuit 232, and the voltage controlled oscillator 24. The loop filter circuit 232 includes multiple A loop filter, so that the transmission and reception frequency sources in the duplex mode use different loop filters; the loop filter circuit 232 is used to filter the pump voltage and filter out the interference signal in the pump voltage to output the voltage Control voltage.

The switch 231 is an analog switch. As shown in FIG. 3, the switch 231 includes a first switch 2311 and a second switch 2312. The first switch 2311 and the second switch 2312 include two control signal input terminals (not shown) and Three output terminals; the first switch 2311 is respectively connected to the processor 21, the phase-locked loop 22 and the loop filter circuit 232, and the second switch 2312 is respectively connected to the processor 21, the loop filter circuit 232 and the voltage controlled oscillator 24, The control signal input terminals of the first switch 2311 and the second switch 2312 respectively input the same signal, so that the output terminals of the first switch 2311 and the second switch 2312 output the same signal.

According to the different working modes of the frequency source, three different loop filters are used respectively, and the state is switched through the analog switch to realize the access circuit and the switching of the loop filter circuit 232.

The loop filter circuit 232 includes a first loop filter 2321, a second loop filter 2322, and a third loop filter 2323; a first loop filter 2321, a second loop filter 2322, and a third loop The filter 2323 is connected to the first switch 2311 and the second switch 2312, respectively.

Further, the first pin, the second pin, and the third pin of the first switch 2311 are respectively connected to the input end of the first loop filter 2321, the input end of the second loop filter 2322, and the third loop The input terminals of the filter 2323 are connected. The first pin, the second pin, and the third pin are the three output terminals of the first switch 2311; the first pin, the second pin, and the second pin of the second switch 2312 The three pins are respectively connected to the output end of the first loop filter 2321, the output end of the second loop filter 2322, and the output end of the third loop filter 2323. The first pin, the second pin, and the third The three pins are respectively three output terminals of the second switch 2312.

The first loop filter 2321 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth One end of the capacitor C5 and the sixth capacitor C6, the first resistor R1, the second resistor R2, the first capacitor C1, and the second capacitor C2 are connected to the first pin of the first switch 2311, and the other end of the first resistor R1 is connected to the first One end of the three resistors R3 is connected, the other end of the second resistor R2 is connected to one end of the fourth resistor R4 and one end of the third capacitor C3, the other end of the third resistor R3 is grounded through the fourth capacitor C4, and the other end of the fourth resistor R4 One end and one end of the fifth capacitor C5 are connected to the first pin of the second switch 2312, the other end of the first capacitor C1 is grounded, the other end of the second capacitor C2 is connected to the other end of the first resistor R1, and the third capacitor C3 The other end of is connected to the other end of the third resistor R3 and one end of the sixth capacitor C6, the other end of the fifth capacitor C5 is grounded, and the other end of the sixth capacitor C6 is grounded.

The second loop filter 2322 includes a fifth resistor R5, a sixth resistor R6, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9, and one end of the fifth resistor R5, sixth resistor R6, and seventh capacitor C7 is connected To the second pin of the first switch 2311, the other end of the seventh capacitor C7 is grounded, the other end of the fifth resistor R5 is grounded through the eighth capacitor C8, and the other end of the sixth resistor R6 is connected to one end of the ninth capacitor C9 to The second pin of the second switch 2312, the other end of the ninth capacitor C9 is grounded.

The third loop filter 2323 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13 , The fourteenth capacitor C14 and the fifteenth capacitor C15, the tenth capacitor C10, the eleventh capacitor C11, the seventh resistor R7 and the eighth resistor R8 are connected to the third pin of the first switch 2311, the tenth capacitor The other end of C10 is grounded, the other end of the eleventh capacitor C11 and the other end of the seventh resistor R7 are connected to one end of the ninth resistor R9, the other end of the ninth resistor R9 is grounded through the twelfth capacitor C12, and the eighth resistor R8 The other end of the thirteenth capacitor C13 is connected to one end of the tenth resistor R10, the other end of the thirteenth capacitor C13 and the other end of the ninth resistor R9 are connected to one end of the fourteenth capacitor C14, the fourteenth capacitor The other end of C14 is grounded, the other end of the tenth resistor R10 and one end of the fifteenth capacitor C15 are connected to the third pin of the second switch 2312, and the other end of the fifteenth capacitor C15 is grounded.

The voltage-controlled oscillator 24 is connected to the loop filter fast lock circuit 23 and the phase-locked loop 22, and is used to output a radio frequency signal according to the voltage-controlled voltage and send the radio frequency signal to the phase-locked loop 22.

In the working mode, the voltage-controlled oscillator 24, the phase-locked loop 22 and the loop filter fast-lock circuit 23 are in the working state for a long time; the processor 21 controls the frequency of the phase-locked loop 22 according to the transceiver state and the single-duplex state of the device, respectively Point, loop filter fast lock circuit 23 access status and fast lock circuit 233 working mode, in order to achieve real-time control of frequency source and simplex and duplex mode control; in simplex and duplex mode, frequency The source works differently.

When the frequency source works in simplex mode, the frequency switching time can be within 7ms. The frequency source is used to provide signals for the transmitting device or the receiving device (not shown in the figure). The loop filter circuit 232 does not perform loop selection and is fixed. The first loop filter 2321 is used for filtering. At this time, the processor 21 controls the first pin of the first switch 2311 and the first pin of the second switch 2312 to output a high level, and the first loop filter 2321 passes The first switch 2311 is connected to the phase-locked loop 22, and the first loop filter 2321 is connected to the voltage-controlled oscillator 24 through the second switch 2312, so that the phase-locked loop 22, the first loop filter 2321, and the voltage-controlled oscillator 24 is connected into a phase-locked loop, and the output frequency of the phase-locked loop is switched as needed to provide the frequency source required for transmission and reception.

Due to the difference in the working frequency of different frequency duplex equipment, in duplex mode, the frequency switching time is relatively short, the allowable time is around 2ms, so a relatively short frequency switching time is required; when the loop filter circuit 232 is used for the first time, quick lock The circuit 233 will charge the voltage of the loop filter circuit 232 to the required level; when the loop filter circuit 232 is kept at the required level, the frequency source switches between the frequency points, and the 1ms frequency switching lock can be achieved time.

In duplex mode, the first loop filter 2321 is a loop filter for receiving frequency sources, the second loop filter 2322 is a loop filter during state switching, and the third loop filter 2323 is a transmit Loop filter for frequency source.

The loop filter fast lock circuit 23 works in the duplex mode, the loop filter circuit 232 performs switching between different loop filters according to the transmission state and the receive state, and the fast lock circuit 233 performs different functions according to whether the fast lock function is required The operation of the phase-locked loop 22 performs frequency switching, and realizes the time-sharing lock of the transmission frequency source and the reception frequency source by the processor 21, and the frequency switching lock time is within 1ms, and the use of a single voltage-controlled oscillator 24 to achieve the duplex communication frequency source.

When the frequency source works in the duplex mode and the fast lock circuit 233 is in the off state, when the working state of the frequency source changes, the loop filter circuit 232 performs jumper processing according to the actual transceiver state, and the processor 21 controls the first switch 2311 And the second pin of the second switch 2312 output a high level, the second loop filter 2322 is connected to the phase-locked loop 22 through the first switch 2311, and the second loop filter 2322 passes the second switch 2312 is connected to the voltage controlled oscillator 24; after a preset time, the processor 21 controls the first pin of the first switch 2311 and the second switch 2312 to output a high level to convert the working state of the frequency source to the receiving state, Or the processor 21 controls the third pins of the first switch 2311 and the second switch 2312 to output high level to convert the working state of the frequency source to the transmitting state.

Further, when the frequency source is in the transmitting state, the first switch 2311, the second switch 2312, and the third loop filter 2323 are connected to the circuit, and the first loop filter 2321 and the second loop filter 2322 are respectively connected to the switch 231 is disconnected, at this time the first loop filter 2321 maintains the level required by the receiving frequency source, and the fast lock circuit 233 will output the corresponding level for voltage maintenance; when the state is switched to the receiving state, the fast lock circuit The output of 233 is off. The level of the receiving frequency source is basically the same as the level maintained by the first loop filter 2321. The phase-locked loop 22 can quickly lock the receiving frequency point, and the locking time is within 1ms to realize the switching of the transmitting frequency source. The requirement of short-time handover to different frequencies of the receiving frequency source.

When the frequency source is in the receiving state, the first switch 2311, the second switch 2312, and the first loop filter 2321 are connected to the circuit, and the third loop filter 2323 and the second loop filter 2322 are disconnected from the switch 231, respectively At this time, the third loop filter 2323 maintains the level required by the transmission frequency source, and at the same time, the fast lock circuit 233 outputs the corresponding level for voltage maintenance; when the state is switched to the transmission state, the output of the fast lock circuit 233 is turned off , The required level of the transmitting frequency source is basically the same as the level maintained by the third loop filter 2323, the PLL 22 can quickly lock the transmitting frequency point, and the locking time is within 1ms, so that the receiving frequency source is switched to the transmitting frequency The requirement of short-time handover between different sources.

In order to reduce the time for entering the frequency source to enter a stable state, the loop filter fast lock circuit 23 in this embodiment further includes a fast lock circuit 233 and a third switch 234. The fast lock circuit 233 is connected to the third switch 234 and the processor 21, respectively. To charge the loop filter circuit 232, the third switch 234 is connected to the first loop filter 2321 and the third loop filter 2323, respectively, for turning on the fast lock circuit 233 and the first loop filter 2321/ Three loop filter 2323.

The first pin and the third pin of the third switch 234 are connected to the first loop filter 2321 and the third loop filter 2323, respectively, and the second pin of the third switch 234 is grounded; specifically, the third switch The first and third pins of 234 are connected to the first and third pins of the second switch 2312, respectively.

When the frequency source works in the duplex mode and the fast lock circuit 233 is in the on state, when the transmission source is in the transmission state, the processor 21 controls the first pin of the third switch 234 to output a high level, and the fast lock circuit 233 pairs The first loop filter 2321 maintains the voltage so that the output voltage of the first loop filter 2321 is the preset first voltage value; when the transmission source is in the receiving state, the processor 21 controls the third of the third switch 234 The pin outputs a high level, and the fast lock circuit 233 charges the third loop filter 2323 so that the output voltage of the third loop filter 2323 is the preset second voltage value.

Further, the loop filter fast lock circuit 23 can respectively activate the transmit fast lock mode or the receive fast lock mode.

In the duplex preparation stage, the loop filter fast lock circuit 23 starts the receive fast lock mode, and the fast lock circuit 233 charges the first loop filter 2321 to maintain the level of the first loop filter 2321 at the receiving frequency source Corresponding level; when entering the receiving state, the processor 21 configures the receiving frequency for the phase-locked loop 22 to achieve the stability of the receiving frequency source.

Upon entering the transmission phase, the loop filter fast lock circuit 23 starts the transmission fast lock mode, and the fast lock circuit 233 charges the third loop filter 2323 to maintain the level of the third loop filter 2323 corresponding to the transmission frequency source When entering the transmitting state, the processor 21 configures the transmission frequency for the phase-locked loop 22 to achieve the stability of the transmission frequency source.

In addition, the frequency source may also include a transmit buffer, a transmit link connected to the transmit buffer, a receive buffer, and a receive link connected to the receive buffer (not shown in the figure), the buffer (including the transmit buffer and (Receive buffer) is used to temporarily store the signal transmitted by the voltage controlled oscillator 24.

Due to the use of a single voltage-controlled oscillator 24, the debugging optimization of the dual-channel voltage-controlled oscillator 24 is avoided, and the workload is reduced by half. The circuit parameters of the first loop filter 2321 and the third loop filter 2323 can be the same, avoiding the transmission frequency The two-way closed-loop debugging of the source and the receiving frequency source shortens the product development cycle.

In a specific embodiment, for a walkie-talkie, it includes a miniature duplex walkie-talkie system with an area of 30*50mm ² , which includes a complete radio frequency path and a control system. An external microphone and speaker can be used for duplex business and For the call, the frequency source adopts the frequency source in this embodiment. The frequency source saves about 40% of the area, which provides protection for the design of the walkie-talkie module. At the same time, it is also an important turning point in the development of the frequency source.

A single phase-locked loop 22 and a single voltage-controlled oscillator 24 are adopted. The transmission and reception share a single phase-locked loop 22 and a single voltage-controlled oscillator 24. The transmission and reception do not share a loop filter. In circuit design and power consumption , PCB area and cost are better than the frequency source solution of the duplex model. The PCB area is about 40% less than the frequency source solution of the duplex model, which is conducive to the miniaturization and integration of the frequency source. The cost of the frequency source is reduced by 50% %, which is very helpful for price competition of products and cost reduction. In terms of the switching time between the transmitting and receiving states, the single phase-locked loop 22 and the single voltage-controlled oscillator 24 use the switch 231, the loop filter circuit 232 voltage hold, and the frequency switching locking time technology to ensure the mutual switching time between the transmitting and receiving states Within 1ms, the problem of insufficient switching time between the transmitting and receiving states was solved.

Referring to FIG. 4, FIG. 4 is a schematic structural diagram of an embodiment of a communication device provided by the present application. The communication device includes a frequency source 41, a transmitter 42, and a receiver 43.

The frequency source 41 is connected to the transmitter 42 and the receiver 43 respectively, and is used to provide signals for the transmitter 42 and the receiver 43. The transmitter 42 is used to modulate the carrier signal with the baseband signal to generate a radio frequency signal and transmit it; the receiver 43 is used to receive a radio frequency signal and demodulate the radio frequency signal to obtain a baseband signal, where the frequency source is the frequency source in the foregoing embodiment.

The above are only examples of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by the description and drawings of this application, or directly or indirectly used in other related technical fields, The same reason is included in the patent protection scope of this application.

Claims

A frequency source, characterized in that it includes:

Processor, used to generate target frequency and control signal;

A phase-locked loop is used to output the pump voltage to the loop filter fast lock circuit according to the target frequency and the frequency of the radio frequency signal output by the voltage controlled oscillator;

A loop filter fast lock circuit, connected to the processor and the phase locked loop, is used to output a stable voltage control voltage according to the control signal and the pump voltage;

A voltage controlled oscillator, connected to the loop filter fast lock circuit and the phase locked loop, is used to output the radio frequency signal according to the voltage controlled voltage and send the radio frequency signal to the phase locked loop;

Wherein, the loop filter fast lock circuit includes a switch and a loop filter circuit connected to each other, the switch is used to turn on the phase locked loop, the loop filter circuit and the voltage controlled oscillator, the The loop filter circuit includes multiple loop filters, so that the transmitted and received signals in the duplex mode respectively use different loop filters; the loop filter circuit is used to filter and filter the pump voltage The interference signal in the pump voltage to output the voltage control voltage.
The frequency source according to claim 1, characterized in that

The switch includes a first switch and a second switch, the first switch is respectively connected to the processor, the phase-locked loop and the loop filter circuit, and the second switch is respectively connected to the processor, The loop filter circuit and the voltage controlled oscillator are connected.
The frequency source according to claim 2, wherein:

The loop filter circuit includes a first loop filter, a second loop filter, and a third loop filter, the first loop filter, the second loop filter, and the third The loop filter is connected to the first switch and the second switch, respectively.
The frequency source according to claim 3, characterized in that

The switch is an analog switch, and the first, second, and third pins of the first switch are connected to the input end of the first loop filter and the second loop filter, respectively. The input terminal and the input terminal of the third loop filter are connected, and the first, second, and third pins of the second switch are respectively connected to the output terminal of the first loop filter, The output terminal of the second loop filter and the output terminal of the third loop filter are connected.
The frequency source according to claim 4, wherein:

The first loop filter includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor. One end of the first resistor, the second resistor, the first capacitor, and the second capacitor are connected to the first pin of the first switch, and the other end of the first resistor is connected to the third One end of the resistor is connected, the other end of the second resistor is connected to one end of the fourth resistor and one end of the third capacitor, the other end of the third resistor is grounded through the fourth capacitor, the first The other end of the four resistors and one end of the fifth capacitor are connected to the first pin of the second switch, the other end of the first capacitor is grounded, and the other end of the second capacitor and the first resistor Is connected to the other end of the third capacitor, the other end of the third capacitor is connected to the other end of the third resistor and one end of the sixth capacitor, the other end of the fifth capacitor is grounded, and the other end of the sixth capacitor Ground.
The frequency source according to claim 5, characterized in that

The second loop filter includes a fifth resistor, a sixth resistor, a seventh capacitor, an eighth capacitor, and a ninth capacitor, and one ends of the fifth resistor, the sixth resistor, and the seventh capacitor are connected to The second pin of the first switch, the other end of the seventh capacitor is grounded, the other end of the fifth resistor is grounded through the eighth capacitor, and the other end of the sixth resistor is connected to the ninth One end of the capacitor is connected to the second pin of the second switch, and the other end of the ninth capacitor is grounded.
The frequency source according to claim 6, wherein:

The third loop filter includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, and a third Fifteen capacitors, one ends of the tenth capacitor, the eleventh capacitor, the seventh resistor, and the eighth resistor are connected to the third pin of the first switch, and the other of the tenth capacitor One end is grounded, the other end of the eleventh capacitor and the other end of the seventh resistor are connected to one end of the ninth resistor, the other end of the ninth resistor is grounded through the twelfth capacitor, the The other end of the eighth resistor and one end of the thirteenth capacitor are connected to one end of the tenth resistor, and the other end of the thirteenth capacitor and the other end of the ninth resistor are connected to the fourteenth One end of the capacitor, the other end of the fourteenth capacitor is grounded, the other end of the tenth resistor and one end of the fifteenth capacitor are connected to the third pin of the second switch, the fifteenth The other end of the capacitor is grounded.
The frequency source according to claim 4, wherein:

The processor controls the first pin of the first switch and the first pin of the second switch to output a high level, and the first loop filter passes the first switch and the phase lock Loop connection, the first loop filter is connected to the voltage controlled oscillator through the second switch, wherein the frequency source works in a simplex mode.
The frequency source according to claim 4, wherein:

The frequency source works in the duplex mode, and the fast lock circuit is in an off state. When the working state of the frequency source changes, the processor controls the second pin of the first switch and the first The second pin of the two switches outputs a high level, the second loop filter is connected to the phase-locked loop through the first switch, and the second loop filter passes through the second switch and the The voltage controlled oscillator is connected, and after a preset time, the processor controls the first pins of the first switch and the second switch to output a high level to convert the working state of the frequency source to The receiving state, or the processor controls the third pins of the first switch and the second switch to output a high level to convert the working state of the frequency source to the transmitting state.
The frequency source according to claim 3, characterized in that

The loop filter fast lock circuit further includes a fast lock circuit and the third switch, the fast lock circuit is respectively connected to the third switch and the processor, and is used to charge the loop filter circuit, The third switch is respectively connected to the first loop filter and the third loop filter, and is used to turn on the fast lock circuit and the first loop filter/the third loop路filter.
The frequency source according to claim 10, characterized in that

The first pin and the third pin of the third switch are respectively connected to the first loop filter and the third loop filter, and the second pin of the third switch is grounded.
The frequency source according to claim 11, characterized in that

The frequency source works in the duplex mode, and the fast lock circuit is in an on state. When the emission source is in the emission state, the processor controls the first pin of the third switch to output a high level, The quick lock circuit charges the first loop filter so that the output voltage of the first loop filter is a preset first voltage value; when the transmission source is in the receiving state, the The processor controls the third pin of the third switch to output a high level, and the fast lock circuit charges the third loop filter so that the output voltage of the third loop filter is pre Set the second voltage value.
A communication device, characterized in that it includes a frequency source, a transmitter and a receiver, and the frequency source is respectively connected to the transmitter and the receiver to provide signals for the transmitter and the receiver , The transmitter is used to modulate the carrier signal with a baseband signal to generate a radio frequency signal and transmit it, and the receiver is used to receive the radio frequency signal and demodulate the radio frequency signal to obtain a baseband signal, Wherein, the frequency source is the frequency source according to any one of claims 1-12.