WO2020132834A1

WO2020132834A1 - Method and device for stamping processing

Info

Publication number: WO2020132834A1
Application number: PCT/CN2018/123226
Authority: WO
Inventors: 林涛; 刘永志; 史永杰
Original assignee: 华为技术有限公司
Priority date: 2018-12-24
Filing date: 2018-12-24
Publication date: 2020-07-02
Also published as: CN113228564B; CN113228564A

Abstract

The present application relates to the technical field of communications, and disclosed therein are a method and device for stamping processing, which are used to improve the accuracy of stamping processing, thereby ensuring the accuracy of delay measurement. The method is: a network node entering a first timestamp separately on a plurality of PTP messages received by an Ethernet port, wherein the Ethernet port has a plurality of lanes, and the plurality of PTP messages are received by the network node by means of the plurality of lanes; once the plurality of PTP messages cross a clock domain, the network node updating a first timestamp value of the first timestamp separately entered on the plurality of PTP messages to a target timestamp value corresponding to a target PTP message received by a target lane among the plurality of lanes; and according to the difference between the target timestamp value and a timestamp value of a sending timestamp of the plurality of PTP messages, the network node determining the delay between the network node and a network node sending the plurality of PTP messages.

Description

Stamping processing method and device

Technical field

The present application relates to the field of communication technology, and in particular, to a stamping processing method and device.

Background technique

As the speed of Ethernet ports continues to increase, the bandwidth of Ethernet ports that need to support precise time synchronization (PTP) protocols is also getting higher and higher, such as 100 gigabit Ethernet (GE), 200GE, and 400GE. The current single data path (lane) Ethernet port is no longer sufficient to support the deployment of PTP protocol functions, and the PTP protocol function needs to be deployed on multiple lane Ethernet ports. When multi-lane Ethernet ports use PTP packets to measure the delay between two network nodes, for the sending direction, the PTP protocol requires that multiple lanes of the same Ethernet port must be aligned, that is, multiple lanes of the same Ethernet port are shot at the same time. The timestamp value of multiple PTP messages is the same, and is affected by the transmission environment of multiple lanes, such as the optical transmission of multiple lanes. Multiple lanes cannot guarantee the same delay. Therefore, the PTP protocol defines that In the direction, it is necessary to align the timestamp values of the timestamps of multiple lanes to receive PTP packets to the same reference lane. The currently defined reference lane is the lane with the longest delay.

In the prior art, in the receiving direction, the network node performs delay difference alignment on the PTP message received by each lane of the Ethernet port through a delay difference alignment buffer (deskew fifo), where the fifo refers to a first-in first-out buffer ( first input) First, the network node caches the PTP messages received by each lane through deskewfifo, and then reads out the cached PTP messages received by each lane through deskewfifo, so as to realize the PTP messages received by each lane The delay difference is aligned. The network node generates a timestamp for receiving the PTP message according to the difference between the read time of the PTP message received by each lane and the length of the PTP message buffered in deskew fifo. The delay of the lane relative to the reference lane compensates the timestamp value of the timestamp of multiple lanes receiving PTP packets to the timestamp value of the timestamp of the baseline lane receiving PTP packets, in order to delay the network nodes Take measurements.

However, asynchronous deskew fifo may occur in various scenarios. For example, when multi-rate Ethernet ports are mixed with the same set of media access control (MAC) logic, deskew fifo writes PTP in the Ethernet ports of network nodes The write clock (wr_clk) followed by the message is different from the read clock (rd_clk) followed by the PTP message. It is an asynchronous deskew fifo. The PTP message crosses the clock domain during the deskew fifo process. Because of the wr_clk and rd_clk Different frequencies and/or phases result in inaccurate timestamps generated by network nodes to receive PTP messages. Exemplarily, taking PTP message 1 received by lane1 as an example, the time that the network node writes PTP message 1 in deskew fifo according to wr_clk is 19:23:1.02 seconds on November 23, 2018 because of the frequency of rd_clk and wr_clk Different from the phase, the duration of deskew fifo cached PTP message 1 read by the network node is 0.1 seconds, and the time of deskew fifo read PTP message 1 is 19:23:1.13 seconds on November 23, 2018, resulting in The calculated time stamp value of PTP packet 1 is 19:23:1.03 seconds on November 23, 2018, and there is an error from 19:23:1.02 seconds on November 23, 2018, which leads to a gap between network nodes Delay measurement is not accurate.

Summary of the invention

The present application provides a stamping processing method and device to solve the problem of inaccurate delay measurement between network nodes due to inaccurate stamping processing in the prior art.

In the first aspect, the present application provides a method for processing a stamp. The method may be implemented by a network node. The method includes: the network node respectively punches a plurality of PTP messages received by an Ethernet port into a first time stamp; wherein, The Ethernet port has multiple lanes, and the multiple PTP packets are received by the network node through the multiple lanes; after the multiple PTP packets cross the clock domain, the network node sends all The first timestamp value of the first timestamp respectively entered in the multiple PTP messages is updated to the target timestamp value corresponding to the target PTP message in the multiple PTP messages; wherein, the target PTP message It is a PTP message received by a target lane among the multiple lanes, where the target lane is the lane with the shortest delay or the lane with the longest delay; the network node according to the target timestamp value and the multiple PTPs The difference between the time stamp value of the sending time stamp of the message determines the delay between the network node and the network node that sends the multiple PTP messages. In this application, the network node performs a stamp before the PTP message received by each lane of the Ethernet port crosses the clock domain, that is, before the PTP message received by each lane is written to deskewfifo, and the multiple PTP messages After crossing the clock domain, that is, when deskew fifo outputs the multiple PTP messages, the time stamp value of the PTP message received by each lane is compensated to the time stamp value of the PTP message received by the specified target lane To achieve delay difference alignment, avoid errors caused by asynchronous deskew fifo, improve the accuracy of stamping processing, and ensure the accuracy of delay determination between network nodes; at the same time, because the stamping occurs when PTP messages are written to deskew fifo Previously, there was no need for deskew fifo's write clock and read clock to maintain a consistent or multiple relationship, thereby enabling Ethernet ports of different rates to share a set of stamping processing logic, and each Ethernet port supports high-precision stamping processing. It also improves the scope of application of the stamping process.

In a possible design, each of the PTP packets received by the network node into the Ethernet port has a first timestamp, including: the first time stamp of the plurality of PTP packets received by the network node on the Ethernet port One bit (bit) is entered into the first time stamp. In this way, when the delay difference is aligned, it is easy to quickly compensate the time stamp value of the time stamp entered in the PTP message received by each lane to the time stamp value of the time stamp entered in the target PTP message received by the target lane .

In a possible design, each of the PTP packets received by the network node with a first timestamp includes: a setting of the plurality of PTP packets received by the Ethernet port by the network node Enter a first timestamp for a fixed bit; the network node determines that the multiple PTP packets correspond to the first one based on the distance between the set bit and the first bit respectively The first transmission time from bit to the set bit; the network node corrects the first timestamp value of the first timestamp into the plurality of PTP packets, and corrects it to the first timestamp value and the The difference in the first transmission duration corresponding to the PTP packet. In this way, the stamping scheme of the network node is enriched, and it is convenient to select a suitable stamping scheme according to the network environment in which the network node is located.

In a possible design, the network node respectively inserts a first timestamp into a plurality of PTP messages received by the Ethernet port, including: the network node according to the measurement period, according to the current measurement period The respective time stamps corresponding to the lanes, and the first timestamps are respectively entered into the multiple PTP packets received by the Ethernet port; the network node respectively corresponds to the target of the first timestamps based on the multiple PTP packets the distance between the bit and the first bit to determine the second transmission duration of the multiple PTP packets corresponding to the first bit to the target bit with the first timestamp respectively; the network node reports the multiple PTP packets The first timestamp value of the first timestamp is respectively entered in the text and corrected to the difference between the first timestamp value and the second transmission time length corresponding to the PTP message. In this way, the stamping scheme of the network node is enriched, and it is convenient to select a suitable stamping scheme according to the network environment in which the network node is located.

In a possible design, the first timestamp values of the first timestamps in the plurality of PTP messages are updated to the targets corresponding to the target PTP messages in the plurality of PTP messages The timestamp value includes: the time difference between the first timestamp value entered by the network node according to the first timestamp in the plurality of PTP packets and the delay of the lane receiving the PTP packet relative to the target lane And, update the first timestamp value of the first timestamp respectively entered in the multiple PTP packets; wherein the delay difference of multiple lanes relative to the target lane is based on , The second timestamp value of the second timestamp is entered into the set bit of the PTP message received by the target lane, and the second timestamp is entered into the set bit of the PTP message received by the multiple lanes, respectively The difference of the second timestamp value is determined. In this way, there is no need to identify the target PTP message each time the stamping process is performed, which simplifies the process of the stamping process.

In a possible design, the process of determining the target lane includes: when the network node establishes a link with the Ethernet port, the third time when the multiple PTP messages received by the Ethernet port are respectively entered into the network node In the third time stamp value of the time stamp, the lane corresponding to the target PTP packet with the maximum time stamp value or the target PTP packet with the minimum time stamp value is determined as the target lane. In this way, it helps to accurately determine the target lane and helps to ensure the accuracy of the stamping process.

In a second aspect, the present application provides a stamping processing device that has the function of implementing the above-described first aspect and any possible design method. The function can be realized by hardware, or can also be realized by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

In one possible design, the device may be a chip or an integrated circuit.

In a possible design, the device includes a transceiver and a processor, and the processor is used to execute a set of programs. When the program is executed, the device may execute the above-mentioned first aspect and any of the possible designs. method.

In a possible design, the device further includes a memory for storing the program executed by the processor.

In one possible design, the device is a network node.

In a third aspect, the present application provides a computer storage medium that stores a computer program, the computer program including instructions for performing the method of the first aspect or any one of the possible designs in the first aspect.

In a fourth aspect, the present application provides a computer program product containing instructions that, when run on a network node, cause the network node to perform the method in the first aspect or any possible design of the first aspect.

According to a fifth aspect, a chip is provided, the chip being connected to a memory for reading and executing a software program stored in the memory to implement the first aspect or any possible design of the first aspect Methods.

BRIEF DESCRIPTION

FIG. 1 is a schematic diagram of a delay request response mechanism in an embodiment of this application;

2 is a schematic diagram of the deskew fifo mechanism of lane in the embodiment of the present application;

FIG. 3A is a first schematic diagram of the communication system architecture in the embodiment of the present application;

3B is a second schematic diagram of the communication system architecture in the embodiment of the present application;

4 is a third schematic diagram of the communication system architecture in the embodiment of the present application;

FIG. 5 is a schematic diagram of a stamping process in an embodiment of this application;

FIG. 6 is a schematic structural diagram of a network node in an embodiment of this application;

7 is a second structural diagram of a network node in an embodiment of this application.

detailed description

The present application provides a method and device for stamping processing to improve the accuracy of stamping processing to ensure the accuracy of delay measurement between network nodes. The method and equipment are based on the same invention concept. Due to the method and equipment The principle of solving the problem is similar, so the implementation of the device and method can refer to each other, and the repetition is not repeated here.

In the following, some terms in this application will be explained to understand with those skilled in the art.

The embodiments of the present invention relate to network nodes. In a network system composed of independent but interconnected computers, workstations, servers, terminals, network devices, etc., each device with its own unique network address can be called a network node. At present, the network nodes may be switches, routers, computers, tablet computers, PDAs, mobile phones, and so on.

PTP protocol is issued by Institute of Electrical and Electronic Engineers (IEEE), also known as IEEE1588 protocol, which is used to synchronize the clocks of network nodes in the network. The time delay between the two network nodes is measured by time stamping t1, t2, t3 and t4 on the sending and receiving positions of the two network nodes in the Ethernet port respectively. As shown in Figure 1, the slave node sends the synchronization message (sync) t1 timestamp according to the master node, the slave node receives the sync t2 timestamp, and the slave node sends a delay request message (delay_request )'S t3 timestamp, the master node receives the delay_request t4 timestamp to determine the delay between the master node and the slave node. In order to facilitate the slave node's knowledge of the timestamp of the message sent by the master node, the master node sends the report After the text, you can also tell the slave node to send the timestamp by following the message with the message sending timestamp. For example, after the master sends sync, it will record the sync sending timestamp (t1 timestamp) following message (follow_up) is sent to the slave node. In addition, the delay request response message (delay_respone) carries the t4 timestamp of the master node receiving delay_request sent by the slave node. The delay (path) between master and slave is (t2-t1) or (t4-t3), and the average delay (mean path) is [(t2-t1)+(t4-t3)]/ 2 or [(t2-t3)+(t4-t1)]/2, usually, in order to ensure the accuracy of delay measurement, mean time path delay is often used in delay measurement. In the prior art, in an Ethernet port with multiple lanes, in the receiving direction, the time stamp values of the time stamps of the PTP messages received by multiple lanes are compensated to the time stamp values of the time stamps of the PTP messages received on the reference lane After that, the timestamp of any lane receiving PTP message can be used as the timestamp of receiving PTP message when measuring the delay.

Time stamp, also called timestamp, is usually a sequence of characters that uniquely identifies the time of a certain moment. The time stamp value involved in this application is the time of a certain moment identified by the time stamp, such as November 2018 17:45:32 on the 23rd.

The transmission time of the PTP message and the reception time of the PTP message, in this application, the transmission time of the PTP message refers to the time of sending the first bit of the PTP message; the reception time of the PTP message, also known as the PTP message The arrival time of the message refers to the time to receive the first bit of the PTP message.

The deskew of the lane, that is, the delay difference alignment of the data channel, refers to aligning the PTP messages received by multiple lanes according to the lane with the longest delay. Exemplarily, as shown in FIG. 2, the serial data stream to be transmitted is 123456789, and three lanes are established at the transmitting (transport, tx) end and the receiving (receive, rx) end, respectively lane 0, lane 1 and lane 2, corresponding to lane 0. Send data (tx data), that is, PTP message is 147, tx data corresponding to lane1 is 258, tx data corresponding to lane2 is 369, lane0, lane1 and lane2 at the tx end send PTP messages 147, 258 and 369, tx at the same time Timestamping events at the end and at the rx end occur on the first bit of the PTP message, for example, the first bit "2" of the PTP message 258. The rx end receives PTP packets 147, 258, and 369 on lane0, lane1, and lane2, respectively. Because the link delays corresponding to lane0, lane1, and lane2 are different, the rx end receives PTP messages on lane0, lane1, and lane2. The reception time of the text is different. The rx end writes the PTP received by each lane to deskewfifo, and caches the received PTP message through deskewfifo. deskewfifo will receive the PTP message for each lane that has received the PTP message. The time is aligned with the receiving time of the latest PTP packet received by the lane. As shown in FIG. 2, the latest received PTP message is lane2, and the reception time of each lane to receive the PTP message is aligned with the reception time of lane2 to receive the PTP message.

The deskew fifo of the lane can also calculate the delay difference between the lanes. For example, the sending time of each lane’s PTP message is 0, then the receiving time of each lane’s PTP message is the lane’s time. linkdelay. The implementation of deskew fifo will cause the buffer delay of each lane to increase by 3, which is caused by the deskew fifo implementation and needs to be eliminated. The total delay of lane2 read by deskew fifo at rx end is 108, the link delay of lane2 is 108-3=105, the link delay of lane0 is 100, the linkdelay of lane1 is 103, lane0 and The delay difference of lane2 is 8-3=5, and the delay difference of lane1 and lane2 is 5-3=2, but the above are all implemented based on the wr_clk and rd_clk of deskew fifo, but actually the wr_clk of the Ethernet port Unlike rd_clk, there is an error in the determined total delay and/or deskew buffer delay, which in turn leads to inaccurate calculation of the link delay of each lane, that is, the calculation of the reception time of the PTP message received by each lane is inaccurate. The time stamp value of the stamp is also inaccurate.

In addition, it should be understood that the multiples referred to in this application refer to two or more than two; in the description of this application, the words "first" and "second" are only used to distinguish the description , And cannot be understood as indicating or implying relative importance, nor can it be understood as indicating or implying order.

The embodiments of the present application will be described in detail below with reference to the drawings.

FIG. 3A is a communication system architecture applicable to a stamping process provided by an embodiment of the present application. As shown in FIG. 3A, the communication system includes: a network node 1 and a network node 2, and an Ethernet port 1 of the network node 1 passes The physical media dependent layer interface (PMD) of the network node 1 establishes a link via the PMD of the network node 2 and the Ethernet port of the network node 2, as shown in FIG. 3A, the network node 1 and the network node 2 are established together From 0 to N, there are N+1 lanes in total. The Ethernet ports of the network nodes include: MAC, physical coding layer (PCS), physical media connection layer (physical medium attachment, PMA).

It should be understood that the embodiments of the present application can also be applied to other communication systems, and also to the case where there is a third-party node between network node 1 and network node 2. As shown in FIG. 4, there is a transparent connection between network node 1 and network node 2. Transmission node (tcnode). Among them, if there is a third-party node between the network node 1 and the network node 2, when determining the delay between the network node 1 and the network node 2, the delay caused by the third-party node needs to be removed. As shown in FIG. 4, the path between network node 1 and network node 2 is (t2-t1-cf1) or (t4-t3-cf2), and the mean path delay is [(t2-t1-CF1)+(t4 -t3-CF2)]/2 or [(t2-t3)+(t4-t1)–(CF1+CF2)]/2, where cf1 is the transmission of PTP report between network node 1 and network node 2 caused by tcnode The delay caused by the text (sync), cf2 is the delay caused by the transmission of the PTP message (delay_request) between the network node 1 and the network node 2 caused by tcnode.

Still taking FIG. 3A as an example, taking network node 1 as the tx end and network node 2 as the rx end, perform one on the N+1 lanes established between Ethernet port 1 and Ethernet port 2 of network node 1 and network node 2 Take the stamping process of sending and receiving PTP packets (such as sync, delay_request, etc.) as an example to illustrate, where the number of PTP packets in one beat is the same as the number of lanes, and each lane transmits one in the same beat PTP message.

A. Ethernet port 1 of network node 1 simultaneously sends PTP messages on lane 0 ~ N, each lane sends a PTP message, and generates a transmission time stamp (such as t1 time stamp, t3 time stamp, etc.) on the PMA of Ethernet port 1 ; B. Ethernet port 2 of network node 2 receives multiple PTP messages sent by network node 1 through lane0 ~ N, and before the PTP message received by each lane crosses the clock domain, that is, the PTP received by each lane Before the message is written to deskew fifo, enter the first timestamp for the PTP message received by each lane. Specifically, because deskew fifo is located in the PCS of the Ethernet port, in this application, you can pass the PMA and its neighbors. Enter the first timestamp for the received PTP message to achieve the timestamp when the PTP message crosses the time domain. For example, in the vicinity of the PMA serializer/deserializer (serializer/deserializer, serdes) entrance, a first timestamp is entered for each received PTP, and the entered first timestamp is accompanied by the transmission of the PTP message.

C. After receiving multiple PTP messages sent by network node 1 across the clock domain, network node 2 receives the multiple PTP messages written in deskew fifo, and then outputs it through deskew fifo after receiving the multiple PTP messages. The first timestamp value of the first timestamp is entered in each PTP message, and updated to the target timestamp value corresponding to the target PTP message in the multiple PTP messages, so as to realize the PTP message received by each lane Delay difference alignment.

Wherein, the target PTP message is a PTP message received by the target lane among the multiple lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay.

Specifically, if the target lane is the lane with the longest delay from lane0 to N, the PTP message with the largest first timestamp value among the multiple PTP messages received by network node 2 is lane0. ~ The PTP message received by the lane with the longest delay in N, the network node 2 may update the first time stamp value of the first time stamp in the PTP message received by each lane, and update it to the number received by the network node 2 The first timestamp value of the first timestamp value of the first timestamp is entered in a PTP message; in the same way, if the target lane is the lane with the shortest delay among lane0~N, network node 2 can The first timestamp value entered into the first timestamp in the PTP message received by the lane is updated to the smallest first timestamp value entered into the first timestamp among the multiple PTP messages received by the network node 2 Timestamp value, to achieve the timestamp value of the timestamp received by each lane to receive PTP packets, to align the compensation to the same target lane, and the target lane of this application is compatible with the benchmark lane of the existing protocol, that is, the lane with the longest delay . After updating, the network node 2 updates the first timestamp value (target timestamp value) of the first timestamp according to the updated first timestamp of the PTP message received by any lane and the time when the network node 1 sends multiple PTP messages. The difference of the time stamp value can determine the delay between the network node 1 and the network node 2. For the time stamp value of the transmission time stamp of the network node 1 sending multiple PTP packets, the network node 2 can send through the network node 1 After multiple PTP messages are sent, the following message that carries the sending timestamp of the multiple PTP messages is learned.

Take lane1 as the target lane, and PTP message 1 received by network node 2 through lane1 as an example. The reception time of B and network node 1 to receive PTP message 1 is 19:23:1.02 seconds on November 23, 2018, which is the PTP message. The first timestamp is entered in the text 1, and the first timestamp value of the first timestamp is 19:23:1.02 seconds on November 23, 2018. After the first timestamp is entered in the PTP message 1, it is written to deskewfifo The delay difference of multiple lanes is aligned; when C, deskewfifo outputs a PTP message, the first timestamp value of the first timestamp of PTP message 1 is updated to the first time of the target PTP message received by the target lane The first timestamp value of the stamp is still 19:23:1.02 seconds on November 23, 2018. Referring to the communication system architecture of the existing stamping process shown in FIG. 4, it can be known that the prior art stamps “B” to the PTP message received by each lane, which occurs after the PTP message is written to deskewfifo, because of the Ethernet The wr_clk of the port, that is, the external PTP packet input clock (such as the serdes clock) is different from the rd_clk, that is, the internal clock of the Ethernet port, resulting in the inaccurate timestamp value of the received timestamp determined by the network node for each lane, as determined The first timestamp value of the first timestamp of PTP message 1 is 19:23:1.03 seconds on November 23, 2018, which in turn leads to inaccurate measurement of the delay between network nodes. The PTP message is stamped "B", which occurs before the PTP message is written to deskewfifo. The PTP message does not cross the clock domain when it is stamped, ensuring the accuracy of the PTP message received by each lane. , To ensure the accuracy of delay measurement between network nodes.

Optionally, for the confirmation of the target lane, the network node 1 and the network node 2 can receive each lane of the Ethernet port 2 when the Ethernet port 1 and the Ethernet port 2 are initialized to establish a chain, or when the chain is re-established. The network node 1 sends the PTP packet sent via Ethernet port 1 into the third timestamp respectively. If the target lane is the lane with the smallest delay, the PTP packet with the smallest third timestamp value will be entered into the third timestamp. The lane is determined to be the target lane; if the target lane is the lane with the largest delay, the lane of the PTP packet with the third timestamp with the largest third timestamp value is determined as the target lane. Among them, when the chain is initialized or re-established, the network node 2 enters a third timestamp for the PTP message received by each lane of the Ethernet port 2, which can occur before the PTP message is written to deskewfifo, or It can happen after the PTP message is written to deskew fifo.

Optionally, before crossing the clock domain, the network node 2 respectively inserting the first timestamp into multiple PTP packets received by the Ethernet port 2 may include the following manners:

method one:

The network node 2 enters a first timestamp respectively into the first bit of the multiple PTP packets received by the Ethernet port 2.

Specifically, for each lane of the Ethernet port 2, before receiving the PTP message across the clock domain, the network node 2 adds a first time stamp to the PTP message. Because the timestamp value of the first timestamp entered in the first bit of the PTP message can truly reflect the receiving time of the PTP message, there is no need to correct the timestamp value of the first timestamp of the PTP message. Simplified the stamping process.

Method 2:

The network node 2 enters the first time stamp into the setting bits of the multiple PTP packets received by the Ethernet port 2 respectively. The setting bit may be the first bit, the third bit, the seventh bit, etc. of the PTP packet. Optionally, the setting bit is located in the PTP packet header (sop bit).

Specifically, for each lane of the Ethernet port 2, before receiving the PTP message across the clock domain, the network node 2 adds a first time stamp to the PTP message.

Since the setting bit can be the third bit, the seventh bit, etc., the first timestamp value of the first timestamp is entered into the setting bit of the PTP message, which cannot truly reflect the reception time of the PTP message. In the application, the network node 2 also needs to correct the time stamp value of the first time stamp in each received PTP message to the reception time of the first bit of the PTP message. Specifically, for the PTP message received by each lane, the network node 2 determines that the PTP message is transmitted from the first bit to the set bit in the network node based on the distance between the set bit of the PTP and the first bit The first transmission time is the same, because the set bit is the same for each lane, and the PTP packet received by each lane is transmitted from the first bit to the set bit. The first transmission time is the same, and the network node 2 reports the PTP message. The first timestamp value of the first timestamp is entered in the text and corrected to the difference between the first timestamp value and the first transmission duration. Optionally, the network node 2 corrects the timestamp value of the first timestamp in each received PTP message to the reception time of the first bit of the PTP message, which can cross the clock domain in the PTP message Before, it can also be achieved after the PTP message crosses the clock domain, before updating the first time stamp value into the first time stamp in the PTP message to the target time stamp value corresponding to the target PTP message.

Exemplarily, taking PTP message 3 received by lane 3 and setting bit as the first 7 bit as an example, the first time stamp value of the first time stamp entered in PTP message 3 is 19:23 on November 23, 2018 Minute 1.05 seconds, the first transmission time of PTP message 3 from the first bit to the seventh bit is "0.1 seconds", then the first timestamp value of the first timestamp of PTP message 3 after correction is 2018 November 23, 19:23:1.04 seconds.

Method 3:

The network node 2 according to the measurement period, according to the corresponding stamping time of the multiple lanes of the Ethernet port 2 in the current measurement period, before the PTP message crosses the clock domain, the multiple PTP messages received by the Ethernet port 2 are respectively entered into the first A time stamp.

The measurement period for the delay measurement between the network node 1 and the network node 2 is known, and the network node 2 can know the time period during which each lane of the Ethernet port 2 must receive the PTP message in the current measurement period, and can Each lane must be able to receive a PTP message in the current measurement period, and determine the current measurement period of Ethernet port 2. The time for each lane to stamp the received PTP message. Optionally, the current measurement period of the Ethernet port 2 The first timestamp entered by each lane for the time stamped by the received PTP message is located in the header of the PTP message received by each lane. The network node 2 adds a first time stamp to the PTP message received by each lane of the Ethernet port 2 according to the time when the Ethernet port 2 of the Ethernet port 2 stamps the received PTP message.

Because the target bit of the first timestamp in the PTP message may be the first bit of the PTP message, it may also be the second bit, the fifth bit, etc., which cannot truly reflect the reception time of the PTP message. In this application, the network node 2 is also required to correct the time stamp value of the first time stamp entered in each received PTP message to the reception time of the first bit of the PTP message. Specifically, for the PTP message received by each lane, the network node 2 determines, based on the distance between the target bit of the PTP that hits the first timestamp and the first bit, that the PTP message in the network node is determined by the first bit transmission to the second transmission duration of the target bit with the first timestamp, the network node 2 corrects the first timestamp value into the first timestamp in the PTP message, and corrects it to the first timestamp value and the first timestamp value A difference in transmission time. Optionally, the network node 2 corrects the timestamp value of the first timestamp in each received PTP message to the reception time of the first bit of the PTP message, which can cross the clock domain in the PTP message Previously, after the PTP crossed the clock domain, as long as the first timestamp value into the first timestamp in the PTP message was updated to the target timestamp value corresponding to the target PTP message, it may be implemented.

Of course, the network node 2 updates the first timestamp value of the first timestamp in the multiple PTP messages received by the Ethernet port 2 to the corresponding value of the target PTP message in the received multiple PTP messages When the target timestamp value, you can also pass, for each PTP message received, according to the PTP message into the first timestamp value of the first timestamp, and the received lane of the PTP message relative to the target lane The sum of the delay differences updates the first timestamp value of the first timestamp entered in the PTP message.

Specifically, the network node 1 may send a beat PTP message in advance to lane 0 to N of the Ethernet port 1, and the Ethernet port 2 of the network node 2 before the PTP message received by each lane of the Ethernet port 2 crosses the clock domain, Enter a second timestamp to the bit of the PTP message received by each lane, according to the second timestamp value of the second timestamp of the PTP message received by each lane and the second timestamp of the PTP message received by the target lane The difference of the second time stamp value of the stamp determines the delay difference of each lane relative to the target lane.

Through the stamping processing method of the present application, it can also be applied to a variety of Ethernet port combination (comb) scenarios. In this case, each Ethernet port shares resources such as MAC/PCS/forward error correction (FEC) and each Ethernet port. The working clock frequency (the internal clock frequency of the Ethernet port) is different from the clock frequency of the external PTP message input (such as the serdes clock frequency of the PMA position), but because the stamping process of this application is to cross the clock before the PTP message. Poke, so it is also applicable to a variety of Ethernet port comb scenarios.

Based on the above embodiment, as shown in FIG. 5, an embodiment of the present application provides a stamping processing method, and specific steps include:

S501: The network node respectively inserts a first timestamp into multiple PTP packets received on the Ethernet port. Wherein, the Ethernet port has multiple lanes, and the multiple PTP packets are received by the network node through the multiple lanes.

S502: After the multiple PTP messages cross the clock domain, the network node updates the first timestamp values of the first timestamps in the multiple PTP messages to update the multiple PTPs The target timestamp value corresponding to the target PTP packet in the packet. Wherein, the target PTP message is a PTP message received by the target lane among the multiple lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay;

S503: The network node determines the network node and the network node that sent the plurality of PTP messages according to the difference between the target timestamp value and the timestamp value of the sending timestamp of the multiple PTP messages Time delay.

Based on the same concept, FIG. 6 is a network node 600 provided by this application, including: a processor 601 and a transceiver 602;

The processor 601, through the transceiver 602, before the multiple PTP messages received on the Ethernet port are written to the deskew fifo of the Ethernet port, respectively, the first timestamps are added to the multiple PTP messages; wherein, the Ethernet The port has multiple lanes, and the multiple PTP packets are received by the network node through the multiple lanes;

The processor 601 is further configured to update the first timestamp value of the first timestamp in the multiple PTP packets when the deskew fifo outputs the multiple PTPs, and update the first timestamp value to the multiple Target time stamp value corresponding to the target PTP message in the PTP messages; wherein, the target PTP message is the PTP message received by the target lane in the multiple lanes, and the target lane is the lane with the shortest delay or The lane with the longest delay;

The processor 601 is further configured to determine the network node and send the multiple PTP messages according to the difference between the target time stamp value and the time stamp value of the sending time stamp of the multiple PTP messages The delay between the network nodes. .

Optionally, the processor 601 is specifically configured to use the transceiver 602 to write a plurality of PTP packets received on the Ethernet port before writing to the deskew fifo of the Ethernet port. The first timestamp is entered for each bit.

Optionally, the processor 601 is specifically configured to use the transceiver 602 to set the multiple PTP packets before the multiple PTP packets received on the Ethernet port are written to the deskew fifo of the Ethernet port The first timestamp is entered into each bit; based on the distance between the set bit and the first bit corresponding to the multiple PTP packets, it is determined that the multiple PTP packets respectively correspond to the first bit to the set bit The first transmission time; correct the first timestamp value of the first timestamp in each of the multiple PTP messages to the first transmission time length corresponding to the first timestamp value and the PTP message The difference.

Optionally, the processor 601 is specifically configured to, according to the measurement period, according to the respective stamping times of the multiple lanes of the Ethernet port in the current measurement period, receive multiple PTP packets on the Ethernet port through the transceiver 602 Before writing to the deskew fifo of the Ethernet port, the first timestamps are respectively entered into the plurality of PTP packets; the target bit and the first one corresponding to the first timestamps are respectively entered based on the plurality of PTP packets the distance of the bit, to determine the second transmission duration of the multiple PTP packets corresponding to the first bit to the target bit with the first timestamp respectively; to insert the first timestamp respectively into the multiple PTP packets The first timestamp value of is corrected to the difference between the first timestamp value and the second transmission duration corresponding to the PTP packet.

Optionally, the processor 601 is specifically configured to input a first timestamp value into the plurality of PTP packets, and the value of the lane receiving the PTP packet relative to the target lane The sum of the delay difference updates the first timestamp value of the first timestamp respectively entered in the multiple PTP packets; where the delay difference of multiple lanes relative to the target lane is based on Before writing to deskewfifo of the Ethernet port, enter the second timestamp value of the second timestamp into the setting bit of the PTP message received by the target lane, respectively, and the PTP message received by the multiple lanes The set bit is determined by the difference of the second time stamp value into the second time stamp.

Optionally, the processor 601 is specifically configured to, when a link is established on the Ethernet port, enter a third timestamp value of a third timestamp respectively into a plurality of PTP packets received by the Ethernet port The lane corresponding to the target PTP packet with the maximum time stamp value or the target PTP packet with the minimum time stamp value is determined as the target lane.

Based on the same concept, embodiments of the present application also provide a network node.

As shown in FIG. 7, the network node 700 includes a memory 701, a processor 702 and a transceiver 703. The memory 701, the processor 702, and the transceiver 703 are linked by a bus. The memory 701 is used to store computer-executed instructions. When the network node 700 is running, the processor 702 executes the computer-executed instructions stored in the memory 701 through the transceiver 703, so that the network node 700 implements any of the above stamping processing methods. The relevant descriptions of the above and the accompanying drawings are not repeated here.

An embodiment of the present application provides a computer storage medium that stores a computer program, and the computer program includes instructions for executing the stamping processing method described in the foregoing method embodiment.

Embodiments of the present application provide a computer program product containing instructions that, when run on a network node, enable the network node to implement the stamping processing method described in the foregoing method embodiment.

An embodiment of the present application provides a chip that is connected to a memory and used to read and execute a software program stored in the memory to implement the stamping processing method described in the foregoing method embodiments.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

This application is described with reference to flowcharts and/or block diagrams of methods, devices (systems), and computer program products according to embodiments of the application. It should be understood that each flow and/or block in the flowchart and/or block diagram and a combination of the flow and/or block in the flowchart and/or block diagram may be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processing machine, or other programmable data processing device to produce a machine that enables the generation of instructions executed by the processor of the computer or other programmable data processing device A device for realizing the functions specified in one block or multiple blocks of one flow or multiple flows of a flowchart and/or one block or multiple blocks of a block diagram.

These computer program instructions may also be stored in a computer readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, the instructions The device implements the functions specified in one block or multiple blocks of the flowchart one flow or multiple flows and/or block diagrams.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are performed on the computer or other programmable device to produce computer-implemented processing, which is executed on the computer or other programmable device The instructions provide steps for implementing the functions specified in one block or multiple blocks of the flowchart one flow or multiple flows and/or block diagrams.

Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. In this way, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

A stamping processing method, characterized in that the method includes:

The network node respectively inserts a first timestamp into multiple precision time synchronization protocol PTP messages received by the Ethernet port; wherein the Ethernet port has multiple data path lanes, and the multiple PTP messages are the network node Received through the multiple lanes;

After the multiple PTP messages cross the clock domain, the network node updates the first timestamp values of the first timestamps in the multiple PTP messages to update the multiple PTP messages The target timestamp value corresponding to the target PTP message in; where the target PTP message is the PTP message received by the target lane in the multiple lanes, and the target lane is the lane with the shortest delay or the longest delay Lane

The network node determines the difference between the network node and the network node sending the plurality of PTP messages according to the difference between the target time stamp value and the time stamp value of the sending time stamp of the multiple PTP messages Delay.
The method according to claim 1, wherein the network node respectively entering a first timestamp into a plurality of PTP messages received by the Ethernet port includes:

The network node respectively inserts a first timestamp into the first bit of multiple PTP messages received by the Ethernet port.
The method according to claim 1, wherein the network node respectively entering a first timestamp into a plurality of PTP messages received by the Ethernet port includes:

The network node respectively inserts a first timestamp into the setting bits of multiple PTP packets received by the Ethernet port;

The network node determines, based on the distances between the set bit and the first bit that the multiple PTP packets respectively correspond to the first bit, the first transmission duration corresponding to the first bit to the set bit ;

The network node corrects the first timestamp value of the first timestamp into the plurality of PTP messages, respectively, and corrects the difference to the first timestamp value and the first transmission time length corresponding to the PTP message value.
The method according to claim 1, wherein the network node respectively entering a first timestamp into a plurality of PTP messages received by the Ethernet port includes:

According to the measurement period, according to the measurement period, according to the respective stamping times of the multiple lanes of the Ethernet port of the current measurement period, the first timestamps are respectively inserted into the multiple PTP packets received by the Ethernet port;

The network node determines that the plurality of PTP packets correspond to the first bit to the first bit, respectively, based on the distance between the target bit and the first bit corresponding to the first timestamp respectively entered into the plurality of PTP packets Timestamp of the second transmission duration of the target bit;

The network node corrects the first timestamp value of the first timestamp into the plurality of PTP messages, respectively, and corrects it to the difference between the first timestamp value and the second transmission duration corresponding to the PTP message value.
The method according to claim 1, wherein the first timestamp value into which the first timestamp is respectively entered in the plurality of PTP packets is updated to the target PTP in the plurality of PTP packets The target timestamp value corresponding to the message includes:

The network node adds the first timestamp value of the first timestamp to the plurality of PTP packets, and the difference between the delay of the lane receiving the PTP packet relative to the target lane. Update the first timestamp value of the first timestamp respectively entered in multiple PTP packets;

Wherein, the delay difference of multiple lanes relative to the target lane is based on the second timestamp value of the second timestamp entered into the setting bit of the PTP message received by the target lane before crossing the clock domain, It is determined by the difference between the second timestamp value of the second timestamp and the set bit of the PTP message received by the multiple lanes respectively.
The method of claim 1, wherein the process of determining a target lane includes:

When the Ethernet node establishes a link with the Ethernet port, the third timestamp value of the third timestamp respectively entered into the plurality of PTP messages received by the Ethernet port, the target PTP message with the maximum timestamp value The corresponding lane of the target PTP packet with the minimum timestamp value or the corresponding lane is determined as the target lane.
A network node, characterized by comprising: a processor and a transceiver;

Before the multiple delay time synchronization protocol PTP messages received by the Ethernet port are written into the Ethernet port delay difference alignment buffer deskew fifo through the transceiver, the processor enters the multiple PTP messages respectively into the first Time stamp; wherein, the Ethernet port has multiple data path lanes, and the multiple PTP packets are received by the network node through the multiple lanes;

The processor is further configured to update the first timestamp value of the first timestamp in the multiple PTP messages when the deskew fifo outputs the multiple PTP messages, and update the value to the A target timestamp value corresponding to a target PTP message in multiple PTP messages; wherein, the target PTP message is a PTP message received by a target lane in the multiple lanes, and the target lane is the lane with the shortest delay Or the lane with the longest delay;

The processor is further configured to determine, based on the difference between the target timestamp value and the timestamp value of the sending timestamp of the plurality of PTP messages, the network node and the number of sending the plurality of PTP messages Delay between network nodes.
The network node according to claim 7, wherein the processor is specifically configured to write a plurality of PTP messages received on the Ethernet port through the transceiver before writing to deskewfifo of the Ethernet port. The first timestamp of the first bit of multiple PTP packets is respectively entered.
The network node according to claim 7, wherein the processor is specifically configured to write a plurality of PTP messages received on the Ethernet port through the transceiver before writing to deskewfifo of the Ethernet port. The setting bits of multiple PTP packets are respectively entered with a first time stamp; based on the distances between the set bits and the first bit corresponding to the multiple PTP packets, it is determined that the multiple PTP packets respectively correspond The first transmission time from the first bit to the set bit; the first timestamp value of the first timestamp respectively entered in the multiple PTP packets, corrected to the first timestamp value and the PTP The difference in the first transmission duration corresponding to the packet.
The network node according to claim 7, wherein the processor is specifically configured to, according to the measurement period, according to the respective stamping times of multiple lanes of the Ethernet port of the current measurement period, pass the transceiver in the Ethernet Before writing multiple PTP messages received on the port to the deskew fifo of the Ethernet port, the first timestamps are respectively entered into the multiple PTP messages; the first time is entered based on the multiple PTP messages respectively The distance between the target bit of the stamp and the first bit to determine the second transmission duration of the multiple PTP packets corresponding to the first bit to the target bit with the first time stamp respectively; the multiple PTP packets The first timestamp value of the first timestamp respectively entered in is corrected to the difference between the first timestamp value and the second transmission duration corresponding to the PTP message.
The network node according to claim 7, wherein the processor is specifically configured to input a first timestamp value into the plurality of PTP packets and receive the PTP The sum of the delay difference of the lane of the message relative to the target lane updates the first timestamp value of the first timestamp respectively entered in the multiple PTP packets; wherein multiple lanes are respectively relative to the target The delay difference of the lane is based on the second timestamp value entered into the second timestamp of the setting bit of the PTP message received by the target lane before writing to the deskewfifo of the Ethernet port, respectively. The setting bit of the PTP message received by the multiple lanes is determined by the difference between the second timestamp value of the second timestamp.
The network node according to claim 7, wherein the processor is specifically configured to, when the Ethernet port establishes a link, respectively enter a plurality of PTP messages received on the Ethernet port into a third In the third timestamp value of the timestamp, the lane corresponding to the target PTP packet with the largest timestamp value or the corresponding lane of the target PTP packet with the smallest timestamp value is determined as the target lane.
A network node, characterized by comprising a processor, a transceiver and a memory;

The memory stores a computer program;

The transceiver is used for data transmission and reception;

The processor is configured to call a computer program stored in the memory and execute the method according to any one of claims 1-7 through the transceiver.
A computer storage medium, characterized in that the computer-readable storage medium includes a computer program, which causes the network node to execute the method according to any one of claims 1-7 when the computer program runs on the network node .
A computer program product, characterized in that, when a network node reads and executes the computer program product, the network node is caused to perform the method according to any one of claims 1-7.
A chip, characterized in that the chip is connected to a memory for reading and executing a software program stored in the memory to implement the method according to any one of claims 1-7.