CN113228564B - Stamping processing method and device - Google Patents

Abstract

The present application relates to the field of communication technology, and discloses a stamping processing method and device, which are used to improve the accuracy of stamping processing, thereby ensuring the accuracy of delay measurement. The method is as follows: a network node enters first time stamps into a plurality of PTP messages received by an Ethernet port; wherein the Ethernet port has a plurality of lanes, and the plurality of PTP messages are obtained by the network node through the received by the multiple lanes; after the multiple PTP messages cross the clock domain, the network node updates the first timestamp values of the first timestamps in the multiple PTP messages to The target time stamp value corresponding to the target PTP message received by the target lane in the multiple lanes; the network node according to the difference between the target time stamp value and the time stamp value of the sending time stamp of the multiple PTP messages value, to determine the delay between the network node and the network node sending the multiple PTP messages.

Description

A stamping processing method and device

technical field

The present application relates to the technical field of communications, and in particular to a stamping processing method and device.

Background technique

As the rate of Ethernet ports continues to increase, the bandwidth of Ethernet ports that need to support precision time synchronization protocols (precision time protocol, PTP) is also increasing, such as 100 Gigabit Ethernet (gigabit ethernet, GE), 200GE and 400GE, etc., The current single data path (lane) Ethernet port is not enough to support the deployment of the PTP protocol function, and the PTP protocol function needs to be deployed on the multi-lane Ethernet port. When PTP packets are used to measure the delay between two network nodes on a multi-lane Ethernet port, for the sending direction, the PTP protocol requires that multiple lanes of the same Ethernet port must be aligned and sent, that is, multiple lanes of the same Ethernet port are shot at the same time The time stamp value of multiple PTP packets sent is the same, which is affected by the transmission environment of multiple lanes, such as optical fiber transmission of multiple lanes, etc. Multiple lanes cannot guarantee consistent delays. Therefore, the PTP protocol definition, when receiving Direction, the time stamp values of the time stamps received by multiple lanes for PTP packets need to be compensated and aligned to the same reference lane, and the currently defined reference lane is the lane with the longest delay.

In the prior art, in the receiving direction, the network node performs delay difference alignment on the PTP message received by each lane of the Ethernet port through a delay difference alignment buffer (deskew fifo), and the fifo refers to a first-in-first-out buffer ( firstinput first output), the network node caches the PTP packets received by each lane through the deskew fifo, and reads out the cached PTP packets received by each lane through the deskew fifo, so as to implement the PTP packets received by each lane Delay difference alignment, the network node generates the time stamp of receiving the PTP message according to the difference between the read time of the PTP message received by each lane and the buffering time of the PTP message in deskew fifo, and according to the time stamp of multiple lanes Compared with the delay difference of the reference lane, the time stamp value of the time stamp of multiple lanes receiving the PTP message is compensated to the time stamp value of the time stamp of the reference lane receiving the PTP message, so as to optimize the delay between network nodes Measurement.

However, asynchronous deskew fifos will appear in various scenarios. For example, when multi-rate Ethernet ports are mixed with the same set of media access control (MAC) logic, deskew fifos will be written to PTP in the Ethernet port of the network node. The write clock (wr_clk) that the message follows is different from the read clock (rd_clk) that reads the PTP message. It is an asynchronous deskew fifo, and the PTP message crosses the clock domain during the deskew fifo process, because the wr_clk and rd_clk The frequencies and/or phases are different, resulting in inaccurate time stamps generated by network nodes for receiving PTP messages. Exemplarily, taking the PTP message 1 received by lane1 as an example, the time when the network node writes the PTP message 1 in the deskew fifo according to wr_clk is 19:23:1.02 seconds on November 23, 2018, because the frequency of rd_clk and wr_clk And/or the phase is different, the deskew fifo cache PTP message 1 read by the network node lasts 0.1 seconds, and the deskew fifo reads PTP message 1 at 19:23:1.13 on November 23, 2018, resulting in The calculated timestamp value of PTP message 1 is 19:23:1.03 on November 23, 2018, which is different from 19:23:1.02 on November 23, 2018, which leads to Latency measurements are not accurate.

Contents of the invention

The present application provides a stamping processing method and device, which are used to solve the problem in the prior art that the time delay measurement between network nodes is inaccurate due to inaccurate stamping processing.

In the first aspect, the present application provides a stamping processing method, which can be implemented by a network node, and the method includes: the network node enters first time stamps into a plurality of PTP messages received by the Ethernet port; wherein, The Ethernet port has multiple lanes, and the multiple PTP messages are received by the network node through the multiple lanes; after the multiple PTP messages cross the clock domain, the network node sends the The first timestamp value of the first timestamp in the multiple PTP messages is updated to the target timestamp value corresponding to the target PTP message in the multiple PTP messages; wherein, the target PTP message For the PTP message received by the target lane in the multiple lanes, the target lane is the lane with the shortest delay or the lane with the longest delay; the network node according to the target timestamp value and the multiple PTP The difference between the time stamp values of the sending time stamps of the messages determines the delay between the network node and the network node sending the multiple PTP messages. In this application, the network node stamps before the PTP message received by each lane of the Ethernet port crosses the clock domain, that is, before the PTP message received by each lane is written into deskewfifo, and the multiple PTP messages cross the clock domain. After passing the clock domain, that is, when the deskew fifo outputs the multiple PTP messages, the timestamp value of the PTP message stamped by each lane is compensated to the timestamp value of the PTP message received by the specified target lane, Realize the alignment of delay difference, avoid the error caused by asynchronous deskew fifo, improve the accuracy of stamping processing, and ensure the accuracy of delay determination between network nodes; at the same time, stamping occurs before the PTP message is written into deskew fifo , it is not necessary to maintain the same or multiple relationship between the frequency of deskew fifo write clock and read clock, so that Ethernet ports with different rates can share a set of stamping processing logic, and each Ethernet port supports high-precision stamping processing, and also The scope of application of stamping processing has been improved.

In a possible design, the network node enters first time stamps into the multiple PTP messages received by the Ethernet port respectively, including: the first time stamp of the multiple PTP messages received by the network node on the Ethernet port One bit (bit) is entered into the first time stamp respectively. In this way, it is convenient to quickly compensate the time stamp value of the time stamp of the PTP message received by each lane to the time stamp value of the target PTP message received by the target lane when the delay difference is aligned. .

In a possible design, the network node enters first time stamps into the multiple PTP messages received by the Ethernet port, including: the setting of the multiple PTP messages received by the Ethernet port by the network node The fixed bits are respectively entered into the first timestamp; the network node determines that the multiple PTP messages correspond to the first bit based on the distances between the set bits and the first bit respectively. The first transmission duration from one bit to the set bit; the network node corrects the first time stamp values of the first time stamps into the multiple PTP messages so that the first time stamp value is the same as the first time stamp value The difference between the first transmission duration corresponding to the PTP packet. In this way, the stamping schemes of the network nodes are enriched, and it is convenient to select a suitable stamping scheme according to the network environment where the network nodes are located.

In a possible design, the network node respectively inserts first time stamps into the multiple PTP messages received by the Ethernet port, including: the network node according to the measurement period, according to the multiple PTP packets of the current measurement period Stamping times corresponding to lanes respectively, respectively entering first time stamps into the multiple PTP messages received by the Ethernet port; the network node is based on the targets of the multiple PTP messages respectively corresponding to the first time stamps The distance between the bit and the first bit is used to determine the second transmission duration between the first bit and the target bit of the first time stamp for the multiple PTP messages; the network node sends the multiple PTP messages The first time stamp value of the first time stamp is respectively entered in the text, and corrected to be the difference between the first time stamp value and the second transmission duration corresponding to the PTP message. In this way, the stamping schemes of the network nodes are enriched, and it is convenient to select a suitable stamping scheme according to the network environment where the network nodes are located.

In a possible design, the first timestamp values respectively entered into the first timestamps in the multiple PTP messages are updated to the target values corresponding to the target PTP messages in the multiple PTP messages. The time stamp value includes: the first time stamp value of the first time stamp respectively entered by the network node in the plurality of PTP messages and the delay difference between the lane receiving the PTP message and the target lane and, updating the first timestamp values of the first timestamps respectively entered in the plurality of PTP messages; wherein, the delay differences of the multiple lanes with respect to the target lane are based on , enter the second timestamp value of the second timestamp into the set bit of the PTP message received by the target lane, and enter the second timestamp with the set bit of the PTP message received by the multiple lanes respectively Determined by the difference of the second timestamp value. In this way, there is no need to identify the target PTP message every time stamping is processed, which simplifies the process of stamping.

In a possible design, the process of determining the target lane includes: when the network node establishes a link on the Ethernet port, the network node enters a plurality of PTP messages received by the Ethernet port at the third time In the third timestamp value of the timestamp, the lane corresponding to the target PTP message with the largest timestamp value or the lane corresponding to the target PTP message with the smallest timestamp value is determined as the target lane. In this way, it is helpful to accurately determine the target lane and to ensure the accuracy of stamping processing.

In a second aspect, the present application provides a stamping processing device, which has the function of realizing the above-mentioned first aspect and any possible design method. The functions described above may be implemented by hardware, or may be implemented by executing corresponding software on the hardware. The hardware or software includes one or more modules corresponding to the above functions.

In one possible design, the device may be a chip or an integrated circuit.

In a possible design, the device includes a transceiver and a processor, and the processor is used to execute a set of programs. When the programs are executed, the device can execute the above-mentioned first aspect and any of the possible designs. method.

In a possible design, the device further includes a memory, configured to store programs executed by the processor.

In one possible design, the device is a network node.

In a third aspect, the present application provides a computer storage medium storing a computer program, and the computer program includes instructions for executing the above-mentioned first aspect or any possible design method of the first aspect.

In a fourth aspect, the present application provides a computer program product containing instructions, which, when running on a network node, causes the network node to execute the method in the above-mentioned first aspect or any possible design of the first aspect.

In a fifth aspect, a chip is provided, the chip is connected to a memory, and is used to read and execute a software program stored in the memory, so as to realize the above-mentioned first aspect or any possible design of the above-mentioned first aspect Methods.

Description of drawings

FIG. 1 is a schematic diagram of a delay request response mechanism in an embodiment of the present application;

Fig. 2 is the schematic diagram of the deskew fifo mechanism of lane in the embodiment of the present application;

FIG. 3A is one of the schematic diagrams of the communication system architecture in the embodiment of the present application;

FIG. 3B is the second schematic diagram of the communication system architecture in the embodiment of the present application;

FIG. 4 is the third schematic diagram of the communication system architecture in the embodiment of the present application;

FIG. 5 is a schematic diagram of the stamping process in the embodiment of the present application;

FIG. 6 is one of the schematic structural diagrams of the network nodes in the embodiment of the present application;

FIG. 7 is a second schematic structural diagram of a network node in an embodiment of the present application.

detailed description

The present application provides a stamping processing method and device to improve the accuracy of stamping processing to ensure the accuracy of delay measurement between network nodes, wherein the method and equipment are based on the same inventive concept, because the method and equipment The principles for solving the problems are similar, so the implementation of the device and the method can refer to each other, and the repetition will not be repeated.

Hereinafter, some terms used in this application are explained to facilitate understanding by those skilled in the art.

The embodiment of the present invention involves network nodes. In a network system composed of independent but interconnected computers, workstations, servers, terminals, and network devices, each device with its own unique network address can be called a network node. Currently, network nodes may be switches, routers, computers, tablet computers, palmtop computers, mobile phones, and the like.

The PTP protocol, issued by the Institute of Electrical and Electronics Engineers (IEEE), also known as the IEEE1588 protocol, is used to synchronize the clocks of network nodes in the network. Time stamps such as t1, t2, t3 and t4 are marked on the sending and receiving positions of the two network nodes in the network respectively on the Ethernet port to measure the delay between the two network nodes. As shown in Figure 1, the slave node (slave node) sends the t1 timestamp of the synchronization message (sync) according to the master node (master node), the slave node receives the t2 timestamp of the sync, and the slave node sends a delay request message (delay_request ), the master node receives the t4 time stamp of the delay_request, and determines the delay between the master node and the slave node. In order to facilitate the slave node to know the time stamp of the message sent by the master node, the master node sends the message After sending the message, you can also notify the slave node of the sending time stamp of the message by recording the following message with the message sending time stamp. For example, after the master node sends sync, it will record the following message of the sync sending time stamp (t1 time stamp) (follow_up) is sent to the slave node. In addition, the delay request response message (delay_respone) carries the t4 time stamp of the master node receiving the delay_request sent by the slave node. The delay (path delay) between masternode and slave node is (t2-t1) or (t4-t3), and the average delay (mean pathdelay) is [(t2-t1)+(t4-t3)]/2 or [(t2-t3)+(t4-t1)]/2, usually, in order to ensure the accuracy of delay measurement, mean path delay is often used in delay measurement. In the prior art, in a multi-lane Ethernet port, in the receiving direction, the time stamp value of the time stamp of the PTP message received by multiple lanes is compensated and aligned to the time stamp value of the time stamp of the PTP message received on the reference lane After that, the time stamp of any lane receiving the PTP message can be used as the time stamp of receiving the PTP message when measuring the delay.

Timestamp, also known as timestamp (timestamp), is usually a character sequence that uniquely identifies a certain moment of time. The timestamp value involved in this application is the time of a certain moment identified by the timestamp, such as November 2018 23 at 17:45:32.

The sending time of the PTP message and the receiving time of the PTP message. In this application, the sending time of the PTP message refers to the time when the first bit of the PTP message is sent; the receiving time of the PTP message is also called the PTP message. The arrival time of the packet refers to the time when the first bit of the PTP packet is received.

The deskew fifo of the lane, that is, the delay difference alignment of the data channel, means that the PTP packets received by multiple lanes are aligned according to the lane with the longest delay. Exemplarily, as shown in Figure 2, the serial data stream to be transmitted is 123456789, and the sending (transport, tx) end and the receiving (receive, rx) end have three lanes respectively lane0, lane1 and lane2, and lane0 corresponds to The sending data (tx data), that is, the PTP message is 147, the tx data corresponding to lane1 is 258, and the tx data corresponding to lane2 is 369. Lane0, lane1 and lane2 on the tx side send PTP messages 147, 258 and 369 at the same time, tx Both the timestamping event (timestamping event) of the end and the rx end occur on the first bit of the PTP message, for example, on the first bit "2" of the PTP message 258. The rx end receives PTP packets 147, 258, and 369 on lane0, lane1, and lane2 respectively. Because the link delays corresponding to lane0, lane1, and lane2 are different, the rx end receives PTP packets on lane0, lane1, and lane2. The receiving time of the text is different. The rx end writes the PTP received by each lane into the deskewfifo, and the deskew fifo caches the received PTP packets. The deskew fifo will receive the PTP packets for each lane that has received the PTP packets. , to align with the receiving time of the PTP packet received by the lane that received the latest PTP packet. As shown in FIG. 2 , lane2 has received the latest PTP message, and the receiving time of the PTP message received by each lane is aligned with the receiving time of the PTP message received by lane2.

Through the deskew fifo of the lane, the delay difference between the lanes can also be calculated. For example, if the sending time of the PTP message of each lane is 0, the receiving time of the PTP message of each lane is the time of the lane link delay. The implementation of deskewfifo will cause the buffer delay (deskew buffer delay) of each lane to increase by 3, which is caused by the implementation of deskew fifo and needs to be eliminated. The total delay (total delay) of lane2 read by the rx end through deskew fifo is 108, and the link delay of lane2 is 108-3=105. Similarly, the link delay of lane0 is 100, and the linkdelay of lane1 is 103. Lane0 and lane2 The delay difference is 8-3=5, and the delay difference between lane1 and lane2 is 5-3=2, but the above are all based on the exact same implementation of wr_clk and rd_clk of deskew fifo, but in fact the wr_clk and rd_clk of the Ethernet port The rd_clk is different, resulting in an error in the determined total delay and/or deskew buffer delay, which in turn leads to inaccurate calculation of the link delay of each lane, that is, the calculation of the receiving time of each lane receiving PTP packets is inaccurate, and the time stamp generated according to the receiving time The timestamp value for is also inaccurate.

In addition, it should be understood that the multiples involved in this application refer to two or more; in the description of this application, words such as "first" and "second" are only used to distinguish the purpose of description , and should not be construed as indicating or implying relative importance, nor as indicating or implying order.

Embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

Fig. 3A is a kind of communication system architecture applicable to stamping processing provided by the embodiment of the present application. As shown in Fig. 3A, the communication system includes: a network node 1 and a network node 2, and the Ethernet port 1 of the network node 1 passes through The physical media dependent layer interface (physical media dependent, PMD) of the network node 1 establishes a link with the Ethernet port of the network node 2 through the PMD of the network node 2, as shown in FIG. 0~N, a total of N+1 lanes. The Ethernet port of the network node includes: MAC, physical coding sublayer (physical coding sublayer, PCS), and physical medium attachment layer (physical medium attachment, PMA).

It should be understood that this embodiment of the present application can also be applied to other communication systems, and is also applicable to the situation where there is a third-party node between the network node 1 and the network node 2. As shown in FIG. 4 , there is a transparent Transfer node (tc node). Wherein, if there is a third-party node between the network node 1 and the network node 2, when determining the delay between the network node 1 and the network node 2, the delay caused by the third-party node needs to be removed. Referring to Figure 4, the path delay between network node 1 and network node 2 is (t2-t1-cf1) or (t4-t3-cf2), and the mean path delay is [(t2-t1-CF1)+(t4 -t3-CF2)]/2 or [(t2-t3)+(t4-t1)-(CF1+CF2)]/2, where cf1 is the transmission of PTP packets between network node 1 and network node 2 caused by tc node The delay generated by the text (sync), cf2 is the delay generated by the transmission of the PTP message (delay_request) between the network node 1 and the network node 2 caused by the tc node.

Still taking Figure 3A as an example, with network node 1 as the tx terminal and network node 2 as the rx terminal, a network node 1 and network node 2 are established between Ethernet port 1 and Ethernet port 2 on N+1 lanes. Take the sending and receiving of PTP messages (such as sync, delay_request, etc.) and perform stamping processing as an example for illustration, wherein the number of PTP messages in one shot is the same as the number of lanes, and in the same shot, each lane transmits one PTP message.

A. Ethernet port 1 of network node 1 sends PTP messages on lanes 0 to N at the same time, and each lane sends a PTP message, and the PMA on Ethernet port 1 generates sending time stamps (such as t1 time stamp, t3 time stamp, etc.) ; B. Ethernet port 2 of network node 2 receives multiple PTP messages sent by network node 1 through lanes 0-N, and before the PTP messages received by each lane cross the clock domain, that is, the PTP packets received by each lane Before the message is written into the deskew fifo, the first time stamp is entered into the PTP message received by each lane. Specifically, because the deskew fifo is located in the PCS of the Ethernet port, in this application, it can be used in the PMA and its adjacent positions The first time stamp is entered into the received PTP message, so as to implement stamping when the PTP message crosses the time domain. For example: near the entrance of a serializer/deserializer (serdes) of the PMA, first time stamps are entered for multiple received PTPs respectively, and the entered first time stamps are accompanied by the transmission of the PTP message.

C. After network node 2 receives multiple PTP messages sent by network node 1 on lanes 0~N and crosses the clock domain, that is, after the multiple received PTP messages are written into deskew fifo, when they are output through deskew fifo, the received multiple Enter the first timestamp value of the first timestamp in each PTP message, and update it to the target timestamp value corresponding to the target PTP message in the multiple PTP messages, so as to realize the PTP message received by each lane. Latency difference alignment.

Wherein, the target PTP packet is a PTP packet received by the target lane in the plurality of lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay.

Specifically, if the target lane is the lane with the longest delay among lane0-N, the PTP packet with the largest first timestamp value in which the first timestamp is inserted among the multiple PTP packets received by network node 2 is lane0 For the PTP message received by the lane with the longest delay among ~N, network node 2 can add the first timestamp value of the first timestamp into the PTP message received by each lane, and update it to the multiple received by network node 2. The largest first timestamp value among the first timestamp values of the first timestamp in a PTP message; similarly, if the target lane is the lane with the shortest delay among lane0-N, network node 2 can send each The first time stamp value of the first time stamp in the PTP message received by lane is updated to the smallest first time stamp value among the first time stamp values of the multiple PTP messages received by network node 2. Timestamp value, to achieve the timestamp value of the time stamp of each lane receiving the PTP message, compensate and align it to the same target lane, and the target lane of this application is compatible with the baseline lane of the existing protocol, that is, the lane with the longest delay . After the update, network node 2 is based on the first time stamp value (target time stamp value) of the first time stamp after the PTP message received by any lane is updated and the time when network node 1 sends multiple PTP message sending time stamps. The difference between the network node 1 and the network node 2 can be determined by the difference of the stamp value. For the time stamp value of the sending time stamp of multiple PTP messages sent by the network node 1, the network node 2 can send the time stamp value through the network node 1. After the multiple PTP messages, the following message that is sent and carries the sending timestamps of the multiple PTP messages is known.

Taking lane1 as the target lane, and the PTP packet 1 received by network node 2 through lane1 as an example, the receiving time of B and network node 1 receiving PTP packet 1 is 19:23:1.02 on November 23, 2018, which is the PTP packet Enter the first time stamp in document 1, and the first time stamp value of the first time stamp is 19:23:1.02 seconds on November 23, 2018. After entering the first time stamp in PTP message 1, write it into deskew fifo for execution The delay difference of multiple lanes is aligned; C. When deskew fifo outputs a PTP message, the first timestamp value of the first timestamp of PTP message 1 is updated to the first time stamp value of the target PTP message received by the target lane The first timestamp value of the stamp is still 19:23:1.02 on November 23, 2018. Referring to the existing communication system architecture for stamping processing as shown in Figure 4, it can be seen that in the prior art, stamping "B" on the PTP message received by each lane occurs after the PTP message is written into the deskew fifo. The wr_clk of the port, that is, the clock input by the external PTP message (such as the serdes clock) is different from the rd_clk, that is, the internal clock of the Ethernet port, which leads to inaccurate timestamp values of the received timestamp of each lane determined by the network node. The first timestamp value of the first timestamp of PTP message 1 is 19:23:1.03 on November 23, 2018, which leads to inaccurate measurement of delay between network nodes. Stamping "B" of the PTP message occurs before the PTP message is written into the deskew fifo. The PTP message does not cross the clock domain when stamping, which ensures the accuracy of the stamping of the PTP message received by each lane. , which ensures the accuracy of delay measurement between network nodes.

Optionally, for the confirmation of the target lane, network node 2 will receive each lane of Ethernet port 2 when the Ethernet port 1 and Ethernet port 2 of network node 1 and network node 2 are initializing the link, or when the link is re-established. The PTP packets sent by network node 1 through Ethernet port 1 are respectively entered with the third timestamp. If the target lane is the lane with the smallest delay, the PTP packet with the third timestamp with the smallest value of the third timestamp will be entered. The lane determined as the target lane; if the target lane is the lane with the largest delay, the lane of the PTP message with the largest third timestamp value entered into the third timestamp is determined as the target lane. Among them, when initializing the link building or re-establishing the link, the network node 2 enters the third time stamp into the PTP message received by each lane of the Ethernet port 2, which can occur before the PTP message is written into the deskew fifo, or It can happen after the PTP message is written into the deskew fifo.

Optionally, before crossing the clock domain, the network node 2 may include the following ways to respectively enter the first time stamps into the multiple PTP messages received by the Ethernet port 2:

method one:

The network node 2 enters first timestamps into the first bits of the multiple PTP messages received by the Ethernet port 2 respectively.

Specifically, for each lane of the Ethernet port 2, the network node 2 adds a first time stamp to the PTP message before the lane receives the PTP message and crosses the clock domain. Because the time stamp value of the first time stamp entered into the first bit of the PTP message can truly reflect the receiving time of the PTP message, there is no need to correct the time stamp value of the first time stamp of the PTP message. The stamping process is simplified.

Method 2:

The network node 2 enters first time stamps into the set bits of the multiple PTP messages received by the Ethernet port 2 respectively. The setting bit can be the first bit, the third bit, the seventh bit, etc. of the PTP message. Optionally, the setting bit is located in the PTP message header (sop bit).

Specifically, for each lane of the Ethernet port 2, the network node 2 adds a first time stamp to the PTP message before the lane receives the PTP message and crosses the clock domain.

Because the setting bit can be the third bit, the seventh bit, etc., the setting bit of the PTP message is entered into the first time stamp value of the first time stamp, which cannot truly reflect the receiving time of the PTP message. In the application, the network node 2 is also required to correct the time stamp value embedded in the first time stamp in each received PTP message to the receiving time of the first bit of the PTP message. Specifically, for the PTP message received by each lane, the network node 2 determines that the PTP message is transmitted from the first bit to the set bit in the network node based on the distance between the set bit of the PTP and the first bit. Since the set bit is the same for each lane, the first transmission time of the PTP message received by each lane from the first bit to the set bit is the same, and network node 2 sends the PTP message The first timestamp value of the first timestamp entered in the text is corrected as the difference between the first timestamp value and the first transmission duration. Optionally, the network node 2 corrects the time stamp value of the first time stamp in each received PTP message to the receiving time of the first bit of the PTP message, which can be used when the PTP message crosses the clock domain Previously, it may also be implemented after the PTP message crosses the clock domain, as long as the first timestamp value entered in the first timestamp in the PTP message is updated to the target timestamp value corresponding to the target PTP message.

Exemplarily, taking the PTP message 3 received by lane3 and setting the bit to the 7th bit as an example, the first timestamp value of the first timestamp entered in the PTP message 3 is 19:23 on November 23, 2018 Minute 1.05 seconds, the first transmission duration of PTP message 3 from the first bit to the seventh bit is "0.1 second", then the first timestamp value of the first timestamp of PTP message 3 after correction is 2018 Nov 23 19:23:1.04.

Method 3:

Network node 2 according to the measurement period, according to the stamping time corresponding to multiple lanes of Ethernet port 2 in the current measurement period, before the PTP message crosses the clock domain, enters the multiple PTP messages received by Ethernet port 2 respectively into the first Timestamp.

The measurement cycle for delay measurement between network node 1 and network node 2 is known, and network node 2 can know the time period during which each lane of Ethernet port 2 must be able to receive PTP packets in the current measurement cycle, and can according to Each lane must be able to receive the time period of the PTP message in the current measurement period, and determine the stamping time of each lane on the Ethernet port 2 of the current measurement period to stamp the received PTP message. Optionally, the Ethernet port of the current measurement period 2 The first time stamp stamped by each lane on the stamping time of the received PTP message is located in the message header of the PTP message received by each lane. The network node 2 stamps the received PTP message by each lane of the Ethernet port 2 according to the stamping time of the current measurement period, and stamps the first time stamp on the PTP message received by each lane of the Ethernet port 2.

Because the target bit of the first time stamp in the PTP message may be the first bit, the second bit, or the fifth bit of the PTP message, it cannot truly reflect the receiving time of the PTP message. In this application, the network node 2 is also required to correct the time stamp value embedded in the first time stamp in each received PTP message to the receiving time of the first bit of the PTP message. Specifically, for the PTP message received by each lane, the network node 2 determines, based on the distance between the target bit of the PTP and the first bit entered in the first time stamp, that the PTP message is received by the first bit in the network node. Bit transmission to the second transmission duration of the target bit with the first time stamp, the network node 2 enters the first time stamp value of the first time stamp into the PTP message, and corrects the first time stamp value and the second time stamp value A difference in transmission time. Optionally, the network node 2 corrects the time stamp value of the first time stamp in each received PTP message to the receiving time of the first bit of the PTP message, which can be used when the PTP message crosses the clock domain Previously, it can also be implemented after the PTP crosses the clock domain, as long as the first timestamp value entered in the first timestamp in the PTP message is updated to the target timestamp value corresponding to the target PTP message.

Of course, the network node 2 updates the first timestamp values of the first timestamps entered in the multiple PTP packets received by the Ethernet port 2 to the values corresponding to the target PTP packets in the received multiple PTP packets. For each received PTP packet, the first timestamp value of the first timestamp is entered according to the PTP packet, and the lane that receives the PTP packet relative to the target lane The sum of the delay differences updates the first timestamp value of the first timestamp entered in the PTP message.

Specifically, network node 1 can send a PTP message on lanes 0 to N of Ethernet port 1 in advance, and Ethernet port 2 of network node 2, before the PTP message received by each lane of Ethernet port 2 crosses the clock domain, Enter the second time stamp into the bit of the PTP message received by each lane, according to the second time stamp value of the second time stamp of the PTP message received by each lane and the second time stamp of the PTP message received by the target lane The difference of the second timestamp value of the stamp determines the delay difference of each lane relative to the target lane.

Through the stamping processing method of the present application, it can also be applied to multiple Ethernet port combination (comb) scenarios. At this time, each Ethernet port shares resources such as MAC/PCS/forward error correction (forward error correction, FEC), and each Ethernet port The working clock frequency (the internal clock frequency of the Ethernet port) and the clock frequency of the external PTP message input (such as the serdes clock frequency of the PMA position) are different, but because the stamping process of this application is to stamp the PTP message across the clock and before Therefore, it is also applicable to various Ethernet port comb scenarios.

Based on the above embodiment, as shown in FIG. 5, the embodiment of the present application provides a stamping processing method, and the specific steps include:

S501: The network node adds first time stamps to the multiple PTP packets received by the Ethernet port. Wherein, the Ethernet port has multiple lanes, and the multiple PTP messages are received by the network node through the multiple lanes.

S502: After the multiple PTP messages cross the clock domain, the network node updates the first time stamp values respectively entered into the first time stamps in the multiple PTP messages to the multiple PTP messages The target timestamp value corresponding to the target PTP packet in the packet. Wherein, the target PTP message is a PTP message received by the target lane in the plurality of lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay;

S503: The network node determines the network node and the network node sending the multiple PTP messages according to the difference between the target time stamp value and the time stamp value of the sending time stamps of the multiple PTP messages delay between.

Based on the same idea, FIG. 6 shows a network node 600 provided by the present application, including: a processor 601 and a transceiver 602;

Before the multiple PTP messages received by the Ethernet port are written into the deskew fifo of the Ethernet port through the transceiver 602, the processor 601 respectively enters first timestamps into the multiple PTP messages; wherein, the Ethernet The port has multiple lanes, and the multiple PTP messages are received by the network node through the multiple lanes;

The processor 601 is further configured to, when the deskew fifo outputs the multiple PTPs, update the first timestamp values respectively entered into the first timestamps in the multiple PTP messages to the multiple The target timestamp value corresponding to the target PTP message in a PTP message; wherein, the target PTP message is the PTP message received by the target lane in the multiple lanes, and the target lane is the lane with the shortest delay or The lane with the longest delay;

The processor 601 is further configured to determine, according to the difference between the target time stamp value and the time stamp value of the sending time stamps of the multiple PTP messages, whether the network node sends the multiple PTP messages the delay between network nodes. .

Optionally, the processor 601 is specifically configured to, through the transceiver 602, write the first of the multiple PTP messages received by the Ethernet port into the deskew fifo of the Ethernet port. Bits are entered into the first time stamp respectively.

Optionally, the processor 601 is specifically configured to set the multiple PTP messages received by the Ethernet port before writing them into the deskew fifo of the Ethernet port through the transceiver 602 The bits are respectively entered into the first timestamp; based on the distances between the set bit and the first bit respectively corresponding to the multiple PTP messages, it is determined that the multiple PTP messages correspond to the first bit to the set bit respectively The first transmission duration of the first time stamp; the first timestamp values of the first timestamps are respectively inserted into the plurality of PTP messages, and corrected to the first transmission duration corresponding to the first timestamp value and the PTP message difference.

Optionally, the processor 601 is specifically configured to use the transceiver 602 to receive multiple PTP messages on the Ethernet port according to the measurement cycle, according to the stamping times corresponding to the multiple lanes of the Ethernet port in the current measurement cycle Before writing into the deskew fifo of the Ethernet port, the plurality of PTP messages are respectively entered with first timestamps; based on the plurality of PTP messages respectively corresponding to the target bits and first The distance of the bit determines the second transmission duration of the plurality of PTP messages respectively corresponding to the first bit to the target bit of the first time stamp; the first time stamp is respectively entered in the plurality of PTP messages The first timestamp value is corrected as the difference between the first timestamp value and the second transmission duration corresponding to the PTP packet.

Optionally, the processor 601 is specifically configured to, according to the first time stamp values respectively entered into the first time stamps in the multiple PTP messages, and the relationship between the lane receiving the PTP message and the target lane The sum of the delay difference is to update the first timestamp values of the first timestamps respectively entered in the plurality of PTP messages; wherein, the delay differences of multiple lanes relative to the target lane are based on the Before writing into the deskew fifo of the Ethernet port, the setting bit of the PTP message received by the target lane is entered into the second time stamp value of the second time stamp, which is respectively related to the PTP message received by the multiple lanes It is determined by the difference of the second timestamp value of the set bit entered into the second timestamp.

Optionally, the processor 601 is specifically configured to enter the multiple PTP messages received by the Ethernet port into the third timestamp value of the third timestamp respectively when the Ethernet port establishes a link , the lane corresponding to the target PTP packet with the largest timestamp value or the lane corresponding to the target PTP packet with the smallest timestamp value is determined as the target lane.

Based on the same idea, the embodiment of the present application also provides a network node.

As shown in FIG. 7 , a network node 700 includes a memory 701 , a processor 702 and a transceiver 703 . The memory 701, the processor 702 and the transceiver 703 are linked by a bus. The memory 701 is used to store computer-executed instructions. When the network node 700 is running, the processor 702 executes the computer-executed instructions stored in the memory 701 through the transceiver 703, so that the network node 700 implements any one of the above stamping processing methods, which can be referred to The relevant descriptions above and the accompanying drawings will not be repeated here.

An embodiment of the present application provides a computer storage medium storing a computer program, the computer program including instructions for executing the stamping processing method described in the above method embodiment.

An embodiment of the present application provides a computer program product containing instructions, which, when run on a network node, enables the network node to implement the stamping processing method described in the foregoing method embodiments.

An embodiment of the present application provides a chip, the chip is connected to a memory, and is used to read and execute a software program stored in the memory, so as to implement the stamping processing method described in the above method embodiment.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The present application is described with reference to flowcharts and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each procedure and/or block in the flowchart and/or block diagram, and a combination of procedures and/or blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions may be provided to a general purpose computer, special purpose computer, embedded processor, or processor of other programmable data processing equipment to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing equipment produce a An apparatus for realizing the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the instructions The device realizes the function specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, causing a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby The instructions provide steps for implementing the functions specified in the flow chart or blocks of the flowchart and/or the block or blocks of the block diagrams.

While preferred embodiments of the present application have been described, additional changes and modifications to these embodiments can be made by those skilled in the art once the basic inventive concept is appreciated. Therefore, the appended claims are intended to be construed to cover the preferred embodiment and all changes and modifications which fall within the scope of the application.

Apparently, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. In this way, if the modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these modifications and variations.

Claims (15)

1. A method of stamping, the method comprising:

the network node respectively inputs a first timestamp into a plurality of precision time synchronization protocol (PTP) messages received by the Ethernet port; the Ethernet port is provided with a plurality of data paths and lanes, and the plurality of PTP messages are received by the network node through the plurality of lanes;

after the plurality of PTP messages cross a clock domain, the network node respectively inputs first time stamp values of first time stamps into the plurality of PTP messages and updates the first time stamp values into target time stamp values corresponding to target PTP messages in the plurality of PTP messages; the target PTP message is a PTP message received by a target lane in the plurality of lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay;

and the network node determines the time delay between the network node and the network node for sending the plurality of PTP messages according to the difference value between the timestamp value of the target and the timestamp values of the sending timestamps of the plurality of PTP messages.

2. The method of claim 1, wherein the network node individually time-stamps a plurality of PTP messages received by an ethernet port with a first time stamp, comprising:

the network node respectively inputs first time stamps into first bits bit of a plurality of PTP messages received by the Ethernet port.

3. The method of claim 1, wherein the network node respectively impresses a first timestamp on a plurality of PTP messages received at an ethernet port, comprising:

the network node respectively inputs first timestamps into the set bits of a plurality of PTP messages received by the Ethernet port;

the network node determines a first transmission time from the time when the plurality of PTP messages respectively correspond to the first bit to the set bit based on the distance between the plurality of PTP messages respectively corresponding to the set bit and the first bit;

and the network node respectively inputs first time stamp values of first time stamps into the plurality of PTP messages and corrects the first time stamp values into the difference value of the first transmission time length corresponding to the PTP messages.

4. The method of claim 1, wherein the network node individually time-stamps a plurality of PTP messages received by an ethernet port with a first time stamp, comprising:

the network node respectively inputs first timestamps into a plurality of PTP messages received by the Ethernet port according to the measurement period and the stamping time respectively corresponding to a plurality of lanes of the Ethernet port in the current measurement period;

the network node determines second transmission time lengths from the time when the plurality of PTP messages respectively correspond to the first bit to the time when the target bit with the first timestamp is input into the network node, based on the distance between the target bit with the first timestamp and the first bit, which is respectively and correspondingly input into the plurality of PTP messages;

and the network node respectively inputs first time stamp values of first time stamps into the plurality of PTP messages and corrects the first time stamp values into a difference value between the first time stamp values and second transmission time lengths corresponding to the PTP messages.

5. The method of claim 1, wherein the updating of the first timestamp value of the first timestamp in each of the plurality of PTP messages to the target timestamp value corresponding to the target PTP message in the plurality of PTP messages comprises:

the network node updates the first time stamp values of the first time stamps respectively embedded in the PTP messages according to the sum of the first time stamp values of the first time stamps respectively embedded in the PTP messages and the delay difference of the lane receiving the PTP messages relative to the target lane;

the delay difference of each land relative to the target land is determined according to the difference between a second time stamp value obtained by adding a second time stamp to the set bit of the PTP message received by the target land before clock domain crossing and a second time stamp value obtained by adding the second time stamp to the set bit of the PTP message received by each land.

6. The method as claimed in claim 1, wherein the process of determining said target lane comprises:

and when the network node establishes a link at the Ethernet port, determining the lane corresponding to the target PTP message with the maximum timestamp value or the lane corresponding to the target PTP message with the minimum timestamp value in third timestamp values of third timestamps respectively input into a plurality of PTP messages received by the Ethernet port as the target lane.

7. A network node, comprising: a processor and a transceiver;

the method comprises the steps that a processor respectively inputs first timestamps into a plurality of precision time synchronization protocol (PTP) messages received by an Ethernet port before the PTP messages are written into a latency difference alignment buffer deskew fifo of the Ethernet port through a transceiver; the Ethernet port is provided with a plurality of data paths and lanes, and the plurality of PTP messages are received by the network node through the plurality of lanes;

the processor is further configured to, when the deskew fifo outputs the plurality of PTP messages, respectively enter first timestamp values of first timestamps into the plurality of PTP messages, and update the first timestamp values to target timestamp values corresponding to target PTP messages in the plurality of PTP messages; the target PTP message is a PTP message received by a target lane in the plurality of lanes, and the target lane is the lane with the shortest delay or the lane with the longest delay;

the processor is further configured to determine a delay between the network node and the network node that sends the PTP messages according to a difference between the timestamp value at the target and the timestamp values of the sending timestamps of the PTP messages.

8. The network node according to claim 7, wherein the processor is specifically configured to, before a plurality of PTP messages received by an ethernet port are written into deskew fifo of the ethernet port through the transceiver, enter first timestamps into first bits bit of the plurality of PTP messages, respectively.

9. The network node according to claim 7, wherein the processor is specifically configured to, before a plurality of PTP messages received by an ethernet port are written into deskew fifo of the ethernet port through the transceiver, enter first timestamps into the set bits of the plurality of PTP messages, respectively; determining first transmission time lengths from the first bit to the set bit corresponding to the plurality of PTP messages respectively based on the distances between the set bit and the first bit corresponding to the plurality of PTP messages respectively; and respectively inputting first time stamp values of first time stamps into the PTP messages, and correcting the first time stamp values to be the difference value between the first time stamp values and first transmission time corresponding to the PTP messages.

10. The network node according to claim 7, wherein the processor is specifically configured to, according to a measurement cycle, based on respective corresponding stamping times of a plurality of lanes of an ethernet port in a current measurement cycle, enter first timestamps into the plurality of PTP messages respectively before the PTP messages received by the ethernet port are written into deskew fifo of the ethernet port through the transceiver; determining second transmission time lengths from the time when the plurality of PTP messages respectively correspond to the first bit to the time when the target bit with the first timestamp is embedded into the PTP messages respectively and correspondingly based on the distance between the target bit with the first timestamp embedded into the PTP messages and the first bit; and respectively inputting first time stamp values of first time stamps into the plurality of PTP messages, and correcting the first time stamp values to be the difference value of the first time stamp values and second transmission time lengths corresponding to the PTP messages.

11. The network node of claim 7, wherein the processor is specifically configured to update the first time stamp values of the first time stamps entered in the PTP messages, respectively, based on a sum of a first time stamp value of the first time stamp entered in the PTP messages, respectively, and a delay difference of the lane receiving the PTP message with respect to a target lane; the delay difference of each land relative to the target land is determined according to the difference between a second timestamp value obtained by adding a second timestamp to the set bit of the PTP message received by the target land before the deskew fifo of the Ethernet port is written in and the second timestamp value obtained by adding the second timestamp to the set bit of the PTP message received by each land.

12. The network node according to claim 7, wherein the processor is specifically configured to, when the ethernet port establishes a link, determine, as a target lane, a lane corresponding to a target PTP message with a maximum timestamp value or a lane corresponding to a target PTP message with a minimum timestamp value among third timestamp values of third timestamps entered into the PTP messages received by the ethernet port, respectively.

13. A network node comprising a processor, a transceiver, and a memory;

the memory stores a computer program;

the transceiver is used for transmitting and receiving data;

the processor, for invoking a computer program stored in the memory, to perform the method of any one of claims 1-6 through the transceiver.

14. A computer-readable storage medium, comprising a computer program which, when run on a network node, causes the network node to perform the method according to any one of claims 1-6.

15. A chip, characterized in that it is connected to a memory for reading and executing a software program stored in said memory for implementing the method according to any one of claims 1 to 6.

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