WO2020127942A1 - Procédé d'encapsulation d'au moins un substrat de support ; module électronique et moule servant à l'encapsulation d'un substrat de support - Google Patents

Procédé d'encapsulation d'au moins un substrat de support ; module électronique et moule servant à l'encapsulation d'un substrat de support Download PDF

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Publication number
WO2020127942A1
WO2020127942A1 PCT/EP2019/086632 EP2019086632W WO2020127942A1 WO 2020127942 A1 WO2020127942 A1 WO 2020127942A1 EP 2019086632 W EP2019086632 W EP 2019086632W WO 2020127942 A1 WO2020127942 A1 WO 2020127942A1
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WO
WIPO (PCT)
Prior art keywords
carrier substrate
tool half
encapsulation
cavity
electronic
Prior art date
Application number
PCT/EP2019/086632
Other languages
German (de)
English (en)
Inventor
Vitalij GIL
Stefan Britting
Rainer Herrmann
Original Assignee
Rogers Germany Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rogers Germany Gmbh filed Critical Rogers Germany Gmbh
Publication of WO2020127942A1 publication Critical patent/WO2020127942A1/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
    • H05K2203/1316Moulded encapsulation of mounted components

Definitions

  • the present invention relates to a method for encapsulating at least one carrier substrate, an electronic module and a tool for encapsulating a carrier substrate.
  • Electronic modules are well known from the prior art, for example as power electronic modules. Such electronic modules typically use switchable or controllable electronic components which are interconnected on a common metal-ceramic substrate via interconnects.
  • Essential components of the carrier substrate are an insulation layer which, in the case of the carrier substrate, is made of a material comprising a ceramic, and a metallization layer, which is preferably structured to form conductor tracks and is formed on a component side of the carrier substrate.
  • the carrier substrate is first equipped with electronic components and then an encapsulation of the loaded carrier substrate is realized in such a way that a solid, ie essentially cavity-free, encapsulation is realized, which is in direct contact with the loaded carrier substrate and at least partially surrounds it.
  • a metallization is provided on the outside of the encapsulation formed, with which the electronic components on the carrier substrate can be controlled or can be supplied with a required operating voltage.
  • the encapsulated electronic component is in an electrically conductive connection with the metallization on the outside of the encapsulation.
  • a via is typically provided for this purpose, which is usually embedded in the encapsulation, for example through bores, after the encapsulation.
  • the plated-through hole is preferably formed by a laser hole in the encapsulation with a subsequent filling of the formed laser hole with a conductive material.
  • the formation of the laser bore has proven to be challenging in that a defined length of the laser bore can only be checked with difficulty or only with great effort.
  • height irregularities due to manufacturing tolerances on the top of the encapsulation and / or the loaded carrier substrate can only be insufficiently taken into account.
  • there is a risk in the production of the encapsulated carrier substrates that too much material will be removed during the laser drilling. This can endanger the functionality of the connection to be exposed.
  • a method is also known from the prior art in which a carrier element equipped with a semiconductor is clamped in a cast housing formed from a first and a second tool half, so that in a closed state of the cast housing, a cavity is formed around the carrier element trains.
  • a stamp element is also provided which is, for example, slidably mounted in the first half of the tool. This stamp element can be moved into the cavity before the filling of the cavity in such a way that the stamp element comes into contact with the electronic component or strikes the electronic component. When the cavity is subsequently filled, the area in which the stamp element was placed during the filling remains free of material. This method is described, for example, in EP 2 954 550 B1.
  • JP H01 91 444 A discloses a method for producing a multilayer printed circuit board.
  • elements are introduced into a mold in order to encapsulate a substrate produced in a previous fueling process with a further circuit board layer by means of a spraying process.
  • a method for encapsulating at least one carrier substrate, in particular a carrier substrate equipped with at least one electronic element comprising
  • an area which is provided for forming an electrically conductive connection is kept free or free by means of the stamp element, so that after the filling of the cavity and the resulting formation of the encapsulation, a channel is provided which can advantageously be filled in such a way that an electrically conductive connection to the outside of the encapsulation can be established.
  • the exempted area for forming a via can be filled with an electrically conductive material after the encapsulation has hardened.
  • this type of encapsulation can be used for a carrier substrate and that vias can be formed in this way.
  • the at least one carrier substrate is embedded in the encapsulation with the at least one electronic element.
  • “Embedding” or “being embedded” is to be understood in particular to mean an immediate bordering of the encapsulation or of the encapsulation material, which preferably consists of a plastic, on an outside of the at least one carrier substrate, i. H. the encapsulation lies at least in some areas directly on the carrier substrate and no clear area or cavity is formed between the carrier substrate equipped with the electronic elements and the encapsulation.
  • the encapsulation does not have to encase or surround the at least one carrier substrate on all sides. It is also provided that the encapsulation is solid, ie free of cavities.
  • connections such as, for example, a source, a gate and / or a drain connection
  • the electrically conductive connection produced from the outside of the encapsulation are contacted with the electrically conductive connection produced from the outside of the encapsulation .
  • the carrier substrate is particularly preferably a metal-ceramic substrate, the insulation layer of which is made of a ceramic and on the outside of which a metallization, in particular produced by an AMB or DCB method, is formed.
  • the insulation layer is made from an organic material, for example a filler being added to the organic material.
  • the stamp element is arranged above an electronic element and / or an upper side of the carrier substrate.
  • the stamp element is particularly preferably in contact with an upper side of the electronic element and / or the upper side of the carrier substrate during filling.
  • a distance dimensioned perpendicular to a main extension plane of the carrier substrate between a further metallization layer formed on the outer side of the encapsulation and the metalization layer on the carrier substrate is less than 5 mm, preferably less than 2.5 mm, and particularly preferably less is less than 1 mm to less than 400 pm, for example about 300 pm, that is to say as small as possible. It is particularly preferred that the distance be less than 200 pm or 100 pm. It it is particularly preferably conceivable that the distance measures between 100 and 200 gm. Correspondingly, in a direction perpendicular to the main plane of extension, there is a very short distance between the electronic element on the carrier substrate or its contact surfaces or points and the encapsulated carrier substrate on the outside.
  • plated-through holes are embedded in the encapsulation, for example in the manufactured electronic module.
  • the plated-through holes can be mechanically and / or galvanically mixed using a paste, a gas phase deposition, a screen printing process, a 3D printing process.
  • Switchable components or active components are preferably to be understood as electronic elements.
  • the at least one electronic element is one with a WBG semiconductor (wide bandgap semiconductors), such as, for. B. a semiconductor made of silicon carbide, gallium nitride and / or indium gallium nitride, or silicon semiconductor element.
  • WBG semiconductor wide bandgap semiconductors
  • Examples of an electronic component are MOSFETs (“metal-oxide-semiconductor field-effect transistor”) or IGBTs (“insulated-gate bipolar transistor”).
  • the electronic elements can also be combined as a pre-composite or “prepackaging”. In such a preliminary bundle, one or more electronic elements are arranged, for example, on a printed circuit board and embedded in a matrix.
  • a preliminary bundle can be found in the document DE 10 2014 117 086 A1 as a redistribution structure in which an electronic element is integrated in a dielectric matrix. Reference is hereby explicitly made to the disclosure content of DE 10 2014 117 086 A1 with regard to the preliminary network or the redistribution structure. Further examples of a preliminary network, to which explicit reference is made, can be found in the articles “Development of Embedded Power Electronics Modules for Automotive Applications” by L. Boettcher et al. and "Embedding of Power Semiconductors for Alternative Packages and Modules" by L. Boettcher et al. to find.
  • the further metallization layer on the outside of the encapsulation or the metallization layer of the carrier substrate copper, aluminum, molybdenum and / or their alloys, and laminates such as CuW, CuMo, CuAI, AICu and / or CuCu, in particular a copper sandwich structure with a first copper layer and a second copper layer, a grain size in the first copper layer being different from a second copper layer.
  • the metallization layer on the outside and / or the metallization layer of the carrier substrate are surface-modified.
  • a surface modification is, for example, a sealing with a precious metal, in particular silver and / or gold, or ENIG
  • Electroless nods immersion gold or an edge grouting on the first or second metallization layer to suppress crack formation or expansion.
  • the further metallization layer is structured on the outside of the encapsulation and / or on the manufactured electrical module, the electronics elements on the carrier substrate can be controlled via the plated-through holes by further electronic elements on the outside of the encapsulation.
  • the at least one carrier substrate has three or five layers. Due to the multi-layer design, it is advantageously possible to use comparatively thick metallic intermediate layers, while a plurality of ceramic layers are used for stabilization. As a result, the thermal resistance can be reduced and a targeted heat spread can be set. In particular, it is provided that the layer thickness of the ceramic insulation layer is adapted to the required insulation strength.
  • the at least one carrier substrate has a cooling structure on its side opposite the component side, the electronics module preferably having a sealing element and / or sealing material, for. B. has a silicone for a fluid-tight connection to a fluid cooling device.
  • the cooling structure is advantageously integrated into the carrier substrate and is not enclosed by the encapsulation, ie it is exposed. The integration allows little effort when installing the electronics module, since advantageously an additional step in which one Base plate and / or a cooler is connected to the carrier substrate, for example soldered, sintered and / or jammed, can be omitted.
  • the fluid cooling device is used, in particular, for bringing up and removing a cooling fluid, in particular a cooling liquid.
  • the cooling structure comprises fins that protrude into a channel formed by the cooling structure and the fluid cooling device.
  • a sealing element is preferably provided, which is integrated in the electronics module and which is essentially arranged at the level of the cooling structure, as seen in the stacking direction.
  • the sealing element is preferably ring-shaped or in the form of a bead and preferably runs around the cooling structure, in particular the fins of the cooling structure.
  • the sealing element is preferably arranged on the encapsulation, for example in a groove provided for this purpose.
  • the insulation layer is designed as a composite or hybrid ceramic, in which several ceramic layers, each of which differ in terms of their material composition, are arranged one above the other and combined to form an insulation layer in order to combine different desired properties.
  • a highly thermally conductive ceramic is used for the lowest possible heat resistance.
  • the carrier substrate has a primary layer, a secondary layer and a metallic intermediate layer arranged between the primary layer and the secondary layer, in particular as an electronic return conductor, the intermediate layer preferably is thicker than the primary layer and / or the secondary layer and / or thicker than 1 mm, preferably thicker than 1.5 and particularly preferably thicker than 2.5 mm.
  • Such thick metallic interlayers advantageously act as temporary storage and thus improve the thermal impedance Zth.
  • the thickness un supports in particular the heat spread during heat removal, in which the heat is conducted from the component side via the carrier substrate to a side of the carrier substrate opposite the component side.
  • the intermediate layer is configured in one layer or in one piece.
  • the intermediate layer can preferably serve as an electrical return conductor in that an additional plated-through hole is embedded in the primary layer, so that not only the first metallization layer can be used for current conduction, but also the metallic intermediate layer.
  • the primary layer and / or the secondary layer are made of ceramic.
  • the carrier substrate with the primary layer, the secondary layer and the metallic intermediate layer is composed of five or more layers as a structure.
  • the five-layer structure that two metallic intermediate layers are present between the primary layer and the secondary layer, a tertiary layer being arranged between the two metallic intermediate layers.
  • At least two layers preferably have a comparatively high modulus of elasticity.
  • the primary layer, the secondary layer and / or the tertiary layer are preferably made from a material comprising ceramic, for example from one of the ceramics mentioned above. This allows the desired requirements for insulation strength to be realized in an advantageous manner. But it is also conceivable that the secondary layer and / or tertiary layer do not consist of a ceramic Material are made, since they essentially serve to stiffen the support substrate and do not contribute to the insulation. For example, it would be conceivable to use molybdenum and / or tungsten instead of a ceramic.
  • the first tool half, the second tool half and / or the at least one stamp element are designed in such a way that they have shaping bevels which allow the encapsulated carrier substrate to be easily removed after the filling and curing of the material for the encapsulation .
  • an inside of the first tool half, an inside of the second tool side and / or the part of the at least one stamping element protruding into the cavity are covered with a film or a film which prevents the manufactured encapsulation adheres to the first tool half, the second tool half and / or the at least one stamp element during demolding.
  • a film or such a film represents an object of wear with which the first tool half and / or the second tool half is preferably covered again for each encapsulation.
  • the method to fix the carrier substrate in the cavity before filling it, for example to clamp it.
  • the carrier substrate is clamped between the first tool half and the second tool half and / or between the at least one stamping element and the first or the second tool half.
  • the first tool half and / or a second tool half have a receptacle on their inside in which the carrier substrate can be inserted and in which the carrier substrate, for example in a direction running parallel to the main extension plane, with the first and / and / or the second half of the tool.
  • the at least one stamp element is structured on its side facing the carrier substrate, in particular with at least one recess or elevation, with at least one contact element on the electronic element and / or the electronic element when filling the cavity partially, before completely, is arranged within the recess.
  • the contact elements and / or the electronic element can advantageously be protected from the filling material, in particular a plastic, when filling the cavity, which is conducted into the cavity during filling.
  • the contact element and / or the electronic element are arranged in the recess or elevation in such a way that no pressure exerted by the stem element acts on them, so that advantageously no damage to the electronic element can be expected during the Filling takes place.
  • the recess is dimensioned and arranged in such a way that the received contact element and / or the received electronic element is arranged in contact-free manner with the stamp element within the recess.
  • the stamp element is permitted on its underside with a deformable material, such as a rubber material, which deforms accordingly when it is in contact with the contact element or the electronic element and, for example, form-fittingly around the contact element or the electronic element sets.
  • the contact elements are already connected to the upper side of the carrier substrate before the cavity is filled.
  • the contact element can thereby be arranged or its end arranged where a simple or expedient access for the electrical, conductive connection to the outside of the encapsulation can be realized.
  • at least part of the stamp element, in particular as a contact element is at least partially left in the encapsulation produced. For example, the entire stamp element is left in the encapsulation and later forms the via or part of the via.
  • the stamp element to include, for example in its interior, the subsequent through-plating and to leave it after the hardening or the formation of the encapsulation within the encapsulation.
  • the stamp element or part of the stamp element thus becomes a sacrificial part, which is built into the encapsulated carrier substrate during the manufacturing process.
  • To connect the sacrificial part to the contact of the electronic module it can be attached to the contact in an electrically conductive manner, for example by means of ultrasound or friction welding or soldering. This welding or soldering operation can take place through or over the stamp element.
  • a base element is arranged in the cavity during the filling, a further carrier substrate and / or a further electronic element and / or an intermediate metallization, preferably a central intermediate metalization, being arranged on the base element.
  • carrier substrates, intermediate metalization and / or electronic elements can be optimally arranged and aligned three-dimensionally within the encapsulation.
  • a contact element is formed on the base element, for. B.
  • the stamp element is mounted obliquely displaceably or pivotably with respect to a direction extending perpendicular to a main plane of extent of the carrier substrate.
  • These obliquely extending through-contacts are particularly advantageous if it is provided that the metallization layer on the outside of the encapsulation should be laterally offset from the metallization layer on the encapsulated carrier substrate and / or the electronic element. It is provided that the stamp element is moved back out of the cavity after the encapsulation has hardened and before the cavity is opened.
  • an inclination direction of the obliquely slidably mounted stamp element is inclined by an angle with respect to the direction running perpendicular to the main extension plane, which angle has a value between 5 ° and 65 °, preferably between 10 ° and 45 ° and particularly preferably between 15 ° and 30 °. This makes it particularly expedient to implement oblique through-contacts.
  • the method further comprises:
  • stamp element or at least one further stamp element which is preferably displaceably mounted in the further first tool half or the second or further second tool half, into the cavity;
  • the at least one stamp element and / or the at least one further stamp element is arranged in a fixed position during the filling of the cavity. That is, the at least one stamp element and the at least one further stamp element are not moved during the filling. This can ensure that a corresponding passage can be provided for a via.
  • the at least one stamp element or the at least one further stamp element bears against the carrier element, the contact element and / or the electronic element during the filling, in particular during the entire duration of the filling, i. H. the at least one stamp element or the at least one further stamp element contacts the carrier element, the contact element and / or the electronic element.
  • the at least one stamp element and / or the at least one further stamp element is fixed during the filling, for example by means of a fixing means on the first tool half and / or the second half of the tool is fixed to ensure that the stamping element is not moved or moved by the incoming material for backfilling.
  • the first tool half and / or the second tool half are designed such that a structuring and / or at least a recess is realized on the outside in the encapsulation produced.
  • This advantageously makes it possible, for example, to structure the outside of the encapsulation in such a way that the further metallizations can be arranged therein.
  • the structuring on the outside of the encapsulation leaves space for the conductor tracks and the further metallization on the outside of the encapsulation.
  • the further metallization on the outside of the encapsulation and the encapsulation on the outside to be flush with one another toward the outside.
  • the recess is dimensioned in such a way that in this recess there was a resistance and / or a capacitor, for example an RC element, so that such a design of the outside of the encapsulation has a flat end on the outside of the encapsulation enables.
  • the outside of the encapsulation offers no projections or the like. but all electronic components, in particular including the additional metallization layer integrated into the outside, are placed lower so that a smooth outer surface is formed on the encapsulation. It is also conceivable that the outside of the encapsulation protrudes on the outside relative to the further metallization layer that is lowered.
  • a recess or recess is realized by means of the stamp element, into which an RC element is integrated, so that the RC element is no longer necessarily on the outside of the encapsulation, in particular projecting from the Outside of the encapsulation, must be realized.
  • Another object of the present invention is an electronics module, made with the inventive method. All features and advantages described for the process apply analogously to the electronic module and vice versa.
  • Another object is a tool with a first tool half, a second tool half and a stamp element for a method according to the invention. All features and advantages described for the electronic module and the process apply in an analogous manner to the tool.
  • FIGS. 1a and 1b show a method according to a first exemplary embodiment of the present invention.
  • the method is used to form an electrical module 100, in particular a power module.
  • Essential components of such an electronic module 100 are a carrier substrate 10 and an encapsulation 8, wherein the carrier substrate 10 is at least partially embedded in the encapsulation 8, ie the carrier substrate 10 is at least partially encapsulated in the encapsulation 8.
  • the carrier substrate 10 has a component side 25 with a component-side metallization layer, where in this metallization layer to form conductor tracks or connection pads z.
  • B. is structured (not shown).
  • the electronic elements 5 are connected, which are preferably connected to each other to form at least part of an electronic circuit.
  • the electronic elements include 5 semiconductors, in particular WBG semiconductors (wide bandgap semiconductors), such as.
  • WBG semiconductors wide bandgap semiconductors
  • B a semiconductor of silicon carbide, gallium nitride and / or indium gallium nitride, de ren band gap between a valence band and a conduction band between 2 eV and 4 eV or above.
  • the electronics module 100 is a power electronics module and is used, for example, to convert electrical energy using switching electronic elements 5.
  • the electronic module 100 as a DC converter, converter and / or frequency converter in the field of electronic drive technology, in particular in the field of e-mobility, as a solar inverter and / or converter for wind turbines were used to feed regeneratively generated energy or as a switching power supply or DC -DC converter is used.
  • a further metallization layer (not shown), in particular as a connection, for at least one further electronic component and / or contact points (not shown) is provided on the outer side A of the encapsulation 8.
  • the further metallization layer is preferably also structured.
  • the further electronic element 5 is a control element, such as. B. a gate driver, an intermediate capacitor, a load connection, a connection for energy supply and / or the like.
  • an electrically conductive connection is particularly provided, which preferably extends through the encapsulation 8 or extends within the encapsulation 8 .
  • Such an electrically conductive connection is preferably implemented as a contact 16.
  • a corresponding recess in the encapsulation 8, i.e. during the encapsulation process is realized. It is particularly preferably provided that at least one carrier substrate 10 is positioned between a first tool half 11 and a second tool half 12 to form the encapsulation 8.
  • the at least one carrier substrate 10 is clamped in the first tool half 11 or in the second tool half 12 or fixed by the first tool half 11 and / or the second tool half 12.
  • the carrier substrate 10 is positioned in a receptacle on the inside of the second tool half 12, so that the carrier substrate 10 does not slip when the encapsulation 8 is filled or formed.
  • the second tool half 12 preferably interacts with the carrier substrate 10 in a form-fitting manner in a direction running parallel to the main extension plane HSE.
  • the first tool half 11 and the second tool half 12 form a cavity 7, which at least partially surrounds the carrier substrate 10.
  • a material in particular a castable plastic, and then curing the material, a corresponding encapsulation 8 in the form of the cavity 7 can then be formed around the carrier substrate 10.
  • a stamp element 13 is embedded in the first tool half 11 and / or second tool half 12.
  • This stamp element 13 is preferably designed such that it is slidably mounted in the first tool half 11 and / or second tool half 12. As a result, it is advantageously possible to insert the stamp element 13 into the cavity 7, so that during the filling only the cavity 7 reduced by the part of the at least one stamp element 13 that has been introduced is filled.
  • the part of the cavity 7, in which the stem element 13 is arranged during the filling of the cavity 7, remains free of the material of the encapsulation 8 and forms the recess which will later be used to form the via 16.
  • the use of such a stem element 13 proves to be advantageous in particular because it enables ge to compensate for height differences or tolerances in the height of the carrier substrate 10 equipped with the electronic element 5.
  • the stamp element 13 is preferably inserted far enough into the cavity 7 until it comes into contact with the upper side of the electronic element 5 and / or with a metallization on a component side 25 of the carrier substrate 10.
  • the embodiment shown in FIG it is particularly preferred to see that the stamp element 13 is slidably mounted in the first tool half 11 in such a way that the stamp element 13 runs obliquely or is aligned with respect to a direction perpendicular to the main extension plane HSE.
  • the part of the stamp element 13 introduced into the cavity 7 extends obliquely to a direction running perpendicular to the main extension plane HSE.
  • an angle W between a longitudinal extension of the stamp element ment 13 and the direction perpendicular to the main plane HSE Rich direction forms, the angle W assumes a value between 5 ° and 65 °, preferably between 10 ° and 45 °, and particularly preferably between 15 ° and 30 °.
  • the stamp element 13 is first removed before the molded or formed electronics module 100 with the encapsulated carrier substrate 10 from the first tool half 11 and / or Two tool half 12 is formed after in turn the first tool half 11 and the second tool half 12 are transferred from a closed state to an open state.
  • a through-connection 16 is formed, as is shown, for example, in FIG. 1b, which is in particular formed obliquely to a direction running perpendicular to the main extension plane HSE .
  • One end of the via 16 contacts an upper side of the electronic element 5, and the other side of the via 16 is in an electrically conductive contact with the further metallization layer on the outside A of the encapsulation 8.
  • the via 16 extends to the outside A of the Encapsulation 8.
  • the top of an electronics element 5 is understood by the person skilled in the art in particular to be the side which is arranged opposite the carrier substrate 10 in the electronics module 100. Due to the formation of an oblique through-contact 16, it is advantageously possible to laterally offset the further metallization layer on the outside A of the encapsulation 8 relative to the connections on the top of the electronics element 5.
  • FIGS. 2a to 2c show a second, exemplary embodiment of the present invention, in which provision is made in particular to successively carry out the process for encapsulating and forming vias by means of a stamp element 13 in order to realize a three-dimensional conductor structure.
  • a recess is kept free, which later serves as a via 16 to the electronic element 5 on the carrier substrate 10.
  • a further metallization 18 is integrally formed on or formed on the outside A of the encapsulation 8.
  • a further first tool half 1 T and a further second tool half 12 ' are aligned with one another in such a way that they at least partially enclose the encapsulated carrier substrate 10 with its encapsulation 8 and a cavity 7 between them trained further first tool half 1 T and the further second tool half 12 '.
  • a further plated-through hole 16 ' can then be realized in the further encapsulation 8' by means of a further stamp element 13 '. It is particularly preferably provided that the further stamp element 13 'is laterally offset with respect to the stamp element 13, ie in a direction running parallel to the main extension plane HSE.
  • FIG. 2c A corresponding repetition of the method is demonstrated in FIG. 2c and an electronic module 100 is shown by way of example in FIG. 2d, in which through the implemented through-connections 16 or further through-connections 16 ′ and metallization layers on the respective encapsulations 8 or further encapsulations 8 ′ three-dimensional interconnect structure is formed.
  • FIG. 3 shows a third exemplary embodiment of the present invention.
  • a base element 19 is arranged in the cavity 7 formed between the first tool half 11 and the second tool half 12 , wherein an intermediate metallization 32, a carrier substrate 10 and / or an electronic element 5 is arranged on the base element 19.
  • the base element 19 which is made, for example, of the material that is later used for the encapsulation or for filling the cavity 7, it is advantageously possible to have a further substrate or a further component within the encapsulation 8 in another Height, ie at a different distance from the carrier substrate 10 to be arranged.
  • the formation as an intermediate metallization 32 can prove to be particularly advantageous if several electronic elements 5 can be supplied simultaneously by this intermediate metallization 32.
  • a metal block and / or a metal sheet, for example, is conceivable as the intermediate metallization 32.
  • the base element 19 is designed such that the electronic element 5 and / or intermediate metallization 32 is brought closer to the outside A of the encapsulation 8 than the upper side of the electronic element 5 attached directly to the carrier substrate 10, as a result of which the contact on the base element 19 arranged electronic elements 5 can be significantly simplified.
  • FIG. 4 shows a fourth exemplary embodiment of the present invention.
  • This exemplary embodiment is characterized in particular by the fact that the stamp element 13 is designed such that it receives contact elements 24, in particular pin-like from the top of the electronic element 5, the contact elements 24, which are formed on the top of the electronic element 5, during filling and protects, in particular within a corresponding recess 23.
  • This allows the contacts or connections to be bonded to the top of the electronic element 5 before filling and does not have to be implemented after filling.
  • FIG. 1 shows a fourth exemplary embodiment of the present invention.
  • FIG. 5 shows a fifth exemplary embodiment of the present invention.
  • the stamp element 13 has a recess 23 on its underside. This is designed such that it at least partially, preferably completely, surrounds the electronic element 5 when the cavity 7 is filled. In other words: the stamp element 13 is slipped over the electronics element 5 without the stamp element 13 being pressed onto the electronics element 5 or striking against the electronics element 5 or even being present.
  • This embodiment is particularly advantageous for sensitive electronic elements 5, in which the pressure exerted by the stamp element 13 could otherwise lead to damage.

Abstract

L'invention concerne un procédé d'encapsulation d'au moins un substrat de support (10), en particulier d'un substrat de support (10) équipé d'au moins un élément électronique (5), qui comprend les étapes consistant à positionner ledit au moins un substrat de support (10) entre un premier demi-moule (11) et un second demi-moule (12), à former une cavité fermée (7) au moyen du premier demi-moule (11) et du second demi-moule (12), la cavité (7) entourant au moins partiellement ledit au moins un substrat de support (10), à introduire au moins un élément poinçon (13), qui est monté de façon à pouvoir se déplacer dans le premier demi-moule (11) et/ou le second demi-moule (12), dans la cavité (7), et à remplir la cavité (7), dont le volume est réduit de la partie introduite dudit au moins un élément poinçon, au moyen d'un matériau servant à réaliser une encapsulation (8) dudit au moins un substrat de support (10).
PCT/EP2019/086632 2018-12-21 2019-12-20 Procédé d'encapsulation d'au moins un substrat de support ; module électronique et moule servant à l'encapsulation d'un substrat de support WO2020127942A1 (fr)

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DE102018133434.6A DE102018133434B4 (de) 2018-12-21 2018-12-21 Verfahren zum Verkapseln mindestens eines Trägersubstrats
DEDE102018133434.6 2018-12-21

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JPH0191444A (ja) 1987-10-02 1989-04-11 Meiki Co Ltd 多層プリント回路基板の射出成形方法
US20010042913A1 (en) * 2000-05-17 2001-11-22 Kabushiki Kaisha Toshiba Semiconductor device, method of manufacturing semiconductor device, resin molding die, and semiconductor manufacturing system
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