WO2020124630A1 - Combination sensor - Google Patents

Combination sensor Download PDF

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Publication number
WO2020124630A1
WO2020124630A1 PCT/CN2018/123796 CN2018123796W WO2020124630A1 WO 2020124630 A1 WO2020124630 A1 WO 2020124630A1 CN 2018123796 W CN2018123796 W CN 2018123796W WO 2020124630 A1 WO2020124630 A1 WO 2020124630A1
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WIPO (PCT)
Prior art keywords
lead plate
mems chip
chip
shortest distance
substrate
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PCT/CN2018/123796
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French (fr)
Chinese (zh)
Inventor
杨军伟
王德信
潘新超
端木鲁玉
邱文瑞
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歌尔股份有限公司
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Publication of WO2020124630A1 publication Critical patent/WO2020124630A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R19/00Electrostatic transducers
    • H04R19/04Microphones

Definitions

  • the utility model relates to the technical field of sensors, in particular to a combined sensor.
  • the first MEMS chip is capacitive
  • the working bias voltage is a DC voltage
  • the second MEMS chip working bias voltage is an AC voltage. Since the packaging space is relatively compact and the second ASIC uses alternating current signals, the lead pad area between the first ASIC chip and the second ASIC chip and the lead pad area of the first ASIC chip and the second ASIC chip pass through the first
  • the parasitic capacitance formed by the MEMS chip generates electromagnetic induction, thereby increasing the noise floor of the first MEMS chip when the first MEMS chip and the second MEMS chip work simultaneously, thereby affecting the overall performance of the combined sensor.
  • the main purpose of the utility model is to propose a combined sensor, which aims to solve the technical problem of large background noise of the MEMS chip.
  • the utility model discloses a combined sensor, which includes:
  • a substrate a first ASIC chip and a second ASIC chip installed in the substrate; a first lead plate and a second lead plate provided on the substrate;
  • a first MEMS chip and a second MEMS chip mounted on the surface of the substrate the first MEMS chip is a capacitive structure, the operating voltage of the second MEMS chip is an alternating voltage, and the first MEMS chip passes the A first lead plate is electrically connected to the first ASIC chip, and the second MEMS chip is electrically connected to the second ASIC chip through the second lead plate;
  • the shortest distance between the first MEMS chip and the second lead plate is d1, d1 ⁇ 0.3mm, and the shortest distance between the first lead plate and the second lead plate is d2, d2 ⁇ 1.2mm.
  • the shortest distance connection between the first MEMS chip and the second MEMS chip is a
  • the shortest distance connection between the first lead plate and the second lead plate is b, a and b intersect.
  • the first MEMS chip and the second MEMS chip are arranged side by side, and the first lead plate and the second lead plate are distributed on both ends of the same diagonal line of the substrate.
  • the volume of at least one of the first MEMS chip and the second lead plate is smaller than a preset volume, so that the shortest distance d1 of the first MEMS chip and the second lead plate can be increased.
  • the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the shortest distance d2 of the first lead plate and the second lead plate can be increased.
  • the volume of at least one of the first MEMS chip and the second lead plate is smaller than a preset volume, so that the shortest distance d1 between the first MEMS chip and the second lead plate can be increased, And the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the shortest distance d2 of the first lead plate and the second lead plate can be increased.
  • the shortest distance d1 is formed between the side of the first MEMS chip and the side of the second lead plate; the shortest distance d2 is formed between the side of the first lead plate and the second Between the sides of the lead plate.
  • the first MEMS chip is a microphone chip, and a sound hole is provided at a position of the substrate facing the microphone chip.
  • the combined sensor further includes a cover, the cover is provided on an upper surface of the substrate, the cover and the substrate define a package cavity; the first MEMS chip and the second MEMS The chip is arranged in the packaging cavity.
  • the first lead plate is a first lead pad
  • the second lead plate is a second lead pad
  • the first ASIC chip and the second ASIC chip are provided in the substrate, the first lead plate and the second lead plate are provided on the substrate, and the first MEMS chip and the second MEMS chip are mounted on the surface of the substrate ,
  • the first MEMS chip is electrically connected to the first ASIC chip through the first lead plate
  • the second MEMS chip is electrically connected to the second ASIC chip through the second lead plate;
  • the first The shortest distance between a MEMS chip and the second lead plate is d1, d1 is greater than or equal to 0.3mm, the shortest distance between the first lead plate and the second lead plate is d2, d2 is greater than or equal to 1.2mm, pass Increasing the values of d1 and d2 reduces the parasitic capacitance effect, thereby reducing electromagnetic induction, so that when the combined sensor works, the noise floor of the first MEMS chip is greatly reduced, and the overall performance of the combined sensor is improved.
  • FIG. 1 is a schematic diagram of a combined sensor according to an embodiment of the present invention
  • FIG. 2 is another schematic diagram of the combined sensor structure in the embodiment of the utility model.
  • connection may be a fixed connection, a detachable connection, or integrated; It can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium. It can be the connection between two elements or the interaction between two elements, unless otherwise clearly defined.
  • connection may be a fixed connection, a detachable connection, or integrated; It can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium. It can be the connection between two elements or the interaction between two elements, unless otherwise clearly defined.
  • the MEMS (Micro-Electro-Mechanical System) chip is an independent intelligent system. Its internal structure is generally in the order of micrometers or even nanometers, with small size, light weight, low power consumption, With the characteristics of good durability and stable performance, with the development of small, light and thin electronic devices, MEMS chips are more and more widely used in these devices.
  • ASIC (Application Specific Integrated Circuit) chips are used to process electrical signals, such as amplification.
  • the MEMS chip and the ASIC chip can be mounted on the substrate in a well-known manner.
  • the present invention provides a combined sensor, wherein the combined sensor includes a substrate 1, a first ASIC chip 2 and a second ASIC chip 3 installed in the substrate 1 ; The first lead plate 4 and the second lead plate 5 provided on the substrate 1; the first MEMS chip 6 and the second MEMS chip 7 mounted on the surface of the substrate 1, the first MEMS chip 6 is a capacitive structure, the first MEMS chip
  • the working bias voltage of 6 is a DC voltage
  • the working voltage of the second MEMS chip 7 is an AC voltage
  • the first MEMS chip 6 is electrically connected to the first ASIC chip 2 through the first lead plate 4, and the second MEMS chip 7 is passed through the second lead
  • the board 5 is electrically connected to the second ASIC chip 3; the shortest distance between the first MEMS chip 6 and the second lead plate 5 is d1, d1 is greater than or equal to 0.3 mm, and the shortest distance between the first lead plate 4 and the second lead plate 5 is d2, d2
  • the shortest distance between the first MEMS chip 6 and the second lead plate 5 is d1, d1 is greater than or equal to 0.3 mm, and the shortest distance between the first lead plate 4 and the second lead plate 5 is d2, d2 is greater than or equal to 1.2mm, by increasing the values of d1 and d2, the parasitic capacitance effect is reduced, thereby reducing electromagnetic induction, so that when the combined sensor works, the noise floor of the first MEMS chip 6 is greatly reduced, improving the combination The overall performance of the sensor.
  • the above embodiment can be applied to the case where the ASIC chip is provided inside the substrate 1.
  • the shortest distance connection between the first MEMS chip 6 and the second MEMS chip 7 is the first shortest distance, denoted as a
  • the shortest distance connection between the first lead plate 4 and the second lead plate 5 is the second shortest
  • the distance is denoted as b
  • the intersection here refers to the direct intersection or when a and b are different planes, a and b respectively intersect the orthographic projection on the substrate surface.
  • the first lead plate 4 and the second lead plate 5 are located on both sides of the connection line between the first MEMS chip 6 and the second MEMS chip 7, respectively, which can maximize the value of d1 and d2 under the premise of increasing Use limited board space.
  • first MEMS chip 6 and the second MEMS chip 7 are arranged side by side, and the first lead plate 4 and the second lead plate 5 are distributed at both ends of the same diagonal line of the substrate 1. In this way, on the premise of ensuring the miniaturization of the product to the greatest extent, it is ensured that d1 and d2 are large enough to reduce the noise floor of the first MEMS chip 6.
  • the volume of at least one of the first MEMS chip 6 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 can be increased.
  • the preset volume mentioned here refers to the design volume of the chip or lead plate in the prior art, and the preset volume mentioned later also means the same.
  • This embodiment can achieve the purpose of increasing the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 by reducing the volume in the first MEMS chip 6 and/or the second lead plate 5 to be smaller than the preset volume To reduce the noise floor of the first MEMS chip 6.
  • the volume of at least one of the first lead plate 4 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d2 of the first lead plate 4 and the second lead plate 5 can be increased, which can be reduced by
  • the volume in the first lead plate 4 and/or the second lead plate 5 is to increase the shortest distance d2 of the first lead plate 4 and the second lead plate 5 to reduce the noise floor of the first MEMS chip 6.
  • the volume of at least one of the first MEMS chip 6 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 can be increased, and the first lead The volume of at least one of the plate 4 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d2 of the first lead plate 4 and the second lead plate 5 can be increased.
  • This embodiment can increase the number of the first MEMS chip 6 and/or the second lead plate 5 without rotating the second MEMS chip 7, the second ASIC chip 3 and the second lead plate 5 A shortest distance d1 between a MEMS chip 6 and the second lead plate 5, and/or by reducing the volume of the first lead plate 4 and/or the second lead plate 5, the first lead plate 4 and the second lead plate are increased The shortest distance d2 of 5 to reduce the noise floor of the first MEMS chip 6.
  • the shortest distance d1 is formed between the side of the first MEMS chip 6 and the side of the second lead plate 5; the shortest distance d2 is formed between the side of the first lead plate 4 and the side of the second lead plate 5.
  • the side of the first MEMS chip 6 has a connection point
  • the side of the second lead plate 5 has a connection point.
  • the connection distance between the connection point of the first MEMS chip 6 and the connection point of the second lead plate 5 is the first The same is true for the shortest distance between the MEMS chip 6 and the second lead plate 5 and the shortest distance d2.
  • the first MEMS chip 6, the first lead plate 4, and the second lead plate 5 are all cuboid, and the shortest distance d1 is formed between the side edge of the first MEMS chip 6 and the side edge of the second lead plate 5, the shortest The distance d2 is formed between the side edge of the first lead plate 4 and the side edge of the second lead plate 5.
  • the first MEMS chip 6, the first lead plate 4, and the second lead plate 5 may also be cubes.
  • the shortest distance d1 is formed between the side edge of the first MEMS chip 6 and the side edge of the second lead plate 5.
  • the shortest distance d2 is formed between the side edge of the first lead plate 4 and the side edge of the second lead plate 5.
  • the first MEMS chip 6 is a microphone chip, and a sound hole 8 is provided at a position of the substrate 1 facing the microphone chip.
  • the sound hole 8 is a through hole penetrating through the substrate 1, and the microphone chip is directly opposite the sound hole 8 to facilitate acquiring a sound signal.
  • the combined sensor further includes a housing 9 provided on the upper surface of the substrate 1.
  • the housing 9 and the substrate 1 define a package cavity; the first MEMS chip 6 and the second MEMS chip 7 are provided in the package cavity.
  • the cover 9 is disposed on the upper surface of the substrate 1, and the two together define a packaging cavity.
  • the cover 9 includes a cover plate and a surrounding plate formed at the edge of the cover plate, the cover plate and the surrounding plate may be integrally formed, the surrounding plate surrounds the cover plate to form an open cavity, and the cover 9 is attached through the surrounding plate Onto the substrate 1 to form a closed package cavity.
  • the mounting of the cover 9 and the substrate 1 can be carried out by patch glue or soldered to form a package structure.
  • the packaging structure is used to encapsulate each chip, and each chip is installed on the upper surface of the substrate 1 corresponding to the packaging cavity to avoid interference of external signals.
  • the material of the cover 9 is metal, that is, the cover 9 forms an electromagnetic shielding cover, which satisfies the packaging requirements of each chip and protects each chip from the interference of external electromagnetic signals.
  • first lead plate 4 is a first lead pad
  • second lead plate 5 is a second lead pad. Both the first MEMS chip 6 and the first ASIC chip 2 are soldered on the first lead pad, and the second MEMS chip 7 and the second ASIC chip 3 are soldered on the second lead pad.

Abstract

Provided is a combination sensor, comprising: a substrate (1); a first ASIC chip (2) and a second ASIC chip (3) mounted in the substrate (1); a first lead plate (4) and a second lead plate (5) arranged on the substrate (1); a first MEMS chip (6) and a second MEMS chip (7) mounted on the surface of the substrate (1); the first MEMS chip (6) is a capacitive structure; the operating voltage of the second MEMS chip (7) is alternating current voltage; the first MEMS chip (6) is electrically connected to the first ASIC chip (2) by means of the first lead plate (4), and the second MEMS chip (7) is electrically connected to the second ASIC chip (3) by means of the second lead plate (5); the shortest distance between the first MEMS chip (6) and the second lead plate (5) is d1, wherein d1≥0.3 mm; the shortest distance between the first lead plate (4) and the second lead plate (5) is d2, wherein d2≥1.2 mm. The combination sensor has the advantages of reducing the effect of parasitic capacitance, decreasing electromagnetic induction, and reducing the background noise of the first MEMS chip (6).

Description

组合传感器Combination sensor 技术领域Technical field
本实用新型涉及传感器技术领域,特别涉及一种组合传感器。The utility model relates to the technical field of sensors, in particular to a combined sensor.
背景技术Background technique
现有技术中,两个MEMS芯片和两个ASIC芯片封装形成组合传感器。其中,第一MEMS芯片是电容式的,工作偏压为直流电压,第二MEMS芯片的工作偏压为交流电压。由于该封装空间较为紧凑且第二ASIC用的是交流电信号,使得第一ASIC芯片与第二ASIC芯片的引线Pad区域之间以及第一ASIC芯片与第二ASIC芯片的引线Pad区域通过第一MEMS芯片形成寄生电容而产生了电磁感应,进而增大了第一MEMS芯片和第二MEMS芯片同时工作时第一MEMS芯片的本底噪声,从而影响了组合传感器的整体性能。In the prior art, two MEMS chips and two ASIC chips are packaged to form a combined sensor. Among them, the first MEMS chip is capacitive, the working bias voltage is a DC voltage, and the second MEMS chip working bias voltage is an AC voltage. Since the packaging space is relatively compact and the second ASIC uses alternating current signals, the lead pad area between the first ASIC chip and the second ASIC chip and the lead pad area of the first ASIC chip and the second ASIC chip pass through the first The parasitic capacitance formed by the MEMS chip generates electromagnetic induction, thereby increasing the noise floor of the first MEMS chip when the first MEMS chip and the second MEMS chip work simultaneously, thereby affecting the overall performance of the combined sensor.
实用新型内容Utility model content
本实用新型的主要目的是提出一种组合传感器,旨在解决MEMS芯片的本底噪声较大的技术问题。The main purpose of the utility model is to propose a combined sensor, which aims to solve the technical problem of large background noise of the MEMS chip.
为实现上述目的,本实用新型公开了一种组合传感器,其中,包括:In order to achieve the above purpose, the utility model discloses a combined sensor, which includes:
基板;安装于所述基板内的第一ASIC芯片和第二ASIC芯片;设置于所述基板的第一引线板和第二引线板;A substrate; a first ASIC chip and a second ASIC chip installed in the substrate; a first lead plate and a second lead plate provided on the substrate;
安装于所述基板表面的第一MEMS芯片和第二MEMS芯片,所述第一MEMS芯片为电容式结构,所述第二MEMS芯片的工作电压为交流电压,所述第一MEMS芯片通过所述第一引线板与所述第一ASIC芯片电连接,所述第二MEMS芯片通过所述第二引线板与所述第二ASIC芯片电连接;A first MEMS chip and a second MEMS chip mounted on the surface of the substrate, the first MEMS chip is a capacitive structure, the operating voltage of the second MEMS chip is an alternating voltage, and the first MEMS chip passes the A first lead plate is electrically connected to the first ASIC chip, and the second MEMS chip is electrically connected to the second ASIC chip through the second lead plate;
所述第一MEMS芯片和所述第二引线板的最短距离为d1,d1≥0.3mm,所述第一引线板和所述第二引线板的最短距离为d2,d2≥1.2mm。The shortest distance between the first MEMS chip and the second lead plate is d1, d1≥0.3mm, and the shortest distance between the first lead plate and the second lead plate is d2, d2≥1.2mm.
优选地,所述第一MEMS芯片与所述第二MEMS芯片的最短距离的连线为a,所述第一引线板和所述第二引线板的最短距离的连线为b,a与b相交。Preferably, the shortest distance connection between the first MEMS chip and the second MEMS chip is a, and the shortest distance connection between the first lead plate and the second lead plate is b, a and b intersect.
优选地,所述第一MEMS芯片与所述第二MEMS芯片并排设置,所述第一引线板和所述第二引线板分布在所述基板的同一对角线的两端。Preferably, the first MEMS chip and the second MEMS chip are arranged side by side, and the first lead plate and the second lead plate are distributed on both ends of the same diagonal line of the substrate.
优选地,所述第一MEMS芯片和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一MEMS芯片和所述第二引线板的最短距离d1。Preferably, the volume of at least one of the first MEMS chip and the second lead plate is smaller than a preset volume, so that the shortest distance d1 of the first MEMS chip and the second lead plate can be increased.
优选地,所述第一引线板和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一引线板和所述第二引线板的最短距离d2。Preferably, the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the shortest distance d2 of the first lead plate and the second lead plate can be increased.
优选地,所述第一MEMS芯片和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一MEMS芯片和所述第二引线板的最短距离d1,并且所述第一引线板和第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一引线板和所述第二引线板的最短距离d2。Preferably, the volume of at least one of the first MEMS chip and the second lead plate is smaller than a preset volume, so that the shortest distance d1 between the first MEMS chip and the second lead plate can be increased, And the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the shortest distance d2 of the first lead plate and the second lead plate can be increased.
优选地,所述最短距离d1形成于所述第一MEMS芯片的侧面和所述第二引线板的侧面之间;所述最短距离d2形成于所述第一引线板的侧面和所述第二引线板的侧面之间。Preferably, the shortest distance d1 is formed between the side of the first MEMS chip and the side of the second lead plate; the shortest distance d2 is formed between the side of the first lead plate and the second Between the sides of the lead plate.
优选地,所述第一MEMS芯片为麦克风芯片,所述基板面对所述麦克风芯片的位置设置有音孔。Preferably, the first MEMS chip is a microphone chip, and a sound hole is provided at a position of the substrate facing the microphone chip.
优选地,所述组合传感器还包括罩壳,所述罩壳设于所述基板的上表面,所述罩壳与所述基板限定出封装腔;所述第一MEMS芯片和所述第二MEMS芯片设于所述封装腔内。Preferably, the combined sensor further includes a cover, the cover is provided on an upper surface of the substrate, the cover and the substrate define a package cavity; the first MEMS chip and the second MEMS The chip is arranged in the packaging cavity.
优选地,所述第一引线板为第一引线焊盘,所述第二引线板为第二引线焊盘。Preferably, the first lead plate is a first lead pad, and the second lead plate is a second lead pad.
本实用新型的上述技术方案中,基板内设置有第一ASIC芯片和第二ASIC芯片,基板上设置有第一引线板和第二引线板,第一MEMS芯片和第二MEMS芯片安装在基板表面,所述第一MEMS芯片通过所述第一引线板与所述第一ASIC芯片电连接,所述第二MEMS芯片通过所述第二引线板与所述第二ASIC芯片电连接;所述第一MEMS芯片和所述第二引线板的最短距离为d1,d1大于或等于0.3mm,所述第一引线板和所述第二引线板的最短距离为d2,d2大于或等于1.2mm,通过增大d1和d2的值,减弱寄生电容效应,从而减小了电磁感应,使得组合传感器工作时,第一MEMS芯片的本底噪声 大幅度下降,提升了组合传感器的整体性能。In the above technical solution of the present invention, the first ASIC chip and the second ASIC chip are provided in the substrate, the first lead plate and the second lead plate are provided on the substrate, and the first MEMS chip and the second MEMS chip are mounted on the surface of the substrate , The first MEMS chip is electrically connected to the first ASIC chip through the first lead plate, and the second MEMS chip is electrically connected to the second ASIC chip through the second lead plate; the first The shortest distance between a MEMS chip and the second lead plate is d1, d1 is greater than or equal to 0.3mm, the shortest distance between the first lead plate and the second lead plate is d2, d2 is greater than or equal to 1.2mm, pass Increasing the values of d1 and d2 reduces the parasitic capacitance effect, thereby reducing electromagnetic induction, so that when the combined sensor works, the noise floor of the first MEMS chip is greatly reduced, and the overall performance of the combined sensor is improved.
附图说明BRIEF DESCRIPTION
为了更清楚地说明本实用新型实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。In order to more clearly explain the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings used in the description of the embodiments or the prior art. Obviously, the drawings in the following description Only some embodiments of the present invention, for those of ordinary skill in the art, without paying any creative labor, other drawings can be obtained according to the structures shown in these drawings.
图1为本实用新型实施例组合传感器的示意图;FIG. 1 is a schematic diagram of a combined sensor according to an embodiment of the present invention;
图2为本实用新型实施例中组合传感器结构另一示意图。FIG. 2 is another schematic diagram of the combined sensor structure in the embodiment of the utility model.
附图标号说明:Description of Drawing Symbols:
标号Label 名称 name 标号Label 名称name
11 基板 Substrate 22 第一ASIC芯片The first ASIC chip
33 第二ASIC芯片 Second ASIC chip 44 第一引线板 First lead plate
55 第二引线板 Second lead plate 66 第一MEMS芯片The first MEMS chip
77 第二MEMS芯片 Second MEMS chip 88 音孔 Sound hole
99 罩壳Cover  A  A
本实用新型目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。The realization, functional characteristics and advantages of the utility model will be further described in conjunction with the embodiments and with reference to the drawings.
具体实施方式detailed description
下面将结合本实用新型实施例中的附图,对本实用新型实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本实用新型的一部分实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本实用新型保护的范围。The technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all Examples. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without making creative efforts fall within the protection scope of the present invention.
需要说明,本实用新型实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也 相应地随之改变。It should be noted that all the directional indicators (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain between the components in a certain posture (as shown in the drawings) If the specific posture changes, the directional indication changes accordingly.
在本实用新型中,除非另有明确的规定和限定,术语“连接”、“固定”等应做广义理解,例如,“固定”可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系,除非另有明确的限定。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本实用新型中的具体含义。In the present invention, unless otherwise clearly specified and defined, the terms "connection", "fixed", etc. should be understood in a broad sense, for example, "fixed" may be a fixed connection, a detachable connection, or integrated; It can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium. It can be the connection between two elements or the interaction between two elements, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.
另外,在本实用新型中如涉及“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外,各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本实用新型要求的保护范围之内。In addition, descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may include at least one of the features explicitly or implicitly. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary skilled in the art to achieve, when the combination of technical solutions contradicts each other or cannot be achieved, it should be considered that the combination of such technical solutions does not exist , Nor within the scope of protection required by this utility model.
首先,需要说明的是,MEMS(Micro-Electro-Mechanical System,微机电系统)芯片是一个独立的智能系统,其内部结构一般在微米甚至纳米量级,具有体积小、重量轻、功耗低、耐用性好、性能稳定等特点,随着电子设备的小巧化、轻薄化发展,MEMS芯片越来越广泛地运用在这些设备上。ASIC(Application Specific Integrated Circuit,集成电路)芯片用于对电信号进行处理,例如放大。对于本领域技术人员而言,可采用熟知的方式将MEMS芯片和ASIC芯片贴装到基板上。First of all, it should be noted that the MEMS (Micro-Electro-Mechanical System) chip is an independent intelligent system. Its internal structure is generally in the order of micrometers or even nanometers, with small size, light weight, low power consumption, With the characteristics of good durability and stable performance, with the development of small, light and thin electronic devices, MEMS chips are more and more widely used in these devices. ASIC (Application Specific Integrated Circuit) chips are used to process electrical signals, such as amplification. For those skilled in the art, the MEMS chip and the ASIC chip can be mounted on the substrate in a well-known manner.
参照图1-图2,根据本实用新型的具体实施方式,本实用新型提供一种组合传感器,其中,组合传感器包括基板1,安装于基板1内的第一ASIC芯片2和第二ASIC芯片3;设置于基板1的第一引线板4和第二引线板5;安装于基板1表面的第一MEMS芯片6和第二MEMS芯片7,第一MEMS芯片6为电容式结构,第一MEMS芯片6的工作偏压为直流电压,第二MEMS芯片7的工作电压为交流电压,第一MEMS芯片6通过第一引线板4与第一ASIC芯片2电连接,第二MEMS芯片7通过第二引线板5与第二ASIC芯片3电连接;第一MEMS芯片6和第二引线板5的最短距离为d1,d1大于或等于0.3mm,第一引线板4和第二引线板5的最短距离为d2,d2大于或等于1.2mm。Referring to FIGS. 1-2, according to a specific embodiment of the present invention, the present invention provides a combined sensor, wherein the combined sensor includes a substrate 1, a first ASIC chip 2 and a second ASIC chip 3 installed in the substrate 1 ; The first lead plate 4 and the second lead plate 5 provided on the substrate 1; the first MEMS chip 6 and the second MEMS chip 7 mounted on the surface of the substrate 1, the first MEMS chip 6 is a capacitive structure, the first MEMS chip The working bias voltage of 6 is a DC voltage, the working voltage of the second MEMS chip 7 is an AC voltage, the first MEMS chip 6 is electrically connected to the first ASIC chip 2 through the first lead plate 4, and the second MEMS chip 7 is passed through the second lead The board 5 is electrically connected to the second ASIC chip 3; the shortest distance between the first MEMS chip 6 and the second lead plate 5 is d1, d1 is greater than or equal to 0.3 mm, and the shortest distance between the first lead plate 4 and the second lead plate 5 is d2, d2 is greater than or equal to 1.2mm.
本实用新型的上述实施例中,第一MEMS芯片6和第二引线板5的最短距离为d1,d1大于或等于0.3mm,第一引线板4和第二引线板5的最短距离为d2,d2大于或等于1.2mm,通过增大d1和d2的值,减弱寄生电容效应,从而减小了电磁感应,使得组合传感器工作时,第一MEMS芯片6的本底噪声大幅度下降,提升了组合传感器的整体性能。上述实施例能够适用于ASIC芯片设置在基板1内部的情况。In the above embodiment of the present invention, the shortest distance between the first MEMS chip 6 and the second lead plate 5 is d1, d1 is greater than or equal to 0.3 mm, and the shortest distance between the first lead plate 4 and the second lead plate 5 is d2, d2 is greater than or equal to 1.2mm, by increasing the values of d1 and d2, the parasitic capacitance effect is reduced, thereby reducing electromagnetic induction, so that when the combined sensor works, the noise floor of the first MEMS chip 6 is greatly reduced, improving the combination The overall performance of the sensor. The above embodiment can be applied to the case where the ASIC chip is provided inside the substrate 1.
另外,第一MEMS芯片6与第二MEMS芯片7的最短距离的连线为第一最短距离,记为a,第一引线板4和第二引线板5的最短距离的连线为第二最短距离,记为b,a与b相交,此处的相交是指直接相交或者当a与b异面时,a与b分别在基板表面的正投影相交。此时,第一引线板4和第二引线板5分别位于第一MEMS芯片6与第二MEMS芯片7连线的两侧,这样能在增大d1和d2的值的前提下,最大化地利用有限的基板空间。In addition, the shortest distance connection between the first MEMS chip 6 and the second MEMS chip 7 is the first shortest distance, denoted as a, and the shortest distance connection between the first lead plate 4 and the second lead plate 5 is the second shortest The distance is denoted as b, and a and b intersect. The intersection here refers to the direct intersection or when a and b are different planes, a and b respectively intersect the orthographic projection on the substrate surface. At this time, the first lead plate 4 and the second lead plate 5 are located on both sides of the connection line between the first MEMS chip 6 and the second MEMS chip 7, respectively, which can maximize the value of d1 and d2 under the premise of increasing Use limited board space.
此外,第一MEMS芯片6与第二MEMS芯片7并排设置,第一引线板4和第二引线板5分布在基板1的同一对角线的两端。这样能最大限度地保证产品小型化的前提下,确保d1和d2足够大,以减小第一MEMS芯片6的本底噪声。In addition, the first MEMS chip 6 and the second MEMS chip 7 are arranged side by side, and the first lead plate 4 and the second lead plate 5 are distributed at both ends of the same diagonal line of the substrate 1. In this way, on the premise of ensuring the miniaturization of the product to the greatest extent, it is ensured that d1 and d2 are large enough to reduce the noise floor of the first MEMS chip 6.
进一步地,第一MEMS芯片6和第二引线板5中的至少一者的体积小于预设体积,以能够增大第一MEMS芯片6和第二引线板5的最短距离d1。这里说的预设体积是指现有技术中的芯片或引线板的设计的体积大小,后述所说的预设体积也是指相同的意思。该实施例可以通过减小第一MEMS芯片6和/或第二引线板5中的体积使之小于预设体积来达到增大第一MEMS芯片6和第二引线板5的最短距离d1的目的,以减小第一MEMS芯片6的本底噪声。Further, the volume of at least one of the first MEMS chip 6 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 can be increased. The preset volume mentioned here refers to the design volume of the chip or lead plate in the prior art, and the preset volume mentioned later also means the same. This embodiment can achieve the purpose of increasing the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 by reducing the volume in the first MEMS chip 6 and/or the second lead plate 5 to be smaller than the preset volume To reduce the noise floor of the first MEMS chip 6.
进一步地,第一引线板4和第二引线板5中的至少一者的体积小于预设体积,以能够增大第一引线板4和第二引线板5的最短距离d2,可以通过减小第一引线板4和/或第二引线板5中的体积来达到增大第一引线板4和第二引线板5的最短距离d2目的,以减小第一MEMS芯片6的本底噪声。Further, the volume of at least one of the first lead plate 4 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d2 of the first lead plate 4 and the second lead plate 5 can be increased, which can be reduced by The volume in the first lead plate 4 and/or the second lead plate 5 is to increase the shortest distance d2 of the first lead plate 4 and the second lead plate 5 to reduce the noise floor of the first MEMS chip 6.
进一步地,第一MEMS芯片6和第二引线板5中的至少一者的体积小于预设体积,以能够增大第一MEMS芯片6和第二引线板5的最短距离d1,并且第一引线板4和第二引线板5中的至少一者的体积小于预设体积,以能够 增大第一引线板4和第二引线板5的最短距离d2。该实施例可以在不旋转第二MEMS芯片7、第二ASIC芯片3及第二引线板5的情况下,通过减小第一MEMS芯片6和/或第二引线板5的体积来增大第一MEMS芯片6和第二引线板5的最短距离d1,和/或通过减小第一引线板4和/或第二引线板5的体积,来增大第一引线板4和第二引线板5的最短距离d2,以减小第一MEMS芯片6的本底噪声。Further, the volume of at least one of the first MEMS chip 6 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d1 of the first MEMS chip 6 and the second lead plate 5 can be increased, and the first lead The volume of at least one of the plate 4 and the second lead plate 5 is smaller than the preset volume, so that the shortest distance d2 of the first lead plate 4 and the second lead plate 5 can be increased. This embodiment can increase the number of the first MEMS chip 6 and/or the second lead plate 5 without rotating the second MEMS chip 7, the second ASIC chip 3 and the second lead plate 5 A shortest distance d1 between a MEMS chip 6 and the second lead plate 5, and/or by reducing the volume of the first lead plate 4 and/or the second lead plate 5, the first lead plate 4 and the second lead plate are increased The shortest distance d2 of 5 to reduce the noise floor of the first MEMS chip 6.
当然,最短距离d1形成于第一MEMS芯片6的侧面和第二引线板5的侧面之间;最短距离d2形成于第一引线板4的侧面和第二引线板5的侧面之间。例如,第一MEMS芯片6的侧面具有一连接点,第二引线板5的侧面具有一连接点,第一MEMS芯片6的连接点和第二引线板5的连接点的连线距离为第一MEMS芯片6和第二引线板5的最短距离,最短距离d2亦是如此。优选地,第一MEMS芯片6、第一引线板4、第二引线板5均为长方体,最短距离d1形成于第一MEMS芯片6的侧棱与第二引线板5的侧棱之间,最短距离d2形成于第一引线板4的侧棱和第二引线板5的侧棱之间。当然,第一MEMS芯片6、第一引线板4、第二引线板5也可以是正方体,同样,最短距离d1形成于第一MEMS芯片6的侧棱与第二引线板5的侧棱之间,最短距离d2形成于第一引线板4的侧棱和第二引线板5的侧棱之间。Of course, the shortest distance d1 is formed between the side of the first MEMS chip 6 and the side of the second lead plate 5; the shortest distance d2 is formed between the side of the first lead plate 4 and the side of the second lead plate 5. For example, the side of the first MEMS chip 6 has a connection point, and the side of the second lead plate 5 has a connection point. The connection distance between the connection point of the first MEMS chip 6 and the connection point of the second lead plate 5 is the first The same is true for the shortest distance between the MEMS chip 6 and the second lead plate 5 and the shortest distance d2. Preferably, the first MEMS chip 6, the first lead plate 4, and the second lead plate 5 are all cuboid, and the shortest distance d1 is formed between the side edge of the first MEMS chip 6 and the side edge of the second lead plate 5, the shortest The distance d2 is formed between the side edge of the first lead plate 4 and the side edge of the second lead plate 5. Of course, the first MEMS chip 6, the first lead plate 4, and the second lead plate 5 may also be cubes. Similarly, the shortest distance d1 is formed between the side edge of the first MEMS chip 6 and the side edge of the second lead plate 5. The shortest distance d2 is formed between the side edge of the first lead plate 4 and the side edge of the second lead plate 5.
当然,第一MEMS芯片6为麦克风芯片,基板1面对麦克风芯片的位置设置有音孔8,音孔8为在基板1上贯穿的通孔,麦克风芯片正对音孔8便于获取声音信号。Of course, the first MEMS chip 6 is a microphone chip, and a sound hole 8 is provided at a position of the substrate 1 facing the microphone chip. The sound hole 8 is a through hole penetrating through the substrate 1, and the microphone chip is directly opposite the sound hole 8 to facilitate acquiring a sound signal.
另外,组合传感器还包括罩壳9,罩壳9设于基板1的上表面,罩壳9与基板1限定出封装腔;第一MEMS芯片6和第二MEMS芯片7设于封装腔内。罩壳9设于基板1的上表面,两者共同限定出封装腔。具体为,罩壳9包括盖板以及形成在盖板边缘位置的围板,盖板和围板可以一体成型,围板围设盖板形成一个开口的凹腔,罩壳9通过围板贴装至基板1上,从而形成一个封闭的封装腔。罩壳9与基板1的贴装可通过贴片胶贴装,或者通过焊锡焊接,从而形成一个封装结构。该封装结构用于封装各芯片,各芯片安装在封装腔对应的基板1的上表面,避免外界信号的干扰。优选地,罩壳9的材质为金属,也即罩壳9形成一个电磁屏蔽罩,满足各芯片的封装需求,保护各芯片不受外部电磁信号的干扰。In addition, the combined sensor further includes a housing 9 provided on the upper surface of the substrate 1. The housing 9 and the substrate 1 define a package cavity; the first MEMS chip 6 and the second MEMS chip 7 are provided in the package cavity. The cover 9 is disposed on the upper surface of the substrate 1, and the two together define a packaging cavity. Specifically, the cover 9 includes a cover plate and a surrounding plate formed at the edge of the cover plate, the cover plate and the surrounding plate may be integrally formed, the surrounding plate surrounds the cover plate to form an open cavity, and the cover 9 is attached through the surrounding plate Onto the substrate 1 to form a closed package cavity. The mounting of the cover 9 and the substrate 1 can be carried out by patch glue or soldered to form a package structure. The packaging structure is used to encapsulate each chip, and each chip is installed on the upper surface of the substrate 1 corresponding to the packaging cavity to avoid interference of external signals. Preferably, the material of the cover 9 is metal, that is, the cover 9 forms an electromagnetic shielding cover, which satisfies the packaging requirements of each chip and protects each chip from the interference of external electromagnetic signals.
此外,第一引线板4为第一引线焊盘,第二引线板5为第二引线焊盘。第一MEMS芯片6与第一ASIC芯片2均焊接在第一引线焊盘上,第二MEMS芯片7与第二ASIC芯片3均焊接在第二引焊盘上。In addition, the first lead plate 4 is a first lead pad, and the second lead plate 5 is a second lead pad. Both the first MEMS chip 6 and the first ASIC chip 2 are soldered on the first lead pad, and the second MEMS chip 7 and the second ASIC chip 3 are soldered on the second lead pad.
以上所述仅为本实用新型的优选实施例,并非因此限制本实用新型的专利范围,凡是在本实用新型的实用新型构思下,利用本实用新型说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本实用新型的专利保护范围内。The above is only the preferred embodiment of the utility model, and does not limit the patent scope of the utility model. Any equivalent structural transformation made by the specification and drawings of the utility model under the concept of the utility model of the utility model, Or directly/indirectly used in other related technical fields are included in the patent protection scope of the utility model.

Claims (10)

  1. 一种组合传感器,其特征在于,包括:A combined sensor, characterized in that it includes:
    基板;Substrate
    安装于所述基板内的第一ASIC芯片和第二ASIC芯片;A first ASIC chip and a second ASIC chip installed in the substrate;
    设置于所述基板的第一引线板和第二引线板;A first lead plate and a second lead plate provided on the substrate;
    安装于所述基板表面的第一MEMS芯片和第二MEMS芯片,所述第一MEMS芯片为电容式结构,所述第二MEMS芯片的工作电压为交流电压,所述第一MEMS芯片通过所述第一引线板与所述第一ASIC芯片电连接,所述第二MEMS芯片通过所述第二引线板与所述第二ASIC芯片电连接;A first MEMS chip and a second MEMS chip mounted on the surface of the substrate, the first MEMS chip is a capacitive structure, the operating voltage of the second MEMS chip is an alternating voltage, and the first MEMS chip passes the A first lead plate is electrically connected to the first ASIC chip, and the second MEMS chip is electrically connected to the second ASIC chip through the second lead plate;
    所述第一MEMS芯片和所述第二引线板的最短距离为d1,d1≥0.3mm,所述第一引线板和所述第二引线板的最短距离为d2,d2≥1.2mm。The shortest distance between the first MEMS chip and the second lead plate is d1, d1≥0.3mm, and the shortest distance between the first lead plate and the second lead plate is d2, d2≥1.2mm.
  2. 如权利要求1所述的组合传感器,其特征在于,所述第一MEMS芯片与所述第二MEMS芯片的最短距离的连线为a,所述第一引线板和所述第二引线板的最短距离的连线为b,a与b相交。The combination sensor according to claim 1, wherein the shortest distance between the first MEMS chip and the second MEMS chip is a, and the first lead plate and the second lead plate The shortest distance is b, and a and b intersect.
  3. 如权利要求2所述的组合传感器,其特征在于,所述第一MEMS芯片与所述第二MEMS芯片并排设置,所述第一引线板和所述第二引线板分布在所述基板的同一对角线的两端。The combination sensor according to claim 2, wherein the first MEMS chip and the second MEMS chip are arranged side by side, and the first lead plate and the second lead plate are distributed on the same substrate Diagonal ends.
  4. 如权利要求2所述的组合传感器,其特征在于,所述第一MEMS芯片和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一MEMS芯片和所述第二引线板的最短距离d1。The combination sensor according to claim 2, wherein the volume of at least one of the first MEMS chip and the second lead plate is smaller than a preset volume, so that the first MEMS chip and The shortest distance d1 of the second lead plate.
  5. 如权利要求2所述的组合传感器,其特征在于,所述第一引线板和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一引线板和所述第二引线板的最短距离d2。The combination sensor according to claim 2, wherein the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the first lead plate and the The shortest distance d2 of the second lead plate.
  6. 如权利要求1所述的组合传感器,其特征在于,所述第一MEMS芯 片和所述第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一MEMS芯片和所述第二引线板的最短距离d1,并且所述第一引线板和第二引线板中的至少一者的体积小于预设体积,以能够增大所述第一引线板和所述第二引线板的最短距离d2。The combination sensor according to claim 1, wherein at least one of the first MEMS chip and the second lead plate has a volume smaller than a preset volume, so that the first MEMS chip and The shortest distance d1 of the second lead plate, and the volume of at least one of the first lead plate and the second lead plate is smaller than a preset volume, so that the first lead plate and the second lead plate can be increased The shortest distance d2 of the lead plate.
  7. 如权利要求1所述的组合传感器,其特征在于,所述最短距离d1形成于所述第一MEMS芯片的侧面和所述第二引线板的侧面之间;所述最短距离d2形成于所述第一引线板的侧面和所述第二引线板的侧面之间。The combination sensor according to claim 1, wherein the shortest distance d1 is formed between the side of the first MEMS chip and the side of the second lead plate; the shortest distance d2 is formed at the Between the side of the first lead plate and the side of the second lead plate.
  8. 如权利要求1所述的组合传感器,其特征在于,所述第一MEMS芯片为麦克风芯片,所述基板面对所述麦克风芯片的位置设置有音孔。The combination sensor according to claim 1, wherein the first MEMS chip is a microphone chip, and a sound hole is provided at a position of the substrate facing the microphone chip.
  9. 如权利要求1所述的组合传感器,其特征在于,所述组合传感器还包括罩壳,所述罩壳设于所述基板的上表面,所述罩壳与所述基板限定出封装腔;所述第一MEMS芯片和所述第二MEMS芯片设于所述封装腔内。The combination sensor according to claim 1, wherein the combination sensor further comprises a cover, the cover is provided on the upper surface of the substrate, the cover and the substrate define a packaging cavity; The first MEMS chip and the second MEMS chip are provided in the packaging cavity.
  10. 如权利要求1-9中任一项所述的组合传感器,其特征在于,所述第一引线板为第一引线焊盘,所述第二引线板为第二引线焊盘。The combination sensor according to any one of claims 1-9, wherein the first lead plate is a first lead pad, and the second lead plate is a second lead pad.
PCT/CN2018/123796 2018-12-18 2018-12-26 Combination sensor WO2020124630A1 (en)

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