WO2020121895A1 - 熱処理方法および熱処理装置 - Google Patents

熱処理方法および熱処理装置 Download PDF

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Publication number
WO2020121895A1
WO2020121895A1 PCT/JP2019/047236 JP2019047236W WO2020121895A1 WO 2020121895 A1 WO2020121895 A1 WO 2020121895A1 JP 2019047236 W JP2019047236 W JP 2019047236W WO 2020121895 A1 WO2020121895 A1 WO 2020121895A1
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WIPO (PCT)
Prior art keywords
heat treatment
semiconductor wafer
chamber
susceptor
temperature
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PCT/JP2019/047236
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English (en)
French (fr)
Japanese (ja)
Inventor
禎朗 伊藤
Original Assignee
株式会社Ｓｃｒｅｅｎホールディングス
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Publication of WO2020121895A1 publication Critical patent/WO2020121895A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations

Definitions

  • the present invention relates to a heat treatment method and a heat treatment apparatus for performing heat treatment on a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer.
  • substrate such as a semiconductor wafer.
  • Flash lamp annealing In the semiconductor device manufacturing process, flash lamp annealing (FLA), which heats a semiconductor wafer in an extremely short time, is drawing attention.
  • FLA flash lamp annealing
  • Flash lamp annealing uses a xenon flash lamp (hereinafter, simply referred to as a “flash lamp” to mean a xenon flash lamp) to irradiate the surface of a semiconductor wafer with flash light so that only the surface of the semiconductor wafer can be extremely exposed. It is a heat treatment technology that raises the temperature in a short time (several milliseconds or less).
  • the emission spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, has a shorter wavelength than conventional halogen lamps, and almost matches the basic absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the transmitted light is small and it is possible to rapidly raise the temperature of the semiconductor wafer. Further, it has been found that the flash light irradiation for a very short time of several milliseconds or less can selectively raise the temperature only in the vicinity of the surface of the semiconductor wafer.
  • Such flash lamp annealing is used for a process that requires heating for an extremely short time, for example, typically for activating impurities implanted into a semiconductor wafer. If the surface of a semiconductor wafer in which impurities have been implanted by the ion implantation method is irradiated with flash light from a flash lamp, the surface of the semiconductor wafer can be heated to the activation temperature for an extremely short time, and the impurities are diffused deeply. It is possible to carry out only the impurity activation without performing the activation.
  • processing of semiconductor wafers is not limited to heat treatment, but is performed in lots (one set of semiconductor wafers subject to processing of the same content under the same conditions).
  • a plurality of semiconductor wafers forming a lot are continuously and sequentially processed.
  • a plurality of semiconductor wafers forming a lot are loaded into the chamber one by one and sequentially subjected to heat treatment.
  • the temperature of the internal structure of the chamber such as the susceptor that holds the semiconductor wafers may change during the process of sequentially processing the semiconductor wafers that make up the lot.
  • Such a phenomenon occurs when a new process is started in the flash lamp annealing apparatus which has been in an operation stopped state for a while, or when the processing conditions such as the processing temperature of the semiconductor wafer are changed.
  • the temperature of the internal structure of the chamber such as the susceptor changes in the process of processing a plurality of semiconductor wafers in a lot, there arises a problem that the temperature history at the time of processing is different between the semiconductor wafer in the initial stage and the semiconductor wafer in the latter half of the lot.
  • Patent Document 1 discloses that about 10 dummy wafers are subjected to dummy running so that the temperature of the internal structure of the chamber such as the susceptor reaches a stable temperature during processing.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of rapidly lowering the temperature of a susceptor.
  • a first aspect of the present invention is, in a heat treatment method of performing heat treatment on a substrate, a heating step of heating a substrate placed on a susceptor in a chamber from a heating source, and a dummy wafer. And a temperature control step of placing the dummy wafer cooled in the cooling step on the susceptor and lowering the temperature of the susceptor after the heating step is completed.
  • the temperature of the susceptor is lowered to a stable temperature at which heat treatment of a subsequent lot of the substrate is performed.
  • a third aspect is the heat treatment method according to the first or second aspect, wherein in the cooling step, the dummy wafer is cooled to room temperature or lower.
  • a fourth aspect is a heat treatment apparatus for performing heat treatment on a substrate, wherein a chamber for accommodating the substrate, a susceptor for placing the substrate in the chamber, and the substrate placed on the susceptor are provided.
  • a fifth aspect is, in the heat treatment apparatus according to the fourth aspect, lowering the temperature of the susceptor to a stable temperature when performing heat treatment of a subsequent lot of the substrate after the heat treatment of the substrate is completed. ..
  • a sixth aspect is the heat treatment apparatus according to the fourth or fifth aspect, wherein the cooling unit cools the dummy wafer to room temperature or lower.
  • the dummy wafer cooled in the cooling step is placed on the susceptor to lower the temperature of the susceptor.
  • the temperature of the susceptor can be quickly lowered.
  • the dummy wafer cooled by the cooling unit is placed on the susceptor to lower the temperature of the susceptor, so that the natural cooling is performed.
  • the temperature of the susceptor can be quickly lowered compared to.
  • FIG. 1 is a plan view showing a heat treatment apparatus 100 according to the present invention
  • FIG. 2 is a front view thereof.
  • the heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a disk-shaped semiconductor wafer W as a substrate with flash light to heat the semiconductor wafer W.
  • the size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, ⁇ 300 mm or ⁇ 450 mm.
  • Impurities are implanted into the semiconductor wafer W before being carried into the heat treatment apparatus 100, and the activation treatment of the implanted impurities is performed by the heat treatment by the heat treatment apparatus 100. It should be noted that in FIG.
  • the heat treatment apparatus 100 includes an indexer unit 101 for loading an unprocessed semiconductor wafer W into the apparatus from the outside and an unprocessed semiconductor wafer W for removing the processed semiconductor wafer W from the apparatus.
  • Alignment unit 230 for positioning the semiconductor wafer W, two cooling units 130, 140 for cooling the semiconductor wafer W after heat treatment, a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafer W, and cooling units 130, 140,
  • a transfer robot 150 that transfers the semiconductor wafer W to and from the heat treatment unit 160 is provided.
  • the heat treatment apparatus 100 includes the control unit 3 that controls the operation mechanism provided in each of the processing units and the transfer robot 150 to advance the flash heating process of the semiconductor wafer W.
  • the indexer unit 101 includes a load port 110 for mounting a plurality of carriers C side by side, a delivery robot 120 for taking out unprocessed semiconductor wafers W from each carrier C, and storing processed semiconductor wafers W in each carrier C. Is equipped with.
  • the indexer unit 101 is provided with three load ports, and the load port 110 is a general term including the first load port 110a, the second load port 110b, and the third load port 110c (three load ports. Are simply referred to as load ports 110 unless otherwise specified).
  • a carrier C containing a semiconductor wafer W hereinafter also referred to as a product wafer W
  • the third load port 110c is a load port dedicated to the dummy carrier DC that accommodates the dummy wafer DW. That is, only the dummy carrier DC is mounted on the third load port 110c.
  • the carrier C and the dummy carrier DC containing the unprocessed semiconductor wafer W are transferred by an unmanned transfer vehicle (AGV, OHT) or the like and placed on the load port 110. Further, the carrier C containing the processed semiconductor wafer W and the dummy carrier DC are also carried away from the load port 110 by the automated guided vehicle.
  • AGV unmanned transfer vehicle
  • OHT unmanned transfer vehicle
  • the carrier C and the dummy carrier DC are arranged so that the delivery robot 120 can move the semiconductor wafer W (or the dummy wafer DW) into and out of the carrier C and the dummy carrier DC.
  • the SMIF Standard Mechanical Inter Face
  • the stored semiconductor wafer W are exposed to the outside air. It may be an exposed OC (open cassette).
  • the delivery robot 120 is capable of a sliding movement as shown by an arrow 120S in FIG. 1, a turning operation and an ascending/descending operation as shown by an arrow 120R.
  • the delivery robot 120 takes the semiconductor wafer W in and out of the carrier C and the dummy carrier DC, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130 and 140.
  • the delivery of the semiconductor wafer W to/from the carrier C (or the dummy carrier DC) by the delivery robot 120 is performed by the sliding movement of the hand 121 and the vertical movement of the carrier C.
  • the delivery of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling units 130 and 140 is performed by sliding the hand 121 and moving the delivery robot 120 up and down.
  • the alignment section 230 is connected to the side of the indexer section 101 along the Y-axis direction.
  • the alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane and orients it in an appropriate direction for flash heating.
  • the alignment unit 230 includes a mechanism for horizontally supporting and rotating the semiconductor wafer W inside an alignment chamber 231 which is a housing made of aluminum alloy, and a notch, an orientation flat, etc. formed in the peripheral portion of the semiconductor wafer W. It is configured by providing a mechanism for optically detecting the.
  • the delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120.
  • the semiconductor wafer W is transferred from the transfer robot 120 to the alignment chamber 231 such that the center of the wafer is located at a predetermined position.
  • the alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W about a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do.
  • the semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.
  • a transfer chamber 170 that houses the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150.
  • the processing chamber 6 of the heat treatment section 160, the first cool chamber 131 of the cooling section 130, and the second cool chamber 141 of the cooling section 140 are connected in communication with the transfer chamber 170 on three sides.
  • the heat treatment unit 160 which is the main part of the heat treatment apparatus 100, is a substrate processing unit that irradiates the semiconductor wafer W that has been preheated with flash light (flash light) from the xenon flash lamp FL to perform flash heat treatment.
  • flash light flash light
  • the two cooling units 130 and 140 have substantially the same configuration.
  • Each of the cooling units 130 and 140 includes a metal cooling plate and a quartz plate placed on the upper surface of the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy housings. (All are not shown).
  • the temperature of the cooling plate is controlled at 10°C to 15°C by a Peltier element or cooling water circulation.
  • the semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment section 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.
  • Both the first cool chamber 131 and the second cool chamber 141 are connected to both of them between the indexer unit 101 and the transfer chamber 170.
  • the first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W.
  • the opening connected to the indexer portion 101 can be opened and closed by the gate valve 181.
  • the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer unit 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.
  • the gate valve 181 When the semiconductor wafer W is transferred between the indexer unit 101 and the first cool chamber 131, the gate valve 181 is opened. In addition, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the inside of the first cool chamber 131 becomes a closed space.
  • the opening connected to the indexer section 101 can be opened and closed by the gate valve 182.
  • the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer unit 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
  • the gate valve 182 is opened when the semiconductor wafer W is transferred between the indexer unit 101 and the second cool chamber 141. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.
  • the cooling units 130 and 140 respectively include a gas supply mechanism that supplies clean nitrogen gas to the first cool chamber 131 and the second cool chamber 141, and an exhaust mechanism that exhausts the atmosphere in the chamber.
  • the gas supply mechanism and the exhaust mechanism may be capable of switching the flow rate in two stages.
  • the transfer robot 150 provided in the transfer chamber 170 can rotate about an axis along the vertical direction as indicated by an arrow 150R.
  • the transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and transfer hands 151a and 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively.
  • These transport hands 151a and 151b are arranged vertically with a predetermined pitch, and are independently slidable linearly in the same horizontal direction by a link mechanism. Further, the transfer robot 150 moves up and down the base provided with the two link mechanisms to move up and down the two transfer hands 151a and 151b while keeping a distance of a predetermined pitch.
  • both transfer hands 151a and 151b are transferred. It turns so as to face the delivery partner, and then (or while it is turning) moves up and down, and one of the transfer hands is positioned at a height for delivering the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to and from the transfer partner.
  • Transfer of the semiconductor wafer W between the transfer robot 150 and the transfer robot 120 can be performed via the cooling units 130 and 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as a path for transferring the semiconductor wafer W between the transfer robot 150 and the transfer robot 120. .. Specifically, the semiconductor wafer W is delivered by one of the transfer robot 150 and the delivery robot 120 receiving the semiconductor wafer W delivered to the first cool chamber 131 or the second cool chamber 141.
  • the transfer robot 150 and the transfer robot 120 constitute a transfer mechanism that transfers the semiconductor wafer W from the carrier C to the thermal processing section 160.
  • the gate valves 181 and 182 are provided between the first cool chamber 131 and the second cool chamber 141 and the indexer unit 101, respectively.
  • Gate valves 183 and 184 are provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively.
  • a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the heat treatment section 160.
  • FIG. 3 is a vertical cross-sectional view showing the configuration of the heat treatment section 160.
  • the heat treatment unit 160 includes a processing chamber 6 that accommodates a semiconductor wafer W and performs heat treatment, a flash lamp house 5 that houses a plurality of flash lamps FL, and a halogen lamp house 4 that houses a plurality of halogen lamps HL. Prepare A flash lamp house 5 is provided above the processing chamber 6, and a halogen lamp house 4 is provided below the processing chamber 6. Further, the heat treatment unit 160 holds the semiconductor wafer W in a horizontal position inside the processing chamber 6, and the transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the transfer robot 150. And
  • the processing chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61.
  • the chamber side portion 61 has a substantially cylindrical shape with an opening at the top and bottom, and an upper chamber window 63 is attached and closed at the upper opening, and a lower chamber window 64 is attached and closed at the lower opening.
  • the upper chamber window 63 that constitutes the ceiling of the processing chamber 6 is a disk-shaped member made of quartz, and functions as a quartz window that transmits the flash light emitted from the flash lamp FL into the processing chamber 6.
  • the lower chamber window 64 that forms the floor of the processing chamber 6 is also a disk-shaped member made of quartz, and functions as a quartz window that transmits the light from the halogen lamp HL into the processing chamber 6.
  • a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. Both the reflection rings 68 and 69 are formed in an annular shape.
  • the upper reflection ring 68 is attached by being fitted from above the chamber side portion 61.
  • the lower reflection ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw not shown. That is, both the reflection rings 68 and 69 are detachably attached to the chamber side portion 61.
  • An inner space of the processing chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.
  • the concave portion 62 is formed on the inner wall surface of the processing chamber 6. That is, a concave portion 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not attached, a lower end surface of the reflection ring 68 and an upper end surface of the reflection ring 69 is formed. ..
  • the concave portion 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the processing chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W.
  • the chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
  • a transfer opening (furnace) 66 for loading and unloading the semiconductor wafer W into and from the processing chamber 6 is formed on the chamber side 61.
  • the transfer opening 66 can be opened and closed by a gate valve 185.
  • the transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out of the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.
  • a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the processing chamber 6.
  • the gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68.
  • the gas supply hole 81 is communicatively connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the sidewall of the processing chamber 6.
  • the gas supply pipe 83 is connected to the processing gas supply source 85.
  • a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.
  • the processing gas flowing into the buffer space 82 flows so as to spread in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65.
  • an inert gas such as nitrogen (N 2 ) or a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ) can be used (nitrogen in this embodiment).
  • a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the processing chamber 6.
  • the gas exhaust hole 86 is formed at a position lower than the recess 62, and may be provided in the reflection ring 69.
  • the gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6.
  • the gas exhaust pipe 88 is connected to the exhaust mechanism 190.
  • a valve 89 is inserted in the middle of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87.
  • the gas supply holes 81 and the gas exhaust holes 86 may be provided in plural along the circumferential direction of the processing chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust mechanism 190 may be a mechanism provided in the heat treatment apparatus 100 or a utility of a factory in which the heat treatment apparatus 100 is installed.
  • a gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66.
  • the gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the processing chamber 6 is exhausted through the transfer opening 66.
  • FIG. 4 is a perspective view showing the overall appearance of the holding unit 7.
  • the holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74.
  • the base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.
  • the base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 and the base ring 71 which will be described later.
  • the base ring 71 is supported on the wall surface of the processing chamber 6 (see FIG. 3 ).
  • a plurality of connecting portions 72 are provided upright along the circumferential direction of the annular shape.
  • the connecting portion 72 is also a quartz member and is fixed to the base ring 71 by welding.
  • FIG. 5 is a plan view of the susceptor 74.
  • FIG. 6 is a sectional view of the susceptor 74.
  • the susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77.
  • the holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.
  • a guide ring 76 is installed on the peripheral portion of the upper surface of the holding plate 75.
  • the guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is 300 mm, the inner diameter of the guide ring 76 is 320 mm.
  • the inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75.
  • the guide ring 76 is made of quartz like the holding plate 75.
  • the guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
  • An area inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75 a for holding the semiconductor wafer W.
  • a plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75.
  • a total of twelve substrate support pins 77 are erected at every 30° along the circumference of a concentric circle with the outer circumference circle of the holding surface 75a (the inner circumference circle of the guide ring 76).
  • the diameter of the circle in which the twelve substrate support pins 77 are arranged is smaller than the diameter of the semiconductor wafer W.
  • Each substrate support pin 77 is made of quartz.
  • the plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.
  • the semiconductor wafer W loaded into the processing chamber 6 is horizontally placed and held on the susceptor 74 of the holding unit 7 mounted in the processing chamber 6. At this time, the semiconductor wafer W is held by the susceptor 74 while being supported by twelve substrate support pins 77 provided upright on the holding plate 75. More precisely, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the twelve substrate support pins 77 (the distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 bring the semiconductor wafer W into a horizontal posture. Can be supported.
  • the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75.
  • the thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
  • the holding plate 75 of the susceptor 74 is formed with an opening 78 penetrating vertically.
  • the opening 78 is provided for the edge radiation thermometer 20 (see FIG. 3) to receive radiant light (infrared light) radiated from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the edge radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 and measures the temperature of the semiconductor wafer W.
  • the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pins 12 of the transfer mechanism 10 to be described later pass through for the delivery of the semiconductor wafer W.
  • FIG. 7 is a plan view of the transfer mechanism 10.
  • FIG. 8 is a side view of the transfer mechanism 10.
  • the transfer mechanism 10 includes two transfer arms 11.
  • the transfer arm 11 has an arcuate shape that follows the generally annular recess 62.
  • Two lift pins 12 are erected on each transfer arm 11.
  • Each transfer arm 11 is rotatable by a horizontal movement mechanism 13.
  • the horizontal movement mechanism 13 includes a transfer operation position (solid line position in FIG. 7) at which the pair of transfer arms 11 transfers the semiconductor wafer W to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is horizontally moved to and from the retracted position (the position indicated by the chain double-dashed line in FIG. 7) that does not overlap in plan view.
  • each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be rotated by one motor using a link mechanism. It may be a moving one.
  • the pair of transfer arms 11 is moved up and down by the elevating mechanism 14 together with the horizontal moving mechanism 13.
  • the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74 and the lift pins are lifted.
  • the upper end of 12 projects from the upper surface of the susceptor 74.
  • the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to extract the lift pin 12 from the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 to open.
  • the transfer arm 11 moves to the retracted position.
  • the retracted position of the pair of transfer arms 11 is immediately above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 is inside the recess 62.
  • An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Are discharged to the outside of the processing chamber 6.
  • the heat treatment section 160 includes two radiation thermometers, an edge radiation thermometer (edge pyrometer) 20 and a central radiation thermometer (center pyrometer) 25.
  • the edge radiation thermometer 20 receives the infrared light emitted from the lower surface of the semiconductor wafer W through the opening 78 of the susceptor 74, and determines the temperature of the semiconductor wafer W from the intensity of the infrared light. Is a wafer thermometer for measuring.
  • the central radiation thermometer 25 is a susceptor thermometer that receives infrared light emitted from the central portion of the susceptor 74 and measures the temperature of the susceptor 74 from the intensity of the infrared light.
  • edge radiation thermometer 20 and the central radiation thermometer 25 are shown inside the processing chamber 6, but these are both attached to the outer wall surface of the processing chamber 6, Infrared light is received through a through hole provided on the outer wall surface.
  • the flash lamp house 5 provided above the processing chamber 6 covers a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL and an upper portion of the light source inside the housing 51.
  • the reflector 52 provided is provided.
  • a lamp light emitting window 53 is attached to the bottom of the housing 51 of the flash lamp house 5.
  • the lamp light emitting window 53 that forms the floor of the flash lamp house 5 is a plate-shaped quartz window made of quartz. Since the flash lamp house 5 is installed above the processing chamber 6, the lamp light emitting window 53 faces the upper chamber window 63.
  • the flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the lamp light emission window 53 and the upper chamber window 63.
  • the plurality of flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and each longitudinal direction is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
  • the xenon flash lamp FL is provided with a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends of the glass tube and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow in the glass tube in a normal state even if electric charges are accumulated in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time.
  • the flash lamp FL since the electrostatic energy stored in the condenser in advance is converted into an extremely short light pulse of 0.1 millisecond to 100 millisecond, continuous lighting such as the halogen lamp HL is performed. It has a feature that it can emit extremely strong light as compared with a light source. That is, the flash lamp FL is a pulse emission lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
  • the reflector 52 is provided above the plurality of flash lamps FL so as to cover them all.
  • the basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65.
  • the reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.
  • the halogen lamp house 4 provided below the processing chamber 6 has a plurality of (40 in the present embodiment) halogen lamps HL incorporated inside the housing 41.
  • the halogen lamps HL irradiate the heat treatment space 65 from below the processing chamber 6 through the lower chamber window 64.
  • FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL.
  • 20 halogen lamps HL are provided in each of the upper and lower two stages.
  • Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape.
  • the 20 halogen lamps HL are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.
  • the arrangement density of the halogen lamps HL is higher in the region facing the peripheral portion than in the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. There is. That is, in both the upper and lower stages, the halogen lamps HL are arranged at a shorter pitch in the peripheral portion than in the central portion of the lamp array. Therefore, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W, where the temperature tends to decrease during heating by irradiation with light from the halogen lamp HL.
  • the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each upper halogen lamp HL and the longitudinal direction of each lower halogen lamp HL are orthogonal to each other.
  • the halogen lamp HL is a filament type light source that energizes the filament arranged inside the glass tube to incandescent the filament to emit light.
  • the glass tube is filled with a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon.
  • a halogen element iodine, bromine, etc.
  • the halogen lamp HL has a characteristic that it has a long life and can continuously emit strong light as compared with an ordinary incandescent lamp. That is, the halogen lamp HL is a continuous lighting lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life.
  • a reflector 43 is provided below the two-stage halogen lamp HL (FIG. 3).
  • the reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
  • the control unit 3 controls the above-described various operating mechanisms provided in the heat treatment apparatus 100.
  • the hardware configuration of the control unit 3 is similar to that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores a basic program, a RAM that is a readable/writable memory that stores various information, and control software and data. It is equipped with a magnetic disk for storage.
  • the processing in the heat treatment apparatus 100 progresses as the CPU of the control unit 3 executes a predetermined processing program.
  • the control unit 3 is shown in the indexer unit 101 in FIG. 1, the present invention is not limited to this, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100.
  • the heat treatment unit 160 prevents an excessive temperature rise of the halogen lamp house 4, the flash lamp house 5 and the processing chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided.
  • the wall of the processing chamber 6 is provided with a water cooling pipe (not shown).
  • the halogen lamp house 4 and the flash lamp house 5 have an air cooling structure that forms a gas flow inside and exhausts heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emitting window 53 to cool the flash lamp house 5 and the upper chamber window 63.
  • the semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) have been added by the ion implantation method.
  • the activation of the impurities is performed by a flash light irradiation heat treatment (annealing) by the heat treatment device 100.
  • a plurality of unprocessed semiconductor wafers W into which impurities have been injected are placed in the carrier C and placed on the first load port 110a or the second load port 110b of the indexer unit 101.
  • the delivery robot 120 takes out the unprocessed semiconductor wafers W one by one from the carrier C and carries them into the alignment chamber 231 of the alignment section 230.
  • the alignment chamber 231 the semiconductor wafer W is rotated about a vertical axis in a horizontal plane with the center of the semiconductor wafer W as a center of rotation, and the notch or the like is optically detected to adjust the orientation of the semiconductor wafer W.
  • the delivery robot 120 of the indexer unit 101 takes out the semiconductor wafer W whose orientation has been adjusted from the alignment chamber 231, and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140.
  • the unprocessed semiconductor wafer W loaded into the first cool chamber 131 or the second cool chamber 141 is unloaded into the transfer chamber 170 by the transfer robot 150.
  • the transfer robot 150 When the unprocessed semiconductor wafer W is transferred from the indexer unit 101 to the transfer chamber 170 via the first cool chamber 131 or the second cool chamber 141, the first cool chamber 131 and the second cool chamber 141 are not connected to each other. Function as a pass for the delivery of.
  • the transfer robot 150 that takes out the semiconductor wafer W turns so as to face the heat treatment unit 160. Subsequently, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if the preceding heat-treated semiconductor wafer W is present in the processing chamber 6, the heat-treated semiconductor wafer W is taken out by one of the transfer hands 151a and 151b, and then the untreated semiconductor wafer W is removed. W is carried into the processing chamber 6 and the wafers are exchanged. After that, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
  • the semiconductor wafer W loaded into the processing chamber 6 is preheated by the halogen lamp HL, and then flash-heated by irradiation with flash light from the flash lamp FL. This flash heat treatment activates the impurities implanted in the semiconductor wafer W.
  • the gate valve 185 reopens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 carries out the semiconductor wafer W after the flash heating process from the processing chamber 6 to the transfer chamber 170. ..
  • the transfer robot 150 that has taken out the semiconductor wafer W revolves from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141. Further, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
  • the transfer robot 150 carries the semiconductor wafer W after the heat treatment into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140.
  • the semiconductor wafer W has passed through the first cool chamber 131 before the heat treatment, it is carried into the first cool chamber 131 even after the heat treatment, and passes through the second cool chamber 141 before the heat treatment. In that case, it is carried into the second cool chamber 141 even after the heat treatment.
  • the cooling process of the semiconductor wafer W after the flash heating process is performed. Since the temperature of the entire semiconductor wafer W is relatively high at the time of being unloaded from the processing chamber 6 of the heat treatment unit 160, it is cooled to near room temperature in the first cool chamber 131 or the second cool chamber 141. is there.
  • the delivery robot 120 After the lapse of a predetermined cooling processing time, the delivery robot 120 carries out the cooled semiconductor wafer W from the first cool chamber 131 or the second cool chamber 141 and returns it to the carrier C.
  • the carrier C When a predetermined number of processed semiconductor wafers W are accommodated in the carrier C, the carrier C is unloaded from the first load port 110a or the second load port 110b of the indexer unit 101.
  • the valve 84 for air supply Prior to the loading of the semiconductor wafer W into the processing chamber 6, the valve 84 for air supply is opened, and the valves 89, 192 for gas exhaust are opened to start air supply/exhaust to/from the processing chamber 6.
  • the valve 84 When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. Further, when the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower portion of the heat treatment space 65.
  • the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). It should be noted that nitrogen gas is continuously supplied to the heat treatment space 65 during the heat treatment of the semiconductor wafer W in the heat treatment unit 160, and the supply amount thereof is appropriately changed according to the treatment process.
  • the gate valve 185 is opened to open the transfer opening 66, and the transfer robot 150 transfers the semiconductor wafer W to be processed into the heat treatment space 65 in the processing chamber 6 through the transfer opening 66.
  • the transfer robot 150 advances the transfer hand 151 a (or the transfer hand 151 b) holding the unprocessed semiconductor wafer W to a position directly above the holding unit 7 and stops it.
  • the pair of transfer arms 11 of the transfer mechanism 10 horizontally moves from the retracted position to the transfer operation position and rises, so that the lift pin 12 projects from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receives the semiconductor wafer W.
  • the lift pins 12 rise above the upper ends of the substrate support pins 77.
  • the transfer robot 150 causes the transfer hand 151 a to exit the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 descends, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture.
  • the semiconductor wafer W is supported by a plurality of substrate support pins 77 provided upright on a holding plate 75 and held by the susceptor 74. Further, the semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are injected as the upper surface.
  • a predetermined space is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75.
  • the pair of transfer arms 11 descending below the susceptor 74 are retracted by the horizontal movement mechanism 13 to the retracted position, that is, inside the recess 62.
  • the 40 halogen lamps HL are simultaneously turned on and preheating (assist heating) is started.
  • the halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the lower surface of the semiconductor wafer W.
  • the semiconductor wafer W is preheated by the light irradiation from the halogen lamp HL, and the temperature rises. Since the transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, it does not hinder the heating by the halogen lamp HL.
  • the temperature of the semiconductor wafer W is measured by the edge radiation thermometer 20. That is, the infrared radiation emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 is received by the edge radiation thermometer 20 to measure the wafer temperature during heating.
  • the measured temperature of the semiconductor wafer W is transmitted to the controller 3.
  • the control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, reaches a predetermined preheating temperature T1.
  • control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value of the edge radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1.
  • the preheating temperature T1 is set to about 600° C. to 800° C. (700° C. in the present embodiment) at which the impurities added to the semiconductor wafer W are not likely to diffuse by heat.
  • the control unit 3 After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the edge radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL, and the temperature of the semiconductor wafer W is adjusted. Is maintained at a preheating temperature T1.
  • the entire semiconductor wafer W is uniformly heated to the preheating temperature T1.
  • the temperature of the peripheral portion of the semiconductor wafer W which is more likely to release heat, tends to be lower than that of the central portion, but the arrangement density of the halogen lamps HL in the halogen lamp house 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the amount of light applied to the peripheral portion of the semiconductor wafer W where heat dissipation easily occurs increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.
  • the flash lamp FL irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the processing chamber 6, and another part of the flash light is once reflected by the reflector 52 and then goes into the processing chamber 6, and these flashes are emitted.
  • the semiconductor wafer W is flash-heated by the irradiation of light.
  • the flash heating is performed by irradiating flash light (flash light) from the flash lamp FL, so that the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light emitted from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the condenser in advance is extremely short, and the irradiation time is extremely short such as 0.1 millisecond or more and 100 millisecond or less. It is a strong flash. Then, the surface temperature of the semiconductor wafer W flash-heated by the irradiation of the flash light from the flash lamp FL instantaneously rises to the processing temperature T2 of 1000° C. or higher, and the impurities implanted in the semiconductor wafer W are activated.
  • flash light flash light
  • the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time by flash heating, it is possible to activate the impurities while suppressing the diffusion of the impurities injected into the semiconductor wafer W due to heat. .. Since the time required for activation of impurities is extremely short as compared with the time required for thermal diffusion thereof, activation is not performed even in a short time in which diffusion of about 0.1 millisecond to 100 millisecond does not occur. Complete.
  • the halogen lamp HL is turned off after a lapse of a predetermined time.
  • the semiconductor wafer W is rapidly cooled from the preheating temperature T1.
  • the temperature of the semiconductor wafer W during cooling is measured by the edge radiation thermometer 20, and the measurement result is transmitted to the control unit 3.
  • the control unit 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature based on the measurement result of the edge radiation thermometer 20. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 again horizontally moves from the retracted position to the transfer operation position and rises, whereby the lift pin 12 is lifted.
  • the semiconductor wafer W that has protruded from the upper surface of 74 and has undergone the heat treatment is received from the susceptor 74. Then, the transfer opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer hand 151b (or the transfer hand 151a) of the transfer robot 150. It The transfer robot 150 advances the transfer hand 151b to a position directly below the semiconductor wafer W pushed up by the lift pins 12 and stops it. Then, when the pair of transfer arms 11 descend, the semiconductor wafer W after the flash heating is transferred to and placed on the transfer hand 151b. After that, the transfer robot 150 moves the transfer hand 151b out of the processing chamber 6 and carries out the processed semiconductor wafer W.
  • the processing of the semiconductor wafer W is performed in lot units.
  • a lot is a set of semiconductor wafers W to be processed under the same conditions with the same contents.
  • a plurality of (for example, 25) semiconductor wafers W constituting a lot are accommodated in one carrier C, and the first load port 110a or the second load port 110b of the indexer unit 101 is accommodated.
  • the semiconductor wafers W are sequentially loaded into the processing chamber 6 one by one from the carrier C and subjected to heat treatment.
  • the first semiconductor wafer W of the lot is carried into the processing chamber 6 at about room temperature and preheating and flash heating processing is performed. It will be.
  • the first lot is processed after the heat treatment apparatus 100 is activated after maintenance, or a long time has elapsed after processing the previous lot.
  • heat is generated from the heated semiconductor wafer W to the internal structure of the chamber such as the susceptor 74, so that the susceptor 74, which was initially at room temperature, gradually rises due to heat accumulation as the number of processed semiconductor wafers W increases. It will be warm. Further, since a part of the infrared light emitted from the halogen lamp HL is absorbed by the lower chamber window 64, the temperature of the lower chamber window 64 should gradually rise as the number of processed semiconductor wafers W increases. Becomes
  • the temperature of the susceptor 74 and the lower chamber window 64 reaches a certain stable temperature when the heat treatment of about 10 semiconductor wafers W is performed.
  • the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat released from the susceptor 74 are balanced.
  • the amount of heat transferred from the semiconductor wafer W is larger than the amount of heat released from the susceptor 74, so the temperature of the susceptor 74 gradually accumulates as the number of processed semiconductor wafers W increases. Rise.
  • the heat transfer amount from the semiconductor wafer W and the heat radiation amount from the susceptor 74 are balanced, so that the temperature of the susceptor 74 is maintained at a constant stable temperature.
  • the Rukoto means that the temperature of the susceptor 74 and the like is continuously determined by performing a heat treatment on a plurality of semiconductor wafers W in the lot in the processing chamber 6 without preheating the internal structure of the chamber such as the susceptor 74. Is the temperature of the susceptor 74 when the temperature rises and becomes constant.
  • the amount of heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL and the amount of heat released from the lower chamber window 64 are balanced.
  • the temperature of the lower chamber window 64 will also be maintained at a constant stable temperature.
  • the temperature history of the semiconductor wafer W in the initial stage of the lot is different from that of the semiconductor wafer W in the middle of the process because the temperature of the structure in the processing chamber 6 differs. There was a problem of becoming uniform. Further, since the semiconductor wafer W in the initial stage is supported by the low temperature susceptor 74 and subjected to the flash heat treatment, the wafer may be warped. Therefore, before the processing of the product lot is started, the dummy wafer DW which is not the processing target is loaded into the processing chamber 6 and subjected to the heating processing so as to raise the temperature of the chamber internal structures such as the susceptor 74 to a stable temperature. Running (dummy processing) is being performed.
  • the internal structure of the chamber such as the susceptor 74 can be heated to a stable temperature.
  • Such a dummy process is executed not only when the process is started in the process chamber 6 at room temperature but also when the preheating temperature T1 or the process temperature T2 is changed.
  • the dummy processing for supporting and heating the dummy wafer DW on the susceptor 74 causes the susceptor 74 to reach a stable temperature.
  • the temperature can be raised to.
  • the temperature of the susceptor 74 cannot be lowered by the dummy processing as described above. Therefore, in the present embodiment, the temperature of the susceptor 74 is lowered as follows.
  • the wall of the processing chamber 6 is water-cooled by the water cooling pipe and the upper chamber window 63 is also air-cooled, the temperature is relatively quickly lowered, but the susceptor 74 provided in the processing chamber 6 cannot be cooled from the outside. Since it is possible, it takes time to lower the temperature.
  • FIG. 10 is a flowchart showing a temperature control procedure of the susceptor 74 using the dummy wafer DW.
  • the dummy wafer DW is a disk-shaped silicon wafer similar to the product semiconductor wafer W, and has the same size and shape as the semiconductor wafer W. However, pattern formation and ion implantation are not performed on the dummy wafer DW. That is, the dummy wafer DW is a so-called bare wafer.
  • the form itself of the dummy carrier DC is the same as the carrier C that accommodates the semiconductor wafer W to be a product, and is FOUP in this embodiment.
  • the dummy carrier DC is a carrier dedicated to the dummy wafer DW in which only the dummy wafer DW is accommodated.
  • step S1 wait until the processing of the last semiconductor wafer W of the preceding lot is completed (step S1). During the processing of the preceding lot, the temperature of the internal structure of the chamber such as the susceptor 74 is maintained at the stable temperature in the preceding lot.
  • step S2 the dummy wafer DW is processed.
  • Transportation of is started. Specifically, the delivery robot 120 takes out the dummy wafer DW from the dummy carrier DC placed on the third load port 110c and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. To do. In the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled (step S3).
  • the temperature of the cooling plate of the first cool chamber 131 or the second cool chamber 141 is adjusted to 10°C to 15°C. Therefore, in the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled to room temperature (20° C. to 25° C.) or lower.
  • the dummy wafer DW cooled to the room temperature or lower in the first cool chamber 131 or the second cool chamber 141 is carried out to the carrying chamber 170 by the carrying robot 150.
  • the transfer robot 150 that has taken out the dummy wafer DW turns so as to face the heat treatment unit 160.
  • the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the dummy wafer DW into the processing chamber 6.
  • the loading operation of the dummy wafer DW into the processing chamber 6 is the same as the loading operation of the semiconductor wafer W described above. That is, the transfer mechanism 10 transfers the dummy wafer DW from the transfer hand 151 a (or the transfer hand 151 b) of the transfer robot 150 to the susceptor 74. The cooled dummy wafer DW is placed and supported on the susceptor 74 in a horizontal posture (step S4).
  • the transfer mechanism 10 transfers the dummy wafer DW from the susceptor 74 to the transfer robot 150.
  • the transfer robot 150 that has received the dummy wafer DW carries out the dummy wafer DW from the processing chamber 6 to the transfer chamber 170. Subsequently, the transfer robot 150 swivels from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141, and loads the dummy wafer DW into the first cool chamber 131 or the second cool chamber 141. Then, the delivery robot 120 carries out the dummy wafer DW from the first cool chamber 131 or the second cool chamber 141 and returns it to the dummy carrier DC mounted on the third load port 110c. In this way, the temperature lowering process of the susceptor 74 by one dummy wafer DW is performed.
  • step S4 the process returns from step S5 to step S2, and from step S2.
  • the processes up to step S4 are repeated. That is, a new dummy wafer DW is taken out from the dummy carrier DC, cooled in the first cool chamber 131 or the second cool chamber 141, and placed on the susceptor 74 in the processing chamber 6. Then, the dummy wafer DW further lowers the temperature of the susceptor 74.
  • step S6 the process proceeds from step S5 to step S6.
  • the processing of the semiconductor wafer W is started.
  • the content of this processing is as described above. That is, the cooling of the susceptor 74 by the dummy wafer DW is repeated until the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot. Since the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot, the history of heat treatment can be made uniform for all the semiconductor wafers W constituting the subsequent lot.
  • the dummy wafer DW cooled to room temperature or lower is placed on the susceptor 74 to control the temperature of the susceptor 74.
  • the temperature is lowered to the stable temperature of the subsequent lot. For this reason, the temperature of the susceptor 74 can be quickly lowered compared to natural cooling. As a result, the processing of the subsequent lot can be started early and the reduction in throughput can be suppressed.
  • the dummy wafer DW is cooled to room temperature or lower by the first cool chamber 131 or the second cool chamber 141.
  • the first cool chamber 131 and the second cool chamber 141 are originally for cooling the semiconductor wafer W after the flash heating process, and are used for cooling the dummy wafer DW. That is, in the present embodiment, without providing a new dedicated processing unit for cooling the dummy wafer DW, the existing processing unit is diverted to cool the dummy wafer DW and lower the temperature of the susceptor 74. There is.
  • the dummy wafer DW is a bare wafer of silicon, but the dummy wafer DW is not limited to this, and the dummy wafer DW may be any substrate made of a material having excellent thermal conductivity and heat capacity.
  • the dummy wafer DW may be a silicon carbide (SiC) or ceramic wafer.
  • the dummy wafer DW may be reciprocated between the first cool chamber 131 or the second cool chamber 141 and the processing chamber 6 by the transfer robot 150 to cool the susceptor 74. That is, instead of returning the dummy wafer DW carried into the first cool chamber 131 or the second cool chamber 141 after cooling the susceptor 74 to the dummy carrier DC, it is cooled again and carried into the processing chamber 6 again to the susceptor 74. The temperature of the susceptor 74 may be lowered by placing the susceptor 74 on it.
  • the flash lamp house 5 is provided with 30 flash lamps FL, but the number is not limited to this, and the number of flash lamps FL can be any number. .. Further, the flash lamp FL is not limited to the xenon flash lamp and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen lamp house 4 is not limited to 40, and may be any number.
  • the filament type halogen lamp HL is used as the continuous lighting lamp that continuously emits light for 1 second or more to preheat the semiconductor wafer W, but the present invention is not limited to this.
  • a discharge type arc lamp for example, a xenon arc lamp
  • a continuous lighting lamp for preheating may be used as a continuous lighting lamp for preheating.
  • the substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a solar cell substrate.
  • the heat treatment apparatus is not limited to the flash lamp annealing apparatus, and may be an RTP (Rapid thermal processing) apparatus using a continuous lighting lamp or an apparatus for heating a substrate using a hot plate. ..
  • RTP Rapid thermal processing

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