WO2020121895A1 - Heat treatment method and heat treatment apparatus - Google Patents

Heat treatment method and heat treatment apparatus Download PDF

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Publication number
WO2020121895A1
WO2020121895A1 PCT/JP2019/047236 JP2019047236W WO2020121895A1 WO 2020121895 A1 WO2020121895 A1 WO 2020121895A1 JP 2019047236 W JP2019047236 W JP 2019047236W WO 2020121895 A1 WO2020121895 A1 WO 2020121895A1
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WO
WIPO (PCT)
Prior art keywords
heat treatment
semiconductor wafer
chamber
susceptor
temperature
Prior art date
Application number
PCT/JP2019/047236
Other languages
French (fr)
Japanese (ja)
Inventor
禎朗 伊藤
Original Assignee
株式会社Ｓｃｒｅｅｎホールディングス
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Publication of WO2020121895A1 publication Critical patent/WO2020121895A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations

Definitions

  • the present invention relates to a heat treatment method and a heat treatment apparatus for performing heat treatment on a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer.
  • substrate such as a semiconductor wafer.
  • Flash lamp annealing In the semiconductor device manufacturing process, flash lamp annealing (FLA), which heats a semiconductor wafer in an extremely short time, is drawing attention.
  • FLA flash lamp annealing
  • Flash lamp annealing uses a xenon flash lamp (hereinafter, simply referred to as a “flash lamp” to mean a xenon flash lamp) to irradiate the surface of a semiconductor wafer with flash light so that only the surface of the semiconductor wafer can be extremely exposed. It is a heat treatment technology that raises the temperature in a short time (several milliseconds or less).
  • the emission spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, has a shorter wavelength than conventional halogen lamps, and almost matches the basic absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the transmitted light is small and it is possible to rapidly raise the temperature of the semiconductor wafer. Further, it has been found that the flash light irradiation for a very short time of several milliseconds or less can selectively raise the temperature only in the vicinity of the surface of the semiconductor wafer.
  • Such flash lamp annealing is used for a process that requires heating for an extremely short time, for example, typically for activating impurities implanted into a semiconductor wafer. If the surface of a semiconductor wafer in which impurities have been implanted by the ion implantation method is irradiated with flash light from a flash lamp, the surface of the semiconductor wafer can be heated to the activation temperature for an extremely short time, and the impurities are diffused deeply. It is possible to carry out only the impurity activation without performing the activation.
  • processing of semiconductor wafers is not limited to heat treatment, but is performed in lots (one set of semiconductor wafers subject to processing of the same content under the same conditions).
  • a plurality of semiconductor wafers forming a lot are continuously and sequentially processed.
  • a plurality of semiconductor wafers forming a lot are loaded into the chamber one by one and sequentially subjected to heat treatment.
  • the temperature of the internal structure of the chamber such as the susceptor that holds the semiconductor wafers may change during the process of sequentially processing the semiconductor wafers that make up the lot.
  • Such a phenomenon occurs when a new process is started in the flash lamp annealing apparatus which has been in an operation stopped state for a while, or when the processing conditions such as the processing temperature of the semiconductor wafer are changed.
  • the temperature of the internal structure of the chamber such as the susceptor changes in the process of processing a plurality of semiconductor wafers in a lot, there arises a problem that the temperature history at the time of processing is different between the semiconductor wafer in the initial stage and the semiconductor wafer in the latter half of the lot.
  • Patent Document 1 discloses that about 10 dummy wafers are subjected to dummy running so that the temperature of the internal structure of the chamber such as the susceptor reaches a stable temperature during processing.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of rapidly lowering the temperature of a susceptor.
  • a first aspect of the present invention is, in a heat treatment method of performing heat treatment on a substrate, a heating step of heating a substrate placed on a susceptor in a chamber from a heating source, and a dummy wafer. And a temperature control step of placing the dummy wafer cooled in the cooling step on the susceptor and lowering the temperature of the susceptor after the heating step is completed.
  • the temperature of the susceptor is lowered to a stable temperature at which heat treatment of a subsequent lot of the substrate is performed.
  • a third aspect is the heat treatment method according to the first or second aspect, wherein in the cooling step, the dummy wafer is cooled to room temperature or lower.
  • a fourth aspect is a heat treatment apparatus for performing heat treatment on a substrate, wherein a chamber for accommodating the substrate, a susceptor for placing the substrate in the chamber, and the substrate placed on the susceptor are provided.
  • a fifth aspect is, in the heat treatment apparatus according to the fourth aspect, lowering the temperature of the susceptor to a stable temperature when performing heat treatment of a subsequent lot of the substrate after the heat treatment of the substrate is completed. ..
  • a sixth aspect is the heat treatment apparatus according to the fourth or fifth aspect, wherein the cooling unit cools the dummy wafer to room temperature or lower.
  • the dummy wafer cooled in the cooling step is placed on the susceptor to lower the temperature of the susceptor.
  • the temperature of the susceptor can be quickly lowered.
  • the dummy wafer cooled by the cooling unit is placed on the susceptor to lower the temperature of the susceptor, so that the natural cooling is performed.
  • the temperature of the susceptor can be quickly lowered compared to.
  • FIG. 1 is a plan view showing a heat treatment apparatus 100 according to the present invention
  • FIG. 2 is a front view thereof.
  • the heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a disk-shaped semiconductor wafer W as a substrate with flash light to heat the semiconductor wafer W.
  • the size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, ⁇ 300 mm or ⁇ 450 mm.
  • Impurities are implanted into the semiconductor wafer W before being carried into the heat treatment apparatus 100, and the activation treatment of the implanted impurities is performed by the heat treatment by the heat treatment apparatus 100. It should be noted that in FIG.
  • the heat treatment apparatus 100 includes an indexer unit 101 for loading an unprocessed semiconductor wafer W into the apparatus from the outside and an unprocessed semiconductor wafer W for removing the processed semiconductor wafer W from the apparatus.
  • Alignment unit 230 for positioning the semiconductor wafer W, two cooling units 130, 140 for cooling the semiconductor wafer W after heat treatment, a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafer W, and cooling units 130, 140,
  • a transfer robot 150 that transfers the semiconductor wafer W to and from the heat treatment unit 160 is provided.
  • the heat treatment apparatus 100 includes the control unit 3 that controls the operation mechanism provided in each of the processing units and the transfer robot 150 to advance the flash heating process of the semiconductor wafer W.
  • the indexer unit 101 includes a load port 110 for mounting a plurality of carriers C side by side, a delivery robot 120 for taking out unprocessed semiconductor wafers W from each carrier C, and storing processed semiconductor wafers W in each carrier C. Is equipped with.
  • the indexer unit 101 is provided with three load ports, and the load port 110 is a general term including the first load port 110a, the second load port 110b, and the third load port 110c (three load ports. Are simply referred to as load ports 110 unless otherwise specified).
  • a carrier C containing a semiconductor wafer W hereinafter also referred to as a product wafer W
  • the third load port 110c is a load port dedicated to the dummy carrier DC that accommodates the dummy wafer DW. That is, only the dummy carrier DC is mounted on the third load port 110c.
  • the carrier C and the dummy carrier DC containing the unprocessed semiconductor wafer W are transferred by an unmanned transfer vehicle (AGV, OHT) or the like and placed on the load port 110. Further, the carrier C containing the processed semiconductor wafer W and the dummy carrier DC are also carried away from the load port 110 by the automated guided vehicle.
  • AGV unmanned transfer vehicle
  • OHT unmanned transfer vehicle
  • the carrier C and the dummy carrier DC are arranged so that the delivery robot 120 can move the semiconductor wafer W (or the dummy wafer DW) into and out of the carrier C and the dummy carrier DC.
  • the SMIF Standard Mechanical Inter Face
  • the stored semiconductor wafer W are exposed to the outside air. It may be an exposed OC (open cassette).
  • the delivery robot 120 is capable of a sliding movement as shown by an arrow 120S in FIG. 1, a turning operation and an ascending/descending operation as shown by an arrow 120R.
  • the delivery robot 120 takes the semiconductor wafer W in and out of the carrier C and the dummy carrier DC, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130 and 140.
  • the delivery of the semiconductor wafer W to/from the carrier C (or the dummy carrier DC) by the delivery robot 120 is performed by the sliding movement of the hand 121 and the vertical movement of the carrier C.
  • the delivery of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling units 130 and 140 is performed by sliding the hand 121 and moving the delivery robot 120 up and down.
  • the alignment section 230 is connected to the side of the indexer section 101 along the Y-axis direction.
  • the alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane and orients it in an appropriate direction for flash heating.
  • the alignment unit 230 includes a mechanism for horizontally supporting and rotating the semiconductor wafer W inside an alignment chamber 231 which is a housing made of aluminum alloy, and a notch, an orientation flat, etc. formed in the peripheral portion of the semiconductor wafer W. It is configured by providing a mechanism for optically detecting the.
  • the delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120.
  • the semiconductor wafer W is transferred from the transfer robot 120 to the alignment chamber 231 such that the center of the wafer is located at a predetermined position.
  • the alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W about a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do.
  • the semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.
  • a transfer chamber 170 that houses the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150.
  • the processing chamber 6 of the heat treatment section 160, the first cool chamber 131 of the cooling section 130, and the second cool chamber 141 of the cooling section 140 are connected in communication with the transfer chamber 170 on three sides.
  • the heat treatment unit 160 which is the main part of the heat treatment apparatus 100, is a substrate processing unit that irradiates the semiconductor wafer W that has been preheated with flash light (flash light) from the xenon flash lamp FL to perform flash heat treatment.
  • flash light flash light
  • the two cooling units 130 and 140 have substantially the same configuration.
  • Each of the cooling units 130 and 140 includes a metal cooling plate and a quartz plate placed on the upper surface of the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy housings. (All are not shown).
  • the temperature of the cooling plate is controlled at 10°C to 15°C by a Peltier element or cooling water circulation.
  • the semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment section 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.
  • Both the first cool chamber 131 and the second cool chamber 141 are connected to both of them between the indexer unit 101 and the transfer chamber 170.
  • the first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W.
  • the opening connected to the indexer portion 101 can be opened and closed by the gate valve 181.
  • the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer unit 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.
  • the gate valve 181 When the semiconductor wafer W is transferred between the indexer unit 101 and the first cool chamber 131, the gate valve 181 is opened. In addition, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the inside of the first cool chamber 131 becomes a closed space.
  • the opening connected to the indexer section 101 can be opened and closed by the gate valve 182.
  • the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer unit 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
  • the gate valve 182 is opened when the semiconductor wafer W is transferred between the indexer unit 101 and the second cool chamber 141. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.
  • the cooling units 130 and 140 respectively include a gas supply mechanism that supplies clean nitrogen gas to the first cool chamber 131 and the second cool chamber 141, and an exhaust mechanism that exhausts the atmosphere in the chamber.
  • the gas supply mechanism and the exhaust mechanism may be capable of switching the flow rate in two stages.
  • the transfer robot 150 provided in the transfer chamber 170 can rotate about an axis along the vertical direction as indicated by an arrow 150R.
  • the transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and transfer hands 151a and 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively.
  • These transport hands 151a and 151b are arranged vertically with a predetermined pitch, and are independently slidable linearly in the same horizontal direction by a link mechanism. Further, the transfer robot 150 moves up and down the base provided with the two link mechanisms to move up and down the two transfer hands 151a and 151b while keeping a distance of a predetermined pitch.
  • both transfer hands 151a and 151b are transferred. It turns so as to face the delivery partner, and then (or while it is turning) moves up and down, and one of the transfer hands is positioned at a height for delivering the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to and from the transfer partner.
  • Transfer of the semiconductor wafer W between the transfer robot 150 and the transfer robot 120 can be performed via the cooling units 130 and 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as a path for transferring the semiconductor wafer W between the transfer robot 150 and the transfer robot 120. .. Specifically, the semiconductor wafer W is delivered by one of the transfer robot 150 and the delivery robot 120 receiving the semiconductor wafer W delivered to the first cool chamber 131 or the second cool chamber 141.
  • the transfer robot 150 and the transfer robot 120 constitute a transfer mechanism that transfers the semiconductor wafer W from the carrier C to the thermal processing section 160.
  • the gate valves 181 and 182 are provided between the first cool chamber 131 and the second cool chamber 141 and the indexer unit 101, respectively.
  • Gate valves 183 and 184 are provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively.
  • a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the heat treatment section 160.
  • FIG. 3 is a vertical cross-sectional view showing the configuration of the heat treatment section 160.
  • the heat treatment unit 160 includes a processing chamber 6 that accommodates a semiconductor wafer W and performs heat treatment, a flash lamp house 5 that houses a plurality of flash lamps FL, and a halogen lamp house 4 that houses a plurality of halogen lamps HL. Prepare A flash lamp house 5 is provided above the processing chamber 6, and a halogen lamp house 4 is provided below the processing chamber 6. Further, the heat treatment unit 160 holds the semiconductor wafer W in a horizontal position inside the processing chamber 6, and the transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the transfer robot 150. And
  • the processing chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61.
  • the chamber side portion 61 has a substantially cylindrical shape with an opening at the top and bottom, and an upper chamber window 63 is attached and closed at the upper opening, and a lower chamber window 64 is attached and closed at the lower opening.
  • the upper chamber window 63 that constitutes the ceiling of the processing chamber 6 is a disk-shaped member made of quartz, and functions as a quartz window that transmits the flash light emitted from the flash lamp FL into the processing chamber 6.
  • the lower chamber window 64 that forms the floor of the processing chamber 6 is also a disk-shaped member made of quartz, and functions as a quartz window that transmits the light from the halogen lamp HL into the processing chamber 6.
  • a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. Both the reflection rings 68 and 69 are formed in an annular shape.
  • the upper reflection ring 68 is attached by being fitted from above the chamber side portion 61.
  • the lower reflection ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw not shown. That is, both the reflection rings 68 and 69 are detachably attached to the chamber side portion 61.
  • An inner space of the processing chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.
  • the concave portion 62 is formed on the inner wall surface of the processing chamber 6. That is, a concave portion 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not attached, a lower end surface of the reflection ring 68 and an upper end surface of the reflection ring 69 is formed. ..
  • the concave portion 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the processing chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W.
  • the chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
  • a transfer opening (furnace) 66 for loading and unloading the semiconductor wafer W into and from the processing chamber 6 is formed on the chamber side 61.
  • the transfer opening 66 can be opened and closed by a gate valve 185.
  • the transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out of the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.
  • a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the processing chamber 6.
  • the gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68.
  • the gas supply hole 81 is communicatively connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the sidewall of the processing chamber 6.
  • the gas supply pipe 83 is connected to the processing gas supply source 85.
  • a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.
  • the processing gas flowing into the buffer space 82 flows so as to spread in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65.
  • an inert gas such as nitrogen (N 2 ) or a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ) can be used (nitrogen in this embodiment).
  • a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the processing chamber 6.
  • the gas exhaust hole 86 is formed at a position lower than the recess 62, and may be provided in the reflection ring 69.
  • the gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6.
  • the gas exhaust pipe 88 is connected to the exhaust mechanism 190.
  • a valve 89 is inserted in the middle of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87.
  • the gas supply holes 81 and the gas exhaust holes 86 may be provided in plural along the circumferential direction of the processing chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust mechanism 190 may be a mechanism provided in the heat treatment apparatus 100 or a utility of a factory in which the heat treatment apparatus 100 is installed.
  • a gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66.
  • the gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the processing chamber 6 is exhausted through the transfer opening 66.
  • FIG. 4 is a perspective view showing the overall appearance of the holding unit 7.
  • the holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74.
  • the base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.
  • the base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 and the base ring 71 which will be described later.
  • the base ring 71 is supported on the wall surface of the processing chamber 6 (see FIG. 3 ).
  • a plurality of connecting portions 72 are provided upright along the circumferential direction of the annular shape.
  • the connecting portion 72 is also a quartz member and is fixed to the base ring 71 by welding.
  • FIG. 5 is a plan view of the susceptor 74.
  • FIG. 6 is a sectional view of the susceptor 74.
  • the susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77.
  • the holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.
  • a guide ring 76 is installed on the peripheral portion of the upper surface of the holding plate 75.
  • the guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is 300 mm, the inner diameter of the guide ring 76 is 320 mm.
  • the inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75.
  • the guide ring 76 is made of quartz like the holding plate 75.
  • the guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
  • An area inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75 a for holding the semiconductor wafer W.
  • a plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75.
  • a total of twelve substrate support pins 77 are erected at every 30° along the circumference of a concentric circle with the outer circumference circle of the holding surface 75a (the inner circumference circle of the guide ring 76).
  • the diameter of the circle in which the twelve substrate support pins 77 are arranged is smaller than the diameter of the semiconductor wafer W.
  • Each substrate support pin 77 is made of quartz.
  • the plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.
  • the semiconductor wafer W loaded into the processing chamber 6 is horizontally placed and held on the susceptor 74 of the holding unit 7 mounted in the processing chamber 6. At this time, the semiconductor wafer W is held by the susceptor 74 while being supported by twelve substrate support pins 77 provided upright on the holding plate 75. More precisely, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the twelve substrate support pins 77 (the distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 bring the semiconductor wafer W into a horizontal posture. Can be supported.
  • the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75.
  • the thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
  • the holding plate 75 of the susceptor 74 is formed with an opening 78 penetrating vertically.
  • the opening 78 is provided for the edge radiation thermometer 20 (see FIG. 3) to receive radiant light (infrared light) radiated from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the edge radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 and measures the temperature of the semiconductor wafer W.
  • the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pins 12 of the transfer mechanism 10 to be described later pass through for the delivery of the semiconductor wafer W.
  • FIG. 7 is a plan view of the transfer mechanism 10.
  • FIG. 8 is a side view of the transfer mechanism 10.
  • the transfer mechanism 10 includes two transfer arms 11.
  • the transfer arm 11 has an arcuate shape that follows the generally annular recess 62.
  • Two lift pins 12 are erected on each transfer arm 11.
  • Each transfer arm 11 is rotatable by a horizontal movement mechanism 13.
  • the horizontal movement mechanism 13 includes a transfer operation position (solid line position in FIG. 7) at which the pair of transfer arms 11 transfers the semiconductor wafer W to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is horizontally moved to and from the retracted position (the position indicated by the chain double-dashed line in FIG. 7) that does not overlap in plan view.
  • each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be rotated by one motor using a link mechanism. It may be a moving one.
  • the pair of transfer arms 11 is moved up and down by the elevating mechanism 14 together with the horizontal moving mechanism 13.
  • the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74 and the lift pins are lifted.
  • the upper end of 12 projects from the upper surface of the susceptor 74.
  • the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to extract the lift pin 12 from the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 to open.
  • the transfer arm 11 moves to the retracted position.
  • the retracted position of the pair of transfer arms 11 is immediately above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 is inside the recess 62.
  • An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Are discharged to the outside of the processing chamber 6.
  • the heat treatment section 160 includes two radiation thermometers, an edge radiation thermometer (edge pyrometer) 20 and a central radiation thermometer (center pyrometer) 25.
  • the edge radiation thermometer 20 receives the infrared light emitted from the lower surface of the semiconductor wafer W through the opening 78 of the susceptor 74, and determines the temperature of the semiconductor wafer W from the intensity of the infrared light. Is a wafer thermometer for measuring.
  • the central radiation thermometer 25 is a susceptor thermometer that receives infrared light emitted from the central portion of the susceptor 74 and measures the temperature of the susceptor 74 from the intensity of the infrared light.
  • edge radiation thermometer 20 and the central radiation thermometer 25 are shown inside the processing chamber 6, but these are both attached to the outer wall surface of the processing chamber 6, Infrared light is received through a through hole provided on the outer wall surface.
  • the flash lamp house 5 provided above the processing chamber 6 covers a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL and an upper portion of the light source inside the housing 51.
  • the reflector 52 provided is provided.
  • a lamp light emitting window 53 is attached to the bottom of the housing 51 of the flash lamp house 5.
  • the lamp light emitting window 53 that forms the floor of the flash lamp house 5 is a plate-shaped quartz window made of quartz. Since the flash lamp house 5 is installed above the processing chamber 6, the lamp light emitting window 53 faces the upper chamber window 63.
  • the flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the lamp light emission window 53 and the upper chamber window 63.
  • the plurality of flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and each longitudinal direction is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
  • the xenon flash lamp FL is provided with a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends of the glass tube and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow in the glass tube in a normal state even if electric charges are accumulated in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time.
  • the flash lamp FL since the electrostatic energy stored in the condenser in advance is converted into an extremely short light pulse of 0.1 millisecond to 100 millisecond, continuous lighting such as the halogen lamp HL is performed. It has a feature that it can emit extremely strong light as compared with a light source. That is, the flash lamp FL is a pulse emission lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
  • the reflector 52 is provided above the plurality of flash lamps FL so as to cover them all.
  • the basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65.
  • the reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.
  • the halogen lamp house 4 provided below the processing chamber 6 has a plurality of (40 in the present embodiment) halogen lamps HL incorporated inside the housing 41.
  • the halogen lamps HL irradiate the heat treatment space 65 from below the processing chamber 6 through the lower chamber window 64.
  • FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL.
  • 20 halogen lamps HL are provided in each of the upper and lower two stages.
  • Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape.
  • the 20 halogen lamps HL are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.
  • the arrangement density of the halogen lamps HL is higher in the region facing the peripheral portion than in the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. There is. That is, in both the upper and lower stages, the halogen lamps HL are arranged at a shorter pitch in the peripheral portion than in the central portion of the lamp array. Therefore, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W, where the temperature tends to decrease during heating by irradiation with light from the halogen lamp HL.
  • the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each upper halogen lamp HL and the longitudinal direction of each lower halogen lamp HL are orthogonal to each other.
  • the halogen lamp HL is a filament type light source that energizes the filament arranged inside the glass tube to incandescent the filament to emit light.
  • the glass tube is filled with a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon.
  • a halogen element iodine, bromine, etc.
  • the halogen lamp HL has a characteristic that it has a long life and can continuously emit strong light as compared with an ordinary incandescent lamp. That is, the halogen lamp HL is a continuous lighting lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life.
  • a reflector 43 is provided below the two-stage halogen lamp HL (FIG. 3).
  • the reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
  • the control unit 3 controls the above-described various operating mechanisms provided in the heat treatment apparatus 100.
  • the hardware configuration of the control unit 3 is similar to that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores a basic program, a RAM that is a readable/writable memory that stores various information, and control software and data. It is equipped with a magnetic disk for storage.
  • the processing in the heat treatment apparatus 100 progresses as the CPU of the control unit 3 executes a predetermined processing program.
  • the control unit 3 is shown in the indexer unit 101 in FIG. 1, the present invention is not limited to this, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100.
  • the heat treatment unit 160 prevents an excessive temperature rise of the halogen lamp house 4, the flash lamp house 5 and the processing chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided.
  • the wall of the processing chamber 6 is provided with a water cooling pipe (not shown).
  • the halogen lamp house 4 and the flash lamp house 5 have an air cooling structure that forms a gas flow inside and exhausts heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emitting window 53 to cool the flash lamp house 5 and the upper chamber window 63.
  • the semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) have been added by the ion implantation method.
  • the activation of the impurities is performed by a flash light irradiation heat treatment (annealing) by the heat treatment device 100.
  • a plurality of unprocessed semiconductor wafers W into which impurities have been injected are placed in the carrier C and placed on the first load port 110a or the second load port 110b of the indexer unit 101.
  • the delivery robot 120 takes out the unprocessed semiconductor wafers W one by one from the carrier C and carries them into the alignment chamber 231 of the alignment section 230.
  • the alignment chamber 231 the semiconductor wafer W is rotated about a vertical axis in a horizontal plane with the center of the semiconductor wafer W as a center of rotation, and the notch or the like is optically detected to adjust the orientation of the semiconductor wafer W.
  • the delivery robot 120 of the indexer unit 101 takes out the semiconductor wafer W whose orientation has been adjusted from the alignment chamber 231, and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140.
  • the unprocessed semiconductor wafer W loaded into the first cool chamber 131 or the second cool chamber 141 is unloaded into the transfer chamber 170 by the transfer robot 150.
  • the transfer robot 150 When the unprocessed semiconductor wafer W is transferred from the indexer unit 101 to the transfer chamber 170 via the first cool chamber 131 or the second cool chamber 141, the first cool chamber 131 and the second cool chamber 141 are not connected to each other. Function as a pass for the delivery of.
  • the transfer robot 150 that takes out the semiconductor wafer W turns so as to face the heat treatment unit 160. Subsequently, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if the preceding heat-treated semiconductor wafer W is present in the processing chamber 6, the heat-treated semiconductor wafer W is taken out by one of the transfer hands 151a and 151b, and then the untreated semiconductor wafer W is removed. W is carried into the processing chamber 6 and the wafers are exchanged. After that, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
  • the semiconductor wafer W loaded into the processing chamber 6 is preheated by the halogen lamp HL, and then flash-heated by irradiation with flash light from the flash lamp FL. This flash heat treatment activates the impurities implanted in the semiconductor wafer W.
  • the gate valve 185 reopens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 carries out the semiconductor wafer W after the flash heating process from the processing chamber 6 to the transfer chamber 170. ..
  • the transfer robot 150 that has taken out the semiconductor wafer W revolves from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141. Further, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
  • the transfer robot 150 carries the semiconductor wafer W after the heat treatment into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140.
  • the semiconductor wafer W has passed through the first cool chamber 131 before the heat treatment, it is carried into the first cool chamber 131 even after the heat treatment, and passes through the second cool chamber 141 before the heat treatment. In that case, it is carried into the second cool chamber 141 even after the heat treatment.
  • the cooling process of the semiconductor wafer W after the flash heating process is performed. Since the temperature of the entire semiconductor wafer W is relatively high at the time of being unloaded from the processing chamber 6 of the heat treatment unit 160, it is cooled to near room temperature in the first cool chamber 131 or the second cool chamber 141. is there.
  • the delivery robot 120 After the lapse of a predetermined cooling processing time, the delivery robot 120 carries out the cooled semiconductor wafer W from the first cool chamber 131 or the second cool chamber 141 and returns it to the carrier C.
  • the carrier C When a predetermined number of processed semiconductor wafers W are accommodated in the carrier C, the carrier C is unloaded from the first load port 110a or the second load port 110b of the indexer unit 101.
  • the valve 84 for air supply Prior to the loading of the semiconductor wafer W into the processing chamber 6, the valve 84 for air supply is opened, and the valves 89, 192 for gas exhaust are opened to start air supply/exhaust to/from the processing chamber 6.
  • the valve 84 When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. Further, when the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower portion of the heat treatment space 65.
  • the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). It should be noted that nitrogen gas is continuously supplied to the heat treatment space 65 during the heat treatment of the semiconductor wafer W in the heat treatment unit 160, and the supply amount thereof is appropriately changed according to the treatment process.
  • the gate valve 185 is opened to open the transfer opening 66, and the transfer robot 150 transfers the semiconductor wafer W to be processed into the heat treatment space 65 in the processing chamber 6 through the transfer opening 66.
  • the transfer robot 150 advances the transfer hand 151 a (or the transfer hand 151 b) holding the unprocessed semiconductor wafer W to a position directly above the holding unit 7 and stops it.
  • the pair of transfer arms 11 of the transfer mechanism 10 horizontally moves from the retracted position to the transfer operation position and rises, so that the lift pin 12 projects from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receives the semiconductor wafer W.
  • the lift pins 12 rise above the upper ends of the substrate support pins 77.
  • the transfer robot 150 causes the transfer hand 151 a to exit the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 descends, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture.
  • the semiconductor wafer W is supported by a plurality of substrate support pins 77 provided upright on a holding plate 75 and held by the susceptor 74. Further, the semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are injected as the upper surface.
  • a predetermined space is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75.
  • the pair of transfer arms 11 descending below the susceptor 74 are retracted by the horizontal movement mechanism 13 to the retracted position, that is, inside the recess 62.
  • the 40 halogen lamps HL are simultaneously turned on and preheating (assist heating) is started.
  • the halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the lower surface of the semiconductor wafer W.
  • the semiconductor wafer W is preheated by the light irradiation from the halogen lamp HL, and the temperature rises. Since the transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, it does not hinder the heating by the halogen lamp HL.
  • the temperature of the semiconductor wafer W is measured by the edge radiation thermometer 20. That is, the infrared radiation emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 is received by the edge radiation thermometer 20 to measure the wafer temperature during heating.
  • the measured temperature of the semiconductor wafer W is transmitted to the controller 3.
  • the control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, reaches a predetermined preheating temperature T1.
  • control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value of the edge radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1.
  • the preheating temperature T1 is set to about 600° C. to 800° C. (700° C. in the present embodiment) at which the impurities added to the semiconductor wafer W are not likely to diffuse by heat.
  • the control unit 3 After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the edge radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL, and the temperature of the semiconductor wafer W is adjusted. Is maintained at a preheating temperature T1.
  • the entire semiconductor wafer W is uniformly heated to the preheating temperature T1.
  • the temperature of the peripheral portion of the semiconductor wafer W which is more likely to release heat, tends to be lower than that of the central portion, but the arrangement density of the halogen lamps HL in the halogen lamp house 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the amount of light applied to the peripheral portion of the semiconductor wafer W where heat dissipation easily occurs increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.
  • the flash lamp FL irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the processing chamber 6, and another part of the flash light is once reflected by the reflector 52 and then goes into the processing chamber 6, and these flashes are emitted.
  • the semiconductor wafer W is flash-heated by the irradiation of light.
  • the flash heating is performed by irradiating flash light (flash light) from the flash lamp FL, so that the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light emitted from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the condenser in advance is extremely short, and the irradiation time is extremely short such as 0.1 millisecond or more and 100 millisecond or less. It is a strong flash. Then, the surface temperature of the semiconductor wafer W flash-heated by the irradiation of the flash light from the flash lamp FL instantaneously rises to the processing temperature T2 of 1000° C. or higher, and the impurities implanted in the semiconductor wafer W are activated.
  • flash light flash light
  • the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time by flash heating, it is possible to activate the impurities while suppressing the diffusion of the impurities injected into the semiconductor wafer W due to heat. .. Since the time required for activation of impurities is extremely short as compared with the time required for thermal diffusion thereof, activation is not performed even in a short time in which diffusion of about 0.1 millisecond to 100 millisecond does not occur. Complete.
  • the halogen lamp HL is turned off after a lapse of a predetermined time.
  • the semiconductor wafer W is rapidly cooled from the preheating temperature T1.
  • the temperature of the semiconductor wafer W during cooling is measured by the edge radiation thermometer 20, and the measurement result is transmitted to the control unit 3.
  • the control unit 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature based on the measurement result of the edge radiation thermometer 20. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 again horizontally moves from the retracted position to the transfer operation position and rises, whereby the lift pin 12 is lifted.
  • the semiconductor wafer W that has protruded from the upper surface of 74 and has undergone the heat treatment is received from the susceptor 74. Then, the transfer opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer hand 151b (or the transfer hand 151a) of the transfer robot 150. It The transfer robot 150 advances the transfer hand 151b to a position directly below the semiconductor wafer W pushed up by the lift pins 12 and stops it. Then, when the pair of transfer arms 11 descend, the semiconductor wafer W after the flash heating is transferred to and placed on the transfer hand 151b. After that, the transfer robot 150 moves the transfer hand 151b out of the processing chamber 6 and carries out the processed semiconductor wafer W.
  • the processing of the semiconductor wafer W is performed in lot units.
  • a lot is a set of semiconductor wafers W to be processed under the same conditions with the same contents.
  • a plurality of (for example, 25) semiconductor wafers W constituting a lot are accommodated in one carrier C, and the first load port 110a or the second load port 110b of the indexer unit 101 is accommodated.
  • the semiconductor wafers W are sequentially loaded into the processing chamber 6 one by one from the carrier C and subjected to heat treatment.
  • the first semiconductor wafer W of the lot is carried into the processing chamber 6 at about room temperature and preheating and flash heating processing is performed. It will be.
  • the first lot is processed after the heat treatment apparatus 100 is activated after maintenance, or a long time has elapsed after processing the previous lot.
  • heat is generated from the heated semiconductor wafer W to the internal structure of the chamber such as the susceptor 74, so that the susceptor 74, which was initially at room temperature, gradually rises due to heat accumulation as the number of processed semiconductor wafers W increases. It will be warm. Further, since a part of the infrared light emitted from the halogen lamp HL is absorbed by the lower chamber window 64, the temperature of the lower chamber window 64 should gradually rise as the number of processed semiconductor wafers W increases. Becomes
  • the temperature of the susceptor 74 and the lower chamber window 64 reaches a certain stable temperature when the heat treatment of about 10 semiconductor wafers W is performed.
  • the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat released from the susceptor 74 are balanced.
  • the amount of heat transferred from the semiconductor wafer W is larger than the amount of heat released from the susceptor 74, so the temperature of the susceptor 74 gradually accumulates as the number of processed semiconductor wafers W increases. Rise.
  • the heat transfer amount from the semiconductor wafer W and the heat radiation amount from the susceptor 74 are balanced, so that the temperature of the susceptor 74 is maintained at a constant stable temperature.
  • the Rukoto means that the temperature of the susceptor 74 and the like is continuously determined by performing a heat treatment on a plurality of semiconductor wafers W in the lot in the processing chamber 6 without preheating the internal structure of the chamber such as the susceptor 74. Is the temperature of the susceptor 74 when the temperature rises and becomes constant.
  • the amount of heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL and the amount of heat released from the lower chamber window 64 are balanced.
  • the temperature of the lower chamber window 64 will also be maintained at a constant stable temperature.
  • the temperature history of the semiconductor wafer W in the initial stage of the lot is different from that of the semiconductor wafer W in the middle of the process because the temperature of the structure in the processing chamber 6 differs. There was a problem of becoming uniform. Further, since the semiconductor wafer W in the initial stage is supported by the low temperature susceptor 74 and subjected to the flash heat treatment, the wafer may be warped. Therefore, before the processing of the product lot is started, the dummy wafer DW which is not the processing target is loaded into the processing chamber 6 and subjected to the heating processing so as to raise the temperature of the chamber internal structures such as the susceptor 74 to a stable temperature. Running (dummy processing) is being performed.
  • the internal structure of the chamber such as the susceptor 74 can be heated to a stable temperature.
  • Such a dummy process is executed not only when the process is started in the process chamber 6 at room temperature but also when the preheating temperature T1 or the process temperature T2 is changed.
  • the dummy processing for supporting and heating the dummy wafer DW on the susceptor 74 causes the susceptor 74 to reach a stable temperature.
  • the temperature can be raised to.
  • the temperature of the susceptor 74 cannot be lowered by the dummy processing as described above. Therefore, in the present embodiment, the temperature of the susceptor 74 is lowered as follows.
  • the wall of the processing chamber 6 is water-cooled by the water cooling pipe and the upper chamber window 63 is also air-cooled, the temperature is relatively quickly lowered, but the susceptor 74 provided in the processing chamber 6 cannot be cooled from the outside. Since it is possible, it takes time to lower the temperature.
  • FIG. 10 is a flowchart showing a temperature control procedure of the susceptor 74 using the dummy wafer DW.
  • the dummy wafer DW is a disk-shaped silicon wafer similar to the product semiconductor wafer W, and has the same size and shape as the semiconductor wafer W. However, pattern formation and ion implantation are not performed on the dummy wafer DW. That is, the dummy wafer DW is a so-called bare wafer.
  • the form itself of the dummy carrier DC is the same as the carrier C that accommodates the semiconductor wafer W to be a product, and is FOUP in this embodiment.
  • the dummy carrier DC is a carrier dedicated to the dummy wafer DW in which only the dummy wafer DW is accommodated.
  • step S1 wait until the processing of the last semiconductor wafer W of the preceding lot is completed (step S1). During the processing of the preceding lot, the temperature of the internal structure of the chamber such as the susceptor 74 is maintained at the stable temperature in the preceding lot.
  • step S2 the dummy wafer DW is processed.
  • Transportation of is started. Specifically, the delivery robot 120 takes out the dummy wafer DW from the dummy carrier DC placed on the third load port 110c and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. To do. In the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled (step S3).
  • the temperature of the cooling plate of the first cool chamber 131 or the second cool chamber 141 is adjusted to 10°C to 15°C. Therefore, in the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled to room temperature (20° C. to 25° C.) or lower.
  • the dummy wafer DW cooled to the room temperature or lower in the first cool chamber 131 or the second cool chamber 141 is carried out to the carrying chamber 170 by the carrying robot 150.
  • the transfer robot 150 that has taken out the dummy wafer DW turns so as to face the heat treatment unit 160.
  • the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the dummy wafer DW into the processing chamber 6.
  • the loading operation of the dummy wafer DW into the processing chamber 6 is the same as the loading operation of the semiconductor wafer W described above. That is, the transfer mechanism 10 transfers the dummy wafer DW from the transfer hand 151 a (or the transfer hand 151 b) of the transfer robot 150 to the susceptor 74. The cooled dummy wafer DW is placed and supported on the susceptor 74 in a horizontal posture (step S4).
  • the transfer mechanism 10 transfers the dummy wafer DW from the susceptor 74 to the transfer robot 150.
  • the transfer robot 150 that has received the dummy wafer DW carries out the dummy wafer DW from the processing chamber 6 to the transfer chamber 170. Subsequently, the transfer robot 150 swivels from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141, and loads the dummy wafer DW into the first cool chamber 131 or the second cool chamber 141. Then, the delivery robot 120 carries out the dummy wafer DW from the first cool chamber 131 or the second cool chamber 141 and returns it to the dummy carrier DC mounted on the third load port 110c. In this way, the temperature lowering process of the susceptor 74 by one dummy wafer DW is performed.
  • step S4 the process returns from step S5 to step S2, and from step S2.
  • the processes up to step S4 are repeated. That is, a new dummy wafer DW is taken out from the dummy carrier DC, cooled in the first cool chamber 131 or the second cool chamber 141, and placed on the susceptor 74 in the processing chamber 6. Then, the dummy wafer DW further lowers the temperature of the susceptor 74.
  • step S6 the process proceeds from step S5 to step S6.
  • the processing of the semiconductor wafer W is started.
  • the content of this processing is as described above. That is, the cooling of the susceptor 74 by the dummy wafer DW is repeated until the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot. Since the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot, the history of heat treatment can be made uniform for all the semiconductor wafers W constituting the subsequent lot.
  • the dummy wafer DW cooled to room temperature or lower is placed on the susceptor 74 to control the temperature of the susceptor 74.
  • the temperature is lowered to the stable temperature of the subsequent lot. For this reason, the temperature of the susceptor 74 can be quickly lowered compared to natural cooling. As a result, the processing of the subsequent lot can be started early and the reduction in throughput can be suppressed.
  • the dummy wafer DW is cooled to room temperature or lower by the first cool chamber 131 or the second cool chamber 141.
  • the first cool chamber 131 and the second cool chamber 141 are originally for cooling the semiconductor wafer W after the flash heating process, and are used for cooling the dummy wafer DW. That is, in the present embodiment, without providing a new dedicated processing unit for cooling the dummy wafer DW, the existing processing unit is diverted to cool the dummy wafer DW and lower the temperature of the susceptor 74. There is.
  • the dummy wafer DW is a bare wafer of silicon, but the dummy wafer DW is not limited to this, and the dummy wafer DW may be any substrate made of a material having excellent thermal conductivity and heat capacity.
  • the dummy wafer DW may be a silicon carbide (SiC) or ceramic wafer.
  • the dummy wafer DW may be reciprocated between the first cool chamber 131 or the second cool chamber 141 and the processing chamber 6 by the transfer robot 150 to cool the susceptor 74. That is, instead of returning the dummy wafer DW carried into the first cool chamber 131 or the second cool chamber 141 after cooling the susceptor 74 to the dummy carrier DC, it is cooled again and carried into the processing chamber 6 again to the susceptor 74. The temperature of the susceptor 74 may be lowered by placing the susceptor 74 on it.
  • the flash lamp house 5 is provided with 30 flash lamps FL, but the number is not limited to this, and the number of flash lamps FL can be any number. .. Further, the flash lamp FL is not limited to the xenon flash lamp and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen lamp house 4 is not limited to 40, and may be any number.
  • the filament type halogen lamp HL is used as the continuous lighting lamp that continuously emits light for 1 second or more to preheat the semiconductor wafer W, but the present invention is not limited to this.
  • a discharge type arc lamp for example, a xenon arc lamp
  • a continuous lighting lamp for preheating may be used as a continuous lighting lamp for preheating.
  • the substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a solar cell substrate.
  • the heat treatment apparatus is not limited to the flash lamp annealing apparatus, and may be an RTP (Rapid thermal processing) apparatus using a continuous lighting lamp or an apparatus for heating a substrate using a hot plate. ..
  • RTP Rapid thermal processing

Abstract

After the processing of a last semiconductor wafer of a preceding lot is completed, when a processing temperature of a subsequent lot is lower than that of the preceding lot and a stable temperature decreases, a dummy wafer is cooled down to room temperature or lower. The cooled dummy wafer is placed on a quartz susceptor inside a processing chamber and the temperature of the susceptor is lowered. The temperature of the susceptor can be quickly lowered to the stable temperature of the subsequent lot by repeatedly cooling the susceptor by a plurality of the dummy wafers.

Description

熱処理方法および熱処理装置Heat treatment method and heat treatment apparatus
　本発明は、半導体ウェハー等の薄板状精密電子基板（以下、単に「基板」と称する）に対して熱処理を行う熱処理方法および熱処理装置に関する。 The present invention relates to a heat treatment method and a heat treatment apparatus for performing heat treatment on a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer.
　半導体デバイスの製造プロセスにおいて、極めて短時間で半導体ウェハーを加熱するフラッシュランプアニール（ＦＬＡ）が注目されている。フラッシュランプアニールは、キセノンフラッシュランプ（以下、単に「フラッシュランプ」とするときにはキセノンフラッシュランプを意味する）を使用して半導体ウェハーの表面にフラッシュ光を照射することにより、半導体ウェハーの表面のみを極めて短時間（数ミリ秒以下）に昇温させる熱処理技術である。 In the semiconductor device manufacturing process, flash lamp annealing (FLA), which heats a semiconductor wafer in an extremely short time, is drawing attention. Flash lamp annealing uses a xenon flash lamp (hereinafter, simply referred to as a “flash lamp” to mean a xenon flash lamp) to irradiate the surface of a semiconductor wafer with flash light so that only the surface of the semiconductor wafer can be extremely exposed. It is a heat treatment technology that raises the temperature in a short time (several milliseconds or less).
　キセノンフラッシュランプの放射分光分布は紫外域から近赤外域であり、従来のハロゲンランプよりも波長が短く、シリコンの半導体ウェハーの基礎吸収帯とほぼ一致している。よって、キセノンフラッシュランプから半導体ウェハーにフラッシュ光を照射したときには、透過光が少なく半導体ウェハーを急速に昇温することが可能である。また、数ミリ秒以下の極めて短時間のフラッシュ光照射であれば、半導体ウェハーの表面近傍のみを選択的に昇温できることも判明している。 The emission spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, has a shorter wavelength than conventional halogen lamps, and almost matches the basic absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the transmitted light is small and it is possible to rapidly raise the temperature of the semiconductor wafer. Further, it has been found that the flash light irradiation for a very short time of several milliseconds or less can selectively raise the temperature only in the vicinity of the surface of the semiconductor wafer.
　このようなフラッシュランプアニールは、極短時間の加熱が必要とされる処理、例えば典型的には半導体ウェハーに注入された不純物の活性化に利用される。イオン注入法によって不純物が注入された半導体ウェハーの表面にフラッシュランプからフラッシュ光を照射すれば、当該半導体ウェハーの表面を極短時間だけ活性化温度にまで昇温することができ、不純物を深く拡散させることなく、不純物活性化のみを実行することができるのである。 Such flash lamp annealing is used for a process that requires heating for an extremely short time, for example, typically for activating impurities implanted into a semiconductor wafer. If the surface of a semiconductor wafer in which impurities have been implanted by the ion implantation method is irradiated with flash light from a flash lamp, the surface of the semiconductor wafer can be heated to the activation temperature for an extremely short time, and the impurities are diffused deeply. It is possible to carry out only the impurity activation without performing the activation.
　典型的には、熱処理に限らず半導体ウェハーの処理はロット（同一条件にて同一内容の処理を行う対象となる１組の半導体ウェハー）単位で行われる。枚葉式の基板処理装置では、ロットを構成する複数枚の半導体ウェハーに対して連続して順次に処理が行われる。フラッシュランプアニール装置においても、ロットを構成する複数の半導体ウェハーが１枚ずつチャンバーに搬入されて順次に熱処理が行われる。 Typically, processing of semiconductor wafers is not limited to heat treatment, but is performed in lots (one set of semiconductor wafers subject to processing of the same content under the same conditions). In the single-wafer type substrate processing apparatus, a plurality of semiconductor wafers forming a lot are continuously and sequentially processed. Also in the flash lamp annealing device, a plurality of semiconductor wafers forming a lot are loaded into the chamber one by one and sequentially subjected to heat treatment.
　ところが、ロットを構成する複数の半導体ウェハーを順次に処理する過程で半導体ウェハーを保持するサセプタ等のチャンバー内構造物の温度が変化することがある。このような現象は、暫く稼働停止状態にあったフラッシュランプアニール装置にて新たに処理を開始する場合や半導体ウェハーの処理温度等の処理条件を変化させた場合に生じる。ロットの複数の半導体ウェハーを処理する過程でサセプタ等のチャンバー内構造物の温度が変化すると、ロットの初期の半導体ウェハーと後半の半導体ウェハーとで処理時の温度履歴が異なるという問題が生じる。 However, the temperature of the internal structure of the chamber such as the susceptor that holds the semiconductor wafers may change during the process of sequentially processing the semiconductor wafers that make up the lot. Such a phenomenon occurs when a new process is started in the flash lamp annealing apparatus which has been in an operation stopped state for a while, or when the processing conditions such as the processing temperature of the semiconductor wafer are changed. When the temperature of the internal structure of the chamber such as the susceptor changes in the process of processing a plurality of semiconductor wafers in a lot, there arises a problem that the temperature history at the time of processing is different between the semiconductor wafer in the initial stage and the semiconductor wafer in the latter half of the lot.
　このような問題を解決するために、製品ロットの処理を開始する前に、処理対象ではないダミーウェハーをチャンバー内に搬入してサセプタに支持し、当該ダミーウェハーに加熱処理を行うことにより、事前にサセプタ等のチャンバー内構造物を昇温しておくことが行われていた（ダミーランニング）。特許文献１には、１０枚程度のダミーウェハーにダミーランニングを行ってサセプタ等のチャンバー内構造物の温度を処理時の安定温度に到達させることが開示されている。 In order to solve such a problem, before starting the processing of the product lot, a dummy wafer that is not a processing target is loaded into the chamber, supported by the susceptor, and the dummy wafer is subjected to a heat treatment, so that It has been practiced to raise the temperature of the internal structure of the chamber such as the susceptor (dummy running). Patent Document 1 discloses that about 10 dummy wafers are subjected to dummy running so that the temperature of the internal structure of the chamber such as the susceptor reaches a stable temperature during processing.
特開２０１７－０９２１０２号公報Japanese Patent Laid-Open No. 2017-092102
　サセプタ等のチャンバー内構造物を安定温度に昇温する場合には、特許文献１に開示されるようなダミーランニングを行うことによって実行することが可能である。しかしながら、先行するロットよりも後続のロットの処理温度が低い場合には、サセプタ等の温度を後続ロットでの安定温度に降温させなければならないこともある。このような場合には、上記のようなダミーランニングではサセプタ等を降温させることはできず、自然冷却によってサセプタ等のチャンバー内構造物が安定温度にまで降温するのを待つ必要があった。そうすると、後続ロットの処理を開始するまでの待機時間が長くなり、スループットが低下することとなっていた。 When raising the internal structure of the chamber such as the susceptor to a stable temperature, it is possible to perform it by performing dummy running as disclosed in Patent Document 1. However, when the processing temperature of the subsequent lot is lower than that of the preceding lot, the temperature of the susceptor or the like may have to be lowered to the stable temperature of the subsequent lot. In such a case, the dummy running as described above cannot lower the temperature of the susceptor and the like, and it has been necessary to wait for the internal structure of the chamber such as the susceptor to cool to a stable temperature by natural cooling. Then, the waiting time until the processing of the subsequent lot is started becomes long and the throughput is lowered.
　本発明は、上記課題に鑑みてなされたものであり、サセプタの温度を迅速に降温させることができる熱処理方法および熱処理装置を提供することを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of rapidly lowering the temperature of a susceptor.
　上記課題を解決するため、この発明の第１の態様は、基板に対して熱処理を行う熱処理方法において、チャンバー内にてサセプタに載置した基板に加熱源から加熱を行う加熱工程と、ダミーウェハーを冷却する冷却工程と、前記加熱工程が終了した後に、前記冷却工程で冷却された前記ダミーウェハーを前記サセプタに載置して前記サセプタの温度を降温させる温調工程と、を備える。 In order to solve the above-mentioned problems, a first aspect of the present invention is, in a heat treatment method of performing heat treatment on a substrate, a heating step of heating a substrate placed on a susceptor in a chamber from a heating source, and a dummy wafer. And a temperature control step of placing the dummy wafer cooled in the cooling step on the susceptor and lowering the temperature of the susceptor after the heating step is completed.
　また、第２の態様は、第１の態様に係る熱処理方法において、前記温調工程では、前記サセプタの温度を前記基板の後続のロットの熱処理を行うときの安定温度に降温させる。 In a second aspect, in the heat treatment method according to the first aspect, in the temperature adjusting step, the temperature of the susceptor is lowered to a stable temperature at which heat treatment of a subsequent lot of the substrate is performed.
　また、第３の態様は、第１または第２の態様に係る熱処理方法において、前記冷却工程では、前記ダミーウェハーを室温以下にまで冷却する。 A third aspect is the heat treatment method according to the first or second aspect, wherein in the cooling step, the dummy wafer is cooled to room temperature or lower.
　また、第４の態様は、基板に対して熱処理を行う熱処理装置において、基板を収容するチャンバーと、前記チャンバー内にて前記基板を載置するサセプタと、前記サセプタに載置された前記基板を加熱する加熱源と、ダミーウェハーを冷却する冷却部と、前記ダミーウェハーを前記冷却部から前記チャンバーに搬送する搬送部と、を備え、前記基板に対する加熱処理が終了した後に、前記冷却部にて冷却された前記ダミーウェハーを前記サセプタに載置して前記サセプタの温度を降温させる。 Further, a fourth aspect is a heat treatment apparatus for performing heat treatment on a substrate, wherein a chamber for accommodating the substrate, a susceptor for placing the substrate in the chamber, and the substrate placed on the susceptor are provided. A heating source for heating, a cooling unit for cooling the dummy wafer, and a transfer unit for transferring the dummy wafer from the cooling unit to the chamber, and after the heating process for the substrate is completed, the cooling unit The cooled dummy wafer is placed on the susceptor to lower the temperature of the susceptor.
　また、第５の態様は、第４の態様に係る熱処理装置において、前記基板に対する加熱処理が終了した後に、前記サセプタの温度を前記基板の後続のロットの熱処理を行うときの安定温度に降温させる。 A fifth aspect is, in the heat treatment apparatus according to the fourth aspect, lowering the temperature of the susceptor to a stable temperature when performing heat treatment of a subsequent lot of the substrate after the heat treatment of the substrate is completed. ..
　また、第６の態様は、第４または第５の態様に係る熱処理装置において、前記冷却部は、前記ダミーウェハーを室温以下にまで冷却する。 A sixth aspect is the heat treatment apparatus according to the fourth or fifth aspect, wherein the cooling unit cools the dummy wafer to room temperature or lower.
　第１から第３の態様に係る熱処理方法によれば、加熱工程が終了した後に、冷却工程で冷却されたダミーウェハーをサセプタに載置してサセプタの温度を降温させるため、自然冷却に比較してサセプタの温度を迅速に降温させることができる。 According to the heat treatment methods of the first to third aspects, after the heating step is completed, the dummy wafer cooled in the cooling step is placed on the susceptor to lower the temperature of the susceptor. The temperature of the susceptor can be quickly lowered.
　第４から第６の態様に係る熱処理装置によれば、基板に対する加熱処理が終了した後に、冷却部にて冷却されたダミーウェハーをサセプタに載置してサセプタの温度を降温させるため、自然冷却に比較してサセプタの温度を迅速に降温させることができる。 According to the heat treatment apparatuses of the fourth to sixth aspects, after the heat treatment for the substrate is completed, the dummy wafer cooled by the cooling unit is placed on the susceptor to lower the temperature of the susceptor, so that the natural cooling is performed. The temperature of the susceptor can be quickly lowered compared to.
本発明に係る熱処理装置を示す平面図である。It is a top view which shows the heat processing apparatus which concerns on this invention. 図１の熱処理装置の正面図である。It is a front view of the heat processing apparatus of FIG. 熱処理部の構成を示す縦断面図である。It is a longitudinal cross-sectional view showing a configuration of a heat treatment section. 保持部の全体外観を示す斜視図である。It is a perspective view showing the whole appearance of a holding part. サセプタの平面図である。It is a top view of a susceptor. サセプタの断面図である。It is sectional drawing of a susceptor. 移載機構の平面図である。It is a top view of a transfer mechanism. 移載機構の側面図である。It is a side view of a transfer mechanism. 複数のハロゲンランプの配置を示す平面図である。It is a top view showing arrangement of a plurality of halogen lamps. ダミーウェハーを用いたサセプタの温調手順を示すフローチャートである。It is a flowchart which shows the temperature control procedure of the susceptor using a dummy wafer.
　以下、図面を参照しつつ本発明の実施の形態について詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
　まず、本発明に係る熱処理装置について説明する。図１は、本発明に係る熱処理装置１００を示す平面図であり、図２はその正面図である。熱処理装置１００は基板として円板形状の半導体ウェハーＷにフラッシュ光を照射してその半導体ウェハーＷを加熱するフラッシュランプアニール装置である。処理対象となる半導体ウェハーＷのサイズは特に限定されるものではないが、例えばφ３００ｍｍやφ４５０ｍｍである。熱処理装置１００に搬入される前の半導体ウェハーＷには不純物が注入されており、熱処理装置１００による加熱処理によって注入された不純物の活性化処理が実行される。なお、図１および以降の各図においては、理解容易のため、必要に応じて各部の寸法や数を誇張または簡略化して描いている。また、図１～図３の各図においては、それらの方向関係を明確にするためＺ軸方向を鉛直方向とし、ＸＹ平面を水平面とするＸＹＺ直交座標系を付している。 First, the heat treatment apparatus according to the present invention will be described. FIG. 1 is a plan view showing a heat treatment apparatus 100 according to the present invention, and FIG. 2 is a front view thereof. The heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a disk-shaped semiconductor wafer W as a substrate with flash light to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, φ300 mm or φ450 mm. Impurities are implanted into the semiconductor wafer W before being carried into the heat treatment apparatus 100, and the activation treatment of the implanted impurities is performed by the heat treatment by the heat treatment apparatus 100. It should be noted that in FIG. 1 and the subsequent drawings, the dimensions and number of each part are exaggerated or simplified as necessary for easy understanding. Further, in each of FIGS. 1 to 3, an XYZ orthogonal coordinate system in which the Z-axis direction is the vertical direction and the XY plane is the horizontal plane is attached in order to clarify their directional relationship.
　図１および図２に示すように、熱処理装置１００は、未処理の半導体ウェハーＷを外部から装置内に搬入するとともに処理済みの半導体ウェハーＷを装置外に搬出するためのインデクサ部１０１、未処理の半導体ウェハーＷの位置決めを行うアライメント部２３０、加熱処理後の半導体ウェハーＷの冷却を行う２つの冷却部１３０，１４０、半導体ウェハーＷにフラッシュ加熱処理を施す熱処理部１６０並びに冷却部１３０，１４０および熱処理部１６０に対して半導体ウェハーＷの受け渡しを行う搬送ロボット１５０を備える。また、熱処理装置１００は、上記の各処理部に設けられた動作機構および搬送ロボット１５０を制御して半導体ウェハーＷのフラッシュ加熱処理を進行させる制御部３を備える。 As shown in FIGS. 1 and 2, the heat treatment apparatus 100 includes an indexer unit 101 for loading an unprocessed semiconductor wafer W into the apparatus from the outside and an unprocessed semiconductor wafer W for removing the processed semiconductor wafer W from the apparatus. Alignment unit 230 for positioning the semiconductor wafer W, two cooling units 130, 140 for cooling the semiconductor wafer W after heat treatment, a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafer W, and cooling units 130, 140, A transfer robot 150 that transfers the semiconductor wafer W to and from the heat treatment unit 160 is provided. Further, the heat treatment apparatus 100 includes the control unit 3 that controls the operation mechanism provided in each of the processing units and the transfer robot 150 to advance the flash heating process of the semiconductor wafer W.
　インデクサ部１０１は、複数のキャリアＣを並べて載置するロードポート１１０と、各キャリアＣから未処理の半導体ウェハーＷを取り出すとともに、各キャリアＣに処理済みの半導体ウェハーＷを収納する受渡ロボット１２０とを備えている。正確にはインデクサ部１０１には３つのロードポートが設けられており、ロードポート１１０は、第１ロードポート１１０ａ、第２ロードポート１１０ｂおよび第３ロードポート１１０ｃを含む総称である（３つのロードポートを特に区別しない場合には単にロードポート１１０とする）。３つのロードポートのうち第１ロードポート１１０ａおよび第２ロードポート１１０ｂには製品となる半導体ウェハーＷ（以下、プロダクトウェハーＷとも称する）を収容したキャリアＣが載置される。一方、第３ロードポート１１０ｃは、ダミーウェハーＤＷを収容したダミーキャリアＤＣ専用のロードポートである。すなわち、第３ロードポート１１０ｃにはダミーキャリアＤＣのみが載置される。 The indexer unit 101 includes a load port 110 for mounting a plurality of carriers C side by side, a delivery robot 120 for taking out unprocessed semiconductor wafers W from each carrier C, and storing processed semiconductor wafers W in each carrier C. Is equipped with. To be precise, the indexer unit 101 is provided with three load ports, and the load port 110 is a general term including the first load port 110a, the second load port 110b, and the third load port 110c (three load ports. Are simply referred to as load ports 110 unless otherwise specified). A carrier C containing a semiconductor wafer W (hereinafter also referred to as a product wafer W) to be a product is placed on the first load port 110a and the second load port 110b of the three load ports. On the other hand, the third load port 110c is a load port dedicated to the dummy carrier DC that accommodates the dummy wafer DW. That is, only the dummy carrier DC is mounted on the third load port 110c.
　未処理の半導体ウェハーＷを収容したキャリアＣおよびダミーキャリアＤＣは無人搬送車（ＡＧＶ、ＯＨＴ）等によって搬送されてロードポート１１０に載置される。また、処理済みの半導体ウェハーＷを収容したキャリアＣおよびダミーキャリアＤＣも無人搬送車によってロードポート１１０から持ち去られる。 The carrier C and the dummy carrier DC containing the unprocessed semiconductor wafer W are transferred by an unmanned transfer vehicle (AGV, OHT) or the like and placed on the load port 110. Further, the carrier C containing the processed semiconductor wafer W and the dummy carrier DC are also carried away from the load port 110 by the automated guided vehicle.
　また、ロードポート１１０においては、受渡ロボット１２０がキャリアＣおよびダミーキャリアＤＣに対して任意の半導体ウェハーＷ（またはダミーウェハーＤＷ）の出し入れを行うことができるように、キャリアＣおよびダミーキャリアＤＣが図２の矢印ＣＵにて示す如く昇降移動可能に構成されている。なお、キャリアＣおよびダミーキャリアＤＣの形態としては、半導体ウェハーＷを密閉空間に収納するＦＯＵＰ(front opening unified pod)の他に、ＳＭＩＦ(Standard Mechanical Inter Face)ポッドや収納した半導体ウェハーＷを外気に曝すＯＣ(open cassette)であっても良い。 In addition, in the load port 110, the carrier C and the dummy carrier DC are arranged so that the delivery robot 120 can move the semiconductor wafer W (or the dummy wafer DW) into and out of the carrier C and the dummy carrier DC. As shown by the arrow CU in FIG. As the forms of the carrier C and the dummy carrier DC, in addition to the FOUP (front opening unified pod) that stores the semiconductor wafer W in the closed space, the SMIF (Standard Mechanical Inter Face) pod and the stored semiconductor wafer W are exposed to the outside air. It may be an exposed OC (open cassette).
　また、受渡ロボット１２０は、図１の矢印１２０Ｓにて示すようなスライド移動、矢印１２０Ｒにて示すような旋回動作および昇降動作が可能とされている。これにより、受渡ロボット１２０は、キャリアＣおよびダミーキャリアＤＣに対して半導体ウェハーＷの出し入れを行うとともに、アライメント部２３０および２つの冷却部１３０，１４０に対して半導体ウェハーＷの受け渡しを行う。受渡ロボット１２０によるキャリアＣ（またはダミーキャリアＤＣ）に対する半導体ウェハーＷの出し入れは、ハンド１２１のスライド移動、および、キャリアＣの昇降移動により行われる。また、受渡ロボット１２０とアライメント部２３０または冷却部１３０，１４０との半導体ウェハーＷの受け渡しは、ハンド１２１のスライド移動、および、受渡ロボット１２０の昇降動作によって行われる。 Further, the delivery robot 120 is capable of a sliding movement as shown by an arrow 120S in FIG. 1, a turning operation and an ascending/descending operation as shown by an arrow 120R. As a result, the delivery robot 120 takes the semiconductor wafer W in and out of the carrier C and the dummy carrier DC, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130 and 140. The delivery of the semiconductor wafer W to/from the carrier C (or the dummy carrier DC) by the delivery robot 120 is performed by the sliding movement of the hand 121 and the vertical movement of the carrier C. The delivery of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling units 130 and 140 is performed by sliding the hand 121 and moving the delivery robot 120 up and down.
　アライメント部２３０は、Ｙ軸方向に沿ったインデクサ部１０１の側方に接続されて設けられている。アライメント部２３０は、半導体ウェハーＷを水平面内で回転させてフラッシュ加熱に適切な向きに向ける処理部である。アライメント部２３０は、アルミニウム合金製の筐体であるアライメントチャンバー２３１の内部に、半導体ウェハーＷを水平姿勢に支持して回転させる機構、および、半導体ウェハーＷの周縁部に形成されたノッチやオリフラ等を光学的に検出する機構などを設けて構成される。 The alignment section 230 is connected to the side of the indexer section 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane and orients it in an appropriate direction for flash heating. The alignment unit 230 includes a mechanism for horizontally supporting and rotating the semiconductor wafer W inside an alignment chamber 231 which is a housing made of aluminum alloy, and a notch, an orientation flat, etc. formed in the peripheral portion of the semiconductor wafer W. It is configured by providing a mechanism for optically detecting the.
　アライメント部２３０への半導体ウェハーＷの受け渡しは受渡ロボット１２０によって行われる。受渡ロボット１２０からアライメントチャンバー２３１へはウェハー中心が所定の位置に位置するように半導体ウェハーＷが渡される。アライメント部２３０では、インデクサ部１０１から受け取った半導体ウェハーＷの中心部を回転中心として鉛直方向軸まわりで半導体ウェハーＷを回転させ、ノッチ等を光学的に検出することによって半導体ウェハーＷの向きを調整する。向き調整の終了した半導体ウェハーＷは受渡ロボット１２０によってアライメントチャンバー２３１から取り出される。 The delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120. The semiconductor wafer W is transferred from the transfer robot 120 to the alignment chamber 231 such that the center of the wafer is located at a predetermined position. The alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W about a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do. The semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.
　搬送ロボット１５０による半導体ウェハーＷの搬送空間として搬送ロボット１５０を収容する搬送チャンバー１７０が設けられている。その搬送チャンバー１７０の三方に熱処理部１６０の処理チャンバー６、冷却部１３０の第１クールチャンバー１３１および冷却部１４０の第２クールチャンバー１４１が連通接続されている。 A transfer chamber 170 that houses the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150. The processing chamber 6 of the heat treatment section 160, the first cool chamber 131 of the cooling section 130, and the second cool chamber 141 of the cooling section 140 are connected in communication with the transfer chamber 170 on three sides.
　熱処理装置１００の主要部である熱処理部１６０は、予備加熱を行った半導体ウェハーＷにキセノンフラッシュランプＦＬからの閃光（フラッシュ光）を照射してフラッシュ加熱処理を行う基板処理部である。この熱処理部１６０の構成についてはさらに後述する。 The heat treatment unit 160, which is the main part of the heat treatment apparatus 100, is a substrate processing unit that irradiates the semiconductor wafer W that has been preheated with flash light (flash light) from the xenon flash lamp FL to perform flash heat treatment. The structure of the heat treatment unit 160 will be described later.
　２つの冷却部１３０，１４０は、概ね同様の構成を備える。冷却部１３０，１４０はそれぞれ、アルミニウム合金製の筐体である第１クールチャンバー１３１，第２クールチャンバー１４１の内部に、金属製の冷却プレートと、その上面に載置された石英板とを備える（いずれも図示省略）。当該冷却プレートは、ペルチェ素子または冷却水循環によって１０℃～１５℃に温調されている。熱処理部１６０にてフラッシュ加熱処理が施された半導体ウェハーＷは、第１クールチャンバー１３１または第２クールチャンバー１４１に搬入されて当該石英板に載置されて冷却される。 The two cooling units 130 and 140 have substantially the same configuration. Each of the cooling units 130 and 140 includes a metal cooling plate and a quartz plate placed on the upper surface of the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy housings. (All are not shown). The temperature of the cooling plate is controlled at 10°C to 15°C by a Peltier element or cooling water circulation. The semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment section 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.
　第１クールチャンバー１３１および第２クールチャンバー１４１はともに、インデクサ部１０１と搬送チャンバー１７０との間にて、それらの双方に接続されている。第１クールチャンバー１３１および第２クールチャンバー１４１には、半導体ウェハーＷを搬入出するための２つの開口が形設されている。第１クールチャンバー１３１の２つの開口のうちインデクサ部１０１に接続される開口はゲートバルブ１８１によって開閉可能とされている。一方、第１クールチャンバー１３１の搬送チャンバー１７０に接続される開口はゲートバルブ１８３によって開閉可能とされている。すなわち、第１クールチャンバー１３１とインデクサ部１０１とはゲートバルブ１８１を介して接続され、第１クールチャンバー１３１と搬送チャンバー１７０とはゲートバルブ１８３を介して接続されている。 Both the first cool chamber 131 and the second cool chamber 141 are connected to both of them between the indexer unit 101 and the transfer chamber 170. The first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W. Of the two openings of the first cool chamber 131, the opening connected to the indexer portion 101 can be opened and closed by the gate valve 181. On the other hand, the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer unit 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.
　インデクサ部１０１と第１クールチャンバー１３１との間で半導体ウェハーＷの受け渡しを行う際には、ゲートバルブ１８１が開放される。また、第１クールチャンバー１３１と搬送チャンバー１７０との間で半導体ウェハーＷの受け渡しを行う際には、ゲートバルブ１８３が開放される。ゲートバルブ１８１およびゲートバルブ１８３が閉鎖されているときには、第１クールチャンバー１３１の内部が密閉空間となる。 When the semiconductor wafer W is transferred between the indexer unit 101 and the first cool chamber 131, the gate valve 181 is opened. In addition, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the inside of the first cool chamber 131 becomes a closed space.
　また、第２クールチャンバー１４１の２つの開口のうちインデクサ部１０１に接続される開口はゲートバルブ１８２によって開閉可能とされている。一方、第２クールチャンバー１４１の搬送チャンバー１７０に接続される開口はゲートバルブ１８４によって開閉可能とされている。すなわち、第２クールチャンバー１４１とインデクサ部１０１とはゲートバルブ１８２を介して接続され、第２クールチャンバー１４１と搬送チャンバー１７０とはゲートバルブ１８４を介して接続されている。 Also, of the two openings of the second cool chamber 141, the opening connected to the indexer section 101 can be opened and closed by the gate valve 182. On the other hand, the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer unit 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
　インデクサ部１０１と第２クールチャンバー１４１との間で半導体ウェハーＷの受け渡しを行う際には、ゲートバルブ１８２が開放される。また、第２クールチャンバー１４１と搬送チャンバー１７０との間で半導体ウェハーＷの受け渡しを行う際には、ゲートバルブ１８４が開放される。ゲートバルブ１８２およびゲートバルブ１８４が閉鎖されているときには、第２クールチャンバー１４１の内部が密閉空間となる。 The gate valve 182 is opened when the semiconductor wafer W is transferred between the indexer unit 101 and the second cool chamber 141. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.
　さらに、冷却部１３０，１４０はそれぞれ、第１クールチャンバー１３１，第２クールチャンバー１４１に清浄な窒素ガスを供給するガス供給機構とチャンバー内の雰囲気を排気する排気機構とを備える。これらのガス供給機構および排気機構は、流量を２段階に切り換え可能とされていても良い。 Further, the cooling units 130 and 140 respectively include a gas supply mechanism that supplies clean nitrogen gas to the first cool chamber 131 and the second cool chamber 141, and an exhaust mechanism that exhausts the atmosphere in the chamber. The gas supply mechanism and the exhaust mechanism may be capable of switching the flow rate in two stages.
　搬送チャンバー１７０に設けられた搬送ロボット１５０は、鉛直方向に沿った軸を中心に矢印１５０Ｒにて示すように旋回可能とされる。搬送ロボット１５０は、複数のアームセグメントからなる２つのリンク機構を有し、それら２つのリンク機構の先端にはそれぞれ半導体ウェハーＷを保持する搬送ハンド１５１ａ，１５１ｂが設けられている。これらの搬送ハンド１５１ａ，１５１ｂは上下に所定のピッチだけ隔てて配置され、リンク機構によりそれぞれ独立して同一水平方向に直線的にスライド移動可能とされている。また、搬送ロボット１５０は、２つのリンク機構が設けられるベースを昇降移動することにより、所定のピッチだけ離れた状態のまま２つの搬送ハンド１５１ａ，１５１ｂを昇降移動させる。 The transfer robot 150 provided in the transfer chamber 170 can rotate about an axis along the vertical direction as indicated by an arrow 150R. The transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and transfer hands 151a and 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively. These transport hands 151a and 151b are arranged vertically with a predetermined pitch, and are independently slidable linearly in the same horizontal direction by a link mechanism. Further, the transfer robot 150 moves up and down the base provided with the two link mechanisms to move up and down the two transfer hands 151a and 151b while keeping a distance of a predetermined pitch.
　搬送ロボット１５０が第１クールチャンバー１３１、第２クールチャンバー１４１または熱処理部１６０の処理チャンバー６を受け渡し相手として半導体ウェハーＷの受け渡し（出し入れ）を行う際には、まず、両搬送ハンド１５１ａ，１５１ｂが受け渡し相手と対向するように旋回し、その後（または旋回している間に）昇降移動していずれかの搬送ハンドが受け渡し相手と半導体ウェハーＷを受け渡しする高さに位置する。そして、搬送ハンド１５１ａ（１５１ｂ）を水平方向に直線的にスライド移動させて受け渡し相手と半導体ウェハーＷの受け渡しを行う。 When the transfer robot 150 transfers (removes) the semiconductor wafer W as a transfer partner with the first cool chamber 131, the second cool chamber 141 or the processing chamber 6 of the heat treatment section 160, first, both transfer hands 151a and 151b are transferred. It turns so as to face the delivery partner, and then (or while it is turning) moves up and down, and one of the transfer hands is positioned at a height for delivering the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to and from the transfer partner.
　搬送ロボット１５０と受渡ロボット１２０との半導体ウェハーＷの受け渡しは冷却部１３０，１４０を介して行うことができる。すなわち、冷却部１３０の第１クールチャンバー１３１および冷却部１４０の第２クールチャンバー１４１は、搬送ロボット１５０と受渡ロボット１２０との間で半導体ウェハーＷを受け渡すためのパスとしても機能するものである。具体的には、搬送ロボット１５０または受渡ロボット１２０のうちの一方が第１クールチャンバー１３１または第２クールチャンバー１４１に渡した半導体ウェハーＷを他方が受け取ることによって半導体ウェハーＷの受け渡しが行われる。搬送ロボット１５０および受渡ロボット１２０によって半導体ウェハーＷをキャリアＣから熱処理部１６０にまで搬送する搬送機構が構成される。 Transfer of the semiconductor wafer W between the transfer robot 150 and the transfer robot 120 can be performed via the cooling units 130 and 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as a path for transferring the semiconductor wafer W between the transfer robot 150 and the transfer robot 120. .. Specifically, the semiconductor wafer W is delivered by one of the transfer robot 150 and the delivery robot 120 receiving the semiconductor wafer W delivered to the first cool chamber 131 or the second cool chamber 141. The transfer robot 150 and the transfer robot 120 constitute a transfer mechanism that transfers the semiconductor wafer W from the carrier C to the thermal processing section 160.
　上述したように、第１クールチャンバー１３１および第２クールチャンバー１４１とインデクサ部１０１との間にはそれぞれゲートバルブ１８１，１８２が設けられている。また、搬送チャンバー１７０と第１クールチャンバー１３１および第２クールチャンバー１４１との間にはそれぞれゲートバルブ１８３，１８４が設けられている。さらに、搬送チャンバー１７０と熱処理部１６０の処理チャンバー６との間にはゲートバルブ１８５が設けられている。熱処理装置１００内にて半導体ウェハーＷが搬送される際には、適宜これらのゲートバルブが開閉される。また、搬送チャンバー１７０およびアライメントチャンバー２３１にもガス供給部から窒素ガスが供給されるとともに、それらの内部の雰囲気が排気部によって排気される（いずれも図示省略）。 As described above, the gate valves 181 and 182 are provided between the first cool chamber 131 and the second cool chamber 141 and the indexer unit 101, respectively. Gate valves 183 and 184 are provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively. Further, a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the heat treatment section 160. When the semiconductor wafer W is transferred in the heat treatment apparatus 100, these gate valves are opened/closed appropriately. Further, nitrogen gas is also supplied from the gas supply unit to the transfer chamber 170 and the alignment chamber 231, and the atmosphere inside them is exhausted by the exhaust unit (both not shown).
　次に、熱処理部１６０の構成について説明する。図３は、熱処理部１６０の構成を示す縦断面図である。熱処理部１６０は、半導体ウェハーＷを収容して加熱処理を行う処理チャンバー６と、複数のフラッシュランプＦＬを内蔵するフラッシュランプハウス５と、複数のハロゲンランプＨＬを内蔵するハロゲンランプハウス４と、を備える。処理チャンバー６の上側にフラッシュランプハウス５が設けられるとともに、下側にハロゲンランプハウス４が設けられている。また、熱処理部１６０は、処理チャンバー６の内部に、半導体ウェハーＷを水平姿勢に保持する保持部７と、保持部７と搬送ロボット１５０との間で半導体ウェハーＷの受け渡しを行う移載機構１０と、を備える。 Next, the configuration of the heat treatment section 160 will be described. FIG. 3 is a vertical cross-sectional view showing the configuration of the heat treatment section 160. The heat treatment unit 160 includes a processing chamber 6 that accommodates a semiconductor wafer W and performs heat treatment, a flash lamp house 5 that houses a plurality of flash lamps FL, and a halogen lamp house 4 that houses a plurality of halogen lamps HL. Prepare A flash lamp house 5 is provided above the processing chamber 6, and a halogen lamp house 4 is provided below the processing chamber 6. Further, the heat treatment unit 160 holds the semiconductor wafer W in a horizontal position inside the processing chamber 6, and the transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the transfer robot 150. And
　処理チャンバー６は、筒状のチャンバー側部６１の上下に石英製のチャンバー窓を装着して構成されている。チャンバー側部６１は上下が開口された概略筒形状を有しており、上側開口には上側チャンバー窓６３が装着されて閉塞され、下側開口には下側チャンバー窓６４が装着されて閉塞されている。処理チャンバー６の天井部を構成する上側チャンバー窓６３は、石英により形成された円板形状部材であり、フラッシュランプＦＬから出射されたフラッシュ光を処理チャンバー６内に透過する石英窓として機能する。また、処理チャンバー６の床部を構成する下側チャンバー窓６４も、石英により形成された円板形状部材であり、ハロゲンランプＨＬからの光を処理チャンバー６内に透過する石英窓として機能する。 The processing chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with an opening at the top and bottom, and an upper chamber window 63 is attached and closed at the upper opening, and a lower chamber window 64 is attached and closed at the lower opening. ing. The upper chamber window 63 that constitutes the ceiling of the processing chamber 6 is a disk-shaped member made of quartz, and functions as a quartz window that transmits the flash light emitted from the flash lamp FL into the processing chamber 6. Further, the lower chamber window 64 that forms the floor of the processing chamber 6 is also a disk-shaped member made of quartz, and functions as a quartz window that transmits the light from the halogen lamp HL into the processing chamber 6.
　また、チャンバー側部６１の内側の壁面の上部には反射リング６８が装着され、下部には反射リング６９が装着されている。反射リング６８，６９は、ともに円環状に形成されている。上側の反射リング６８は、チャンバー側部６１の上側から嵌め込むことによって装着される。一方、下側の反射リング６９は、チャンバー側部６１の下側から嵌め込んで図示省略のビスで留めることによって装着される。すなわち、反射リング６８，６９は、ともに着脱自在にチャンバー側部６１に装着されるものである。処理チャンバー６の内側空間、すなわち上側チャンバー窓６３、下側チャンバー窓６４、チャンバー側部６１および反射リング６８，６９によって囲まれる空間が熱処理空間６５として規定される。 Also, a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. Both the reflection rings 68 and 69 are formed in an annular shape. The upper reflection ring 68 is attached by being fitted from above the chamber side portion 61. On the other hand, the lower reflection ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw not shown. That is, both the reflection rings 68 and 69 are detachably attached to the chamber side portion 61. An inner space of the processing chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.
　チャンバー側部６１に反射リング６８，６９が装着されることによって、処理チャンバー６の内壁面に凹部６２が形成される。すなわち、チャンバー側部６１の内壁面のうち反射リング６８，６９が装着されていない中央部分と、反射リング６８の下端面と、反射リング６９の上端面とで囲まれた凹部６２が形成される。凹部６２は、処理チャンバー６の内壁面に水平方向に沿って円環状に形成され、半導体ウェハーＷを保持する保持部７を囲繞する。チャンバー側部６１および反射リング６８，６９は、強度と耐熱性に優れた金属材料（例えば、ステンレススチール）にて形成されている。 By mounting the reflection rings 68 and 69 on the chamber side portion 61, the concave portion 62 is formed on the inner wall surface of the processing chamber 6. That is, a concave portion 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not attached, a lower end surface of the reflection ring 68 and an upper end surface of the reflection ring 69 is formed. .. The concave portion 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the processing chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
　また、チャンバー側部６１には、処理チャンバー６に対して半導体ウェハーＷの搬入および搬出を行うための搬送開口部（炉口）６６が形設されている。搬送開口部６６は、ゲートバルブ１８５によって開閉可能とされている。搬送開口部６６は凹部６２の外周面に連通接続されている。このため、ゲートバルブ１８５が搬送開口部６６を開放しているときには、搬送開口部６６から凹部６２を通過して熱処理空間６５への半導体ウェハーＷの搬入および熱処理空間６５からの半導体ウェハーＷの搬出を行うことができる。また、ゲートバルブ１８５が搬送開口部６６を閉鎖すると処理チャンバー６内の熱処理空間６５が密閉空間とされる。 A transfer opening (furnace) 66 for loading and unloading the semiconductor wafer W into and from the processing chamber 6 is formed on the chamber side 61. The transfer opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out of the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.
　また、処理チャンバー６の内壁上部には熱処理空間６５に処理ガスを供給するガス供給孔８１が形設されている。ガス供給孔８１は、凹部６２よりも上側位置に形設されており、反射リング６８に設けられていても良い。ガス供給孔８１は処理チャンバー６の側壁内部に円環状に形成された緩衝空間８２を介してガス供給管８３に連通接続されている。ガス供給管８３は処理ガス供給源８５に接続されている。また、ガス供給管８３の経路途中にはバルブ８４が介挿されている。バルブ８４が開放されると、処理ガス供給源８５から緩衝空間８２に処理ガスが送給される。緩衝空間８２に流入した処理ガスは、ガス供給孔８１よりも流体抵抗の小さい緩衝空間８２内を拡がるように流れてガス供給孔８１から熱処理空間６５内へと供給される。処理ガスとしては、窒素（Ｎ２）等の不活性ガス、または、水素（Ｈ２）、アンモニア（ＮＨ３）等の反応性ガスを用いることができる（本実施形態では窒素）。 Further, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the processing chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is communicatively connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the sidewall of the processing chamber 6. The gas supply pipe 83 is connected to the processing gas supply source 85. Further, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows so as to spread in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65. As the processing gas, an inert gas such as nitrogen (N 2 ) or a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ) can be used (nitrogen in this embodiment).
　一方、処理チャンバー６の内壁下部には熱処理空間６５内の気体を排気するガス排気孔８６が形設されている。ガス排気孔８６は、凹部６２よりも下側位置に形設されており、反射リング６９に設けられていても良い。ガス排気孔８６は処理チャンバー６の側壁内部に円環状に形成された緩衝空間８７を介してガス排気管８８に連通接続されている。ガス排気管８８は排気機構１９０に接続されている。また、ガス排気管８８の経路途中にはバルブ８９が介挿されている。バルブ８９が開放されると、熱処理空間６５の気体がガス排気孔８６から緩衝空間８７を経てガス排気管８８へと排出される。なお、ガス供給孔８１およびガス排気孔８６は、処理チャンバー６の周方向に沿って複数設けられていても良いし、スリット状のものであっても良い。また、処理ガス供給源８５および排気機構１９０は、熱処理装置１００に設けられた機構であっても良いし、熱処理装置１００が設置される工場のユーティリティであっても良い。 On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the processing chamber 6. The gas exhaust hole 86 is formed at a position lower than the recess 62, and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6. The gas exhaust pipe 88 is connected to the exhaust mechanism 190. A valve 89 is inserted in the middle of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87. The gas supply holes 81 and the gas exhaust holes 86 may be provided in plural along the circumferential direction of the processing chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust mechanism 190 may be a mechanism provided in the heat treatment apparatus 100 or a utility of a factory in which the heat treatment apparatus 100 is installed.
　また、搬送開口部６６の先端にも熱処理空間６５内の気体を排出するガス排気管１９１が接続されている。ガス排気管１９１はバルブ１９２を介して排気機構１９０に接続されている。バルブ１９２を開放することによって、搬送開口部６６を介して処理チャンバー６内の気体が排気される。 A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the processing chamber 6 is exhausted through the transfer opening 66.
　図４は、保持部７の全体外観を示す斜視図である。保持部７は、基台リング７１、連結部７２およびサセプタ７４を備えて構成される。基台リング７１、連結部７２およびサセプタ７４はいずれも石英にて形成されている。すなわち、保持部７の全体が石英にて形成されている。 FIG. 4 is a perspective view showing the overall appearance of the holding unit 7. The holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.
　基台リング７１は円環形状から一部が欠落した円弧形状の石英部材である。この欠落部分は、後述する移載機構１０の移載アーム１１と基台リング７１との干渉を防ぐために設けられている。基台リング７１は凹部６２の底面に載置されることによって、処理チャンバー６の壁面に支持されることとなる（図３参照）。基台リング７１の上面に、その円環形状の周方向に沿って複数の連結部７２（本実施形態では４個）が立設される。連結部７２も石英の部材であり、溶接によって基台リング７１に固着される。 The base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 and the base ring 71 which will be described later. By mounting the base ring 71 on the bottom surface of the recess 62, the base ring 71 is supported on the wall surface of the processing chamber 6 (see FIG. 3 ). On the upper surface of the base ring 71, a plurality of connecting portions 72 (four in this embodiment) are provided upright along the circumferential direction of the annular shape. The connecting portion 72 is also a quartz member and is fixed to the base ring 71 by welding.
　サセプタ７４は基台リング７１に設けられた４個の連結部７２によって支持される。図５は、サセプタ７４の平面図である。また、図６は、サセプタ７４の断面図である。サセプタ７４は、保持プレート７５、ガイドリング７６および複数の基板支持ピン７７を備える。保持プレート７５は、石英にて形成された略円形の平板状部材である。保持プレート７５の直径は半導体ウェハーＷの直径よりも大きい。すなわち、保持プレート７５は、半導体ウェハーＷよりも大きな平面サイズを有する。 The susceptor 74 is supported by the four connecting portions 72 provided on the base ring 71. FIG. 5 is a plan view of the susceptor 74. Further, FIG. 6 is a sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.
　保持プレート７５の上面周縁部にガイドリング７６が設置されている。ガイドリング７６は、半導体ウェハーＷの直径よりも大きな内径を有する円環形状の部材である。例えば、半導体ウェハーＷの直径がφ３００ｍｍの場合、ガイドリング７６の内径はφ３２０ｍｍである。ガイドリング７６の内周は、保持プレート７５から上方に向けて広くなるようなテーパ面とされている。ガイドリング７６は、保持プレート７５と同様の石英にて形成される。ガイドリング７６は、保持プレート７５の上面に溶着するようにしても良いし、別途加工したピンなどによって保持プレート７５に固定するようにしても良い。或いは、保持プレート７５とガイドリング７６とを一体の部材として加工するようにしても良い。 A guide ring 76 is installed on the peripheral portion of the upper surface of the holding plate 75. The guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is 300 mm, the inner diameter of the guide ring 76 is 320 mm. The inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75. The guide ring 76 is made of quartz like the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
　保持プレート７５の上面のうちガイドリング７６よりも内側の領域が半導体ウェハーＷを保持する平面状の保持面７５ａとされる。保持プレート７５の保持面７５ａには、複数の基板支持ピン７７が立設されている。本実施形態においては、保持面７５ａの外周円（ガイドリング７６の内周円）と同心円の周上に沿って３０°毎に計１２個の基板支持ピン７７が立設されている。１２個の基板支持ピン７７を配置した円の径（対向する基板支持ピン７７間の距離）は半導体ウェハーＷの径よりも小さく、半導体ウェハーＷの径がφ３００ｍｍであればφ２７０ｍｍ～φ２８０ｍｍ（本実施形態ではφ２７０ｍｍ）である。それぞれの基板支持ピン７７は石英にて形成されている。複数の基板支持ピン７７は、保持プレート７５の上面に溶接によって設けるようにしても良いし、保持プレート７５と一体に加工するようにしても良い。 An area inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75 a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In this embodiment, a total of twelve substrate support pins 77 are erected at every 30° along the circumference of a concentric circle with the outer circumference circle of the holding surface 75a (the inner circumference circle of the guide ring 76). The diameter of the circle in which the twelve substrate support pins 77 are arranged (distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is φ300 mm, φ270 mm to φ280 mm (this embodiment In the form, it is φ270 mm). Each substrate support pin 77 is made of quartz. The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.
　図４に戻り、基台リング７１に立設された４個の連結部７２とサセプタ７４の保持プレート７５の周縁部とが溶接によって固着される。すなわち、サセプタ７４と基台リング７１とは連結部７２によって固定的に連結されている。このような保持部７の基台リング７１が処理チャンバー６の壁面に支持されることによって、保持部７が処理チャンバー６に装着される。保持部７が処理チャンバー６に装着された状態においては、サセプタ７４の保持プレート７５は水平姿勢（法線が鉛直方向と一致する姿勢）となる。すなわち、保持プレート７５の保持面７５ａは水平面となる。 Returning to FIG. 4, the four connecting portions 72 erected on the base ring 71 and the peripheral portion of the holding plate 75 of the susceptor 74 are fixed to each other by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. By supporting the base ring 71 of the holding unit 7 on the wall surface of the processing chamber 6, the holding unit 7 is attached to the processing chamber 6. When the holding unit 7 is attached to the processing chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). That is, the holding surface 75a of the holding plate 75 becomes a horizontal surface.
　処理チャンバー６に搬入された半導体ウェハーＷは、処理チャンバー６に装着された保持部７のサセプタ７４の上に水平姿勢にて載置されて保持される。このとき、半導体ウェハーＷは保持プレート７５上に立設された１２個の基板支持ピン７７によって支持されてサセプタ７４に保持される。より厳密には、１２個の基板支持ピン７７の上端部が半導体ウェハーＷの下面に接触して当該半導体ウェハーＷを支持する。１２個の基板支持ピン７７の高さ（基板支持ピン７７の上端から保持プレート７５の保持面７５ａまでの距離）は均一であるため、１２個の基板支持ピン７７によって半導体ウェハーＷを水平姿勢に支持することができる。 The semiconductor wafer W loaded into the processing chamber 6 is horizontally placed and held on the susceptor 74 of the holding unit 7 mounted in the processing chamber 6. At this time, the semiconductor wafer W is held by the susceptor 74 while being supported by twelve substrate support pins 77 provided upright on the holding plate 75. More precisely, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the twelve substrate support pins 77 (the distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 bring the semiconductor wafer W into a horizontal posture. Can be supported.
　また、半導体ウェハーＷは複数の基板支持ピン７７によって保持プレート７５の保持面７５ａから所定の間隔を隔てて支持されることとなる。基板支持ピン７７の高さよりもガイドリング７６の厚さの方が大きい。従って、複数の基板支持ピン７７によって支持された半導体ウェハーＷの水平方向の位置ずれはガイドリング７６によって防止される。 Further, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
　また、図４および図５に示すように、サセプタ７４の保持プレート７５には、上下に貫通して開口部７８が形成されている。開口部７８は、端縁部放射温度計２０（図３参照）がサセプタ７４に保持された半導体ウェハーＷの下面から放射される放射光（赤外光）を受光するために設けられている。すなわち、端縁部放射温度計２０が開口部７８を介してサセプタ７４に保持された半導体ウェハーＷの下面から放射された光を受光してその半導体ウェハーＷの温度を測定する。さらに、サセプタ７４の保持プレート７５には、後述する移載機構１０のリフトピン１２が半導体ウェハーＷの受け渡しのために貫通する４個の貫通孔７９が穿設されている。 Further, as shown in FIGS. 4 and 5, the holding plate 75 of the susceptor 74 is formed with an opening 78 penetrating vertically. The opening 78 is provided for the edge radiation thermometer 20 (see FIG. 3) to receive radiant light (infrared light) radiated from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the edge radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 and measures the temperature of the semiconductor wafer W. Further, the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pins 12 of the transfer mechanism 10 to be described later pass through for the delivery of the semiconductor wafer W.
　図７は、移載機構１０の平面図である。また、図８は、移載機構１０の側面図である。移載機構１０は、２本の移載アーム１１を備える。移載アーム１１は、概ね円環状の凹部６２に沿うような円弧形状とされている。それぞれの移載アーム１１には２本のリフトピン１２が立設されている。各移載アーム１１は水平移動機構１３によって回動可能とされている。水平移動機構１３は、一対の移載アーム１１を保持部７に対して半導体ウェハーＷの移載を行う移載動作位置（図７の実線位置）と保持部７に保持された半導体ウェハーＷと平面視で重ならない退避位置（図７の二点鎖線位置）との間で水平移動させる。移載動作位置はサセプタ７４の下方であり、退避位置はサセプタ７４よりも外方である。水平移動機構１３としては、個別のモータによって各移載アーム１１をそれぞれ回動させるものであっても良いし、リンク機構を用いて１個のモータによって一対の移載アーム１１を連動させて回動させるものであっても良い。 FIG. 7 is a plan view of the transfer mechanism 10. FIG. 8 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arcuate shape that follows the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 includes a transfer operation position (solid line position in FIG. 7) at which the pair of transfer arms 11 transfers the semiconductor wafer W to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is horizontally moved to and from the retracted position (the position indicated by the chain double-dashed line in FIG. 7) that does not overlap in plan view. The transfer operation position is below the susceptor 74, and the retracted position is outside the susceptor 74. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be rotated by one motor using a link mechanism. It may be a moving one.
　また、一対の移載アーム１１は、昇降機構１４によって水平移動機構１３とともに昇降移動される。昇降機構１４が一対の移載アーム１１を移載動作位置にて上昇させると、計４本のリフトピン１２がサセプタ７４に穿設された貫通孔７９（図４，５参照）を通過し、リフトピン１２の上端がサセプタ７４の上面から突き出る。一方、昇降機構１４が一対の移載アーム１１を移載動作位置にて下降させてリフトピン１２を貫通孔７９から抜き取り、水平移動機構１３が一対の移載アーム１１を開くように移動させると各移載アーム１１が退避位置に移動する。一対の移載アーム１１の退避位置は、保持部７の基台リング７１の直上である。基台リング７１は凹部６２の底面に載置されているため、移載アーム１１の退避位置は凹部６２の内側となる。なお、移載機構１０の駆動部（水平移動機構１３および昇降機構１４）が設けられている部位の近傍にも図示省略の排気機構が設けられており、移載機構１０の駆動部周辺の雰囲気が処理チャンバー６の外部に排出されるように構成されている。 Further, the pair of transfer arms 11 is moved up and down by the elevating mechanism 14 together with the horizontal moving mechanism 13. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74 and the lift pins are lifted. The upper end of 12 projects from the upper surface of the susceptor 74. On the other hand, when the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to extract the lift pin 12 from the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 to open. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is immediately above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 is inside the recess 62. An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Are discharged to the outside of the processing chamber 6.
　図３に戻り、熱処理部１６０は端縁部放射温度計（エッジパイロメーター）２０および中央部放射温度計（センターパイロメーター）２５の２つの放射温度計を備える。上述の通り、端縁部放射温度計２０は、サセプタ７４の開口部７８を介して半導体ウェハーＷの下面から放射された赤外光を受光し、その赤外光の強度から半導体ウェハーＷの温度を測定するウェハー温度計である。一方、中央部放射温度計２５は、サセプタ７４の中央部から放射された赤外光を受光し、その赤外光の強度からサセプタ７４の温度を測定するサセプタ温度計である。なお、図示の便宜上、図３では端縁部放射温度計２０および中央部放射温度計２５を処理チャンバー６の内部に記載しているが、これらはいずれも処理チャンバー６の外壁面に取り付けられ、外壁面に設けられた貫通孔を通して赤外光を受光する。 Returning to FIG. 3, the heat treatment section 160 includes two radiation thermometers, an edge radiation thermometer (edge pyrometer) 20 and a central radiation thermometer (center pyrometer) 25. As described above, the edge radiation thermometer 20 receives the infrared light emitted from the lower surface of the semiconductor wafer W through the opening 78 of the susceptor 74, and determines the temperature of the semiconductor wafer W from the intensity of the infrared light. Is a wafer thermometer for measuring. On the other hand, the central radiation thermometer 25 is a susceptor thermometer that receives infrared light emitted from the central portion of the susceptor 74 and measures the temperature of the susceptor 74 from the intensity of the infrared light. Note that, for convenience of illustration, in FIG. 3, the edge radiation thermometer 20 and the central radiation thermometer 25 are shown inside the processing chamber 6, but these are both attached to the outer wall surface of the processing chamber 6, Infrared light is received through a through hole provided on the outer wall surface.
　処理チャンバー６の上方に設けられたフラッシュランプハウス５は、筐体５１の内側に、複数本（本実施形態では３０本）のキセノンフラッシュランプＦＬからなる光源と、その光源の上方を覆うように設けられたリフレクタ５２と、を備えて構成される。また、フラッシュランプハウス５の筐体５１の底部にはランプ光放射窓５３が装着されている。フラッシュランプハウス５の床部を構成するランプ光放射窓５３は、石英により形成された板状の石英窓である。フラッシュランプハウス５が処理チャンバー６の上方に設置されることにより、ランプ光放射窓５３が上側チャンバー窓６３と相対向することとなる。フラッシュランプＦＬは処理チャンバー６の上方からランプ光放射窓５３および上側チャンバー窓６３を介して熱処理空間６５にフラッシュ光を照射する。 The flash lamp house 5 provided above the processing chamber 6 covers a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL and an upper portion of the light source inside the housing 51. The reflector 52 provided is provided. A lamp light emitting window 53 is attached to the bottom of the housing 51 of the flash lamp house 5. The lamp light emitting window 53 that forms the floor of the flash lamp house 5 is a plate-shaped quartz window made of quartz. Since the flash lamp house 5 is installed above the processing chamber 6, the lamp light emitting window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the lamp light emission window 53 and the upper chamber window 63.
　複数のフラッシュランプＦＬは、それぞれが長尺の円筒形状を有する棒状ランプであり、それぞれの長手方向が保持部７に保持される半導体ウェハーＷの主面に沿って（つまり水平方向に沿って）互いに平行となるように平面状に配列されている。よって、フラッシュランプＦＬの配列によって形成される平面も水平面である。 The plurality of flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and each longitudinal direction is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
　キセノンフラッシュランプＦＬは、その内部にキセノンガスが封入されその両端部にコンデンサーに接続された陽極および陰極が配設された棒状のガラス管（放電管）と、該ガラス管の外周面上に付設されたトリガー電極とを備える。キセノンガスは電気的には絶縁体であることから、コンデンサーに電荷が蓄積されていたとしても通常の状態ではガラス管内に電気は流れない。しかしながら、トリガー電極に高電圧を印加して絶縁を破壊した場合には、コンデンサーに蓄えられた電気がガラス管内に瞬時に流れ、そのときのキセノンの原子あるいは分子の励起によって光が放出される。このようなキセノンフラッシュランプＦＬにおいては、予めコンデンサーに蓄えられていた静電エネルギーが０．１ミリセカンドないし１００ミリセカンドという極めて短い光パルスに変換されることから、ハロゲンランプＨＬの如き連続点灯の光源に比べて極めて強い光を照射し得るという特徴を有する。すなわち、フラッシュランプＦＬは、１秒未満の極めて短い時間で瞬間的に発光するパルス発光ランプである。なお、フラッシュランプＦＬの発光時間は、フラッシュランプＦＬに電力供給を行うランプ電源のコイル定数によって調整することができる。 The xenon flash lamp FL is provided with a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends of the glass tube and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow in the glass tube in a normal state even if electric charges are accumulated in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time. In such a xenon flash lamp FL, since the electrostatic energy stored in the condenser in advance is converted into an extremely short light pulse of 0.1 millisecond to 100 millisecond, continuous lighting such as the halogen lamp HL is performed. It has a feature that it can emit extremely strong light as compared with a light source. That is, the flash lamp FL is a pulse emission lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
　また、リフレクタ５２は、複数のフラッシュランプＦＬの上方にそれら全体を覆うように設けられている。リフレクタ５２の基本的な機能は、複数のフラッシュランプＦＬから出射されたフラッシュ光を熱処理空間６５の側に反射するというものである。リフレクタ５２はアルミニウム合金板にて形成されており、その表面（フラッシュランプＦＬに臨む側の面）はブラスト処理により粗面化加工が施されている。 Further, the reflector 52 is provided above the plurality of flash lamps FL so as to cover them all. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.
　処理チャンバー６の下方に設けられたハロゲンランプハウス４は、筐体４１の内側に複数本（本実施形態では４０本）のハロゲンランプＨＬを内蔵している。複数のハロゲンランプＨＬは処理チャンバー６の下方から下側チャンバー窓６４を介して熱処理空間６５への光照射を行う。 The halogen lamp house 4 provided below the processing chamber 6 has a plurality of (40 in the present embodiment) halogen lamps HL incorporated inside the housing 41. The halogen lamps HL irradiate the heat treatment space 65 from below the processing chamber 6 through the lower chamber window 64.
　図９は、複数のハロゲンランプＨＬの配置を示す平面図である。本実施形態では、上下２段に各２０本ずつのハロゲンランプＨＬが配設されている。各ハロゲンランプＨＬは、長尺の円筒形状を有する棒状ランプである。上段、下段ともに２０本のハロゲンランプＨＬは、それぞれの長手方向が保持部７に保持される半導体ウェハーＷの主面に沿って（つまり水平方向に沿って）互いに平行となるように配列されている。よって、上段、下段ともにハロゲンランプＨＬの配列によって形成される平面は水平面である。 FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL. In this embodiment, 20 halogen lamps HL are provided in each of the upper and lower two stages. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. In both the upper and lower rows, the 20 halogen lamps HL are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.
　また、図９に示すように、上段、下段ともに保持部７に保持される半導体ウェハーＷの中央部に対向する領域よりも周縁部に対向する領域におけるハロゲンランプＨＬの配設密度が高くなっている。すなわち、上下段ともに、ランプ配列の中央部よりも周縁部の方がハロゲンランプＨＬの配設ピッチが短い。このため、ハロゲンランプＨＬからの光照射による加熱時に温度低下が生じやすい半導体ウェハーＷの周縁部により多い光量の照射を行うことができる。 Further, as shown in FIG. 9, the arrangement density of the halogen lamps HL is higher in the region facing the peripheral portion than in the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. There is. That is, in both the upper and lower stages, the halogen lamps HL are arranged at a shorter pitch in the peripheral portion than in the central portion of the lamp array. Therefore, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W, where the temperature tends to decrease during heating by irradiation with light from the halogen lamp HL.
　また、上段のハロゲンランプＨＬからなるランプ群と下段のハロゲンランプＨＬからなるランプ群とが格子状に交差するように配列されている。すなわち、上段の各ハロゲンランプＨＬの長手方向と下段の各ハロゲンランプＨＬの長手方向とが直交するように計４０本のハロゲンランプＨＬが配設されている。 Also, the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each upper halogen lamp HL and the longitudinal direction of each lower halogen lamp HL are orthogonal to each other.
　ハロゲンランプＨＬは、ガラス管内部に配設されたフィラメントに通電することでフィラメントを白熱化させて発光させるフィラメント方式の光源である。ガラス管の内部には、窒素やアルゴン等の不活性ガスにハロゲン元素（ヨウ素、臭素等）を微量導入した気体が封入されている。ハロゲン元素を導入することによって、フィラメントの折損を抑制しつつフィラメントの温度を高温に設定することが可能となる。したがって、ハロゲンランプＨＬは、通常の白熱電球に比べて寿命が長くかつ強い光を連続的に照射できるという特性を有する。すなわち、ハロゲンランプＨＬは少なくとも１秒以上連続して発光する連続点灯ランプである。また、ハロゲンランプＨＬは棒状ランプであるため長寿命であり、ハロゲンランプＨＬを水平方向に沿わせて配置することにより上方の半導体ウェハーＷへの放射効率が優れたものとなる。 The halogen lamp HL is a filament type light source that energizes the filament arranged inside the glass tube to incandescent the filament to emit light. The glass tube is filled with a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon. By introducing the halogen element, it becomes possible to set the temperature of the filament to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a long life and can continuously emit strong light as compared with an ordinary incandescent lamp. That is, the halogen lamp HL is a continuous lighting lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life. By arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.
　また、ハロゲンランプハウス４の筐体４１内にも、２段のハロゲンランプＨＬの下側にリフレクタ４３が設けられている（図３）。リフレクタ４３は、複数のハロゲンランプＨＬから出射された光を熱処理空間６５の側に反射する。 Also, inside the housing 41 of the halogen lamp house 4, a reflector 43 is provided below the two-stage halogen lamp HL (FIG. 3). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
　制御部３は、熱処理装置１００に設けられた上記の種々の動作機構を制御する。制御部３のハードウェアとしての構成は一般的なコンピュータと同様である。すなわち、制御部３は、各種演算処理を行う回路であるＣＰＵ、基本プログラムを記憶する読み出し専用のメモリであるＲＯＭ、各種情報を記憶する読み書き自在のメモリであるＲＡＭおよび制御用ソフトウェアやデータなどを記憶しておく磁気ディスクを備えている。制御部３のＣＰＵが所定の処理プログラムを実行することによって熱処理装置１００における処理が進行する。なお、図１においては、インデクサ部１０１内に制御部３を示しているが、これに限定されるものではなく、制御部３は熱処理装置１００内の任意の位置に配置することができる。 The control unit 3 controls the above-described various operating mechanisms provided in the heat treatment apparatus 100. The hardware configuration of the control unit 3 is similar to that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores a basic program, a RAM that is a readable/writable memory that stores various information, and control software and data. It is equipped with a magnetic disk for storage. The processing in the heat treatment apparatus 100 progresses as the CPU of the control unit 3 executes a predetermined processing program. Although the control unit 3 is shown in the indexer unit 101 in FIG. 1, the present invention is not limited to this, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100.
　上記の構成以外にも熱処理部１６０は、半導体ウェハーＷの熱処理時にハロゲンランプＨＬおよびフラッシュランプＦＬから発生する熱エネルギーによるハロゲンランプハウス４、フラッシュランプハウス５および処理チャンバー６の過剰な温度上昇を防止するため、様々な冷却用の構造を備えている。例えば、処理チャンバー６の壁体には水冷管（図示省略）が設けられている。また、ハロゲンランプハウス４およびフラッシュランプハウス５は、内部に気体流を形成して排熱する空冷構造とされている。また、上側チャンバー窓６３とランプ光放射窓５３との間隙にも空気が供給され、フラッシュランプハウス５および上側チャンバー窓６３を冷却する。 In addition to the above configuration, the heat treatment unit 160 prevents an excessive temperature rise of the halogen lamp house 4, the flash lamp house 5 and the processing chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided. For example, the wall of the processing chamber 6 is provided with a water cooling pipe (not shown). Further, the halogen lamp house 4 and the flash lamp house 5 have an air cooling structure that forms a gas flow inside and exhausts heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emitting window 53 to cool the flash lamp house 5 and the upper chamber window 63.
　次に、本発明に係る熱処理装置１００の処理動作について説明する。ここでは、製品となる半導体ウェハー（プロダクトウェハー）Ｗに対する通常の処理動作について説明した後、ダミーウェハーＤＷを用いた温調処理について説明する。処理対象となる半導体ウェハーＷはイオン注入法により不純物（イオン）が添加された半導体基板である。その不純物の活性化が熱処理装置１００によるフラッシュ光照射加熱処理（アニール）により実行される。 Next, the processing operation of the heat treatment apparatus 100 according to the present invention will be described. Here, a normal processing operation for a semiconductor wafer (product wafer) W as a product will be described, and then temperature control processing using a dummy wafer DW will be described. The semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) have been added by the ion implantation method. The activation of the impurities is performed by a flash light irradiation heat treatment (annealing) by the heat treatment device 100.
　まず、不純物が注入された未処理の半導体ウェハーＷがキャリアＣに複数枚収容された状態でインデクサ部１０１の第１ロードポート１１０ａまたは第２ロードポート１１０ｂに載置される。そして、受渡ロボット１２０がキャリアＣから未処理の半導体ウェハーＷを１枚ずつ取り出し、アライメント部２３０のアライメントチャンバー２３１に搬入する。アライメントチャンバー２３１では、半導体ウェハーＷをその中心部を回転中心として水平面内にて鉛直方向軸まわりで回転させ、ノッチ等を光学的に検出することによって半導体ウェハーＷの向きを調整する。 First, a plurality of unprocessed semiconductor wafers W into which impurities have been injected are placed in the carrier C and placed on the first load port 110a or the second load port 110b of the indexer unit 101. Then, the delivery robot 120 takes out the unprocessed semiconductor wafers W one by one from the carrier C and carries them into the alignment chamber 231 of the alignment section 230. In the alignment chamber 231, the semiconductor wafer W is rotated about a vertical axis in a horizontal plane with the center of the semiconductor wafer W as a center of rotation, and the notch or the like is optically detected to adjust the orientation of the semiconductor wafer W.
　次に、インデクサ部１０１の受渡ロボット１２０がアライメントチャンバー２３１から向きの調整された半導体ウェハーＷを取り出し、冷却部１３０の第１クールチャンバー１３１または冷却部１４０の第２クールチャンバー１４１に搬入する。第１クールチャンバー１３１または第２クールチャンバー１４１に搬入された未処理の半導体ウェハーＷは搬送ロボット１５０によって搬送チャンバー１７０に搬出される。未処理の半導体ウェハーＷがインデクサ部１０１から第１クールチャンバー１３１または第２クールチャンバー１４１を経て搬送チャンバー１７０に移送される際には、第１クールチャンバー１３１および第２クールチャンバー１４１は半導体ウェハーＷの受け渡しのためのパスとして機能するのである。 Next, the delivery robot 120 of the indexer unit 101 takes out the semiconductor wafer W whose orientation has been adjusted from the alignment chamber 231, and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. The unprocessed semiconductor wafer W loaded into the first cool chamber 131 or the second cool chamber 141 is unloaded into the transfer chamber 170 by the transfer robot 150. When the unprocessed semiconductor wafer W is transferred from the indexer unit 101 to the transfer chamber 170 via the first cool chamber 131 or the second cool chamber 141, the first cool chamber 131 and the second cool chamber 141 are not connected to each other. Function as a pass for the delivery of.
　半導体ウェハーＷを取り出した搬送ロボット１５０は熱処理部１６０を向くように旋回する。続いて、ゲートバルブ１８５が処理チャンバー６と搬送チャンバー１７０との間を開放し、搬送ロボット１５０が未処理の半導体ウェハーＷを処理チャンバー６に搬入する。このときに、先行する加熱処理済みの半導体ウェハーＷが処理チャンバー６に存在している場合には、搬送ハンド１５１ａ，１５１ｂの一方によって加熱処理後の半導体ウェハーＷを取り出してから未処理の半導体ウェハーＷを処理チャンバー６に搬入してウェハー入れ替えを行う。その後、ゲートバルブ１８５が処理チャンバー６と搬送チャンバー１７０との間を閉鎖する。 The transfer robot 150 that takes out the semiconductor wafer W turns so as to face the heat treatment unit 160. Subsequently, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if the preceding heat-treated semiconductor wafer W is present in the processing chamber 6, the heat-treated semiconductor wafer W is taken out by one of the transfer hands 151a and 151b, and then the untreated semiconductor wafer W is removed. W is carried into the processing chamber 6 and the wafers are exchanged. After that, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
　処理チャンバー６に搬入された半導体ウェハーＷには、ハロゲンランプＨＬによって予備加熱が行われた後、フラッシュランプＦＬからのフラッシュ光照射によってフラッシュ加熱処理が行われる。このフラッシュ加熱処理により半導体ウェハーＷに注入された不純物の活性化が行われる。 The semiconductor wafer W loaded into the processing chamber 6 is preheated by the halogen lamp HL, and then flash-heated by irradiation with flash light from the flash lamp FL. This flash heat treatment activates the impurities implanted in the semiconductor wafer W.
　フラッシュ加熱処理が終了した後、ゲートバルブ１８５が処理チャンバー６と搬送チャンバー１７０との間を再び開放し、搬送ロボット１５０が処理チャンバー６からフラッシュ加熱処理後の半導体ウェハーＷを搬送チャンバー１７０に搬出する。半導体ウェハーＷを取り出した搬送ロボット１５０は、処理チャンバー６から第１クールチャンバー１３１または第２クールチャンバー１４１に向くように旋回する。また、ゲートバルブ１８５が処理チャンバー６と搬送チャンバー１７０との間を閉鎖する。 After the flash heating process is completed, the gate valve 185 reopens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 carries out the semiconductor wafer W after the flash heating process from the processing chamber 6 to the transfer chamber 170. .. The transfer robot 150 that has taken out the semiconductor wafer W revolves from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141. Further, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.
　その後、搬送ロボット１５０が加熱処理後の半導体ウェハーＷを冷却部１３０の第１クールチャンバー１３１または冷却部１４０の第２クールチャンバー１４１に搬入する。このとき、当該半導体ウェハーＷが加熱処理前に第１クールチャンバー１３１を通ってきている場合には加熱処理後にも第１クールチャンバー１３１に搬入され、加熱処理前に第２クールチャンバー１４１を通ってきている場合には加熱処理後にも第２クールチャンバー１４１に搬入される。第１クールチャンバー１３１または第２クールチャンバー１４１では、フラッシュ加熱処理後の半導体ウェハーＷの冷却処理が行われる。熱処理部１６０の処理チャンバー６から搬出された時点での半導体ウェハーＷ全体の温度は比較的高温であるため、これを第１クールチャンバー１３１または第２クールチャンバー１４１にて常温近傍にまで冷却するのである。 Thereafter, the transfer robot 150 carries the semiconductor wafer W after the heat treatment into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. At this time, when the semiconductor wafer W has passed through the first cool chamber 131 before the heat treatment, it is carried into the first cool chamber 131 even after the heat treatment, and passes through the second cool chamber 141 before the heat treatment. In that case, it is carried into the second cool chamber 141 even after the heat treatment. In the first cool chamber 131 or the second cool chamber 141, the cooling process of the semiconductor wafer W after the flash heating process is performed. Since the temperature of the entire semiconductor wafer W is relatively high at the time of being unloaded from the processing chamber 6 of the heat treatment unit 160, it is cooled to near room temperature in the first cool chamber 131 or the second cool chamber 141. is there.
　所定の冷却処理時間が経過した後、受渡ロボット１２０が冷却後の半導体ウェハーＷを第１クールチャンバー１３１または第２クールチャンバー１４１から搬出し、キャリアＣへと返却する。キャリアＣに所定枚数の処理済み半導体ウェハーＷが収容されると、そのキャリアＣはインデクサ部１０１の第１ロードポート１１０ａまたは第２ロードポート１１０ｂから搬出される。 After the lapse of a predetermined cooling processing time, the delivery robot 120 carries out the cooled semiconductor wafer W from the first cool chamber 131 or the second cool chamber 141 and returns it to the carrier C. When a predetermined number of processed semiconductor wafers W are accommodated in the carrier C, the carrier C is unloaded from the first load port 110a or the second load port 110b of the indexer unit 101.
　熱処理部１６０における加熱処理について説明を続ける。処理チャンバー６への半導体ウェハーＷの搬入に先立って、給気のためのバルブ８４が開放されるとともに、排気用のバルブ８９，１９２が開放されて処理チャンバー６内に対する給排気が開始される。バルブ８４が開放されると、ガス供給孔８１から熱処理空間６５に窒素ガスが供給される。また、バルブ８９が開放されると、ガス排気孔８６から処理チャンバー６内の気体が排気される。これにより、処理チャンバー６内の熱処理空間６５の上部から供給された窒素ガスが下方へと流れ、熱処理空間６５の下部から排気される。 Continued explanation of the heat treatment in the heat treatment section 160. Prior to the loading of the semiconductor wafer W into the processing chamber 6, the valve 84 for air supply is opened, and the valves 89, 192 for gas exhaust are opened to start air supply/exhaust to/from the processing chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. Further, when the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower portion of the heat treatment space 65.
　また、バルブ１９２が開放されることによって、搬送開口部６６からも処理チャンバー６内の気体が排気される。さらに、図示省略の排気機構によって移載機構１０の駆動部周辺の雰囲気も排気される。なお、熱処理部１６０における半導体ウェハーＷの熱処理時には窒素ガスが熱処理空間６５に継続的に供給されており、その供給量は処理工程に応じて適宜変更される。 Further, by opening the valve 192, the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). It should be noted that nitrogen gas is continuously supplied to the heat treatment space 65 during the heat treatment of the semiconductor wafer W in the heat treatment unit 160, and the supply amount thereof is appropriately changed according to the treatment process.
　続いて、ゲートバルブ１８５が開いて搬送開口部６６が開放され、搬送ロボット１５０により搬送開口部６６を介して処理対象となる半導体ウェハーＷが処理チャンバー６内の熱処理空間６５に搬入される。搬送ロボット１５０は、未処理の半導体ウェハーＷを保持する搬送ハンド１５１ａ（または搬送ハンド１５１ｂ）を保持部７の直上位置まで進出させて停止させる。そして、移載機構１０の一対の移載アーム１１が退避位置から移載動作位置に水平移動して上昇することにより、リフトピン１２が貫通孔７９を通ってサセプタ７４の保持プレート７５の上面から突き出て半導体ウェハーＷを受け取る。このとき、リフトピン１２は基板支持ピン７７の上端よりも上方にまで上昇する。 Subsequently, the gate valve 185 is opened to open the transfer opening 66, and the transfer robot 150 transfers the semiconductor wafer W to be processed into the heat treatment space 65 in the processing chamber 6 through the transfer opening 66. The transfer robot 150 advances the transfer hand 151 a (or the transfer hand 151 b) holding the unprocessed semiconductor wafer W to a position directly above the holding unit 7 and stops it. Then, the pair of transfer arms 11 of the transfer mechanism 10 horizontally moves from the retracted position to the transfer operation position and rises, so that the lift pin 12 projects from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receives the semiconductor wafer W. At this time, the lift pins 12 rise above the upper ends of the substrate support pins 77.
　未処理の半導体ウェハーＷがリフトピン１２に載置された後、搬送ロボット１５０が搬送ハンド１５１ａを熱処理空間６５から退出させ、ゲートバルブ１８５によって搬送開口部６６が閉鎖される。そして、一対の移載アーム１１が下降することにより、半導体ウェハーＷは移載機構１０から保持部７のサセプタ７４に受け渡されて水平姿勢にて下方より保持される。半導体ウェハーＷは、保持プレート７５上に立設された複数の基板支持ピン７７によって支持されてサセプタ７４に保持される。また、半導体ウェハーＷは、パターン形成がなされて不純物が注入された表面を上面として保持部７に保持される。複数の基板支持ピン７７によって支持された半導体ウェハーＷの裏面（表面とは反対側の主面）と保持プレート７５の保持面７５ａとの間には所定の間隔が形成される。サセプタ７４の下方にまで下降した一対の移載アーム１１は水平移動機構１３によって退避位置、すなわち凹部６２の内側に退避する。 After the unprocessed semiconductor wafer W is placed on the lift pins 12, the transfer robot 150 causes the transfer hand 151 a to exit the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 descends, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture. The semiconductor wafer W is supported by a plurality of substrate support pins 77 provided upright on a holding plate 75 and held by the susceptor 74. Further, the semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are injected as the upper surface. A predetermined space is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75. The pair of transfer arms 11 descending below the susceptor 74 are retracted by the horizontal movement mechanism 13 to the retracted position, that is, inside the recess 62.
　半導体ウェハーＷが保持部７のサセプタ７４によって水平姿勢にて下方より保持された後、４０本のハロゲンランプＨＬが一斉に点灯して予備加熱（アシスト加熱）が開始される。ハロゲンランプＨＬから出射されたハロゲン光は、石英にて形成された下側チャンバー窓６４およびサセプタ７４を透過して半導体ウェハーＷの下面から照射される。ハロゲンランプＨＬからの光照射を受けることによって半導体ウェハーＷが予備加熱されて温度が上昇する。なお、移載機構１０の移載アーム１１は凹部６２の内側に退避しているため、ハロゲンランプＨＬによる加熱の障害となることは無い。 After the semiconductor wafer W is horizontally held by the susceptor 74 of the holding unit 7 from below, the 40 halogen lamps HL are simultaneously turned on and preheating (assist heating) is started. The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the lower surface of the semiconductor wafer W. The semiconductor wafer W is preheated by the light irradiation from the halogen lamp HL, and the temperature rises. Since the transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, it does not hinder the heating by the halogen lamp HL.
　ハロゲンランプＨＬによる予備加熱を行うときには、半導体ウェハーＷの温度が端縁部放射温度計２０によって測定されている。すなわち、サセプタ７４に保持された半導体ウェハーＷの下面から開口部７８を介して放射された赤外光を端縁部放射温度計２０が受光して昇温中のウェハー温度を測定する。測定された半導体ウェハーＷの温度は制御部３に伝達される。制御部３は、ハロゲンランプＨＬからの光照射によって昇温する半導体ウェハーＷの温度が所定の予備加熱温度Ｔ１に到達したか否かを監視しつつ、ハロゲンランプＨＬの出力を制御する。すなわち、制御部３は、端縁部放射温度計２０による測定値に基づいて、半導体ウェハーＷの温度が予備加熱温度Ｔ１となるようにハロゲンランプＨＬの出力をフィードバック制御する。予備加熱温度Ｔ１は、半導体ウェハーＷに添加された不純物が熱により拡散する恐れのない、６００℃ないし８００℃程度とされる（本実施の形態では７００℃）。 When performing preheating with the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the edge radiation thermometer 20. That is, the infrared radiation emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 is received by the edge radiation thermometer 20 to measure the wafer temperature during heating. The measured temperature of the semiconductor wafer W is transmitted to the controller 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, reaches a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL based on the measurement value of the edge radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. The preheating temperature T1 is set to about 600° C. to 800° C. (700° C. in the present embodiment) at which the impurities added to the semiconductor wafer W are not likely to diffuse by heat.
　半導体ウェハーＷの温度が予備加熱温度Ｔ１に到達した後、制御部３は半導体ウェハーＷをその予備加熱温度Ｔ１に暫時維持する。具体的には、端縁部放射温度計２０によって測定される半導体ウェハーＷの温度が予備加熱温度Ｔ１に到達した時点にて制御部３がハロゲンランプＨＬの出力を調整し、半導体ウェハーＷの温度をほぼ予備加熱温度Ｔ１に維持している。 After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the edge radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL, and the temperature of the semiconductor wafer W is adjusted. Is maintained at a preheating temperature T1.
　このようなハロゲンランプＨＬによる予備加熱を行うことによって、半導体ウェハーＷの全体を予備加熱温度Ｔ１に均一に昇温している。ハロゲンランプＨＬによる予備加熱の段階においては、より放熱が生じやすい半導体ウェハーＷの周縁部の温度が中央部よりも低下する傾向にあるが、ハロゲンランプハウス４におけるハロゲンランプＨＬの配設密度は、半導体ウェハーＷの中央部に対向する領域よりも周縁部に対向する領域の方が高くなっている。このため、放熱が生じやすい半導体ウェハーＷの周縁部に照射される光量が多くなり、予備加熱段階における半導体ウェハーＷの面内温度分布を均一なものとすることができる。 By performing such preheating with the halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. At the stage of preheating by the halogen lamp HL, the temperature of the peripheral portion of the semiconductor wafer W, which is more likely to release heat, tends to be lower than that of the central portion, but the arrangement density of the halogen lamps HL in the halogen lamp house 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the amount of light applied to the peripheral portion of the semiconductor wafer W where heat dissipation easily occurs increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.
　半導体ウェハーＷの温度が予備加熱温度Ｔ１に到達して所定時間が経過した時点にてフラッシュランプＦＬが半導体ウェハーＷの表面にフラッシュ光照射を行う。このとき、フラッシュランプＦＬから放射されるフラッシュ光の一部は直接に処理チャンバー６内へと向かい、他の一部は一旦リフレクタ５２により反射されてから処理チャンバー６内へと向かい、これらのフラッシュ光の照射により半導体ウェハーＷのフラッシュ加熱が行われる。 The flash lamp FL irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the processing chamber 6, and another part of the flash light is once reflected by the reflector 52 and then goes into the processing chamber 6, and these flashes are emitted. The semiconductor wafer W is flash-heated by the irradiation of light.
　フラッシュ加熱は、フラッシュランプＦＬからのフラッシュ光（閃光）照射により行われるため、半導体ウェハーＷの表面温度を短時間で上昇することができる。すなわち、フラッシュランプＦＬから照射されるフラッシュ光は、予めコンデンサーに蓄えられていた静電エネルギーが極めて短い光パルスに変換された、照射時間が０．１ミリセカンド以上１００ミリセカンド以下程度の極めて短く強い閃光である。そして、フラッシュランプＦＬからのフラッシュ光照射によりフラッシュ加熱される半導体ウェハーＷの表面温度は、瞬間的に１０００℃以上の処理温度Ｔ２まで上昇し、半導体ウェハーＷに注入された不純物が活性化された後、表面温度が急速に下降する。このように、フラッシュ加熱では半導体ウェハーＷの表面温度を極めて短時間で昇降することができるため、半導体ウェハーＷに注入された不純物の熱による拡散を抑制しつつ不純物の活性化を行うことができる。なお、不純物の活性化に必要な時間はその熱拡散に必要な時間に比較して極めて短いため、０．１ミリセカンドないし１００ミリセカンド程度の拡散が生じない短時間であっても活性化は完了する。 The flash heating is performed by irradiating flash light (flash light) from the flash lamp FL, so that the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light emitted from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the condenser in advance is extremely short, and the irradiation time is extremely short such as 0.1 millisecond or more and 100 millisecond or less. It is a strong flash. Then, the surface temperature of the semiconductor wafer W flash-heated by the irradiation of the flash light from the flash lamp FL instantaneously rises to the processing temperature T2 of 1000° C. or higher, and the impurities implanted in the semiconductor wafer W are activated. After that, the surface temperature drops rapidly. In this way, since the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time by flash heating, it is possible to activate the impurities while suppressing the diffusion of the impurities injected into the semiconductor wafer W due to heat. .. Since the time required for activation of impurities is extremely short as compared with the time required for thermal diffusion thereof, activation is not performed even in a short time in which diffusion of about 0.1 millisecond to 100 millisecond does not occur. Complete.
　フラッシュ加熱処理が終了した後、所定時間経過後にハロゲンランプＨＬが消灯する。これにより、半導体ウェハーＷが予備加熱温度Ｔ１から急速に降温する。降温中の半導体ウェハーＷの温度は端縁部放射温度計２０によって測定され、その測定結果は制御部３に伝達される。制御部３は、端縁部放射温度計２０の測定結果より半導体ウェハーＷの温度が所定温度まで降温したか否かを監視する。そして、半導体ウェハーＷの温度が所定以下にまで降温した後、移載機構１０の一対の移載アーム１１が再び退避位置から移載動作位置に水平移動して上昇することにより、リフトピン１２がサセプタ７４の上面から突き出て熱処理後の半導体ウェハーＷをサセプタ７４から受け取る。続いて、ゲートバルブ１８５により閉鎖されていた搬送開口部６６が開放され、リフトピン１２上に載置された処理後の半導体ウェハーＷが搬送ロボット１５０の搬送ハンド１５１ｂ（または搬送ハンド１５１ａ）により搬出される。搬送ロボット１５０は、搬送ハンド１５１ｂをリフトピン１２によって突き上げられた半導体ウェハーＷの直下位置にまで進出させて停止させる。そして、一対の移載アーム１１が下降することにより、フラッシュ加熱後の半導体ウェハーＷが搬送ハンド１５１ｂに渡されて載置される。その後、搬送ロボット１５０が搬送ハンド１５１ｂを処理チャンバー６から退出させて処理後の半導体ウェハーＷを搬出する。 After the flash heating process is completed, the halogen lamp HL is turned off after a lapse of a predetermined time. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W during cooling is measured by the edge radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature based on the measurement result of the edge radiation thermometer 20. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 again horizontally moves from the retracted position to the transfer operation position and rises, whereby the lift pin 12 is lifted. The semiconductor wafer W that has protruded from the upper surface of 74 and has undergone the heat treatment is received from the susceptor 74. Then, the transfer opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer hand 151b (or the transfer hand 151a) of the transfer robot 150. It The transfer robot 150 advances the transfer hand 151b to a position directly below the semiconductor wafer W pushed up by the lift pins 12 and stops it. Then, when the pair of transfer arms 11 descend, the semiconductor wafer W after the flash heating is transferred to and placed on the transfer hand 151b. After that, the transfer robot 150 moves the transfer hand 151b out of the processing chamber 6 and carries out the processed semiconductor wafer W.
　ところで、典型的には、半導体ウェハーＷの処理はロット単位で行われる。ロットとは、同一条件にて同一内容の処理を行う対象となる１組の半導体ウェハーＷである。本実施形態の熱処理装置１００においても、ロットを構成する複数枚（例えば、２５枚）の半導体ウェハーＷが１つのキャリアＣに収容されてインデクサ部１０１の第１ロードポート１１０ａまたは第２ロードポート１１０ｂに載置され、そのキャリアＣから半導体ウェハーＷが１枚ずつ順次に処理チャンバー６に搬入されて加熱処理が行われる。 By the way, typically, the processing of the semiconductor wafer W is performed in lot units. A lot is a set of semiconductor wafers W to be processed under the same conditions with the same contents. Also in the heat treatment apparatus 100 of the present embodiment, a plurality of (for example, 25) semiconductor wafers W constituting a lot are accommodated in one carrier C, and the first load port 110a or the second load port 110b of the indexer unit 101 is accommodated. The semiconductor wafers W are sequentially loaded into the processing chamber 6 one by one from the carrier C and subjected to heat treatment.
　ここで、しばらく処理を行っていなかった熱処理装置１００にてロットの処理を開始する場合、概ね室温の処理チャンバー６にロットの最初の半導体ウェハーＷが搬入されて予備加熱およびフラッシュ加熱処理が行われることとなる。このような場合は、例えばメンテナンス後に熱処理装置１００が起動されてから最初のロットを処理する場合や先のロットを処理した後に長時間が経過した場合などである。加熱処理時には、昇温した半導体ウェハーＷからサセプタ７４等のチャンバー内構造物に熱伝導が生じるため、初期には室温であったサセプタ７４が半導体ウェハーＷの処理枚数が増えるにつれて徐々に蓄熱により昇温することとなる。また、ハロゲンランプＨＬから出射された赤外光の一部は下側チャンバー窓６４に吸収されるため、半導体ウェハーＷの処理枚数が増えるにつれて下側チャンバー窓６４の温度も徐々に昇温することとなる。 Here, when processing of a lot is started in the heat treatment apparatus 100 which has not been processed for a while, the first semiconductor wafer W of the lot is carried into the processing chamber 6 at about room temperature and preheating and flash heating processing is performed. It will be. In such a case, for example, the first lot is processed after the heat treatment apparatus 100 is activated after maintenance, or a long time has elapsed after processing the previous lot. During the heat treatment, heat is generated from the heated semiconductor wafer W to the internal structure of the chamber such as the susceptor 74, so that the susceptor 74, which was initially at room temperature, gradually rises due to heat accumulation as the number of processed semiconductor wafers W increases. It will be warm. Further, since a part of the infrared light emitted from the halogen lamp HL is absorbed by the lower chamber window 64, the temperature of the lower chamber window 64 should gradually rise as the number of processed semiconductor wafers W increases. Becomes
　そして、約１０枚の半導体ウェハーＷの加熱処理が行われたときにサセプタ７４および下側チャンバー窓６４の温度が一定の安定温度に到達する。安定温度に到達したサセプタ７４では、半導体ウェハーＷからサセプタ７４への伝熱量とサセプタ７４からの放熱量とが均衡する。サセプタ７４の温度が安定温度に到達するまでは、半導体ウェハーＷからの伝熱量がサセプタ７４からの放熱量よりも多いため、半導体ウェハーＷの処理枚数が増えるにつれてサセプタ７４の温度が徐々に蓄熱により上昇する。これに対して、サセプタ７４の温度が安定温度に到達した後は、半導体ウェハーＷからの伝熱量とサセプタ７４からの放熱量とが均衡するため、サセプタ７４の温度は一定の安定温度に維持されることとなる。なお、安定温度とは、サセプタ７４等のチャンバー内構造物を予熱することなく、処理チャンバー６内にてロットの複数の半導体ウェハーＷに連続して加熱処理を行うことにより、サセプタ７４等の温度が上昇して一定となったときの当該サセプタ７４等の温度である。また、下側チャンバー窓６４の温度が安定温度に到達した後は、下側チャンバー窓６４がハロゲンランプＨＬの照射光から吸収する熱量と下側チャンバー窓６４から放出される熱量とが均衡するため、下側チャンバー窓６４の温度も一定の安定温度に維持されることとなる。 The temperature of the susceptor 74 and the lower chamber window 64 reaches a certain stable temperature when the heat treatment of about 10 semiconductor wafers W is performed. In the susceptor 74 that has reached the stable temperature, the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat released from the susceptor 74 are balanced. Until the temperature of the susceptor 74 reaches a stable temperature, the amount of heat transferred from the semiconductor wafer W is larger than the amount of heat released from the susceptor 74, so the temperature of the susceptor 74 gradually accumulates as the number of processed semiconductor wafers W increases. Rise. On the other hand, after the temperature of the susceptor 74 reaches the stable temperature, the heat transfer amount from the semiconductor wafer W and the heat radiation amount from the susceptor 74 are balanced, so that the temperature of the susceptor 74 is maintained at a constant stable temperature. The Rukoto. Note that the stable temperature means that the temperature of the susceptor 74 and the like is continuously determined by performing a heat treatment on a plurality of semiconductor wafers W in the lot in the processing chamber 6 without preheating the internal structure of the chamber such as the susceptor 74. Is the temperature of the susceptor 74 when the temperature rises and becomes constant. Further, after the temperature of the lower chamber window 64 reaches a stable temperature, the amount of heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL and the amount of heat released from the lower chamber window 64 are balanced. The temperature of the lower chamber window 64 will also be maintained at a constant stable temperature.
　このように室温の処理チャンバー６にて処理を開始すると、ロットの初期の半導体ウェハーＷと途中からの半導体ウェハーＷとで処理チャンバー６の構造物の温度が異なることに起因して温度履歴が不均一になるという問題があった。また、初期の半導体ウェハーＷについては低温のサセプタ７４に支持されてフラッシュ加熱処理が行われるためにウェハー反りが生じることもあった。このため、製品ロットの処理を開始する前に、処理対象ではないダミーウェハーＤＷを処理チャンバー６内に搬入して加熱処理を行ってサセプタ７４等のチャンバー内構造物を安定温度に昇温するダミーランニング（ダミー処理）が実施されている。１０枚程度のダミーウェハーＤＷに加熱処理を行うことにより、サセプタ７４等のチャンバー内構造物を安定温度に昇温することができる。このようなダミー処理は、室温の処理チャンバー６にて処理を開始する場合のみならず、予備加熱温度Ｔ１や処理温度Ｔ２を変更する場合にも実行される。 When the processing is started in the processing chamber 6 at room temperature as described above, the temperature history of the semiconductor wafer W in the initial stage of the lot is different from that of the semiconductor wafer W in the middle of the process because the temperature of the structure in the processing chamber 6 differs. There was a problem of becoming uniform. Further, since the semiconductor wafer W in the initial stage is supported by the low temperature susceptor 74 and subjected to the flash heat treatment, the wafer may be warped. Therefore, before the processing of the product lot is started, the dummy wafer DW which is not the processing target is loaded into the processing chamber 6 and subjected to the heating processing so as to raise the temperature of the chamber internal structures such as the susceptor 74 to a stable temperature. Running (dummy processing) is being performed. By performing the heat treatment on about 10 dummy wafers DW, the internal structure of the chamber such as the susceptor 74 can be heated to a stable temperature. Such a dummy process is executed not only when the process is started in the process chamber 6 at room temperature but also when the preheating temperature T1 or the process temperature T2 is changed.
　ここで、先行するロットに比較して後続ロットの予備加熱温度Ｔ１や処理温度Ｔ２を高くする場合には、サセプタ７４にダミーウェハーＤＷを支持して加熱する上記のダミー処理によってサセプタ７４を安定温度に昇温することができる。ところが、先行ロットに比較して後続ロットの予備加熱温度Ｔ１や処理温度Ｔ２を低くする場合には、上記のようなダミー処理ではサセプタ７４の温度を低下させることはできない。そこで、本実施形態においては、以下のようにしてサセプタ７４の温度を降温させている。なお、処理チャンバー６の壁体は水冷管によって水冷され、上側チャンバー窓６３も空冷されているため比較的早く降温するものの、処理チャンバー６内に設けられたサセプタ７４は外部から冷却することが不可能であるため降温に時間を要するのである。 Here, when the preliminary heating temperature T1 and the processing temperature T2 of the subsequent lot are set to be higher than those of the preceding lot, the dummy processing for supporting and heating the dummy wafer DW on the susceptor 74 causes the susceptor 74 to reach a stable temperature. The temperature can be raised to. However, when lowering the preheating temperature T1 and the processing temperature T2 of the subsequent lot as compared with the preceding lot, the temperature of the susceptor 74 cannot be lowered by the dummy processing as described above. Therefore, in the present embodiment, the temperature of the susceptor 74 is lowered as follows. Although the wall of the processing chamber 6 is water-cooled by the water cooling pipe and the upper chamber window 63 is also air-cooled, the temperature is relatively quickly lowered, but the susceptor 74 provided in the processing chamber 6 cannot be cooled from the outside. Since it is possible, it takes time to lower the temperature.
　図１０は、ダミーウェハーＤＷを用いたサセプタ７４の温調手順を示すフローチャートである。ダミーウェハーＤＷは、製品となる半導体ウェハーＷと同様の円板形状のシリコンウェハーであり、半導体ウェハーＷと同様のサイズおよび形状を有する。但し、ダミーウェハーＤＷには、パターン形成やイオン注入はなされていない。すなわち、ダミーウェハーＤＷはいわゆるベアウェハーである。また、ダミーキャリアＤＣの形態自体は製品となる半導体ウェハーＷを収容するキャリアＣと同じであり、本実施形態ではＦＯＵＰである。但し、ダミーキャリアＤＣは、ダミーウェハーＤＷのみが収容されるダミーウェハーＤＷ専用のキャリアである。 FIG. 10 is a flowchart showing a temperature control procedure of the susceptor 74 using the dummy wafer DW. The dummy wafer DW is a disk-shaped silicon wafer similar to the product semiconductor wafer W, and has the same size and shape as the semiconductor wafer W. However, pattern formation and ion implantation are not performed on the dummy wafer DW. That is, the dummy wafer DW is a so-called bare wafer. Further, the form itself of the dummy carrier DC is the same as the carrier C that accommodates the semiconductor wafer W to be a product, and is FOUP in this embodiment. However, the dummy carrier DC is a carrier dedicated to the dummy wafer DW in which only the dummy wafer DW is accommodated.
　まず、先行するロットの最後の半導体ウェハーＷの処理が完了するまで待機する（ステップＳ１）。先行するロットの処理中は、サセプタ７４等のチャンバー内構造物の温度は当該先行ロットでの安定温度に維持されている。 First, wait until the processing of the last semiconductor wafer W of the preceding lot is completed (step S1). During the processing of the preceding lot, the temperature of the internal structure of the chamber such as the susceptor 74 is maintained at the stable temperature in the preceding lot.
　先行ロットの最後の半導体ウェハーＷの処理が完了した後、後続ロットの予備加熱温度Ｔ１や処理温度Ｔ２が先行ロットよりも低くて安定温度が低下する場合には、ステップＳ２に進んでダミーウェハーＤＷの搬送が開始される。具体的には、第３ロードポート１１０ｃに載置されたダミーキャリアＤＣから受渡ロボット１２０がダミーウェハーＤＷを取り出して冷却部１３０の第１クールチャンバー１３１または冷却部１４０の第２クールチャンバー１４１に搬入する。第１クールチャンバー１３１または第２クールチャンバー１４１では、ダミーウェハーＤＷの冷却処理が行われる（ステップＳ３）。 After the processing of the last semiconductor wafer W of the preceding lot is completed, if the preheating temperature T1 and the processing temperature T2 of the succeeding lot are lower than those of the preceding lot and the stable temperature decreases, the process proceeds to step S2 and the dummy wafer DW is processed. Transportation of is started. Specifically, the delivery robot 120 takes out the dummy wafer DW from the dummy carrier DC placed on the third load port 110c and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. To do. In the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled (step S3).
　第１クールチャンバー１３１または第２クールチャンバー１４１の冷却プレートは１０℃～１５℃に温調されている。従って、第１クールチャンバー１３１または第２クールチャンバー１４１において、ダミーウェハーＤＷは室温（２０℃～２５℃）以下にまで冷却されることとなる。 The temperature of the cooling plate of the first cool chamber 131 or the second cool chamber 141 is adjusted to 10°C to 15°C. Therefore, in the first cool chamber 131 or the second cool chamber 141, the dummy wafer DW is cooled to room temperature (20° C. to 25° C.) or lower.
　次に、第１クールチャンバー１３１または第２クールチャンバー１４１にて室温以下に冷却されたダミーウェハーＤＷは搬送ロボット１５０によって搬送チャンバー１７０に搬出される。ダミーウェハーＤＷを取り出した搬送ロボット１５０は熱処理部１６０を向くように旋回する。続いて、ゲートバルブ１８５が処理チャンバー６と搬送チャンバー１７０との間を開放し、搬送ロボット１５０がダミーウェハーＤＷを処理チャンバー６に搬入する。 Next, the dummy wafer DW cooled to the room temperature or lower in the first cool chamber 131 or the second cool chamber 141 is carried out to the carrying chamber 170 by the carrying robot 150. The transfer robot 150 that has taken out the dummy wafer DW turns so as to face the heat treatment unit 160. Then, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the dummy wafer DW into the processing chamber 6.
　ダミーウェハーＤＷの処理チャンバー６への搬入動作は、上述した半導体ウェハーＷの搬入動作と同じである。すなわち、移載機構１０によってダミーウェハーＤＷは搬送ロボット１５０の搬送ハンド１５１ａ（または搬送ハンド１５１ｂ）からサセプタ７４に受け渡される。冷却されたダミーウェハーＤＷは、水平姿勢にてサセプタ７４に載置されて支持される（ステップＳ４）。 The loading operation of the dummy wafer DW into the processing chamber 6 is the same as the loading operation of the semiconductor wafer W described above. That is, the transfer mechanism 10 transfers the dummy wafer DW from the transfer hand 151 a (or the transfer hand 151 b) of the transfer robot 150 to the susceptor 74. The cooled dummy wafer DW is placed and supported on the susceptor 74 in a horizontal posture (step S4).
　冷却されたダミーウェハーＤＷがサセプタ７４に載置されることにより、先行ロットでの安定温度近傍にまで昇温しているサセプタ７４からダミーウェハーＤＷへの熱伝導が生じ、結果的にダミーウェハーＤＷによってサセプタ７４が冷却されることとなる。これにより、サセプタ７４の温度が先行ロットでの安定温度から降温する。サセプタ７４にはダミーウェハーＤＷが例えば４５秒以上は載置されている。ダミーウェハーＤＷがサセプタ７４に載置されてから所定時間が経過した後、当該ダミーウェハーＤＷが処理チャンバー６から搬出される。このときの動作も、上述した半導体ウェハーＷの搬出動作と同じである。すなわち、搬送機構１０によってダミーウェハーＤＷはサセプタ７４から搬送ロボット１５０に受け渡される。 By mounting the cooled dummy wafer DW on the susceptor 74, heat conduction from the susceptor 74, which has been heated to near the stable temperature in the preceding lot, to the dummy wafer DW occurs, and as a result, the dummy wafer DW. As a result, the susceptor 74 is cooled. As a result, the temperature of the susceptor 74 is lowered from the stable temperature in the preceding lot. The dummy wafer DW is placed on the susceptor 74 for, for example, 45 seconds or more. After a predetermined time has passed since the dummy wafer DW was placed on the susceptor 74, the dummy wafer DW is unloaded from the processing chamber 6. The operation at this time is also the same as the unloading operation of the semiconductor wafer W described above. That is, the transfer mechanism 10 transfers the dummy wafer DW from the susceptor 74 to the transfer robot 150.
　ダミーウェハーＤＷを受け取った搬送ロボット１５０は、当該ダミーウェハーＤＷを処理チャンバー６から搬送チャンバー１７０に搬出する。続いて、搬送ロボット１５０は、処理チャンバー６から第１クールチャンバー１３１または第２クールチャンバー１４１に向くように旋回し、ダミーウェハーＤＷを第１クールチャンバー１３１または第２クールチャンバー１４１に搬入する。そして、受渡ロボット１２０が第１クールチャンバー１３１または第２クールチャンバー１４１からダミーウェハーＤＷを搬出し、第３ロードポート１１０ｃに載置されたダミーキャリアＤＣに戻す。このようにして１枚のダミーウェハーＤＷによるサセプタ７４の降温処理が行われる。 The transfer robot 150 that has received the dummy wafer DW carries out the dummy wafer DW from the processing chamber 6 to the transfer chamber 170. Subsequently, the transfer robot 150 swivels from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141, and loads the dummy wafer DW into the first cool chamber 131 or the second cool chamber 141. Then, the delivery robot 120 carries out the dummy wafer DW from the first cool chamber 131 or the second cool chamber 141 and returns it to the dummy carrier DC mounted on the third load port 110c. In this way, the temperature lowering process of the susceptor 74 by one dummy wafer DW is performed.
　次に、中央部放射温度計２５によって測定されるサセプタ７４の温度が後続のロットの熱処理を行うときの安定温度にまで降温していない場合には、ステップＳ５からステップＳ２に戻り、ステップＳ２からステップＳ４までの処理が繰り返される。すなわち、新たなダミーウェハーＤＷがダミーキャリアＤＣから取り出されて第１クールチャンバー１３１または第２クールチャンバー１４１で冷却され、処理チャンバー６内のサセプタ７４に載置される。そして、そのダミーウェハーＤＷによってサセプタ７４の温度がさらに降温される。 Next, when the temperature of the susceptor 74 measured by the central radiation thermometer 25 is not lowered to the stable temperature when performing the heat treatment of the subsequent lot, the process returns from step S5 to step S2, and from step S2. The processes up to step S4 are repeated. That is, a new dummy wafer DW is taken out from the dummy carrier DC, cooled in the first cool chamber 131 or the second cool chamber 141, and placed on the susceptor 74 in the processing chamber 6. Then, the dummy wafer DW further lowers the temperature of the susceptor 74.
　一方、中央部放射温度計２５によって測定されるサセプタ７４の温度が後続のロットの熱処理を行うときの安定温度にまで降温している場合には、ステップＳ５からステップＳ６に進み、後続ロットの最初の半導体ウェハーＷの処理が開始される。この処理の内容は、上述の通りである。すなわち、サセプタ７４の温度が後続ロットの安定温度に降温するまで、ダミーウェハーＤＷによるサセプタ７４の冷却を繰り返すのである。サセプタ７４の温度が後続ロットの安定温度にまで降温されているため、当該後続ロットを構成する全ての半導体ウェハーＷについて熱処理履歴を均一にすることができる。 On the other hand, when the temperature of the susceptor 74 measured by the central radiation thermometer 25 has dropped to the stable temperature at which the heat treatment of the subsequent lot is performed, the process proceeds from step S5 to step S6. The processing of the semiconductor wafer W is started. The content of this processing is as described above. That is, the cooling of the susceptor 74 by the dummy wafer DW is repeated until the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot. Since the temperature of the susceptor 74 is lowered to the stable temperature of the subsequent lot, the history of heat treatment can be made uniform for all the semiconductor wafers W constituting the subsequent lot.
　本実施形態においては、先行ロットから後続ロットへの移行時にサセプタ７４等の安定温度が低下する場合に、室温以下にまで冷却されたダミーウェハーＤＷをサセプタ７４に載置してサセプタ７４の温度を後続のロットの安定温度にまで降温させるようにしている。このため、自然冷却に比較してサセプタ７４の温度を迅速に降温させることができる。その結果、後続のロットの処理を早期に開始することができ、スループットの低下を抑止することが可能となる。 In the present embodiment, when the stable temperature of the susceptor 74 and the like decreases during the transition from the preceding lot to the following lot, the dummy wafer DW cooled to room temperature or lower is placed on the susceptor 74 to control the temperature of the susceptor 74. The temperature is lowered to the stable temperature of the subsequent lot. For this reason, the temperature of the susceptor 74 can be quickly lowered compared to natural cooling. As a result, the processing of the subsequent lot can be started early and the reduction in throughput can be suppressed.
　また、ダミーウェハーＤＷは、第１クールチャンバー１３１または第２クールチャンバー１４１によって室温以下にまで冷却されている。第１クールチャンバー１３１および第２クールチャンバー１４１は、本来はフラッシュ加熱処理後の半導体ウェハーＷを冷却するためのものであり、それを利用してダミーウェハーＤＷを冷却しているのである。すなわち、本実施形態においては、ダミーウェハーＤＷを冷却するための新たな専用の処理部を設けることなく、既存の処理部を転用してダミーウェハーＤＷを冷却してサセプタ７４の温度を降温させているのである。 Also, the dummy wafer DW is cooled to room temperature or lower by the first cool chamber 131 or the second cool chamber 141. The first cool chamber 131 and the second cool chamber 141 are originally for cooling the semiconductor wafer W after the flash heating process, and are used for cooling the dummy wafer DW. That is, in the present embodiment, without providing a new dedicated processing unit for cooling the dummy wafer DW, the existing processing unit is diverted to cool the dummy wafer DW and lower the temperature of the susceptor 74. There is.
　以上、本発明の実施の形態について説明したが、この発明はその趣旨を逸脱しない限りにおいて上述したもの以外に種々の変更を行うことが可能である。例えば、上記実施形態においては、ダミーウェハーＤＷがシリコンのベアウェハーであったが、これに限定されるものではなく、ダミーウェハーＤＷとしては熱伝導性および熱容量に優れた素材の基板であれば良い。例えば、ダミーウェハーＤＷは、炭化ケイ素（ＳｉＣ）やセラミックスのウェハーであっても良い。 The embodiments of the present invention have been described above, but the present invention can be modified in various ways other than those described above without departing from the spirit of the invention. For example, in the above embodiment, the dummy wafer DW is a bare wafer of silicon, but the dummy wafer DW is not limited to this, and the dummy wafer DW may be any substrate made of a material having excellent thermal conductivity and heat capacity. For example, the dummy wafer DW may be a silicon carbide (SiC) or ceramic wafer.
　また、ダミーウェハーＤＷを第１クールチャンバー１３１または第２クールチャンバー１４１と処理チャンバー６との間で搬送ロボット１５０によって往復移動させてサセプタ７４を冷却するようにしても良い。すなわち、サセプタ７４の冷却後に第１クールチャンバー１３１または第２クールチャンバー１４１に搬入されたダミーウェハーＤＷをダミーキャリアＤＣに戻すのではなく、再度冷却して再び処理チャンバー６に搬入してサセプタ７４に載置してサセプタ７４を降温させるようにしても良い。 Further, the dummy wafer DW may be reciprocated between the first cool chamber 131 or the second cool chamber 141 and the processing chamber 6 by the transfer robot 150 to cool the susceptor 74. That is, instead of returning the dummy wafer DW carried into the first cool chamber 131 or the second cool chamber 141 after cooling the susceptor 74 to the dummy carrier DC, it is cooled again and carried into the processing chamber 6 again to the susceptor 74. The temperature of the susceptor 74 may be lowered by placing the susceptor 74 on it.
　また、上記実施形態においては、フラッシュランプハウス５に３０本のフラッシュランプＦＬを備えるようにしていたが、これに限定されるものではなく、フラッシュランプＦＬの本数は任意の数とすることができる。また、フラッシュランプＦＬはキセノンフラッシュランプに限定されるものではなく、クリプトンフラッシュランプであっても良い。また、ハロゲンランプハウス４に備えるハロゲンランプＨＬの本数も４０本に限定されるものではなく、任意の数とすることができる。 Further, in the above-described embodiment, the flash lamp house 5 is provided with 30 flash lamps FL, but the number is not limited to this, and the number of flash lamps FL can be any number. .. Further, the flash lamp FL is not limited to the xenon flash lamp and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen lamp house 4 is not limited to 40, and may be any number.
　また、上記実施形態においては、１秒以上連続して発光する連続点灯ランプとしてフィラメント方式のハロゲンランプＨＬを用いて半導体ウェハーＷの予備加熱を行っていたが、これに限定されるものではなく、ハロゲンランプＨＬに代えて放電型のアークランプ（例えば、キセノンアークランプ）を連続点灯ランプとして用いて予備加熱を行うようにしても良い。 In the above embodiment, the filament type halogen lamp HL is used as the continuous lighting lamp that continuously emits light for 1 second or more to preheat the semiconductor wafer W, but the present invention is not limited to this. Instead of the halogen lamp HL, a discharge type arc lamp (for example, a xenon arc lamp) may be used as a continuous lighting lamp for preheating.
　また、熱処理装置１００によって処理対象となる基板は半導体ウェハーに限定されるものではなく、液晶表示装置などのフラットパネルディスプレイに用いるガラス基板や太陽電池用の基板であっても良い。 The substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a solar cell substrate.
　また、本発明に係る熱処理装置はフラッシュランプアニール装置に限定されるものではなく、連続点灯ランプを使用したＲＴＰ(Rapid thermal processing)装置やホットプレートを用いて基板を加熱する装置であっても良い。 Further, the heat treatment apparatus according to the present invention is not limited to the flash lamp annealing apparatus, and may be an RTP (Rapid thermal processing) apparatus using a continuous lighting lamp or an apparatus for heating a substrate using a hot plate. ..
　３　制御部
　４　ハロゲンランプハウス
　５　フラッシュランプハウス
　６　処理チャンバー
　７　保持部
　１０　移載機構
　６５　熱処理空間
　７４　サセプタ
　１００　熱処理装置
　１０１　インデクサ部
　１１０　ロードポート
　１１０ａ　第１ロードポート
　１１０ｂ　第２ロードポート
　１１０ｃ　第３ロードポート
　１２０　受渡ロボット
　１３０，１４０　冷却部
　１３１　第１クールチャンバー
　１４１　第２クールチャンバー
　１５０　搬送ロボット
　１５１ａ，１５１ｂ　搬送ハンド
　１６０　熱処理部
　Ｃ　キャリア
　ＤＣ　ダミーキャリア
　ＤＷ　ダミーウェハー
　ＦＬ　フラッシュランプ
　ＨＬ　ハロゲンランプ
　Ｗ　半導体ウェハー 3 Control part 4 Halogen lamp house 5 Flash lamp house 6 Processing chamber 7 Holding part 10 Transfer mechanism 65 Heat treatment space 74 Susceptor 100 Heat treatment device 101 Indexer part 110 Load port 110a First load port 110b Second load port 110c Third load port 120 Delivery robot 130,140 Cooling part 131 First cool chamber 141 Second cool chamber 150 Transfer robot 151a, 151b Transfer hand 160 Heat treatment part C carrier DC dummy carrier DW dummy wafer FL flash lamp HL halogen lamp W semiconductor wafer

Claims (6)

  1. 　基板に対して熱処理を行う熱処理方法であって、
    　チャンバー内にてサセプタに載置した基板に加熱源から加熱を行う加熱工程と、
    　ダミーウェハーを冷却する冷却工程と、
    　前記加熱工程が終了した後に、前記冷却工程で冷却された前記ダミーウェハーを前記サセプタに載置して前記サセプタの温度を降温させる温調工程と、
    を備える熱処理方法。     A heat treatment method for performing heat treatment on a substrate,
    A heating step of heating the substrate placed on the susceptor in the chamber from a heating source;
    A cooling step of cooling the dummy wafer,
    After the heating step is completed, a temperature adjusting step of placing the dummy wafer cooled in the cooling step on the susceptor and lowering the temperature of the susceptor,
    A heat treatment method comprising.
  2. 　請求項１記載の熱処理方法において、
    　前記温調工程では、前記サセプタの温度を前記基板の後続のロットの熱処理を行うときの安定温度に降温させる熱処理方法。     The heat treatment method according to claim 1,
    In the temperature control step, a heat treatment method of lowering the temperature of the susceptor to a stable temperature for heat treatment of a subsequent lot of the substrate.
  3. 　請求項１または請求項２記載の熱処理方法において、
    　前記冷却工程では、前記ダミーウェハーを室温以下にまで冷却する熱処理方法。     In the heat treatment method according to claim 1 or 2,
    In the cooling step, a heat treatment method of cooling the dummy wafer to room temperature or lower.
  4. 　基板に対して熱処理を行う熱処理装置であって、
    　基板を収容するチャンバーと、
    　前記チャンバー内にて前記基板を載置するサセプタと、
    　前記サセプタに載置された前記基板を加熱する加熱源と、
    　ダミーウェハーを冷却する冷却部と、
    　前記ダミーウェハーを前記冷却部から前記チャンバーに搬送する搬送部と、
    を備え、
    　前記基板に対する加熱処理が終了した後に、前記冷却部にて冷却された前記ダミーウェハーを前記サセプタに載置して前記サセプタの温度を降温させる熱処理装置。     A heat treatment apparatus for performing heat treatment on a substrate,
    A chamber for containing the substrate,
    A susceptor for mounting the substrate in the chamber,
    A heating source that heats the substrate placed on the susceptor;
    A cooling unit for cooling the dummy wafer,
    A transfer unit that transfers the dummy wafer from the cooling unit to the chamber,
    Equipped with
    A heat treatment apparatus for placing the dummy wafer cooled by the cooling unit on the susceptor and lowering the temperature of the susceptor after the heat treatment of the substrate is completed.
  5. 　請求項４記載の熱処理装置において、
    　前記基板に対する加熱処理が終了した後に、前記サセプタの温度を前記基板の後続のロットの熱処理を行うときの安定温度に降温させる熱処理装置。     The heat treatment apparatus according to claim 4,
    A heat treatment apparatus for lowering the temperature of the susceptor to a stable temperature for heat treatment of a subsequent lot of the substrate after the heat treatment of the substrate is completed.
  6. 　請求項４または請求項５記載の熱処理装置において、
    　前記冷却部は、前記ダミーウェハーを室温以下にまで冷却する熱処理装置。     The heat treatment apparatus according to claim 4 or 5,
    The cooling unit is a heat treatment apparatus that cools the dummy wafer to room temperature or lower.
PCT/JP2019/047236 2018-12-13 2019-12-03 Heat treatment method and heat treatment apparatus WO2020121895A1 (en)

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JPH0745523A (en) * 1993-07-27 1995-02-14 Nec Corp Semiconductor substrate heating equipment of vacuum chamber
JPH0837158A (en) * 1994-07-21 1996-02-06 Dainippon Screen Mfg Co Ltd Method and apparatus for heat treatment of substrate
JP2002299319A (en) * 2001-03-29 2002-10-11 Hitachi Kokusai Electric Inc Substrate processor
WO2011043490A1 (en) * 2009-10-09 2011-04-14 キヤノンアネルバ株式会社 Vacuum heating/cooling device
JP2018085369A (en) * 2016-11-21 2018-05-31 日新イオン機器株式会社 Semiconductor manufacturing device and method for cooling substrate support device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745523A (en) * 1993-07-27 1995-02-14 Nec Corp Semiconductor substrate heating equipment of vacuum chamber
JPH0837158A (en) * 1994-07-21 1996-02-06 Dainippon Screen Mfg Co Ltd Method and apparatus for heat treatment of substrate
JP2002299319A (en) * 2001-03-29 2002-10-11 Hitachi Kokusai Electric Inc Substrate processor
WO2011043490A1 (en) * 2009-10-09 2011-04-14 キヤノンアネルバ株式会社 Vacuum heating/cooling device
JP2018085369A (en) * 2016-11-21 2018-05-31 日新イオン機器株式会社 Semiconductor manufacturing device and method for cooling substrate support device

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