WO2020105449A1

WO2020105449A1 - Heat treatment method and heat treatment device

Info

Publication number: WO2020105449A1
Application number: PCT/JP2019/043651
Authority: WO
Inventors: 智宏上野; 和彦布施; 麻央大森
Original assignee: 株式会社Ｓｃｒｅｅｎホールディングス
Priority date: 2018-11-20
Filing date: 2019-11-07
Publication date: 2020-05-28
Also published as: TW202025309A; JP2020088057A

Abstract

When a command is issued for the commencement of dummy treatment in which heat treatment is carried out on a dummy wafer and a susceptor or other structure in a chamber is temperature controlled, the reflectivity of the surface of the dummy wafer is measured. If the measured reflectivity falls outside a prescribed range, the dummy wafer is not a normal dummy wafer, so an alarm is activated and, furthermore, the dummy treatment is suspended. Thus, the occurrence of a problem resulting from a dummy wafer, a product wafer, or the like in which degradation has progressed being erroneously subjected to dummy treatment can be prevented, and an appropriate dummy treatment can be carried out on a normal dummy wafer.

Description

Heat treatment method and heat treatment apparatus

The present invention relates to a heat treatment method and heat treatment apparatus for managing dummy wafers.

In the semiconductor device manufacturing process, flash lamp annealing (FLA), which heats a semiconductor wafer in an extremely short time, is drawing attention. Flash lamp annealing uses a xenon flash lamp (hereinafter, simply referred to as a “flash lamp” to mean a xenon flash lamp) to irradiate the surface of a semiconductor wafer with flash light so that only the surface of the semiconductor wafer can be extremely exposed. It is a heat treatment technology that raises the temperature in a short time (several milliseconds or less).

The emission spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, has a shorter wavelength than conventional halogen lamps, and almost matches the basic absorption band of silicon semiconductor wafers. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the transmitted light is small and it is possible to rapidly raise the temperature of the semiconductor wafer. Further, it has been found that the flash light irradiation for a very short time of several milliseconds or less can selectively raise the temperature only in the vicinity of the surface of the semiconductor wafer.

Such flash lamp annealing is used for a process that requires heating for an extremely short time, for example, typically for activating impurities implanted into a semiconductor wafer. If the surface of a semiconductor wafer in which impurities have been implanted by the ion implantation method is irradiated with flash light from a flash lamp, the surface of the semiconductor wafer can be heated to the activation temperature for an extremely short time, and the impurities are diffused deeply. It is possible to carry out only the impurity activation without performing the activation.

Typically, processing of semiconductor wafers is not limited to heat treatment, but is performed in lots (one set of semiconductor wafers subject to processing of the same content under the same conditions). In the single-wafer type substrate processing apparatus, a plurality of semiconductor wafers forming a lot are continuously and sequentially processed. Also in the flash lamp annealing device, a plurality of semiconductor wafers forming a lot are loaded into the chamber one by one and sequentially subjected to heat treatment.

However, the temperature of the internal structure of the chamber such as the susceptor that holds the semiconductor wafers may change during the process of sequentially processing the semiconductor wafers that make up the lot. Such a phenomenon occurs when a new process is started in the flash lamp annealing apparatus which has been in an operation stopped state for a while, or when the processing conditions such as the processing temperature of the semiconductor wafer are changed. When the temperature of the internal structure of the chamber such as the susceptor changes in the process of processing a plurality of semiconductor wafers in a lot, there arises a problem that the temperature history at the time of processing is different between the semiconductor wafer in the initial stage and the semiconductor wafer in the latter half of the lot.

In order to solve such a problem, before starting the processing of the lot, a dummy wafer that is not the processing target is loaded into the chamber and supported by the susceptor, and the flash heating process is performed under the same conditions as the processing target lot. By doing so, the temperature of the internal structure of the chamber such as the susceptor has been raised in advance (dummy running). Patent Document 1 discloses that about 10 dummy wafers are subjected to a flash heat treatment so that the temperature of a chamber internal structure such as a susceptor reaches a stable temperature during the treatment.

Japanese Patent Laid-Open No. 2017-092102

Heat treatment for semiconductor wafers (product wafers) that make up a product lot and dummy running for dummy wafers are performed according to the recipe. The recipe defines a processing procedure and processing conditions for heat treatment on a wafer. For example, the recipe specifies flash heating after preliminary heating with a halogen lamp, flash heating processing conditions, and the like.

Basically, the recipe used for the product wafer and the recipe used for the dummy wafer are different, and if the product wafer is erroneously dummy-run according to the dummy recipe, a defective wafer will be generated. Further, the dummy wafer which is not the processing target is used in the dummy running a plurality of times, and is repeatedly subjected to the heat treatment. As a result, the deterioration of the dummy wafer progresses, and the warp or melt of the wafer may occur due to the deterioration. If dummy running is performed on a dummy wafer that has undergone such deterioration, problems such as wafer cracking may occur.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of performing proper treatment on a normal dummy wafer.

In order to solve the above problems, a first aspect of the present invention is, in a heat treatment method for managing a dummy wafer, a measuring step of measuring a reflectance of a surface of the dummy wafer, and the dummy wafer measured in the measuring step. And a warning step of issuing a warning when the reflectance of is out of a predetermined range.

In a second aspect, in the heat treatment method according to the first aspect, when the reflectance of the dummy wafer measured in the measuring step is out of the predetermined range, the processing for the dummy wafer is further stopped. ..

A third aspect is the heat treatment method according to the first or second aspect, wherein the predetermined range is within ± 3% from the reflectance of the bare silicon wafer.

In a fourth aspect, in a heat treatment apparatus for managing a dummy wafer, a heat treatment unit that heat-treats the dummy wafer, a reflectance measurement unit that measures the reflectance of the surface of the dummy wafer, and a reflectance measurement unit are provided. A warning unit that issues a warning when the measured reflectance of the dummy wafer is out of a predetermined range.

Further, a fifth aspect is the heat treatment apparatus according to the fourth aspect, wherein when the reflectance of the dummy wafer measured by the reflectance measuring unit is out of the predetermined range, the dummy wafer is further processed. Stop.

A sixth aspect is the heat treatment apparatus according to the fourth or fifth aspect, wherein the predetermined range is within ± 3% from the reflectance of the bare silicon wafer.

According to the heat treatment methods of the first to third aspects, since a warning is issued when the reflectance of the dummy wafer measured in the measuring step is out of the predetermined range, a wafer other than a normal dummy wafer is issued. Can be prevented in advance, and proper processing can be performed on a normal dummy wafer.

According to the heat treatment apparatuses according to the fourth to sixth aspects, a warning is issued when the reflectance of the dummy wafer measured by the reflectance measuring unit is out of the predetermined range, so that a dummy wafer other than the normal dummy wafer is issued. It is possible to prevent the wafer from being processed, and it is possible to properly process a normal dummy wafer.

It is a top view which shows the heat processing apparatus which concerns on this invention. It is a front view of the heat processing apparatus of FIG. It is a longitudinal cross-sectional view showing a configuration of a heat treatment section. It is a perspective view showing the whole appearance of a holding part. It is a top view of a susceptor. It is sectional drawing of a susceptor. It is a top view of a transfer mechanism. It is a side view of a transfer mechanism. It is a top view showing arrangement of a plurality of halogen lamps. It is a figure which shows the structure of a reflectance measurement part. It is a flowchart which shows the management procedure of a dummy wafer.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

First, the heat treatment apparatus according to the present invention will be described. FIG. 1 is a plan view showing a heat treatment apparatus 100 according to the present invention, and FIG. 2 is a front view thereof. The heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a disk-shaped semiconductor wafer W as a substrate with flash light to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, φ300 mm or φ450 mm. Impurities are implanted into the semiconductor wafer W before being carried into the heat treatment apparatus 100, and the activation treatment of the implanted impurities is performed by the heat treatment by the heat treatment apparatus 100. It should be noted that in FIG. 1 and the subsequent drawings, the dimensions and number of each part are exaggerated or simplified as necessary for easy understanding. Further, in each of FIGS. 1 to 3, an XYZ orthogonal coordinate system in which the Z-axis direction is the vertical direction and the XY plane is the horizontal plane is attached in order to clarify their directional relationship.

As shown in FIGS. 1 and 2, the heat treatment apparatus 100 includes an indexer unit 101 for loading an unprocessed semiconductor wafer W into the apparatus from the outside and an unprocessed semiconductor wafer W for removing the processed semiconductor wafer W from the apparatus. Alignment unit 230 for positioning the semiconductor wafer W, two

cooling units

130, 140 for cooling the semiconductor wafer W after heat treatment, a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafer W, and

cooling units

130, 140, A transfer robot 150 that transfers the semiconductor wafer W to and from the heat treatment unit 160 is provided. Further, the heat treatment apparatus 100 includes the control unit 3 that controls the operation mechanism provided in each of the processing units and the transfer robot 150 to advance the flash heating process of the semiconductor wafer W.

The indexer unit 101 includes a load port 110 on which a plurality of carriers C (two in this embodiment) are mounted side by side, an unprocessed semiconductor wafer W taken out from each carrier C, and a semiconductor wafer processed by each carrier C. And a delivery robot 120 that stores W. The carrier C containing the unprocessed semiconductor wafer W is transported by an automated guided vehicle (AGV, OHT) or the like and placed on the load port 110, and the carrier C containing the processed semiconductor wafer W is the automated guided vehicle. Are taken away from the load port 110.

Further, in the load port 110, the carrier C is configured to be movable up and down as shown by an arrow CU in FIG. 2 so that the delivery robot 120 can take in and out an arbitrary semiconductor wafer W with respect to the carrier C. ing. In addition to the FOUP (front opening unified pod) that stores the semiconductor wafer W in a closed space, the carrier C also has a SMIF (Standard Mechanical Inter Face) pod and an OC (open that exposes the stored semiconductor wafer W to the outside air). cassette).

Further, the delivery robot 120 is capable of a sliding movement as shown by an arrow 120S in FIG. 1, a turning operation and an ascending / descending operation as shown by an arrow 120R. As a result, the delivery robot 120 takes the semiconductor wafer W in and out of the two carriers C, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling

units

130 and 140. The transfer of the semiconductor wafer W to / from the carrier C by the delivery robot 120 is performed by the sliding movement of the hand 121 and the vertical movement of the carrier C. The delivery of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling

units

130 and 140 is performed by sliding the hand 121 and moving the delivery robot 120 up and down.

The alignment section 230 is connected to the side of the indexer section 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane and orients it in an appropriate direction for flash heating. The alignment section 230 includes a mechanism for supporting and rotating the semiconductor wafer W in a horizontal position inside the alignment chamber 231 which is a housing made of aluminum alloy (rotation support section 237 and rotation motor 238 in FIG. 10), and a semiconductor. A mechanism for optically detecting a notch, an orientation flat, or the like formed on the peripheral portion of the wafer W is provided. Further, the alignment chamber 231 is provided with a reflectance measuring section 232 for measuring the reflectance of the surface of the semiconductor wafer W supported inside the alignment chamber 231. The reflectance measuring unit 232 irradiates the surface of the semiconductor wafer W with light, receives the reflected light reflected by the surface, and measures the reflectance of the surface of the semiconductor wafer W from the intensity of the reflected light.

The delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120. The semiconductor wafer W is transferred from the transfer robot 120 to the alignment chamber 231 such that the center of the wafer is located at a predetermined position. The alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W about a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do. Further, the reflectance measuring section 232 measures the reflectance of the surface of the semiconductor wafer W. The semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.

A transfer chamber 170 that houses the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150. The processing chamber 6 of the heat treatment section 160, the first cool chamber 131 of the cooling section 130, and the second cool chamber 141 of the cooling section 140 are connected in communication with the transfer chamber 170 on three sides.

The heat treatment unit 160, which is the main part of the heat treatment apparatus 100, is a substrate processing unit that irradiates the semiconductor wafer W that has been preheated with flash light (flash light) from the xenon flash lamp FL to perform flash heat treatment. The structure of the heat treatment unit 160 will be described later.

The two cooling

units

130 and 140 have substantially the same configuration. Each of the cooling

units

130 and 140 includes a metal cooling plate and a quartz plate placed on the upper surface of the first cooling chamber 131 and the second cooling chamber 141, which are aluminum alloy housings. (All are not shown). The cooling plate is temperature-controlled at normal temperature (about 23 ° C.) by a Peltier element or constant temperature water circulation. The semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment section 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.

Both the first cool chamber 131 and the second cool chamber 141 are connected to both of them between the indexer unit 101 and the transfer chamber 170. The first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W. Of the two openings of the first cool chamber 131, the opening connected to the indexer section 101 can be opened and closed by the gate valve 181. On the other hand, the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer unit 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.

When the semiconductor wafer W is transferred between the indexer unit 101 and the first cool chamber 131, the gate valve 181 is opened. In addition, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the

gate valves

181 and 183 are closed, the inside of the first cool chamber 131 becomes a closed space.

Also, of the two openings of the second cool chamber 141, the opening connected to the indexer section 101 can be opened and closed by the gate valve 182. On the other hand, the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer unit 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.

The gate valve 182 is opened when the semiconductor wafer W is transferred between the indexer unit 101 and the second cool chamber 141. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.

Further, the cooling

units

130 and 140 respectively include a gas supply mechanism that supplies clean nitrogen gas to the first cool chamber 131 and the second cool chamber 141, and an exhaust mechanism that exhausts the atmosphere in the chamber. The gas supply mechanism and the exhaust mechanism may be capable of switching the flow rate in two stages.

The transfer robot 150 provided in the transfer chamber 170 can rotate about an axis along the vertical direction as indicated by an arrow 150R. The transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and transfer

hands

151a and 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively. These

transport hands

151a and 151b are arranged vertically with a predetermined pitch, and are independently slidable linearly in the same horizontal direction by a link mechanism. Further, the transfer robot 150 moves up and down the base provided with the two link mechanisms to move up and down the two

transfer hands

151a and 151b while keeping a distance of a predetermined pitch.

When the transfer robot 150 transfers (removes) the semiconductor wafer W as a transfer partner with the first cool chamber 131, the second cool chamber 141, or the processing chamber 6 of the heat treatment section 160, first, both

transfer hands

151a and 151b are transferred. It turns so as to face the delivery partner, and then (or while it is turning) moves up and down, and one of the transfer hands is positioned at a height for delivering the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to and from the transfer partner.

Transfer of the semiconductor wafer W between the transfer robot 150 and the transfer robot 120 can be performed via the cooling

units

130 and 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as a path for transferring the semiconductor wafer W between the transfer robot 150 and the transfer robot 120. .. Specifically, the semiconductor wafer W is delivered by one of the transfer robot 150 and the delivery robot 120 receiving the semiconductor wafer W delivered to the first cool chamber 131 or the second cool chamber 141. The transfer robot 150 and the transfer robot 120 constitute a transfer mechanism that transfers the semiconductor wafer W from the carrier C to the thermal processing section 160.

As described above, the

gate valves

181 and 182 are provided between the first cool chamber 131 and the second cool chamber 141 and the indexer unit 101, respectively.

Gate valves

183 and 184 are provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively. Further, a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the heat treatment section 160. When the semiconductor wafer W is transferred in the heat treatment apparatus 100, these gate valves are opened / closed appropriately. Further, nitrogen gas is also supplied from the gas supply unit to the transfer chamber 170 and the alignment chamber 231, and the atmosphere inside them is exhausted by the exhaust unit (both not shown).

Next, the configuration of the heat treatment section 160 will be described. FIG. 3 is a vertical cross-sectional view showing the configuration of the heat treatment section 160. The heat treatment unit 160 includes a processing chamber 6 that accommodates a semiconductor wafer W and performs heat treatment, a flash lamp house 5 that houses a plurality of flash lamps FL, and a halogen lamp house 4 that houses a plurality of halogen lamps HL. Prepare A flash lamp house 5 is provided above the processing chamber 6, and a halogen lamp house 4 is provided below the processing chamber 6. Further, the heat treatment unit 160 holds the semiconductor wafer W in a horizontal position inside the processing chamber 6, and the transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the transfer robot 150. And

The processing chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with an opening at the top and bottom, and an upper chamber window 63 is attached and closed at the upper opening, and a lower chamber window 64 is attached and closed at the lower opening. ing. The upper chamber window 63 that constitutes the ceiling of the processing chamber 6 is a disk-shaped member made of quartz, and functions as a quartz window that transmits the flash light emitted from the flash lamp FL into the processing chamber 6. Further, the lower chamber window 64 that forms the floor of the processing chamber 6 is also a disk-shaped member made of quartz, and functions as a quartz window that transmits the light from the halogen lamp HL into the processing chamber 6.

Also, a reflection ring 68 is attached to the upper portion of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is attached to the lower portion. Both the reflection rings 68 and 69 are formed in an annular shape. The upper reflection ring 68 is attached by being fitted from above the chamber side portion 61. On the other hand, the lower reflection ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw (not shown). That is, both the reflection rings 68 and 69 are detachably attached to the chamber side portion 61. An inner space of the processing chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.

By mounting the reflection rings 68 and 69 on the chamber side portion 61, the concave portion 62 is formed on the inner wall surface of the processing chamber 6. That is, a concave portion 62 surrounded by the central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not attached, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69 is formed. .. The concave portion 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the processing chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.

A transfer opening (furnace) 66 for loading and unloading the semiconductor wafer W into and from the processing chamber 6 is formed on the chamber side 61. The transfer opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out of the heat treatment space 65. It can be performed. When the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.

Further, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the processing chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is communicatively connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the sidewall of the processing chamber 6. The gas supply pipe 83 is connected to the processing gas supply source 85. Further, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows so as to spread in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65. As the processing gas, an inert gas such as nitrogen (N ₂ ) or a reactive gas such as hydrogen (H ₂ ) or ammonia (NH ₃ ) can be used (nitrogen in the present embodiment).

On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the processing chamber 6. The gas exhaust hole 86 is formed at a position lower than the recess 62, and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6. The gas exhaust pipe 88 is connected to the exhaust mechanism 190. A valve 89 is inserted in the middle of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87. The gas supply holes 81 and the gas exhaust holes 86 may be provided in plural along the circumferential direction of the processing chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust mechanism 190 may be a mechanism provided in the heat treatment apparatus 100 or a utility of a factory in which the heat treatment apparatus 100 is installed.

A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. By opening the valve 192, the gas in the processing chamber 6 is exhausted through the transfer opening 66.

FIG. 4 is a perspective view showing the overall appearance of the holding unit 7. The holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.

The base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 and the base ring 71 which will be described later. By mounting the base ring 71 on the bottom surface of the recess 62, the base ring 71 is supported on the wall surface of the processing chamber 6 (see FIG. 3). On the upper surface of the base ring 71, a plurality of connecting portions 72 (four in this embodiment) are provided upright along the circumferential direction of the annular shape. The connecting portion 72 is also a quartz member and is fixed to the base ring 71 by welding.

The susceptor 74 is supported by the four connecting portions 72 provided on the base ring 71. FIG. 5 is a plan view of the susceptor 74. Further, FIG. 6 is a sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.

A guide ring 76 is installed on the peripheral portion of the upper surface of the holding plate 75. The guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is 300 mm, the inner diameter of the guide ring 76 is 320 mm. The inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75. The guide ring 76 is made of quartz like the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.

An area inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75 a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In this embodiment, a total of twelve substrate support pins 77 are erected at every 30 ° along the circumference of a concentric circle with the outer circumference circle of the holding surface 75a (the inner circumference circle of the guide ring 76). The diameter of the circle in which the twelve substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is 300 mm, then φ270 mm to φ280 mm (this embodiment In the form, it is φ270 mm). Each substrate support pin 77 is made of quartz. The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.

Returning to FIG. 4, the four connecting portions 72 erected on the base ring 71 and the peripheral portion of the holding plate 75 of the susceptor 74 are fixed to each other by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. By supporting the base ring 71 of the holding unit 7 on the wall surface of the processing chamber 6, the holding unit 7 is attached to the processing chamber 6. When the holding unit 7 is attached to the processing chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). That is, the holding surface 75a of the holding plate 75 becomes a horizontal surface.

The semiconductor wafer W loaded into the processing chamber 6 is horizontally placed and held on the susceptor 74 of the holding unit 7 mounted in the processing chamber 6. At this time, the semiconductor wafer W is held by the susceptor 74 while being supported by twelve substrate support pins 77 provided upright on the holding plate 75. More precisely, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the twelve substrate support pins 77 (the distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 bring the semiconductor wafer W into a horizontal posture. Can be supported.

Further, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.

Further, as shown in FIGS. 4 and 5, the holding plate 75 of the susceptor 74 is formed with an opening 78 penetrating vertically. The opening 78 is provided for the radiation thermometer 20 (see FIG. 3) to receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W held by the susceptor 74. That is, the radiation thermometer 20 receives light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 and measures the temperature of the semiconductor wafer W. Further, the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pins 12 of the transfer mechanism 10 to be described later pass through for the delivery of the semiconductor wafer W.

FIG. 7 is a plan view of the transfer mechanism 10. FIG. 8 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arcuate shape that follows the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 includes a transfer operation position (solid line position in FIG. 7) at which the pair of transfer arms 11 transfers the semiconductor wafer W to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is horizontally moved to and from the retracted position (the position indicated by the two-dot chain line in FIG. 7) that does not overlap in plan view. The transfer operation position is below the susceptor 74, and the retracted position is outside the susceptor 74. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be rotated by one motor using a link mechanism. It may be a moving one.

Further, the pair of transfer arms 11 is moved up and down by the elevating mechanism 14 together with the horizontal moving mechanism 13. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74 and the lift pins are lifted. The upper end of 12 projects from the upper surface of the susceptor 74. On the other hand, when the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position to extract the lift pin 12 from the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 to open. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is immediately above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 is inside the recess 62. An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive section of the transfer mechanism 10 (the horizontal movement mechanism 13 and the lifting mechanism 14) is provided, and the atmosphere around the drive section of the transfer mechanism 10 is Are discharged to the outside of the processing chamber 6.

Returning to FIG. 3, the flash lamp house 5 provided above the processing chamber 6 has a light source including a plurality of (30 in this embodiment) xenon flash lamps FL inside the housing 51, and a light source of the light source. And a reflector 52 provided so as to cover the upper side. A lamp light emitting window 53 is attached to the bottom of the housing 51 of the flash lamp house 5. The lamp light emitting window 53 that forms the floor of the flash lamp house 5 is a plate-shaped quartz window made of quartz. Since the flash lamp house 5 is installed above the processing chamber 6, the lamp light emitting window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the lamp light emission window 53 and the upper chamber window 63.

The plurality of flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and each longitudinal direction is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

The xenon flash lamp FL is provided with a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends of the glass tube and an outer peripheral surface of the glass tube. And a triggered electrode. Since xenon gas is an electrical insulator, electricity does not flow in the glass tube in a normal state even if electric charges are accumulated in the capacitor. However, when a high voltage is applied to the trigger electrode to break the insulation, electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time. In such a xenon flash lamp FL, since the electrostatic energy stored in the condenser in advance is converted into an extremely short light pulse of 0.1 millisecond to 100 millisecond, continuous lighting such as the halogen lamp HL is performed. It has a feature that it can emit extremely strong light as compared with a light source. That is, the flash lamp FL is a pulse emission lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.

Further, the reflector 52 is provided above the plurality of flash lamps FL so as to cover them all. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.

The halogen lamp house 4 provided below the processing chamber 6 has a plurality of (40 in the present embodiment) halogen lamps HL incorporated inside the housing 41. The halogen lamps HL irradiate the heat treatment space 65 from below the processing chamber 6 through the lower chamber window 64.

FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL. In this embodiment, 20 halogen lamps HL are provided in each of the upper and lower two stages. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. In both the upper and lower rows, the 20 halogen lamps HL are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.

Further, as shown in FIG. 9, the arrangement density of the halogen lamps HL is higher in the region facing the peripheral portion than in the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. There is. That is, in both the upper and lower stages, the halogen lamps HL are arranged at a shorter pitch in the peripheral portion than in the central portion of the lamp array. Therefore, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W, where the temperature tends to decrease during heating by irradiation with light from the halogen lamp HL.

Also, the lamp group consisting of the upper halogen lamps HL and the lamp group consisting of the lower halogen lamps HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of each upper halogen lamp HL and the longitudinal direction of each lower halogen lamp HL are orthogonal to each other.

The halogen lamp HL is a filament type light source that energizes the filament arranged inside the glass tube to incandescent the filament to emit light. Inside the glass tube, a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon is sealed. By introducing the halogen element, it becomes possible to set the temperature of the filament to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a long life and can continuously emit strong light as compared with an ordinary incandescent lamp. That is, the halogen lamp HL is a continuous lighting lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life. By arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.

Also, inside the housing 41 of the halogen lamp house 4, a reflector 43 is provided below the two-stage halogen lamp HL (FIG. 3). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.

In addition to the above configuration, the heat treatment unit 160 prevents an excessive temperature rise of the halogen lamp house 4, the flash lamp house 5 and the processing chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided. For example, the wall of the processing chamber 6 is provided with a water cooling pipe (not shown). Further, the halogen lamp house 4 and the flash lamp house 5 have an air cooling structure that forms a gas flow inside and exhausts heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emitting window 53 to cool the flash lamp house 5 and the upper chamber window 63.

FIG. 10 is a diagram showing the configuration of the reflectance measuring unit 232 provided in the alignment unit 230. The reflectance measuring section 232 includes a light projecting section 300, a light receiving section 235, a half mirror 236, and a reflectance calculating section 31. In the alignment chamber 231 of the alignment unit 230, a rotation support unit 237 that supports and rotates the semiconductor wafer W and a rotation motor 238 that rotationally drives the rotation support unit 237 are provided. The rotation motor 238 rotates the rotation support portion 237 that supports the semiconductor wafer W to adjust the orientation of the semiconductor wafer W.

The light projecting unit 300 includes a light source such as a halogen light source or an LED light source and emits light for reflectance measurement. The light receiving section 235 includes a light receiving element that converts the intensity of the received light into an electric signal. The light emitted from the light projecting unit 300 is reflected by the half mirror 236 and is vertically irradiated onto the upper surface of the semiconductor wafer W supported by the rotation supporting unit 237. The light emitted from the light projecting unit 300 is reflected on the upper surface of the semiconductor wafer W. The reflected light passes through the half mirror 236 and is received by the light receiving section 235. The reflectance calculation unit 31 of the control unit 3 calculates the reflectance of the upper surface of the semiconductor wafer W from the intensity of the light emitted by the light projecting unit 300 and the intensity of the reflected light received by the light receiving unit 235.

The control unit 3 controls the above-described various operating mechanisms provided in the heat treatment apparatus 100. The hardware configuration of the control unit 3 is similar to that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores a basic program, a RAM that is a readable / writable memory that stores various information, and control software and data. It is equipped with a magnetic disk for storage. The processing in the heat treatment apparatus 100 progresses as the CPU of the control unit 3 executes a predetermined processing program. The reflectance calculation unit 31, the determination unit 35, and the reporting unit 36 are functional processing units implemented by the CPU of the control unit 3 executing a predetermined processing program. The processing contents of the determination unit 35 and the reporting unit 36 will be described later. Although the control unit 3 is shown in the indexer unit 101 in FIG. 1, the present invention is not limited to this, and the control unit 3 can be arranged at any position in the heat treatment apparatus 100.

Also, a liquid crystal touch panel 33 is connected to the control unit 3. The touch panel 33 is provided on the outer wall of the heat treatment apparatus 100, for example. The touch panel 33 displays various information and accepts various comments and parameter inputs. That is, the touch panel 33 has both functions of a display unit and an input unit. The operator of the heat treatment apparatus 100 can input commands and parameters from the touch panel 33 while checking the information displayed on the touch panel 33. Note that instead of the touch panel 33, a combination of an input unit such as a keyboard and a mouse and a display unit such as a liquid crystal display may be used.

Next, the processing operation of the heat treatment apparatus 100 according to the present invention will be described. Here, the processing operation for a normal semiconductor wafer (product wafer) W that is a product will be described, and then the management of dummy wafers will be described. The semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) have been added by the ion implantation method. The activation of the impurities is performed by a flash light irradiation heat treatment (annealing) by the heat treatment device 100.

First, a plurality of unprocessed semiconductor wafers W into which impurities have been injected are placed in the carrier C and placed on the load port 110 of the indexer unit 101. Then, the delivery robot 120 takes out the unprocessed semiconductor wafers W one by one from the carrier C and carries them into the alignment chamber 231 of the alignment section 230. In the alignment chamber 231, the semiconductor wafer W supported by the rotation support portion 237 is rotated around a vertical axis in a horizontal plane with its center being the center of rotation, and the orientation of the semiconductor wafer W is detected by optically detecting notches and the like. Adjust.

Next, the delivery robot 120 of the indexer unit 101 takes out the semiconductor wafer W whose orientation is adjusted from the alignment chamber 231, and carries it into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. The unprocessed semiconductor wafer W loaded into the first cool chamber 131 or the second cool chamber 141 is unloaded into the transfer chamber 170 by the transfer robot 150. When the unprocessed semiconductor wafer W is transferred from the indexer unit 101 to the transfer chamber 170 via the first cool chamber 131 or the second cool chamber 141, the first cool chamber 131 and the second cool chamber 141 are not connected to each other. Function as a pass for the delivery of.

The transfer robot 150 that takes out the semiconductor wafer W turns so as to face the heat treatment unit 160. Subsequently, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 loads the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if the preceding heat-treated semiconductor wafer W is present in the processing chamber 6, the heat-treated semiconductor wafer W is taken out by one of the

transfer hands

151a and 151b, and then the untreated semiconductor wafer W is removed. W is carried into the processing chamber 6 and the wafers are exchanged. After that, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.

The semiconductor wafer W loaded into the processing chamber 6 is preheated by the halogen lamp HL, and then flash-heated by irradiation with flash light from the flash lamp FL. This flash heat treatment activates the impurities implanted in the semiconductor wafer W.

After the flash heating process is completed, the gate valve 185 reopens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 carries out the semiconductor wafer W after the flash heating process from the processing chamber 6 to the transfer chamber 170. .. The transfer robot 150 that has taken out the semiconductor wafer W revolves from the processing chamber 6 toward the first cool chamber 131 or the second cool chamber 141. Further, the gate valve 185 closes the gap between the processing chamber 6 and the transfer chamber 170.

Thereafter, the transfer robot 150 carries the semiconductor wafer W after the heat treatment into the first cool chamber 131 of the cooling unit 130 or the second cool chamber 141 of the cooling unit 140. At this time, when the semiconductor wafer W has passed through the first cool chamber 131 before the heat treatment, it is carried into the first cool chamber 131 even after the heat treatment, and passes through the second cool chamber 141 before the heat treatment. In that case, it is carried into the second cool chamber 141 even after the heat treatment. In the first cool chamber 131 or the second cool chamber 141, the cooling process of the semiconductor wafer W after the flash heating process is performed. Since the temperature of the entire semiconductor wafer W is relatively high at the time of being unloaded from the processing chamber 6 of the heat treatment unit 160, it is cooled to near room temperature in the first cool chamber 131 or the second cool chamber 141. is there.

After the lapse of a predetermined cooling processing time, the delivery robot 120 carries out the cooled semiconductor wafer W from the first cool chamber 131 or the second cool chamber 141 and returns it to the carrier C. When a predetermined number of processed semiconductor wafers W are stored in the carrier C, the carrier C is unloaded from the load port 110 of the indexer unit 101.

Continued explanation of the heat treatment in the heat treatment section 160. Prior to the loading of the semiconductor wafer W into the processing chamber 6, the valve 84 for air supply is opened, and the

valves

89, 192 for gas exhaust are opened to start air supply / exhaust to / from the processing chamber 6. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. Further, when the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper portion of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower portion of the heat treatment space 65.

Further, by opening the valve 192, the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). It should be noted that nitrogen gas is continuously supplied to the heat treatment space 65 during the heat treatment of the semiconductor wafer W in the heat treatment unit 160, and the supply amount thereof is appropriately changed according to the treatment process.

Subsequently, the gate valve 185 is opened to open the transfer opening 66, and the transfer robot 150 transfers the semiconductor wafer W to be processed into the heat treatment space 65 in the processing chamber 6 through the transfer opening 66. The transfer robot 150 advances the transfer hand 151 a (or the transfer hand 151 b) holding the unprocessed semiconductor wafer W to a position directly above the holding unit 7 and stops it. Then, the pair of transfer arms 11 of the transfer mechanism 10 horizontally moves from the retracted position to the transfer operation position and rises, so that the lift pin 12 projects from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receives the semiconductor wafer W. At this time, the lift pins 12 rise above the upper ends of the substrate support pins 77.

After the unprocessed semiconductor wafer W is placed on the lift pins 12, the transfer robot 150 causes the transfer hand 151 a to exit the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 descends, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held from below in a horizontal posture. The semiconductor wafer W is supported by a plurality of substrate support pins 77 provided upright on a holding plate 75 and held by the susceptor 74. Further, the semiconductor wafer W is held by the holding unit 7 with the surface on which the pattern is formed and the impurities are injected as the upper surface. A predetermined space is formed between the back surface (main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75. The pair of transfer arms 11 descending below the susceptor 74 are retracted by the horizontal movement mechanism 13 to the retracted position, that is, inside the recess 62.

After the semiconductor wafer W is horizontally held by the susceptor 74 of the holding unit 7 from below, the 40 halogen lamps HL are simultaneously turned on and preheating (assist heating) is started. The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the lower surface of the semiconductor wafer W. The semiconductor wafer W is preheated by the light irradiation from the halogen lamp HL, and the temperature rises. Since the transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, it does not hinder the heating by the halogen lamp HL.

When performing preheating with the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the radiation thermometer 20. That is, the infrared thermometer 20 receives infrared light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and measures the wafer temperature during the temperature rise. The measured temperature of the semiconductor wafer W is transmitted to the controller 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the semiconductor wafer W, which is heated by the light irradiation from the halogen lamp HL, reaches a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL based on the value measured by the radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. The preheating temperature T1 is set to about 600 ° C. to 800 ° C. (700 ° C. in this embodiment) at which the impurities added to the semiconductor wafer W are not likely to diffuse by heat.

After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL, and the temperature of the semiconductor wafer W is almost spared. The heating temperature T1 is maintained.

By performing such preheating with the halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. At the stage of preheating by the halogen lamp HL, the temperature of the peripheral portion of the semiconductor wafer W, which is more likely to generate heat, tends to be lower than that of the central portion. The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the amount of light applied to the peripheral portion of the semiconductor wafer W where heat dissipation easily occurs increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.

The flash lamp FL irradiates the surface of the semiconductor wafer W with flash light when a predetermined time elapses after the temperature of the semiconductor wafer W reaches the preheating temperature T1. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the processing chamber 6, and another part of the flash light is once reflected by the reflector 52 and then goes into the processing chamber 6, and these flashes are emitted. The semiconductor wafer W is flash-heated by the irradiation of light.

The flash heating is performed by irradiating flash light (flash light) from the flash lamp FL, so that the surface temperature of the semiconductor wafer W can be raised in a short time. That is, the flash light emitted from the flash lamp FL is converted into a light pulse in which the electrostatic energy stored in the condenser in advance is extremely short, and the irradiation time is extremely short, that is, about 0.1 millisecond or more and 100 millisecond or less. It is a strong flash. Then, the surface temperature of the semiconductor wafer W flash-heated by the irradiation of the flash light from the flash lamp FL instantaneously rises to the processing temperature T2 of 1000 ° C. or higher, and the impurities implanted in the semiconductor wafer W are activated. After that, the surface temperature drops rapidly. In this way, since the surface temperature of the semiconductor wafer W can be raised and lowered in a very short time by flash heating, it is possible to activate the impurities while suppressing the diffusion of the impurities injected into the semiconductor wafer W due to heat. . Since the time required for activation of impurities is extremely short as compared with the time required for thermal diffusion thereof, activation is not performed even in a short time in which diffusion of about 0.1 msec to 100 msec does not occur. Complete.

After the flash heating process is completed, the halogen lamp HL is turned off after a lapse of a predetermined time. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W during cooling is measured by the radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature based on the measurement result of the radiation thermometer 20. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 again horizontally moves from the retracted position to the transfer operation position and rises, whereby the lift pin 12 is lifted. The semiconductor wafer W that has protruded from the upper surface of 74 and has undergone the heat treatment is received from the susceptor 74. Then, the transfer opening 66 closed by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer hand 151b (or the transfer hand 151a) of the transfer robot 150. It The transfer robot 150 advances the transfer hand 151b to a position directly below the semiconductor wafer W pushed up by the lift pins 12 and stops it. Then, when the pair of transfer arms 11 descend, the semiconductor wafer W after the flash heating is transferred to and placed on the transfer hand 151b. After that, the transfer robot 150 moves the transfer hand 151b out of the processing chamber 6 and carries out the processed semiconductor wafer W.

By the way, typically, the semiconductor wafer W is processed in lot units. A lot is a set of semiconductor wafers W to be processed with the same contents under the same conditions. Also in the heat treatment apparatus 100 of the present embodiment, a plurality of semiconductor wafers W (for example, 25 wafers) forming a lot are accommodated in one carrier C, placed on the load port 110 of the indexer unit 101, and the carrier C The semiconductor wafers W are sequentially loaded one by one into the processing chamber 6 and subjected to heat treatment.

Here, when processing of a lot is started in the heat treatment apparatus 100 which has not been processed for a while, the first semiconductor wafer W of the lot is loaded into the processing chamber 6 at about room temperature, and preheating and flash heating processing are performed. It will be. In such a case, for example, the first lot is processed after the heat treatment apparatus 100 is activated after maintenance, or a long time has elapsed after processing the previous lot. During the heat treatment, heat is generated from the heated semiconductor wafer W to the internal structure of the chamber such as the susceptor 74. Therefore, the susceptor 74, which was initially at room temperature, gradually rises due to heat accumulation as the number of processed semiconductor wafers W increases. It will be warm. Further, since a part of the infrared light emitted from the halogen lamp HL is absorbed by the lower chamber window 64, the temperature of the lower chamber window 64 should gradually rise as the number of processed semiconductor wafers W increases. Becomes

The temperature of the susceptor 74 and the lower chamber window 64 reaches a certain stable temperature when the heat treatment of about 10 semiconductor wafers W is performed. In the susceptor 74 that has reached the stable temperature, the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat released from the susceptor 74 are balanced. Until the temperature of the susceptor 74 reaches a stable temperature, the amount of heat transferred from the semiconductor wafer W is larger than the amount of heat released from the susceptor 74, so the temperature of the susceptor 74 gradually accumulates as the number of processed semiconductor wafers W increases. To rise. On the other hand, after the temperature of the susceptor 74 reaches the stable temperature, the heat transfer amount from the semiconductor wafer W and the heat radiation amount from the susceptor 74 are balanced, so that the temperature of the susceptor 74 is maintained at a constant stable temperature. The Rukoto. Note that the stable temperature means that the temperature of the susceptor 74 rises and becomes constant by performing the heat treatment on the plurality of semiconductor wafers W in the lot continuously without preheating the susceptor 74. It is the temperature of the susceptor 74 at the time. Further, after the temperature of the lower chamber window 64 reaches a stable temperature, the amount of heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL and the amount of heat released from the lower chamber window 64 are balanced. The temperature of the lower chamber window 64 will also be maintained at a constant stable temperature.

When the processing is started in the processing chamber 6 at room temperature as described above, the temperature history of the semiconductor wafer W in the initial stage of the lot is different from that of the semiconductor wafer W in the middle of the process because the temperature of the structure in the processing chamber 6 is different. There was a problem of becoming uniform. Further, since the semiconductor wafer W in the initial stage is supported by the low temperature susceptor 74 and subjected to the flash heat treatment, the wafer may be warped. Therefore, before the processing of the lot is started, a dummy wafer that is not the processing target is loaded into the processing chamber 6 and subjected to the same heat treatment as the semiconductor wafer W that is the processing target to remove the internal structure of the chamber such as the susceptor 74. Dummy running (dummy process) of raising the temperature to a stable temperature is performed. By performing the heat treatment on about ten dummy wafers, the internal structure of the chamber such as the susceptor 74 can be heated to a stable temperature. Such a dummy process is executed not only when the process is started in the process chamber 6 at room temperature but also when the preheating temperature T1 or the process temperature T2 is changed. As described above, various defects may occur when the dummy processing is performed on the product wafer or the deteriorated dummy wafer. Therefore, it is necessary to properly manage the state of the dummy wafer during the dummy processing. Hereinafter, management of dummy wafers in the heat treatment apparatus 100 will be described.

FIG. 11 is a flowchart showing the procedure for managing dummy wafers. The dummy wafer is a disk-shaped silicon wafer similar to the semiconductor wafer (product wafer) W to be processed, and has the same size and shape as the product wafer W. However, pattern formation and ion implantation are not performed on the dummy wafer. That is, the dummy wafer is a so-called bare silicon wafer.

Further, the dummy wafer is housed and operated in a carrier C (dummy carrier) dedicated to the dummy wafer, which is different from the carrier C housing the product wafer W. When the carrier C dedicated to such a dummy wafer is placed on the load port 110 of the indexer unit 101, the tag attached to the carrier C is read and it is determined that the carrier C is a registered dummy carrier. Recognized by 3. The control unit 3 determines that the wafer to be transferred is a dummy wafer when the wafer to be started is a wafer contained in a dummy carrier. The form itself of the carrier C for exclusive use of the dummy wafer is the same as that of the carrier C for accommodating the normal semiconductor wafer W, and is FOUP in this embodiment.

A dummy carrier containing a plurality of dummy wafers is placed on the load port 110 of the indexer unit 101, and the operator of the heat treatment apparatus 100 gives an instruction to start the dummy processing from the touch panel 33 (step S1). When the processing start is instructed, the delivery robot 120 takes out one dummy wafer from the dummy carrier and conveys it to the alignment chamber 231 under the control of the control unit 3 (step S2).

In the alignment chamber 231, the dummy wafer loaded by the delivery robot 120 is supported by the rotation support unit 237. Then, the reflectance measuring section 232 measures the reflectance of the surface of the dummy wafer supported by the rotation supporting section 237 (step S3). Specifically, the light emitted from the light projecting unit 300 of the reflectance measuring unit 232 is reflected by the half mirror 236 and is irradiated onto the surface of the dummy wafer at an incident angle of 0 °. The light emitted from the light projecting unit 300 is reflected on the surface of the dummy wafer, and the reflected light is transmitted through the half mirror 236 and received by the light receiving unit 235. The reflectance calculating unit 31 calculates the reflectance of the surface of the dummy wafer by dividing the intensity of the reflected light from the dummy wafer received by the light receiving unit 235 by the intensity of the light emitted by the light projecting unit 300. Note that the reflectance of the dummy wafer may be measured while rotating the dummy wafer supported by the rotation support portion 237 by the rotation motor 238.

Next, the determination unit 35 of the control unit 3 compares and determines the reflectance of the measured dummy wafer with the threshold value (step S4). More specifically, the determination unit 35 determines whether the reflectance of the dummy wafer is out of the allowable range with respect to the threshold value. In the present embodiment, the reflectance of a bare silicon wafer is used as a threshold for determination. The reflectance of a bare silicon wafer on which no pattern or film is formed is a well-known physical property value. Such a threshold value is, for example, previously input from the touch panel 33 and stored in the storage unit of the control unit 3.

When the reflectance of the dummy wafer measured by the reflectance measuring unit 232 is out of the allowable range of ± 3% with respect to the reflectance of the bare silicon wafer, it is determined that the dummy wafer is not a normal dummy wafer. .. Since the dummy wafer is also a bare silicon wafer, the reflectance of the normal dummy wafer is almost the same as the reflectance of the bare silicon wafer. Therefore, when the measured reflectance of the dummy wafer is out of the allowable range of ± 3% with respect to the reflectance of the bare silicon wafer, it is estimated that the dummy wafer is not a normal dummy wafer. It is assumed that the dummy wafer is deteriorated (film formation, warpage, melt, etc.) by repeated dummy processing, or the wafer whose reflectance is measured is not a dummy wafer in the first place. The former is a case where the reflectance changes (usually decreases) with the deterioration of the dummy wafer and is out of the allowable range. In the latter case, a product wafer or the like having a pattern formed by mistake is about to be subjected to dummy processing. If the product wafers are erroneously mixed in the dummy carrier or the carrier C accommodating the product wafers is erroneously registered as a dummy carrier, the product wafer may be the target of the dummy processing. There is also.

In either case, when the measured reflectance of the dummy wafer is out of the allowable range of ± 3% with respect to the reflectance of the bare silicon wafer, the process proceeds from step S4 to step S6, and The reporting unit 36 issues an alarm. For example, the reporting unit 36 displays a warning on the touch panel 33 that the reflectance of the dummy wafer is abnormal. Succeedingly, in a step S7, the control unit 3 stops the dummy processing in the heat treatment apparatus 100.

On the other hand, when the reflectance of the dummy wafer measured by the reflectance measuring unit 232 is within ± 3% of the reflectance of the bare silicon wafer, the dummy wafer is a normal dummy wafer having no problem. Is determined. In this case, the process proceeds from step S4 to step S5, and the dummy process for the dummy wafer is continued. That is, the dummy wafer is taken out of the alignment chamber 231 by the delivery robot 120 and delivered to the transfer robot 150 via the first cool chamber 131 or the second cool chamber 141. The transfer robot 150 carries the received dummy wafer into the processing chamber 6 of the thermal processing section 160. In the processing chamber 6, heat treatment according to the recipe for dummy is performed on the dummy wafer. As a result, the heat radiation and heat conduction from the heated dummy wafer heats the chamber internal structure such as the susceptor 74 and approaches a stable temperature. The dummy wafer after the heat treatment is returned to the dummy carrier by the delivery robot 120 and the transfer robot 150. By performing a dummy process on several dummy wafers, the internal structure of the chamber such as the susceptor 74 is controlled to a stable temperature.

In the present embodiment, the reflectance of the surface of the dummy wafer to be subjected to the dummy processing is measured, and if the reflectance is out of the predetermined range set in advance, an alarm is issued and further dummy processing is performed. I'm trying to stop. For this reason, it is possible to prevent the occurrence of defects due to the dummy wafer or the product wafer, which has deteriorated, being mistakenly subjected to dummy processing, and to perform proper dummy processing on a normal dummy wafer.

The embodiments of the present invention have been described above, but the present invention can be modified in various ways other than those described above without departing from the spirit of the invention. For example, in the above-described embodiment, the allowable range is ± 3% with respect to the reflectance of the bare silicon wafer, but the present invention is not limited to this, and ± 5% may be the allowable range, or ± 1%. May be set as an allowable range. The narrower the allowable range, the more strict the judgment with respect to the reflectance of the dummy wafer.

Further, in the above-described embodiment, the reflectance measuring section 232 is provided in the alignment chamber 231, but the present invention is not limited to this, and the reflectance measuring section 232 may be provided at any position on the transfer path of the semiconductor wafer W ( For example, it may be provided in the first cool chamber 131 or the second cool chamber 141).

Further, in the above-described embodiment, the flash lamp house 5 is provided with 30 flash lamps FL, but the number is not limited to this, and the number of flash lamps FL can be any number. .. Further, the flash lamp FL is not limited to the xenon flash lamp and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen lamp house 4 is not limited to 40, and may be any number.

In the above embodiment, the filament type halogen lamp HL is used as the continuous lighting lamp that continuously emits light for 1 second or more to preheat the semiconductor wafer W, but the present invention is not limited to this. Instead of the halogen lamp HL, a discharge type arc lamp (for example, a xenon arc lamp) may be used as a continuous lighting lamp for preheating. In this case, the dummy process for the dummy wafer is also performed by the light irradiation from the arc lamp.

The substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a solar cell substrate.

3 Control part 4 Halogen lamp house 5 Flash lamp house 6 Processing chamber 7 Holding part 10 Transfer mechanism 31 Reflectance calculation part 33 Touch panel 35 Judgment part 36 Notification part 65 Heat treatment space 74 Susceptor 100 Heat treatment device 101 Indexer part 120

Delivery robot

130 , 140 Cooling part 150

Transfer robot

151a, 151b Transfer hand 160 Heat treatment part FL Flash lamp HL Halogen lamp W Semiconductor wafer

Claims

A heat treatment method for controlling a dummy wafer,
A measuring step for measuring the reflectance of the surface of the dummy wafer,
And a reporting step of issuing a warning when the reflectance of the dummy wafer measured in the measuring step is out of a predetermined range,
A heat treatment method comprising.
The heat treatment method according to claim 1,
A heat treatment method of further stopping the processing on the dummy wafer when the reflectance of the dummy wafer measured in the measuring step is out of the predetermined range.
In the heat treatment method according to claim 1 or 2,
The heat treatment method wherein the predetermined range is within ± 3% from the reflectance of the bare silicon wafer.
A heat treatment apparatus for managing dummy wafers,
A heat treatment section for heat treating the dummy wafer,
A reflectance measurement unit for measuring the reflectance of the surface of the dummy wafer,
A reporting unit that issues a warning when the reflectance of the dummy wafer measured by the reflectance measuring unit is out of a predetermined range,
A heat treatment apparatus comprising.
The heat treatment apparatus according to claim 4,
A heat treatment apparatus for further stopping the processing on the dummy wafer when the reflectance of the dummy wafer measured by the reflectance measuring unit is out of the predetermined range.
The heat treatment apparatus according to claim 4 or 5,
The heat treatment apparatus in which the predetermined range is within ± 3% from the reflectance of a bare silicon wafer.