WO2020119065A1 - 半导体器件激光剥离方法 - Google Patents

半导体器件激光剥离方法 Download PDF

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WO2020119065A1
WO2020119065A1 PCT/CN2019/092755 CN2019092755W WO2020119065A1 WO 2020119065 A1 WO2020119065 A1 WO 2020119065A1 CN 2019092755 W CN2019092755 W CN 2019092755W WO 2020119065 A1 WO2020119065 A1 WO 2020119065A1
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semiconductor device
substrate
groove
semiconductor
periphery
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French (fr)
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张豪峰
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Yungu Guan Technology Co Ltd
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Yungu Guan Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H10P72/7442—Separation by peeling
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This application relates to the field of semiconductor manufacturing, and in particular to a laser stripping method for semiconductor devices.
  • a laser is usually used to peel the semiconductor device from the substrate.
  • An aspect of the present application provides a laser stripping method for a semiconductor device.
  • the semiconductor device is located on a surface of a substrate.
  • the method includes: etching a groove on a periphery of a portion where the semiconductor device is connected to the substrate, the groove is used to release the Shock wave generated when the semiconductor device is irradiated with laser; using laser to irradiate the connection surface between the semiconductor device and the substrate, so that the semiconductor device is separated from the substrate.
  • the substrate before etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate, it further includes: generating a passivation layer on the surface of the semiconductor device, wherein the passivation layer covers the surface of the non-etched portion of the semiconductor device.
  • the passivation layer includes: a silicon nitride passivation layer, a silicon oxide passivation layer, or a polyimide passivation layer.
  • etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate includes: etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate using an etching solution.
  • the etching solution includes: hydrochloric acid or phosphoric acid.
  • etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate includes: etching the arc-shaped groove at the periphery of the portion where the semiconductor device is connected to the substrate.
  • a loose semiconductor layer is provided at a portion where the semiconductor device is connected to the substrate, the loose semiconductor layer is connected to the substrate, and the crystal density of the loose semiconductor layer is less than the crystal density of the semiconductor device;
  • the peripheral etching groove of the portion connected to the substrate includes: etching the groove on the periphery of the loose semiconductor layer.
  • a sacrificial layer is provided at a portion where the semiconductor device is connected to the substrate.
  • etching the groove on the portion where the semiconductor device is connected to the substrate includes: etching the groove on the periphery of the sacrificial layer.
  • the material of the sacrificial layer includes tin or copper.
  • the substrate includes a sapphire substrate; the component of the portion where the semiconductor device is connected to the substrate includes gallium nitride; and the semiconductor device includes a light emitting diode device.
  • etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate includes: etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate using laser plasma.
  • the semiconductor device is used to manufacture a display device or a lighting device.
  • the shock wave generated after the laser irradiation passes through the groove, and is guided parallel to the plane of the substrate to reduce
  • the yield of the semiconductor device is improved, and the service life of the substrate is extended.
  • FIG. 1 is a flowchart of a semiconductor device laser lift-off method according to an exemplary embodiment of the present application.
  • Fig. 2 is a schematic diagram of a laser lift-off method of a semiconductor device according to an exemplary embodiment of the present application.
  • Fig. 3 is a flowchart of a method for laser lift-off of a semiconductor device according to another exemplary embodiment of the present application.
  • the semiconductor material irradiated by the laser When the laser peels the substrate, the semiconductor material irradiated by the laser generates high-pressure gas. Because the gas is sealed at the connection surface between the semiconductor device and the substrate at the moment of irradiation, it will cause a large The shock wave causes damage to the semiconductor device or substrate.
  • FIG. 1 is a flowchart of a semiconductor device laser lift-off method according to an exemplary embodiment of the present application, where the semiconductor device is located on a surface of a substrate. As shown in Figure 1, the method includes:
  • a groove is etched on the periphery of a portion where the semiconductor device is connected to the substrate, wherein the groove is used to release the shock wave generated when the semiconductor device is irradiated with laser light.
  • the semiconductor device is formed on the substrate.
  • a semiconductor device with a certain function and structure is manufactured.
  • Each semiconductor device is connected to the substrate via the remaining semiconductor layer on the substrate.
  • the portion of the semiconductor layer close to the connection surface is the portion where the semiconductor device is connected to the substrate.
  • the groove is formed by etching with an etching medium.
  • an etching medium For example, a corrosive medium with a thickness smaller than that of the semiconductor layer is coated on the substrate, and the periphery of the portion where the semiconductor device is connected to the substrate is etched, thereby generating a groove.
  • laser plasma is used to etch the periphery of the portion where the half-layer device is connected to the substrate to generate a groove.
  • focusing the microwave on the part to be etched of the semiconductor device, and exciting the plasma by the microwave can etch the groove on the semiconductor device.
  • the embodiment of the present application does not limit the method of etching the groove.
  • the grooves are distributed around the semiconductor device. In another embodiment of the present application, the grooves are distributed on at least one side of the semiconductor device. This embodiment of the present application does not limit this.
  • the depth and shape of the groove do not have a significant impact on the method provided by the embodiments of the present application, but only have a significant effect on the etching time of the embodiment of the present application.
  • the depth and shape of the groove can be specifically set according to the needs of the process Certainly, this embodiment of the present application does not limit this.
  • a shock wave is generated by irradiating the connection surface with a laser, so that the semiconductor device is separated from the substrate.
  • the semiconductor on the connection surface changes physically or chemically.
  • the laser causes the semiconductor substance to vaporize or decompose into a gaseous substance, which in turn generates a greater pressure on the semiconductor and the substrate. Due to the existence of the groove, the semiconductor substance that has undergone physical or chemical changes is led out of the groove, so that while the semiconductor device is separated from the substrate, the shock wave generated by the laser irradiation is guided out of the connection surface through the groove.
  • the technical solution provided by the embodiment of the present application etches the groove on the periphery of the portion where the semiconductor device is connected to the substrate, so that the shock wave generated after the laser irradiation passes through the groove, and guides in a direction parallel to the plane of the substrate to reduce the The destruction of semiconductor devices and substrates improves the yield of semiconductor devices and extends the service life of substrates.
  • the substrate includes a sapphire substrate; the composition of the portion where the semiconductor device is connected to the substrate includes gallium nitride; and the semiconductor device includes a light-emitting diode device.
  • the solution provided by the embodiment of the present application can reduce the damage of the semiconductor device and the substrate, improve the yield of the semiconductor device, and extend the service life of the substrate during the process of peeling the GaN light emitting diode from the sapphire substrate.
  • the above semiconductor device is used to manufacture a display device or a lighting device.
  • the solution provided by the embodiments of the present application can reduce the damage of the semiconductor device and the substrate, improve the yield of the semiconductor device, and extend the service life of the substrate in the process of manufacturing the semiconductor device for the display device or the lighting device .
  • it further includes: a passivation layer provided on the surface of the semiconductor device, wherein the passivation layer covers the surface of the non-etched portion of the semiconductor device.
  • the passivation layer is composed of a material that will not be corroded by the corrosive medium.
  • the composition of the passivation layer is silicon nitride, silicon oxide, or polyimide.
  • the composition of the passivation layer is an inert metal, which is not limited in the embodiment of the present application.
  • the passivation layer is provided on the surface of the semiconductor device by epitaxial growth.
  • the height of the semiconductor device is 20 ⁇ m, which is located on the upper surface of the substrate.
  • a layer of 1 ⁇ m thick colloid is provided on the upper surface of the substrate, and the colloid covers the 1 ⁇ m thick semiconductor material on the semiconductor device.
  • a layer of silicon nitride is grown on the surface of the semiconductor device as a passivation layer by epitaxial growth. After the growth is completed, the colloid is washed away to expose the semiconductor material to be etched.
  • a passivation layer is provided on the surface of the semiconductor device by vapor deposition.
  • the semiconductor layer close to the substrate is exposed outside the passivation layer.
  • an inert metal is vapor-deposited as a passivation layer.
  • the inert metal in the gas phase first passes through the surface of the semiconductor device and then contacts the semiconductor layer close to the substrate.
  • concentration of inert metal in the gas phase By reducing the concentration of inert metal in the gas phase, after the inert metal is deposited and consumed on the surface of the semiconductor device, it is insufficient to form a passivation film on the semiconductor layer close to the substrate, thereby exposing the semiconductor material to be etched outside the passivation layer .
  • the embodiment of the present application does not limit the generation method of the passivation layer.
  • the thickness of the passivation layer can be adjusted according to specific production needs, which is not limited in the embodiments of the present application.
  • the etching effect of the etching medium can be directed to the connection portion of the semiconductor device and the substrate to prevent the semiconductor device from being damaged.
  • the above passivation layer includes: a silicon nitride passivation layer, a silicon oxide passivation layer, or a polyimide passivation layer.
  • the silicon nitride, silicon oxide passivation layer or polyimide passivation layer can not only protect the semiconductor material from corrosion, but also will not pollute the semiconductor material.
  • an etching medium is used to etch the groove on the periphery of the portion where the semiconductor device is connected to the substrate.
  • the etching medium is an etching solution.
  • the liquid substance is easier to handle than the gaseous substance, so that the corrosion can target the connection part of the semiconductor device and the substrate to prevent the semiconductor device from being damaged.
  • the etching solution includes: hydrochloric acid or phosphoric acid.
  • hydrochloric acid or phosphoric acid is used as an etching solution.
  • Hydrochloric acid and phosphoric acid are common chemical preparations, which are low in price and easy to obtain, which is conducive to reducing production costs.
  • etching the groove at the periphery of the portion where the semiconductor device is connected to the substrate includes: etching the arc-shaped groove at the periphery of the portion where the semiconductor device is connected to the substrate, wherein the groove The area of the connection surface between the semiconductor device and the substrate is reduced.
  • the area of the connection surface is reduced, and the arc-shaped design of the groove makes the semiconductor device connected in a “mushroom” shape.
  • an anisotropic etching medium is used to etch the semiconductor device. Since the semiconductor material at the connection surface is more likely to chemically react with the anisotropic corrosion medium, the area of the connection surface is reduced.
  • the laser is irradiated around the connection surface, so that the area of the connection surface is reduced. The embodiment of the present application does not limit the specific etching method.
  • Anisotropic corrosion media can be generally divided into two categories: one is organic corrosives, including tetramethylamine hydroxide (TMAH), etc., and the other is inorganic corrosives, including potassium hydroxide (KOH), sodium hydroxide (NaOH) ) Or lithium hydroxide (LiOH), etc.
  • organic corrosives including tetramethylamine hydroxide (TMAH), etc.
  • inorganic corrosives including potassium hydroxide (KOH), sodium hydroxide (NaOH) ) Or lithium hydroxide (LiOH), etc.
  • the semiconductor device By reducing the area of the connection surface, the semiconductor device is partially separated from the substrate, reducing the time required for subsequent processes and improving production efficiency.
  • the sacrificial layer is made of a substance that is easily corroded by the corrosive medium.
  • the sacrificial layer is composed of microcrystalline semiconductor material.
  • the sacrificial layer is composed of a metal that is easily corroded by a corrosive medium.
  • the metal may be tin, copper, or other metals, for example, and the specific composition of the sacrificial layer is not limited in the embodiments of the present application.
  • the sacrificial layer is provided on the substrate by epitaxial growth, and then the sacrificial layer is used as the substrate to manufacture a semiconductor device.
  • the sacrificial layer is provided on the substrate by plating, and then the sacrificial layer is used as the substrate to manufacture a semiconductor device.
  • the embodiment of the present application does not limit the method of generating the sacrificial layer.
  • the time required to etch the groove is shortened by providing the sacrificial layer, thereby improving production efficiency.
  • FIG. 2 is a schematic diagram showing a laser lift-off method of a semiconductor device according to another exemplary embodiment of the present application. As shown in the figure, FIG. 2 includes: a substrate 210, a semiconductor device 220, a loose semiconductor layer 230, a passivation layer 240, and a groove 250.
  • the semiconductor device 220 is fixed above the substrate 210 by the loose semiconductor layer 230.
  • the surface of the semiconductor device 220 is wrapped by the passivation layer 240.
  • the passivation layer 240 also wraps a part of the loose semiconductor layer 230.
  • the passivation layer 240 only wraps the semiconductor device 220 and exposes the loose semiconductor layer 230 completely, which is not limited in the embodiment of the present application.
  • the groove 250 is etched on the loose semiconductor layer 230 not covered by the passivation layer 240.
  • the groove 250 reduces the area of the connection surface between the loose semiconductor layer 230 and the substrate 210, and the semiconductor device 220 and the loose semiconductor layer 230 are fixed on the substrate 210 in a "mushroom" shape.
  • the solid line with arrows in the figure indicates the laser light, and the laser light irradiates the connection surface between the loose semiconductor layer 230 and the substrate 210 from below the substrate 210 (the side away from the semiconductor device), so that the loose semiconductor layer 230
  • a loose semiconductor layer is provided at a portion where the semiconductor device is connected to the substrate, wherein the loose semiconductor layer is located at a portion where the semiconductor device is connected to the substrate, and the crystal density of the loose semiconductor layer is less than that of the semiconductor device Crystal density, and grooves can be etched on the loose semiconductor layer.
  • Fig. 3 is a flowchart of a method for laser lift-off of a semiconductor device according to another exemplary embodiment of the present application. As shown in FIG. 3, the method includes:
  • a loose semiconductor layer is formed on the substrate.
  • the semiconductor device is a gallium nitride semiconductor device, and by controlling the epitaxial growth conditions of gallium nitride on the substrate, a layer of gallium nitride semiconductor with a smaller grain size and a looser grain arrangement is generated .
  • a small amount of metal powder having a low lattice matching with gallium nitride is provided on the substrate, so that a loose gallium nitride semiconductor layer is epitaxially grown on the substrate.
  • a layer of loose gallium nitride semiconductor layer is epitaxially grown on the substrate.
  • the embodiment of the present application does not limit the method of generating the loose semiconductor layer.
  • the composition of the loose semiconductor layer is the same as the composition of the semiconductor material constituting the semiconductor device, the crystal size in the loose semiconductor layer is small, and the arrangement is loose.
  • a loose semiconductor layer is generated.
  • a metal thin film with a low lattice matching degree with the semiconductor crystal is first provided on the substrate, so that the crystal size of the semiconductor grown on the metal thin film is small and the arrangement is loose.
  • the semiconductor epitaxially grown on the substrate becomes loose.
  • the substrate is covered with a layer of silicon dioxide impurities first, and then the semiconductor is epitaxially grown on the substrate. Due to the presence of impurities, the semiconductor is relatively loose.
  • the embodiment of the present application does not limit the method of generating the loose semiconductor layer.
  • the provision of the loose semiconductor layer shortens the time required to etch the grooves and improves production efficiency.
  • a semiconductor layer is epitaxially grown on the loose semiconductor layer, and the semiconductor layer is processed into a semiconductor device.
  • the composition of the loose semiconductor layer is the same as that of the semiconductor layer, using the existing epitaxial growth technology, a satisfactory semiconductor layer can be grown on the loose semiconductor layer, and then the semiconductor layer and the loose semiconductor layer are lithographically processed and processed to make a semiconductor Device.
  • a passivation layer is formed on the surface of the semiconductor device, wherein the passivation layer covers the surface of the non-etched portion of the semiconductor device.
  • the composition of the passivation layer is silicon nitride. It is provided on the surface of the semiconductor device by vapor deposition. By controlling the conditions of vapor deposition, the loose semiconductor layer close to the substrate is exposed outside the passivation layer. For example, in the embodiment of the present application, the vapor-phase silicon nitride first flows through the surface of the semiconductor device and then contacts the loose semiconductor layer.
  • the concentration of vapor-phase silicon nitride is insufficient to form a passivation film on the loose semiconductor layer, thereby exposing the loose semiconductor layer to be etched to the passive Outside the layer.
  • an acidic etching solution mainly composed of phosphoric acid is used to etch the loose semiconductor layer. Since the semiconductor device is protected by the passivation layer, it will not be corroded by the etching solution, so that the etching solution only corrodes the loose semiconductor layer exposed outside the passivation layer, so that the area of the connection surface between the loose semiconductor layer and the substrate is reduced.
  • a laser is used to irradiate the connection surface of the loose semiconductor layer and the substrate, thereby generating a shock wave, so that the semiconductor device is separated from the substrate, and the shock wave is discharged through the groove.
  • the substrate is a sapphire substrate
  • the laser can irradiate the connection surface between the loose semiconductor layer and the substrate through the sapphire substrate.
  • gallium nitride decomposes to generate nitrogen gas.
  • the nitrogen gas generated at the moment of decomposition is sealed in the connection surface, so the pressure is very high, which will cause shock waves to the semiconductor device and the substrate, but due to the existence of the groove, the reduction
  • the impact resistance of the loose semiconductor layer at the groove is made, so that nitrogen can break through the loose semiconductor layer at the groove, releasing the shock wave generated by laser irradiation, protecting the semiconductor device and the substrate.
  • the process of nitrogen breaking the loose semiconductor layer also makes The semiconductor device and the substrate are separated from each other.

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Abstract

一种半导体器件激光剥离方法，半导体器件（220）位于衬底（210）的一表面，该方法包括：在半导体器件（220）与衬底（210）相连接的部位的外围刻蚀凹槽（250）；使用激光照射半导体器件（220）与衬底（210）之间的连接面，进而产生冲击波，使得半导体器件（220）与衬底（210）相分离，并且，冲击波通过凹槽（250）导泻出去，使得激光照射后产生的冲击波通过凹槽（250），沿平行与衬底（210）平面的方向导泻，减少了对半导体器件（220）和衬底（210）的破坏，提升了半导体器件（220）的良率，并且延长了衬底（210）的使用寿命。

Description

半导体器件激光剥离方法 技术领域
本申请涉及半导体制造领域，尤其涉及一种半导体器件激光剥离方法。
发明背景
半导体器件的制造过程中，通常使用激光将半导体器件从衬底上剥离。
发明内容
本申请的一个方面提供一种半导体器件激光剥离方法，半导体器件位于衬底的一表面，该方法包括：在半导体器件与衬底相连接的部位的外围刻蚀凹槽，凹槽用于释放在半导体器件受到激光照射时所产生的冲击波；使用激光照射半导体器件与衬底之间的连接面，使得半导体器件与衬底相分离。
可选地，在半导体器件与衬底相连接的部位的外围刻蚀凹槽前，还包括：在半导体器件表面生成钝化层，其中，钝化层覆盖半导体器件的非刻蚀部分的表面。
在本申请的一个实施例中，钝化层包括：氮化硅钝化层、氧化硅钝化层或聚酰亚胺钝化层。
在本申请的一个实施例中，在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：使用刻蚀液在半导体器件与衬底相连接的部位的外围刻蚀凹槽。
在本申请的一个实施例中，刻蚀液包括：盐酸或磷酸。
在本申请的一个实施例中，在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：在半导体器件与衬底相连接的部位的外围刻蚀弧形凹槽。
在本申请的一个实施例中，半导体器件与衬底相连接的部位设置有疏松半导体层，疏松半导体层与衬底相连接，并且疏松半导体层的晶体密度小于半导体器件的晶体密度；在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：在疏松半导体层的外围刻蚀凹槽。
在本申请的一个实施例中，半导体器件与衬底相连接的部位设置有牺牲层。
在本申请的一个实施例中，在半导体器件与衬底相连接的部位上刻蚀凹槽包括：在牺牲层的外围刻蚀凹槽。
在本申请的一个实施例中，牺牲层的材料包括锡或铜。
在本申请的一个实施例中，衬底包括蓝宝石衬底；半导体器件与衬底相连接的部位的成分包括氮化镓；半导体器件包括发光二极管器件。
在本申请的一个实施例中，在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：使用激光等离子体在半导体器件与衬底相连接的部位的外围刻蚀凹槽。
在本申请的一个实施例中，半导体器件用于制造显示装置或照明装置。
根据本申请实施例提供的技术方案，通过在半导体器件与衬底相连接的部位上刻蚀凹槽，使得激光照射后产生的冲击波通过凹槽，沿平行与衬底平面的方向导泻，减少了对半导体器件和衬底的破坏，提升了半导体器件的良率，并且延长了衬底的使用寿命。
附图简要说明
图1是根据本申请一示例性实施例示出的一种半导体器件激光剥离方法的流程图。
图2是根据本申请一示例性实施例示出的一种半导体器件激光剥离方法的示意图。
图3是根据本申请另一示例性实施例示出的一种半导体器件激光剥离方法的流程图。
实施本发明的方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在激光剥离衬底时，受到激光照射的半导体材料会产生高压气体，由于照射的瞬间，气体被密封在半导体器件与衬底之间的连接面处，因此会对半导体器件或衬底产生较大的冲击波，导致半导体器件或衬底的损坏。
因此，亟需一种能够减轻对半导体器件和衬底造成冲击损伤的激光剥离方法。
图1是根据本申请一示例性实施例示出的一种半导体器件激光剥离方法的流程图，其中，该半导体器件位于衬底的一表面。如图1所示，该方法包括：
110：在半导体器件与衬底相连接的部位的外围刻蚀形成凹槽，其中，凹槽用于释放在半导体器件受到激光照射时所产生的冲击波。
在本申请实施例中，半导体器件在衬底上制作成形。通过对衬底上的半导体层进行刻蚀和加工，制造出具有一定功能和结构的半导体器件。每个半导体器件都经由衬底上剩余的半导体层与衬底相连。贴近连接面的半导体层部分即为半导体器件与衬底相连接的部位。
本申请实施例中，凹槽是通过腐蚀介质进行刻蚀形成。例如，在衬底上涂覆一层厚度小于半导体层的腐蚀介质，对半导体器件与衬底相连接的部位的外围进行刻蚀，进而生成凹槽。
本申请的另一个实施例中，使用激光等离子体对半层体器件与衬底相连接的部位的外围进行刻蚀，生成凹槽。例如，将微波聚焦在半导体器件的待刻蚀部位上，通过微波激发等离子体，能够在半导体器件上刻蚀凹槽。本申请实施例对于刻蚀凹槽的方法不作限定。
本申请实施例中，凹槽分布在半导体器件的四周。本申请另一个实施例中，凹槽分布在半导体器件的至少一侧。本申请实施例对此不做限定。凹槽的深度和形状对本申请实施例所提供的方法不产生较大影响，仅对本申请实施例的刻蚀时间有较明显的影响，可根据工艺的需要对凹槽的深度和形状进行具体设定，本申请实施例对此不做限定。
120：使用激光照射半导体器件与衬底之间的连接面，使得半导体器件与衬底相分离。
本申请实施例中，通过激光照射连接面产生冲击波，使得半导体器件与衬底相分离。激光照射连接面后，连接面上的半导体产生物理或化学变化。具体而言，激光使得半导体物质气化或分解出气态物质，进而对半导体和衬底产生较大的压强。由于凹槽的存在，发生物理或化学变化的半导体物质从凹槽处导出，使得半导体器件与衬底分离的同时，激光照射所产生的冲击波通过凹槽导泻出连接面。
本申请实施例提供的技术方案通过在半导体器件与衬底相连接的部位的外围刻蚀凹槽，使得激光照射后产生的冲击波通过凹槽，沿平行于衬底平面的方向导泻，减少对半导体器件和衬底的破坏，提升半导体器件的良率，并且延长了衬底的使用寿命。
根据本申请的实施例，上述衬底包括蓝宝石衬底；上述半导体器件与衬底相连接的部位的成分包括氮化镓；上述半导体器件包括发光二极管器件。
本申请实施例所提供的方案能够在从蓝宝石衬底剥离氮化镓发光二极管的过程中，减少半导体器件和衬底的损坏，提升半导体器件的良率，并且延长衬底的使用寿命。
根据本申请的实施例，上述半导体器件用于制造显示装置或照明装置。
通过本申请实施例所提供的方案，能够在制造用于显示装置或照明装置的半导体器件的过程中，减少半导体器件和衬底的损坏，提升半导体器件的良率，并且延长衬底的使用寿命。
在本申请的一个实施例中，还包括：在半导体器件表面设置的钝化层，其中，钝化层覆盖半导体器件的非刻蚀部分的表面。
本申请实施例中，钝化层由一种不会被腐蚀介质腐蚀的材料构成。例如，本申请实施例中，钝化层的成分为氮化硅、氧化硅或聚酰亚胺。本申请的另一个实施例中，钝化层的成分为惰性金属，本申请实施例对此不作限定。
本申请实施例中，通过外延生长的方式将钝化层设置在半导体器件的表面。例如，本申请实施例中，半导体器件的高度为20μm，位于衬底的上表面。首先在衬底上表面设置一层1μm厚的胶体，胶体覆盖住半导体器件上1μm厚的半导体材料。之后通过外延生长的方式在半导体器件表面生长一层氮化硅作为钝化层。生长完毕后，洗去胶体，露出待刻蚀的半导体材料。
本申请的另一个实施例中，通过气相沉积的方式在半导体器件表面设置钝化层。通过控制气相沉积的条件，使得贴近衬底的半导体层暴露在钝化层外。例如，本申请实施例中，气相沉积一种惰性金属作为钝化层，气相中的惰性金属先经过半导体器件表面，再接触贴近衬底的半导体层。通过降低气相中的惰性金属的浓度，使得惰性金属在半导体器件表面沉积消耗之后，不足以在贴近衬底的半导体层上形成钝化膜，进而使得待腐蚀的半导体材料暴露在钝化层之外。本申请实施例对于钝化层的生成方式不做限定。
钝化层的厚度可以根据具体的生产需要进行调节，本申请实施例对此不做限定。
通过设置钝化层，使得通过腐蚀介质形成凹槽时，腐蚀介质的腐蚀作用能够针对半导体器件与衬底的连接部分，防止半导体器件被损坏。
根据本申请的实施例，上述钝化层包括：氮化硅钝化层、氧化硅钝化层或聚酰亚胺钝化层。
氮化硅、氧化硅钝化层或聚酰亚胺钝化层既能保护半导体材料不被腐蚀，同时又不会对半导体材料产生污染。
在本申请的一个实施例中，在步骤110中，使用腐蚀介质在半导体器件与衬底相连接的部位的外围刻蚀凹槽。
本申请实施例中，腐蚀介质为刻蚀液。液态物质相对于气态物质更易于操控，使得腐蚀能够针对半导体器件与衬底的连接部分，防止半导体器件被损坏。
在本申请的一个实施例中，刻蚀液包括：盐酸或磷酸。
本申请实施例中，使用盐酸或磷酸作为刻蚀液。盐酸和磷酸均为常见化学制剂，价格较低，易于获取，有利于降低生产成本。
在本申请的一个实施例中，在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：在半导体器件与衬底相连接的部位的外围刻蚀弧形凹槽，其中，凹槽使得半导体器件与衬底的连接面的面积减小。
本申请实施例中，通过对组成半导体器件与衬底之间的连接面处的材料进行 刻蚀，使得连接面的面积减小，凹槽的弧形设计令半导体器件呈“蘑菇”状连接在衬底上。例如，本申请实施例中，使用各向异性腐蚀介质，对半导体器件进行腐蚀。由于连接面处的半导体材料更易与各向异性腐蚀介质发生化学反应，使得连接面面积减小。在本申请的另一个实施例中，将激光照射在连接面的周围，使得连接面的面积减小。本申请实施例对于具体的刻蚀方法不做限定。
各向异性腐蚀介质一般可分为两类:一类是有机腐蚀剂，包括氢氧化四甲基胺(TMAH)等，另一类是无机腐蚀剂，包括氢氧化钾(KOH)、氢氧化钠(NaOH)或氢氧化锂(LiOH)等。
通过减小连接面的面积，使得半导体器件部分脱离衬底，减少后续工序所需的时间，提升生产效率。
在本申请的一个实施例中，半导体器件与衬底相连接的部位设置有牺牲层，其中，牺牲层在剥离半导体器件的过程中被消耗；在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：在牺牲层上刻蚀凹槽。
在本申请实施例中，牺牲层由一种较易被腐蚀介质腐蚀的物质。例如，本申请实施例中，牺牲层由微晶半导体材料构成。本申请的另一个实施例中，牺牲层由一种容易被腐蚀介质腐蚀的金属构成。该金属例如可以是锡、铜等金属，本申请实施例对于牺牲层的具体成分不做限定。
本申请实施例中，牺牲层通过外延生长的方法设置在衬底上，之后再以牺牲层为衬底，制作半导体器件。本申请的另一个实施例中，牺牲层通过镀膜的方式设置在衬底上，之后再以牺牲层为衬底，制作半导体器件，本申请实施例对于牺牲层的生成方法不作限定。
由于构成牺牲层的材料更易被腐蚀，因此通过设置牺牲层，使得腐蚀凹槽所需的时间变短，提升生产效率。
上述所有可选技术方案，可以采用任意结合形成本申请的可选实施例，在此不再一一赘述。
图2是根据本申请另一示例性实施例示出的一种半导体器件激光剥离方法的示意图。如图所示，图2中包括：衬底210、半导体器件220、疏松半导体层230、钝化层240和凹槽250。
半导体器件220通过疏松半导体层230固定在衬底210的上方。半导体器件220的表面被钝化层240包裹住，本申请实施例中，钝化层240也包裹住了疏松半导体层230的一部分。在本申请的另一个实施例中，钝化层240只包裹住了半导体器件220，将疏松半导体层230全部暴露出来，本申请实施例对此不做限定。通过腐蚀，在没有被钝化层240覆盖的疏松半导体层230上，刻蚀出凹槽250。凹槽250使得疏松半导体层230与衬底210之间的连接面面积减小，半导体器件 220与疏松半导体层230呈“蘑菇”状固定在衬底210上。
图中带有箭头的实线表示激光光线，激光光线从衬底210的下方(远离半导体器件的一侧)照射疏松半导体层230与衬底210之间的连接面，使得疏松半导体层230中，受到激光照射的物质气化，与衬底210分离并产生冲击波。由于凹槽250的存在，气体较易从凹槽250处排泄出疏松半导体层230与衬底210之间的连接面，使得冲击波得到释放，保护半导体器件220与衬底210不受较大冲击波的影响。
在本申请的一个实施例中，半导体器件与衬底相连接的部位设置有疏松半导体层，其中疏松半导体层位于半导体器件与衬底相连接的部位，并且疏松半导体层的晶体密度小于半导体器件的晶体密度，并且可以在疏松半导体层上刻蚀凹槽。
图3是根据本申请另一示例性实施例示出的一种半导体器件激光剥离方法的流程图。如图3所示，该方法包括：
310：在衬底上生成疏松半导体层。
本申请实施例中，半导体器件为氮化镓半导体器件，通过控制氮化镓在衬底上的外延生长条件，生成一层晶粒尺寸较小，晶粒排布较疏松的氮化镓半导体层。例如，本申请实施例中，通过在衬底上设置少量与氮化镓晶格匹配程度较低的金属粉末，使得衬底上外延生长出一层疏松氮化镓半导体层。本申请的另一个实施例中，通过控制外延生长的温度，使得衬底上外延生长出一层疏松氮化镓半导体层。本申请实施例对于生成疏松半导体层的方法不做限定。
本申请实施例中，疏松半导体层的成分与构成半导体器件的半导体材料的成分相同，疏松半导体层中的晶体尺寸较小，排列较疏松。通过控制半导体在衬底上的外延生长条件，进而生成疏松半导体层。例如，本申请实施例中，先在衬底上设置一层与半导体晶体的晶格匹配度较低的金属薄膜，使得半导体在此金属薄膜上生长时的晶体尺寸较小，排列较疏松。
本申请的另一个实施例中，通过在衬底上设置一层杂质粉末，使得在衬底上外延生长的半导体变得疏松。例如，本申请实施例中，先在衬底上覆盖一层二氧化硅杂质，之后在衬底上进行半导体的外延生长，由于杂质的存在，使得半导体较为疏松。本申请实施例对于生成疏松半导体层的方法不做限定。
由于排列疏松的半导体晶体更易被腐蚀，因此通过设置疏松半导体层，使得腐蚀凹槽所需的时间变短，提升生产效率。
320：在疏松半导体层上外延生长半导体层，并将半导体层加工为半导体器件。
由于疏松半导体层与半导体层的成分相同，使用现有的外延生长技术即可在疏松半导体层上生长出合乎要求的半导体层，再对半导体层和疏松半导体层进行 光刻和加工，制成半导体器件。
330：在半导体器件表面生成钝化层，其中，钝化层覆盖半导体器件的非刻蚀部分的表面。
本申请实施例中，钝化层的成分为氮化硅。通过气相沉积的方式设置在半导体器件的表面。通过控制气相沉积的条件，使得贴近衬底的疏松半导体层暴露在钝化层外。例如，本申请实施例中，气相氮化硅先流经半导体器件表面，再接触疏松半导体层。通过降低气相氮化硅的浓度，使得氮化硅在半导体器件表面沉积消耗之后，气相氮化硅的浓度不足以在疏松半导体层上形成钝化膜，进而使得待腐蚀的疏松半导体层暴露在钝化层之外。
340：在疏松半导体层上刻蚀凹槽。
本申请实施例中，使用成分为磷酸为主的酸性腐蚀液对疏松半导体层进行腐蚀。由于半导体器件受到钝化层的保护，不会被腐蚀液腐蚀，使得腐蚀液只腐蚀暴露在钝化层外的疏松半导体层，使得疏松半导体层与衬底的连接面面积减小，此时，半导体器件与被腐蚀的疏松半导体层一起，呈上大下小的“蘑菇”状。
350：使用激光照射疏松半导体层与衬底的连接面，进而产生冲击波，使得半导体器件与衬底相分离，并且，冲击波通过凹槽导泻出去。
本申请实施例中，衬底为蓝宝石衬底，激光能够通过蓝宝石衬底，照射在疏松半导体层与衬底之间的连接面上。氮化镓在受到激光的照射之后，分解产生氮气，由于分解瞬间生成的氮气被密封在连接面内，因此压力很高，会对半导体器件和衬底产生冲击波，但是由于凹槽的存在，降低了凹槽处疏松半导体层的抗冲击能力，使得氮气能够冲破凹槽处的疏松半导体层，释放激光照射所产生的冲击波，保护半导体器件和衬底，同时，氮气冲破疏松半导体层的过程也使得半导体器件与衬底之间相互脱离。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应所述以权利要求的保护范围为准。

Claims (12)

  1. 一种半导体器件激光剥离方法，所述半导体器件位于衬底的一表面；
    所述方法包括：
    在半导体器件与所述衬底相连接的部位的外围刻蚀凹槽，所述凹槽用于释放在半导体器件受到激光照射时所产生的冲击波；
    使用激光照射所述半导体器件与所述衬底之间的连接面，使得所述半导体器件与所述衬底相分离。
  2. 根据权利要求1所述的方法，其中，所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽前，还包括：
    在所述半导体器件表面生成钝化层，其中，所述钝化层覆盖所述半导体器件的非刻蚀部分的表面。
  3. 根据权利要求2所述的方法，其中，所述钝化层包括：氮化硅钝化层、氧化硅钝化层或聚酰亚胺钝化层。
  4. 根据权利要求2所述的方法，其中，所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：
    使用刻蚀液在所述半导体器件与所述衬底相连接的部位的外围刻蚀凹槽。
  5. 根据权利要求4所述的方法，其中，所述刻蚀液包括：盐酸或磷酸。
  6. 根据权利要求1所述的方法，其中，所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：
    在所述半导体器件与所述衬底相连接的部位的外围刻蚀弧形凹槽。
  7. 根据权利要求1所述的方法，其中，所述半导体器件与衬底相连接的部位设置有疏松半导体层，所述疏松半导体层与所述衬底连接，并且所述疏松半导体层的晶体密度小于所述半导体器件的晶体密度；
    所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：
    在所述疏松半导体层的外围刻蚀凹槽。
  8. 根据权利要求1所述的方法，其中，所述半导体器件与衬底相连接的部位设置有牺牲层。
  9. 根据权利要求8所述的方法，其中，所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：
    在所述牺牲层的外围刻蚀凹槽。
  10. 根据权利要求8所述的方法，其中，所述牺牲层的材料包括锡或铜。
  11. 根据权利要求1至10中的任意一项所述的方法，其中，所述衬底包括蓝宝石衬底；所述半导体器件与衬底相连接的部位的成分包括氮化镓；所述半导体器件包括发光二极管器件。
  12. 根据权利要求1至10中任意一项所述的方法，其中，所述在半导体器件与衬底相连接的部位的外围刻蚀凹槽包括：
    使用激光等离子体在所述半导体器件与所述衬底相连接的部位的外围刻蚀凹槽。
PCT/CN2019/092755 2018-12-14 2019-06-25 半导体器件激光剥离方法 Ceased WO2020119065A1 (zh)

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