WO2020113896A1

WO2020113896A1 - Method for fabricating goa array substrate, and liquid crystal display

Info

Publication number: WO2020113896A1
Application number: PCT/CN2019/084270
Authority: WO
Inventors: 陈仁禄
Original assignee: 深圳市华星光电半导体显示技术有限公司
Priority date: 2018-12-07
Filing date: 2019-04-25
Publication date: 2020-06-11
Also published as: CN109411411A

Abstract

A method for fabricating a gate driver on array (GOA) array substrate, comprising: defining a display region (11) and a non-display region (12) on a base substrate (1); forming a GOA drive circuit at the non-display region (12), said drive circuit comprising a plurality of mutually connected GOA units (2), wherein each GOA unit (2) comprises a first metal layer (21) and a second metal layer (22) located above the first metal layer (21); forming a passivation layer (3) on the GOA drive circuit, and respectively forming support columns (4) and a color film substrate (5) on the passivation layer (3). The second metal layer (22) uses a half-tone mask (6) and a photolithography process such that patterned signal lines (23) are formed on the second metal layer (22), and the signal lines (23) comprise trunk parts (231) and side walls (232) formed gradually sloping from two opposite sides of the trunk parts (231).

Description

Manufacturing method of GOA array substrate and liquid crystal display

Technical field

The present invention relates to the field of display technology, and in particular to a method for manufacturing an array substrate row driver (GOA) array substrate and a liquid crystal display.

Background technique

In the current display technology field, liquid crystal displays (LCD) and organic light emitting diode displays (Organic Light Emitting Diode, OLED) have been widely used in daily life, such as mobile phones or televisions. Taking an LCD display panel as an example, it mainly includes a thin film transistor (TFT) array substrate, a color filter (CF) substrate, and a liquid crystal layer (Liquid Crystal) disposed between the two substrates Layer). With the improvement of TFT performance, the gate circuit is directly formed on the thin film transistor array technology (gate driver on array, GOA) has been widely used in display panels.

LCD TV products currently use GOA technology extensively to achieve borderless design. With the improvement of image quality, the GOA circuit uses multiple TFT tubes, the channel length of each tube, the source/drain etch and the final completion value are critical to the normal operation and stability of the entire circuit. However, the source signal of each level of GOA comes from the bus area of GOA. If the second metal layer (M2) transmitting the signal in the GOA Busline area of the panel is short-circuited with the first metal layer (M1) on the bottom layer, it will cause GOA If the clock signal is disordered, there will be a high temperature which will lead to screen burn and display failure. In view of this, how to improve the probability of short-circuiting of the GOA bus areas M2 and M1 of the display panel is an urgent problem to be solved.

technical problem

The purpose of the present invention is to provide a method for manufacturing an array substrate row drive (GOA) array substrate, so that the traces between the upper and lower cross-over regions of the GOA drive circuit and the passivation layer can be gently contacted to reduce the parasitic capacitance, In order to avoid the injury caused by electrostatic discharge and reduce the risk of black screen.

Another object of the present invention is to provide a liquid crystal display, which includes a GOA array substrate to reduce the probability of short-circuiting of the GOA bus area in the display panel and improve the stability and reliability of the display device product.

Technical solution

To achieve the above object, the present invention provides a method for manufacturing an array substrate row drive (GOA) array substrate, which includes: defining a display area and a non-display area on a base substrate, and the non-display area has Bus area; a GOA driver circuit is formed in the non-display area, which includes a plurality of connected GOA units, each of the GOA units includes a first metal layer, and a second metal layer above the first metal layer ; And forming a passivation layer on the GOA drive circuit, and forming support pillars and color film substrates on the passivation layer; wherein the second metal layer is a half-tone mask, which includes at least one A non-full-transmissive area with a mask penetration rate, and a patterned signal line is formed on the second metal layer through a photolithography process, and the signal line includes a main portion and a relative portion of the main portion A side wall formed by two sides gently inclined, wherein the signal line of the second metal layer is located in the bus area and spans above the first metal layer.

According to a preferred embodiment of the present invention, the non-full-transmissive area of the half-tone mask has a variety of mask penetration rates, including low penetration rate, medium penetration rate greater than low penetration rate, and greater than The high transmittances with medium transmittances are arranged in sequence in the non-total transmittance areas, and the locations with low transmittances of the non-total transmittance areas are closest to the trunk of the signal line.

According to another preferred embodiment of the present invention, the lithography process includes an exposure operation, and when the exposure operation performs exposure with a minimum exposure line width through an exposure machine, the predetermined spacing between the plurality of narrow lines is less than Or equal to the difference between the minimum exposure line width and one micrometer, and the line distance is less than or equal to the difference between the minimum exposure line width of the exposure machine and the predetermined pitch.

The invention further provides a method for manufacturing an array substrate row drive (GOA) array substrate, comprising: defining a display area and a non-display area on a base substrate; forming a GOA drive circuit in the non-display area, which includes a plurality of Connected GOA units, each of the GOA units includes a first metal layer, and a second metal layer above the first metal layer; and a passivation layer is formed on the GOA driving circuit, and the Support pillars and color filter substrates are formed on the passivation layer; wherein the second metal layer is a half-tone mask, and through the photolithography process, the second metal layer is formed with patterned signal lines, and the The signal line includes a trunk portion and a side wall formed by gently sloping opposite sides of the trunk portion.

According to a preferred embodiment of the present invention, the half-tone mask used for the signal line forming the second metal layer includes a non-total transmission region, and the non-total transmission region has at least one mask penetration rate , Used to form the side walls of the main portion of the signal line that are gently inclined on opposite sides.

According to another preferred embodiment of the present invention, the non-total transmission area of the half-tone mask has a variety of mask penetration rates, including low penetration rate, medium penetration rate greater than low penetration rate, and High transmittances greater than the medium transmittance, which are arranged in sequence in the non-total light transmission area, and the location of the low transmittance of the non-total light transmission area is closest to the trunk of the signal line .

According to another preferred embodiment of the present invention, the two sidewalls of the signal line form a plurality of narrow lines arranged at a predetermined pitch through a photolithography process, wherein each of the narrow lines has a line distance, which is smaller than the Predetermined spacing.

According to another preferred embodiment of the present invention, the non-display area defines a bus area, and the signal line of the second metal layer is located in the bus area and spans above the first metal layer .

According to another preferred embodiment of the present invention, each of the GOA units includes a thin film transistor structure, the first metal layer formed on the thin film transistor structure, and a gate electrode provided on the first metal layer An insulating layer, and the second metal layer formed on the gate insulating layer.

According to another preferred embodiment of the present invention, it further includes a TFT array structure formed on the display area of the base substrate, the TFT array structure includes a plurality of parallel scan lines; the G0A driving circuit is used for Driving the plurality of scan lines.

The present invention further provides a liquid crystal display, including an array substrate row drive (GOA) array substrate, characterized in that the GOA array substrate includes: a substrate substrate, which defines a display area and a non-display area; a GOA drive circuit, provided On the non-display area, the GOA driving circuit includes a plurality of connected GOA units, each of the GOA units includes a first metal layer, and a second metal layer above the first metal layer; A passivation layer, which is provided on the GOA driving circuit, and a support post is provided on the passivation layer, and a color filter substrate provided on the support post; wherein the second metal layer includes a patterned signal The signal line includes a trunk portion and a side wall formed by the two sides of the trunk portion being gently inclined.

According to a preferred embodiment of the present invention, the signal line is a half-tone mask and is formed by a photolithography process, wherein the half-tone mask includes a non-total light transmission area, and the non-total light transmission area has At least one reticle transmittance is used to form the side walls of the main portion of the signal line that are gently inclined relative to both sides.

Beneficial effect

The manufacturing method of the GOA array substrate of the present invention uses a half-tone mask and uses a photolithography process to form the signal lines of the second metal layer in the bus area to form gently sloping sidewalls, effectively improving the signal lines of the second metal layer Crossing the position of the first metal layer, it is easy to generate parasitic capacitance, easy to cause electrostatic discharge damage, and the risk of black screen, and can reduce the risk of short circuit with the upper board and increase the stability of the product.

BRIEF DESCRIPTION

FIG. 1 is a schematic partial cross-sectional view of a GOA array substrate according to a preferred embodiment of the present invention.

2 is a schematic plan view of the GOA array substrate of the present invention.

3 is a flowchart of a method for manufacturing a GOA array substrate according to a preferred embodiment of the present invention.

4 is a schematic cross-sectional view of a partial structure of the GOA array substrate of the present invention.

FIG. 5 is a schematic diagram of partial wiring of a GOA array substrate according to a preferred embodiment of the present invention.

6 is a schematic diagram of partial wiring of a GOA array substrate according to another preferred embodiment of the present invention.

7 is a schematic diagram of partial wiring of a GOA array substrate according to another preferred embodiment of the present invention.

Best Mode of the Invention

The following descriptions of the embodiments refer to the attached drawings to illustrate specific embodiments of the present invention that can be implemented. Directional terms mentioned in the present invention, such as "up", "down", "front", "rear", "left", "right", "inner", "outer", "side", etc., are for reference only Attach the direction of the schema. Therefore, the directional terminology is used to illustrate and understand the present invention, not to limit the present invention.

The invention is a method for manufacturing an array substrate row driver (GOA) array substrate for a liquid crystal display (LCD). FIG. 1 is a partial cross-sectional schematic diagram of a GOA array substrate according to a preferred embodiment of the present invention, and FIG. 2 is a plan schematic diagram of the GOA array substrate of the present invention.

Please refer to FIG. 3 in conjunction with FIG. 1 to FIG. 4. The present invention provides a method for manufacturing an array substrate row drive (GOA) array substrate, which includes the steps shown in FIG. 3.

Step S10: Define a display area 11 and a non-display area 12 (as shown in FIG. 1) on a base substrate 1, wherein the non-display area 12 surrounds the display area 11 (as shown in FIG. 2), that is, It is the frame part of the display panel, and the non-display area 12 defines a bus line 121 (as shown in FIG. 1), and the display area 11 is an area for displaying a picture.

Refer to FIG. 4 for the partial structure of the GOA array substrate of the present invention described later. The partial structure of FIG. 4 is used to represent the partial structure of the GOA driving circuit in the bus area 121 of the present case. As shown in FIG. 2, the present invention further includes a TFT array structure formed on the display area 11 of the base substrate 1, and the TFT array structure includes a plurality of parallel scan lines (not labeled). The GOA driving circuit is used to drive the plurality of scanning lines.

Step S20: forming a GOA driving circuit in the non-display area 12, which includes a plurality of connected GOA units 2, each of the GOA units 2 includes a first metal layer 21, and is located above the first metal layer 21的第二金属层22。 The second metal layer 22. Specifically, each of the GOA units 2 includes a thin film transistor structure 20, the first metal layer 21 formed on the thin film transistor structure 20, and a gate insulating layer provided on the first metal layer 21 211, and the second metal layer 22 formed on the gate insulating layer 211.

Step S30: forming a passivation layer 3 on the GOA driving circuit, and forming support pillars 4 and color filter substrates 5 on the passivation layer 3, respectively, wherein the passivation layer 3 and the second metal An indium tin oxide (ITO) conductive film (not labeled) is formed between the layers 22, and another ITO conductive film is provided on the bottom side of the color film machine board 5.

In particular, according to the manufacturing method of the GOA array substrate of the present invention, in step S20, a photolithography process of exposing, developing, and etching the photoresist material using a half-tone mask 6 (as shown in FIG. 4) is performed. The second metal 22 layer is formed with patterned signal lines, and the signal lines are located in the bus area 121 and span over the first metal layer 21, that is, the signal lines are clocks ( CK) signal line.

FIG. 5 is a schematic diagram of partial wiring of a GOA array substrate according to a preferred embodiment of the present invention. As described above, the present invention uses the half-tone mask 6 to form the signal line through the photolithography process. Specifically, the half-tone mask 6 includes a non-total light transmission area 61, and the non-total light transmission area 61 has at least one mask penetration rate. As shown in FIG. 5, the non-total light transmission area 61 has a single mask transmittance. In this preferred embodiment, the single mask transmittance is less than or equal to 100% transmittance, for example, 80% mask transmittance, the signal line 23 is formed by one patterning process, and the The signal line 23 includes a trunk portion 231 and a side wall 232 that is gently inclined from opposite sides of the trunk portion 231. Compared with the traces (that is, signal lines) of the conventional GOA driving circuit, the manufacturing method of the GOA array substrate according to the present invention is used to gently incline the two sides of the signal lines, greatly reducing the generation of larger corners.

6 is a schematic diagram of partial wiring of a GOA array substrate according to another preferred embodiment of the present invention. In this preferred embodiment, the non-fully transparent region 61 of the half-tone mask 6 has a variety of mask penetration rates, including low penetration rate, medium penetration rate greater than low penetration rate, and greater than The high transmittance of medium transmittance is arranged in sequence in the non-total light transmission area, and the position of the low transmittance of the non-total light transmission area 61 is closest to the main of the signal line 23 Cadre 231. Specifically, the low transmittance is 30% reticle transmittance, the medium transmittance is 50%, and the high transmittance is 70%. The low transmittance of the half-tone mask 6 corresponds to the portion where the signal line 23 starts to incline gently from the trunk portion 231, followed by the medium transmittance and the high transmittance, thereby forming a gentle incline Second sidewall 232.

7 is a schematic diagram of partial wiring of a GOA array substrate according to another preferred embodiment of the present invention. The manufacturing method of the GOA array substrate of the present invention can not only form the gentle sidewalls 232 on both sides of the second metal layer 22, but also form a plurality of narrow line 233 configurations on the sidewall 232 with a predetermined interval . Specifically, the two sidewalls 232 of the signal line 23 form a plurality of narrow lines 233 arranged at a predetermined distance d through a photolithography process, wherein each of the narrow lines 233 has a line distance w, which is smaller than the predetermined Spacing d. The photolithography process includes an exposure operation, wherein when the exposure operation performs exposure with a minimum exposure line width via an exposure machine (not shown), the predetermined distance d between the plurality of narrow lines 233 is less than or equal to The difference between the minimum exposure line width and one micrometer (um), and the line distance w is less than or equal to the difference between the minimum exposure line width of the exposure machine and the predetermined distance d. In a specific implementation, if the minimum exposure line width of the exposure limit of the exposure machine is 3um, the predetermined distance d is 2um (that is, the difference between 3um and 1um), and the line of the narrow line 233 The distance is 1um (that is, the difference of 3um-2um).

As described above, in the embodiment shown in FIG. 7, the side wall 232 formed by the narrow line 233 can also reduce parasitic capacitance, avoid damage from electrostatic discharge, and reduce black screen generation due to the reduction of a large area Risk and other effects.

The present invention further provides a liquid crystal display including an array substrate row drive (GOA) array substrate. The structure of the GOA array substrate has been detailed in the foregoing embodiments, and will not be repeated here.

In summary, although the present invention has been disclosed as the preferred embodiments above, the above preferred embodiments are not intended to limit the present invention. Those of ordinary skill in the art can make various changes without departing from the spirit and scope of the present invention. Such changes and retouching, therefore, the protection scope of the present invention is subject to the scope defined by the claims.

Claims

A method for manufacturing an array substrate row drive (GOA) array substrate includes:

Defining a display area and a non-display area on a base substrate, and the non-display area has a bus area;

Forming a GOA driving circuit in the non-display area, which includes a plurality of connected GOA units, each of the GOA units includes a first metal layer, and a second metal layer above the first metal layer; and

Forming a passivation layer on the GOA driving circuit, and forming support pillars and color film substrates on the passivation layer;

Wherein the second metal layer is a half-tone mask, which includes a non-total light-transmitting area with at least one mask penetration rate, and the second metal layer is patterned by a photolithography process A signal line, and the signal line includes a trunk portion and a side wall formed by gently tilting opposite sides of the trunk portion, wherein the signal line of the second metal layer is located in the bus area and spans across the Above the first metal layer.
The method of manufacturing a GOA array substrate according to claim 1, wherein the non-total light-transmitting area of the half-tone mask has a variety of mask penetration rates, including a low penetration rate, a medium penetration rate greater than a low penetration rate, And a high transmittance greater than a medium transmittance, which are arranged in sequence in the non-transmissive area, and the position of the low transmittance in the non-transparent area is closest to the main of the signal line cadre.
The method of manufacturing a GOA array substrate according to claim 1, wherein the lithography process includes an exposure operation, and when the exposure operation performs exposure with a minimum exposure line width through an exposure machine, the predetermined spacing between the plurality of narrow lines Is less than or equal to the difference between the minimum exposure line width and one micrometer, and the line distance is less than or equal to the difference between the minimum exposure line width of the exposure machine and the predetermined pitch.
A method for manufacturing an array substrate row drive (GOA) array substrate includes:

Define a display area and a non-display area on a base substrate;

Forming a GOA driving circuit in the non-display area, which includes a plurality of connected GOA units, each of the GOA units includes a first metal layer, and a second metal layer above the first metal layer; and

Forming a passivation layer on the GOA driving circuit, and forming support pillars and color film substrates on the passivation layer;

Wherein the second metal layer is a half-tone mask, and the second metal layer is formed with a patterned signal line through a photolithography process, and the signal line includes a main portion and a portion formed by the main portion The side wall is gently inclined relative to the two sides.
The method for manufacturing a GOA array substrate according to claim 4, wherein the half-tone mask used for forming the signal line of the second metal layer includes a non-total transmission region, and the non-total transmission region has at least one mask penetration Transmittance is used to form the side walls of the main portion of the signal line that are gently inclined on opposite sides.
The method of manufacturing a GOA array substrate according to claim 5, wherein the non-full-transmissive area of the half-tone mask has a variety of mask penetration rates, including a low penetration rate, a medium penetration rate greater than a low penetration rate, And a high transmittance greater than a medium transmittance, which are arranged in sequence in the non-transmissive area, and the position of the low transmittance in the non-transparent area is closest to the main of the signal line cadre.
The method of manufacturing a GOA array substrate according to claim 4, wherein the two sidewalls of the signal line form a plurality of narrow lines arranged at a predetermined pitch through a photolithography process, wherein each of the narrow lines has a line width which is smaller than Said predetermined spacing.
The method for manufacturing a GOA array substrate according to claim 7, wherein the lithography process includes an exposure operation, and the exposure operation performs exposure with a minimum exposure line width through an exposure machine, and the predetermined spacing between the plurality of narrow lines Is less than or equal to the difference between the minimum exposure line width and one micrometer, and the line distance is less than or equal to the difference between the minimum exposure line width of the exposure machine and the predetermined pitch.
The method for manufacturing a GOA array substrate according to claim 4, wherein the non-display area defines a bus area, and the signal line of the second metal layer is located in the bus area and spans the first metal layer Above.
The method of manufacturing a GOA array substrate according to claim 4, wherein each of the GOA cells includes a thin film transistor structure, the first metal layer formed on the thin film transistor structure, and a gate provided on the first metal layer An electrode insulating layer and the second metal layer formed on the gate insulating layer.
The method for manufacturing a GOA array substrate according to claim 4, wherein the method for manufacturing a GOA array substrate further comprises a TFT array structure formed on the display area of the base substrate, the TFT array structure including multiple parallel scans The G0A drive circuit is used to drive the plurality of scan lines.
A liquid crystal display includes an array substrate row drive (GOA) array substrate. The GOA array substrate includes:

Substrate substrate, which defines a display area and a non-display area;

A GOA driving circuit is provided on the non-display area. The GOA driving circuit includes a plurality of connected GOA units, each of the GOA units includes a first metal layer, and a first metal layer located above the first metal layer Two metal layers;

A passivation layer is provided on the GOA driving circuit, and a support post is provided on the passivation layer, and a color film substrate provided on the support post;

Wherein the second metal layer includes a signal line with a pattern, the signal line includes a trunk portion and a side wall formed by gently tilting opposite sides of the trunk portion.
The liquid crystal display of claim 12, wherein the signal line is a half-tone mask and is formed by a photolithography process, wherein the half-tone mask includes a non-fully transparent region, and the non-fully transparent region has at least A mask penetration rate is used to form a side wall of the trunk portion of the signal line that is gently inclined on opposite sides.