WO2020113630A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2020113630A1
WO2020113630A1 PCT/CN2018/120467 CN2018120467W WO2020113630A1 WO 2020113630 A1 WO2020113630 A1 WO 2020113630A1 CN 2018120467 W CN2018120467 W CN 2018120467W WO 2020113630 A1 WO2020113630 A1 WO 2020113630A1
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Prior art keywords
pixels
column
pixel
active switch
channel width
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English (en)
French (fr)
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吴川
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HKC Co Ltd
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HKC Co Ltd
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Priority to US17/042,082 priority Critical patent/US11333945B2/en
Publication of WO2020113630A1 publication Critical patent/WO2020113630A1/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and a display device.
  • liquid crystal displays have become the mainstream products of displays due to their advantages of thin body, power saving and low radiation, and have been widely used.
  • Most of the liquid crystal displays on the market are backlight type liquid crystal displays, which include a display panel and a backlight module.
  • the working principle of the display panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage to the two glass substrates to control the rotation direction of the liquid crystal molecules, so as to refract the light from the backlight module to generate a picture.
  • Half-Source Driver is a low-cost production solution commonly used in the display panel industry.
  • the solution is to double the number of scan lines so that a single data line can correspond to two adjacent columns Pixels, thereby saving half of the source driver integrated chips, but there will be a phenomenon of vertical bright and dark lines.
  • the present application provides a display panel and a display device to achieve brightness balance.
  • the present application provides a display panel, including: a substrate provided with: a plurality of data lines, a plurality of gate lines, a plurality of pixels, and a gate driving chip; the pixels include Set sub-pixels of different colors in the direction of the gate line; the gate driving chip outputs a gate start signal to the gate line to turn on the pixel; each row of the pixels includes multiple pixel groups, each of the pixel groups It includes adjacent first-row pixels and second-row pixels, the first-row pixels and the second-row pixels are connected to the same data line, and the first-row pixels and the second-row pixels are connected To two different gate lines; the polarity of the data drive signal used by each pixel group and the adjacent pixel group in each row of the pixels is opposite; the channel width of the active switch corresponding to the second column of pixels The aspect ratio is greater than the channel width-to-length ratio of the active switch corresponding to the first column of pixels.
  • the polarities of the data driving voltages corresponding to the first column of pixels and the second column of pixels are opposite, the first column of pixels is an odd column of pixels, and the second column of pixels is an even column of pixels; corresponding to the even number
  • the channel width to length ratio of the active switch corresponding to the column pixel is greater than the channel width to length ratio of the active switch corresponding to the odd column pixel.
  • the charging voltages of the pixels in the odd columns and the pixels in the even columns are the same.
  • the odd-numbered pixels include a first active switch and a first sub-pixel
  • the even-numbered pixels include a second active switch and a second sub-pixel
  • the data line and the drain of the first active switch the first Drain connection of two active switches
  • the source of the first active switch is connected to the first sub-pixel
  • the source of the second active switch is connected to the second sub-pixel
  • (W/L) odd m *(W/L) even
  • m is greater than or equal to 0.5 and less than 1.
  • the value of m is one of 0.5, 0.6, 0.7, 0.8, and 0.9.
  • the value of m is one of 0.55, 0.65, 0.75, 0.85, and 0.95.
  • the channel width to length ratio meets the formula Wherein, W is the channel width, L is the channel length, a is the radius of the source semicircle area, b is the horizontal distance from the center of the semicircle to the drain, and c is the drain The length of the side parallel region; the channel width-to-length ratio W/L of the second active switch is greater than the channel width-to-length ratio W/L of the first active switch.
  • the polarities of the data driving voltages corresponding to the first column of pixels and the second column of pixels are the same, the first column of pixels is an even column of pixels, and the second column of pixels is an odd column of pixels; corresponding to the odd number
  • the channel width to length ratio of the active switches of the column pixels is greater than the channel width to length ratio of the active switches of the even column pixels.
  • the even-column pixels include a first active switch and a first sub-pixel
  • the odd-column pixels include a second active switch and a second sub-pixel
  • the data line and the drain of the first active switch the first Drain connection of two active switches
  • the source of the first active switch is connected to the first sub-pixel
  • the source of the second active switch is connected to the second sub-pixel;
  • m*(W/L) is odd (W/L) even, m is greater than or equal to 0.5 and less than 1.
  • the value of m is one of 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95.
  • the channel width to length ratio satisfies the formula Wherein, W is the channel width, L is the channel length, a is the radius of the source semicircle area, b is the horizontal distance from the center of the semicircle to the drain, and c is the drain
  • W is the channel width
  • L is the channel length
  • a is the radius of the source semicircle area
  • b is the horizontal distance from the center of the semicircle to the drain
  • c is the drain
  • the length of the side parallel region; the channel width-to-length ratio W/L of the second active switch is greater than the channel width-to-length ratio W/L of the first active switch.
  • the display panel further includes a detection circuit that detects and compares the brightness of the pixels in the first column and the pixels in the second column; if the pixels in the first column are dark, the charging time corresponding to the pixels in the first column is adjusted The charging time C2 corresponding to the pixels in C1 and the second column makes C1 greater than C2; if the pixels in the first column are bright, adjust the charging time C1 corresponding to the pixels in the first column and the charging time C2 corresponding to the pixels in the second column so that C1 is less than C2.
  • a detection circuit that detects and compares the brightness of the pixels in the first column and the pixels in the second column; if the pixels in the first column are dark, the charging time corresponding to the pixels in the first column is adjusted The charging time C2 corresponding to the pixels in C1 and the second column makes C1 greater than C2; if the pixels in the first column are bright, adjust the charging time C1 corresponding to the pixels in the first column and the charging time C2 corresponding to the pixels in the second column so that
  • the charging time of the pixels in the first column and the pixels in the second column is controlled by a timing control chip.
  • the display panel uses a half-source driving architecture.
  • the present application discloses a display panel, including: a substrate, the substrate is provided with: a plurality of data lines, a plurality of gate lines, a plurality of pixels and a gate driving chip; the pixels include along the direction of the gate lines The sub-pixels have different colors; the gate driving chip outputs a gate start signal to the gate line to turn on the pixels; each row of the pixels includes a plurality of pixel groups, and each of the pixel groups includes adjacent The first column of pixels in the front and the second column of pixels in the back, the first column of pixels and the second column of pixels are connected to the same data line, and the first column of pixels and the second column of pixels are connected to two different The gate line of each pixel; the polarity of the data driving signal adopted by each pixel group and the adjacent pixel group in each row of the pixels is opposite; the polarity of the data driving voltage corresponding to the pixels in the first column and the pixels in the second column In contrast, the first column of pixels is an odd column of pixels, and the second column of pixels is
  • the present application also discloses a display device including the display panel as described above.
  • the display device is one of a twisted nematic display device, a plane switching display device, and a multi-quadrant vertical alignment display device.
  • the data driving voltage corresponding to the second column of pixels in the current group will take a period of time to reverse to the preset voltage level, so that the charging voltage and charging state of the second column of pixels are lower than those of the same group.
  • a group of pixels in the first column corresponds to a lower charging voltage and a charging state, which ultimately results in a difference in the charging voltage of the pixels, resulting in the phenomenon of vertical bright and dark lines; in this solution, based on the larger the channel width-to-length ratio of the thin film transistor, the on state The greater the current, the stronger the charging ability; the design makes the channel width to length ratio of the thin film transistor corresponding to the second column of pixels in the current group larger than the channel width to length ratio of the pixels in the first column of the next group in the same group.
  • the charging efficiency and charging capacity of the second column of pixels is stronger than that of the first column of pixels, which offsets the phenomenon that the second column of pixels has a lower charging voltage than the first column of pixels, thereby reducing or even eliminating the difference in the final state of charge of the two. Therefore, the charging voltage of two adjacent pixels is the same, thereby solving the visual vertical bright and dark line phenomenon.
  • FIG. 1 is a schematic diagram of a half-source driving architecture according to an embodiment of the present application
  • FIG. 2 is a partially enlarged schematic view of area A in FIG. 1;
  • FIG. 3 is a schematic diagram of a data output waveform of a half-source driving architecture according to an embodiment of the present application
  • FIG. 4 is a schematic diagram of actual output waveforms of half-source driving architecture data according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a pixel voltage of a half-source driving architecture according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a pixel structure of a display panel according to an embodiment of the application.
  • FIG. 7 is a schematic diagram of a pixel voltage of a display panel according to an embodiment of the application.
  • FIG. 8 is a schematic diagram of another semi-source driving architecture of a display panel according to an embodiment of the application.
  • FIG. 9 is a schematic diagram of a display panel driving timing signal according to an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a block diagram of a display device according to an embodiment of the application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • two adjacent columns of pixels share a data line 120, and adjacent pixels are connected to different gate lines 110.
  • the gate start signal is turned on, the thin film transistors in the corresponding row are turned on.
  • the vertical data line 120 sends a corresponding data signal to charge the storage capacitor to an appropriate voltage, and a line of images can be displayed.
  • Data represents the waveform of the data line 120
  • Gate is the waveform of the gate line 110, when the Gate is the highest peak, it is turned on, and the corresponding odd column pixel Odd and even column pixel even .
  • the data driving voltage of the corresponding odd-numbered column pixels after the polarity inversion needs a certain time to reach the preset voltage intensity, As a result, the current odd-column pixel and the even-column pixel that share the same data line 120 with its adjacent column are turned on under the same gate start signal, and the conduction time of the two is the same.
  • C1 is the time when the first row gate start signal is turned on.
  • Vp_even is the pixel voltage of the even-numbered columns
  • Vp_odd is the pixel voltage of the odd-numbered pixels, so that the brightness of the even-numbered pixels is brighter than that of the odd-numbered pixels, so The phenomenon of vertical bright and dark lines.
  • an embodiment of the present application discloses a display panel, including: a substrate, the substrate is provided with: a plurality of data lines 120, a plurality of gate lines 110 and a plurality of The pixel 130; the pixel 130 includes sub-pixels of different colors arranged along the direction of the gate line 110; the gate driving chip 102, which outputs a gate start signal to the gate line 110 to turn on the pixel 130; the pixels of each row A plurality of pixel groups are included, and each of the pixel groups includes an adjacent first column of pixels 131 and a subsequent second column of pixels 132.
  • the first column of pixels 131 and the second column of pixels 132 are identical to the same data Line 120 is connected, and the first column of pixels 131 and the second column of pixels 132 are connected to two different gate lines 110; each pixel group and adjacent pixel groups in the pixels of each row are driven by data
  • the polarities of the signals are opposite; the channel width to length ratio of the active switch corresponding to the second column of pixels 132 is greater than the channel width to length ratio of the active switch corresponding to the first column of pixels 131.
  • the data driving voltage corresponding to the second column of pixels 132 of the current group needs a period of time to reverse to the preset voltage level, so that the charging voltage and the charging state of the second column of pixels 132 It is lower than the corresponding charging voltage and charging state of the first group of pixels 131 in the next group of the same peer, and finally leads to a difference in the charging voltage of the pixel, resulting in a vertical bright and dark line; in this solution, the larger the channel width-to-length ratio of the thin film transistor, The larger the on-state current, the stronger the charging ability; the design makes the channel width to length ratio of the thin film transistor corresponding to the second column of pixels 132 of the current group larger than the channel width to length ratio of the pixels of the first column of the next group in the same group , Then the charging efficiency and charging ability of the second column of pixels 132 are stronger than that of the first column of pixels 131, which offsets the problem that the charging voltage of the second column of pixels 132
  • the polarities of the data driving voltages corresponding to the first column of pixels 131 and the second column of pixels 132 are opposite, and the first column of pixels 131 is an odd column of pixels.
  • the second column of pixels 132 is an even column of pixels; the channel width to length ratio of the active switches corresponding to the even column pixels is greater than the channel width to length ratio of the active switches corresponding to the odd column pixels.
  • the first column of pixels 131 is an odd column of pixels
  • the second column of pixels 132 is an even column of pixels.
  • the design is such that the thin film transistor corresponding to the even column pixels has a channel width to length ratio greater than that of the odd column pixels , Then the charging efficiency and charging ability of the even-numbered pixels are stronger than those of the odd-numbered pixels, which offsets the problem of the even-numbered pixels having a lower charging voltage than the odd-numbered pixels, thereby reducing the setting and eliminating the difference in the final state of charge of the two, making the odd-numbered pixels and The pixels in the even-numbered columns have the same charging voltage, thereby solving the visual phenomenon of bright and dark lines.
  • the odd column pixels 131 include a first active switch 1311 and a first sub-pixel 1312
  • the even column pixels 132 include a second active switch 1321 and a second sub-pixel 1322
  • the data line 120 is The drain of the first active switch 1311 is connected to the drain of the second active switch 1321
  • the source of the first active switch is connected to the first sub-pixel 1312
  • the source of the second active switch is connected to the second sub-pixel 1322 connected;
  • Cox is a thin film transistor liquid crystal display (Thin Film Transistor-Liquid Crystal Display, TFT-LCD) device metal insulator semiconductor (Metal-Insulator-Semiconductor, MIS) structure unit area capacitance, Vgs is the voltage between the gate and source, Vth is Threshold voltage, Ids is the leakage current.
  • TFT-LCD Thifilm Transistor-Liquid Crystal Display
  • MIS Metal-Insulator-Semiconductor
  • the channel width to length ratio satisfies the formula Wherein, W is the channel width, L is the channel length, a is the radius of the source semicircle area, b is the horizontal distance from the center of the semicircle to the drain, and c is the drain
  • W is the channel width
  • L is the channel length
  • a is the radius of the source semicircle area
  • b is the horizontal distance from the center of the semicircle to the drain
  • c is the drain
  • the length of the side parallel region; the channel width-to-length ratio W/L of the second active switch is greater than the channel width-to-length ratio W/L of the first active switch.
  • the value of the channel width-to-length ratio W/L is realized by the values of a, b, and c, so abc can satisfy the W/L calculation according to the calculation.
  • the charging efficiency and charging capacity of the even-numbered pixels are stronger than Odd column pixels, offset the difference between the even column charging voltage and the odd column pixel, thereby reducing or even eliminating the difference in the final charging state of the two, so that the odd column pixel and the even column pixel have the same charging voltage, thereby solving the visual bright and dark lines phenomenon.
  • the data driving voltages of the first column of pixels 131 and the second column of pixels 132 have the same polarity, and the first column of pixels 131 is an even column of pixels.
  • the second column of pixels 132 is an odd column of pixels; the channel width to length ratio of the active switch corresponding to the odd column of pixels is greater than the channel width to length ratio of the active switch of the even column of pixels.
  • the first column of pixels 131 is an even column of pixels
  • the second column of pixels 132 is an odd column of pixels.
  • the design is such that the channel width to length ratio of the thin film transistor corresponding to the odd column pixels is greater than that of the even column pixels , Then the charging efficiency and charging ability of the odd-numbered pixels are stronger than that of the even-numbered pixels, which offsets the difference between the odd-numbered pixels' charging voltage and the even-numbered pixels, thereby reducing or even eliminating the difference in the final state of charge of the two, making the odd-numbered pixels and even-numbered pixels
  • the charging voltage of the column pixels is the same, so as to solve the visual phenomenon of bright and dark lines.
  • the even column pixels include a first active switch 1311 and a first sub-pixel 1312
  • the odd column pixels include a second active switch 1321 and a second sub-pixel 1322
  • the drain of the active switch 1311 is connected to the drain of the second active switch 1321
  • the source of the first active switch is connected to the first sub-pixel 1312
  • the source of the second active switch is connected to the second sub-pixel 1322 ;
  • m*(W/L) odd (W/L) even
  • m is greater than or equal to 0.5 and less than 1.
  • Cox is the unit area capacitance of the MIS structure of the TFT device
  • Vgs is the voltage between the gate and source
  • Vth is the threshold voltage
  • Ids is the leakage current.
  • the channel width to length ratio satisfies the formula Wherein, W is the channel width, L is the channel length, a is the radius of the source semicircle region, b is the horizontal distance from the center of the semicircle to the drain, and c is the drain The length of the side parallel region; the channel width-to-length ratio W/L of the second active switch is greater than the channel width-to-length ratio W/L of the first active switch.
  • the charging efficiency and charging capacity of the odd-column pixels are stronger than the even-numbered pixels Column pixels, offset the difference between the odd-column charging voltage and the even-column pixel, thereby reducing or even eliminating the difference in the final state of charge between the two, so that the odd-column pixel and the even-column pixel have the same charging voltage, thus solving the visual bright and dark line phenomenon .
  • the display panel further includes a detection circuit that detects and compares the brightness of the first column of pixels 131 and the second column of pixels 132; if the first column of pixels 131 is dark, the first column is adjusted The charging time C1 corresponding to the pixel 131 and the charging time C2 corresponding to the second column of pixels 132 make C1 greater than C2; if the first column of pixels 131 is bright, adjust the charging time C1 corresponding to the first column of pixels 131 and the second column of pixels The charging time C2 corresponding to 132 makes C1 less than C2.
  • adjusting the charging time may use a timing control chip to control the different charging times of the pixels in the first column and the pixels in the second column, and may also be implemented through pre-charging or other methods.
  • a display panel 101 including:
  • a substrate on which a plurality of data lines 120, a plurality of gate lines 110, a plurality of pixels and a gate driving chip 102 are provided, the pixels include sub-pixels having different colors along the direction of the gate lines 110, respectively
  • the gate driving chip 102 outputs a gate start signal to the gate line 110 to turn on the pixels; each row of the pixels includes a plurality of pixel groups, and each of the pixel groups includes the adjacent first column
  • the pixels 131 and the second second column of pixels 132, the first column of pixels 131 and the second column of pixels 132 are connected to the same data line 120, and the first column of pixels 131 and the second column of pixels 132 are connected to two Different gate lines 110; the polarity of the data driving signal adopted by each pixel group and adjacent pixel groups in the pixels of each row is opposite; the data corresponding to the pixels 131 and 132 in the first column The polarities of the driving voltages are opposite.
  • the first column of pixels 131 is an odd column of pixels
  • the second column of pixels 132 is an even column of pixels
  • the odd column of pixels includes a first active switch 1311 and a first sub-pixel 1312.
  • the even column pixels include a second active switch 1321 and a second sub-pixel 1322, the data line 120 is connected to the drain of the first active switch 1311, the drain of the second active switch 1321, and the source of the first active switch Connected to the first sub-pixel 1312, the source of the second active switch is connected to the second sub-pixel 1322;
  • the (W/L) odd m*(W/L) even, where m is greater than or equal to 0.5 and Less than 1;
  • the channel width to length ratio meets the formula Wherein, W is the channel width, L is the channel length, a is the radius of the source semicircle area, b is the horizontal distance from the center of the semicircle to the drain, and c is the drain The length of the side parallel region; the channel width-to-length
  • the data driving voltage corresponding to the second column of pixels 132 of the current group may take a period of time to be reversed to the preset voltage level, so that the charging voltage and the state of charge of the second column of pixels 132 It is lower than the corresponding charging voltage and charging state of the first group of pixels 131 in the next group of the same peer, and finally leads to a difference in the charging voltage of the pixel, resulting in a vertical bright and dark line; in this solution, the larger the channel width-to-length ratio of the thin film transistor, The larger the on-state current, the stronger the charging ability; the design makes the channel width to length ratio of the thin film transistor corresponding to the second column of pixels 132 of the current group larger than the channel width to length ratio of the pixels of the first column of the next group in the same group , Then the charging efficiency and charging ability of the second column of pixels 132 are stronger than that of the first column of pixels 131, which offsets the difference in the charging voltage of the second column
  • a display device 100 including the above-mentioned display panel 101.
  • the data driving voltage corresponding to the second column of pixels 132 of the current group may take a period of time to be reversed to the preset voltage level, so that the charging voltage and the state of charge of the second column of pixels 132 It is lower than the corresponding charging voltage and charging state of the first group of pixels 131 in the next group of the same peer, and finally leads to a difference in the charging voltage of the pixel, resulting in a vertical bright and dark line; in this solution, the larger the channel width-to-length ratio of the thin film transistor, The larger the on-state current, the stronger the charging ability; the design makes the channel width to length ratio of the thin film transistor corresponding to the second column of pixels 132 of the current group larger than the channel width to length ratio of the pixels of the first column of the next group in the same group , Then the charging efficiency and charging capacity of the second column of pixels 132 are stronger than that of the first column of pixels 131, which offsets the phenomenon that the charging voltage of the second column
  • the panel of this application may be a TN panel (full name Twisted Nematic, namely twisted nematic panel), IPS panel (In-Plane Switching, plane switching), VA panel (Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology), of course , Can also be other types of panels, just apply.
  • TN panel full name Twisted Nematic, namely twisted nematic panel
  • IPS panel In-Plane Switching, plane switching
  • VA panel Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology

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Abstract

一种显示面板和显示装置。显示面板包括：基板，基板上设置有：多条数据线（120）、多条栅极线（110）及多个像素（130）；像素（130）包括沿着栅极线（110）方向分别设置不同颜色的子像素；栅极驱动芯片（102），用于输出栅启动信号到栅极线（110）以打开像素（130）；每一行像素（130）包括多个像素组，每个像素组包括相邻的在前的第一列像素（131）和在后的第二列像素（132），第一列像素（131）和第二列像素（132）与同一数据线（120）连接，且第一列像素（131）和第二列像素（132）连接至两条不同的栅极线（110）；每一行像素（130）中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；第二列像素（132）对应的主动开关的沟道宽长比大于对应第一列像素（131）对应的主动开关的沟道宽长比。消除了视觉上的垂直亮暗线问题。

Description

显示面板和显示装置
本申请要求于2018年12月05日提交中国专利局，申请号为CN201811479528.6，申请名称为“一种显示面板和显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
随着科技的发展和进步，液晶显示器由于具备机身薄、省电和辐射低等优点而成为显示器的主流产品，得到了广泛应用。市场上的液晶显示器大部分为背光型液晶显示器，其包括显示面板及背光模组(backlightmodule)。显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
半源极驱动架构(Half-Source Driver，HSD)是显示面板业界常用的一种低成本生产方案，该方案是将扫描线的数目增加一倍，使单一数据线可以对应相邻两列的子像素，藉此节省半数的源极驱动集成芯片，但会有垂直亮暗线的现象产生。
技术解决方案
本申请提供一种显示面板和显示装置，以实现亮度均衡。
为实现上述目的，本申请提供了一种显示面板，包括：基板，所述基板上设置有：多条数据线、多条栅极线、多个像素和栅极驱动芯片；所述像素包括沿着栅极线方向分别设置不同颜色的子像素；所述栅极驱动芯片输出栅启动信号到栅极线以打开所述像素；每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素，所述第一列像素和第二列像素与同一数据线连接，且所述第一列像素和第二列像素连接至两条不同的栅极线；每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；所述第二列像素对应的主动开关的沟道宽长比大于对应所述第一列像素对应的主动开关的沟道宽长比。
可选的，所述第一列像素和第二列像素对应的数据驱动电压极性相反，所述第一列像素为奇数列像素，所述第二列像素为偶数列像素；对应所述偶数列像素对应的主动开关的沟道 宽长比大于所述奇数列像素对应的主动开关的沟道宽长比。
可选的，所述奇数列像素和所述偶数列像素的充电电压相同。
可选的，所述奇数列像素包括第一主动开关和第一子像素，所述偶数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；其中，(W/L)奇＝m*(W/L)偶，m大于等于0.5且小于1。
可选的，所述m的取值为0.5，0.6，0.7，0.8，0.9的其中的一个值。
可选的，所述m的取值为0.55，0.65，0.75，0.85，0.95的其中的一个值。
可选的，沟道宽长比满足公式
Figure PCTCN2018120467-appb-000001
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
可选的，所述第一列像素和第二列像素对应的数据驱动电压极性相同，所述第一列像素为偶数列像素，所述第二列像素为奇数列像素；对应所述奇数列像素的主动开关的沟道宽长比大于所述偶数列像素的主动开关的沟道宽长比。
可选的，所述偶数列像素包括第一主动开关和第一子像素，所述奇数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；其中，m*(W/L)奇＝(W/L)偶，m大于等于0.5且小于1。
可选的，所述m的取值为0.5，0.55，0.6，0.65，0.7，0.75，0.8，0.85，0.9，0.95的其中一个值。
可选的，所述沟道宽长比满足公式
Figure PCTCN2018120467-appb-000002
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
可选的，所述显示面板还包括检测电路，所述检测电路检测并比较第一列像素和第二列像素的亮度；若第一列像素偏暗，则调整第一列像素对应的充电时间C1和第二列像素对应的充电时间C2，使得C1大于C2；若第一列像素偏亮，则调整第一列像素对应的充电时间C1和第二列像素对应的充电时间C2，使得C1小于C2。
可选的，所述第一列像素和第二列像素的充电时间通过时序控制芯片控制。
可选的，所述显示面板采用半源极驱动架构。
本申请公开了一种显示面板,包括：基板，所述基板上设置有：多条数据线、多条栅极线、多个像素和栅极驱动芯片；所述像素包括沿着栅极线方向分别具有不同颜色的子像素；所述栅极驱动芯片，输出栅启动信号到栅极线以打开所述像素；每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素，所述第一列像素和第二列像素与同一数据线连接，且所述第一列像素和第二列像素连接至两条不同的栅极线；每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；所述第一列像素和第二列像素对应的数据驱动电压极性相反，所述第一列像素为奇数列像素，所述第二列像素为偶数列像素；所述奇数列像素包括第一主动开关和第一子像素，所述偶数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；所述(W/L)奇＝m*(W/L)偶，其中，m大于等于0.5且小于1；所述沟道宽长比满足公式
Figure PCTCN2018120467-appb-000003
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
本申请还公开了一种显示装置，包括如上所述的显示面板。
可选的，所述显示装置为扭曲向列型显示装置、平面转换显示装置和多象限垂直配向显示装置中的一种。
由于数据线正负极性转换导致当前组的第二列像素对应的数据驱动电压要一段时间才能反转到预设的电压水平，使得该第二列像素的充电电压以及充电状态要比同行下一组第一列像素对应的充电电压以及充电状态要低，最后导致像素的充电电压差异，从而出现垂直亮暗线的现象；本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强；设计使得该当前组的第二列像素对应的薄膜晶体管的沟道宽长比大于该同行下一组的第一列像素的沟道宽长比，那么该第二列像素的充电效率和充电能力就强于该第一列像素，抵消该第二列像素的充电电压低于该第一列像素的现象，进而减少甚至消除两者最终的充电状态的差异，从而使得两个相邻的像素充电电压相同，从而解决视觉上的垂直亮暗线现象。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动 性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请一实施例半源极驱动架构的示意图；
图2是图1中A区域局部放大的示意图；
图3是本申请一实施例半源极驱动架构数据输出波形的示意图；
图4是本申请一实施例半源极驱动架构数据实际输出波形的示意图；
图5是本申请一实施例半源极驱动架构像素电压的示意图；
图6是本申请一实施例一种显示面板的像素结构示意图；
图7是本申请一实施例一种显示面板的像素电压的示意图；
图8是本申请一实施例一种显示面板的另一种半源极驱动架构的示意图；
图9是本申请一实施例一种显示面板驱动时序信号的示意图；
图10是本申请一实施例一种显示装置框图的示意图。
具体实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、 单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和可选的实施例对本申请作说明。
参考图1、图2，相邻的两列像素共用一数据线120，相邻的像素之间与不同的栅极线110连接。当栅启动信号打开时，将相应一行的薄膜晶体管打开。此时，垂直方向的数据线120送入对应的数据信号，对存储电容充电至适当的电压，便可显示一行的图像。参考图3和图4，其中Data表示的是数据线120的波形，Gate为栅极线110的波形，当Gate为最高峰的时候为打开状态，打开对应的奇数列像素Odd和偶数列像素even。由于数据线120会有正负极性的转换，当数据线120正负极性转换时，极性反转之后的对应的奇数列像素的数据驱动电压需要一定时间才达到预设的电压强度，导致当前奇数列像素和与它相邻列且共用一条数据线120的偶数列像素在同样的栅启动信号启动下，两者的导通时间一样，C1为第一行栅启动信号导通的时间，C2为第二行栅启动信号导通的时间，此时C1＝C2；而使得两像素最终的充电状态有差异。参考图5，偶数列像素的电压大于奇数列像素的电压，Vp_even为偶数列对应的像素电压，Vp_odd为奇数列对应的像素电压，从而偶数列像素的亮度亮于奇数列像素的亮度，因此存在垂直亮暗线的现象。
参考图1、图6和图7所示，本申请一实施例公开了一种显示面板，包括：基板，所述基板上设置有：多条数据线120、多条栅极线110及多个像素130；所述像素130包括沿着栅极线110方向分别设置不同颜色的子像素；栅极驱动芯片102，输出栅启动信号到栅极线110以打开所述像素130；每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素131和在后的第二列像素132，所述第一列像素131和第二列像素132与同一数据线120连接，且所述第一列像素131和第二列像素132连接至两条不同的栅极线110；每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；所述第二列像素132对应的主动开关的沟道宽长比大于对应所述第一列像素131对应的主动开关的沟道宽长比。
由于数据线120正负极性转换导致当前组的第二列像素132对应的数据驱动电压需要一段时间才能反转到预设的电压水平，使得该第二列像素132的充电电压以及充电状态要比同行下一组第一列像素131对应的充电电压以及充电状态要低，最后导致像素的充电电压差异，从而出现垂直亮暗线；本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强；设计使得该当前组的第二列像素132对应的薄膜晶体管的沟道宽长比大于该同行下一组的第一列像素131的沟道宽长比，那么该第二列像素132的充电效率和充电能力强于该第一列像素131，抵消该第二列像素132的充电电压低于该第一列像素131的问题，进而减少甚至消除两者最终的充电状态的差异，从而使得两个相邻的像素充电电压相同，从 而解决视觉上的垂直亮暗线现象。
参考图1、图6和图7，在一实施例中，所述第一列像素131和第二列像素132对应的数据驱动电压极性相反，所述第一列像素131为奇数列像素，所述第二列像素132为偶数列像素；所述偶数列像素对应的主动开关的沟道宽长比大于所述奇数列像素对应的主动开关的沟道宽长比。
本方案中，第一列像素131为奇数列像素，第二列像素132为偶数列像素，设计使得所述偶数列像素对应的薄膜晶体管沟道宽长比大于奇数列像素的沟道宽长比，那么偶数列像素的充电效率和充电能力就强于奇数列像素，抵消偶数列的充电电压低于奇数列像素的问题，进而减少设置消除两者最终的充电状态的差异，使得奇数列像素和偶数列像素充电电压相同，从而解决视觉上的亮暗线现象。
在一实施例中，所述奇列像素131包括第一主动开关1311和第一子像素1312，所述偶数列像素132包括第二主动开关1321和第二子像素1322，所述数据线120与第一主动开关1311的漏极、第二主动开关1321的漏极连接，所述第一主动开关的源极与第一子像素1312相连，所述第二主动开关的源极与第二子像素1322相连；其中，(W/L)奇＝m*(W/L)偶，m大于等于0.5且小于1。
本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强，若m小于0.5，偶数列像素的充电效率和充电能力虽然强于奇数列像素，能部分抵消偶数列的充电电压低于奇数列像素的差异，亮暗线还是会存在；若m大于1，奇数列像素的充电效率和充电能力远大于偶数列像素的充电效率和充电能力，会使亮暗线的现象更明显。
其中，m＝0.5,0.55,0.6,0.65,0.7,0.75,0.8,0.85,0.9,0.95……但不仅限于此。
Figure PCTCN2018120467-appb-000004
Cox是薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display，TFT-LCD)器件金属绝缘体半导体(Metal-Insulator-Semiconductor，MIS)结构的单位面积电容，Vgs为栅源极之间的电压，Vth为阈值电压，Ids为漏电流。
在一实施例中，沟道宽长比满足公式
Figure PCTCN2018120467-appb-000005
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。其中沟道宽长比W/L的值通过a，b，c的值来实现，所以abc根据计算满足W/L计算得出结果即可。
通过调节影响沟道宽长比的参数，使得所述偶数列像素对应的薄膜晶体管沟道宽长比大于奇数列像素的沟道宽长比，那么偶数列像素的充电效率和充电能力就强于奇数列像素，抵消偶数列的充电电压低于奇数列像素的差异，进而减少甚至消除两者最终的充电状态的差 异，使得奇数列像素和偶数列像素充电电压相同，从而解决视觉上的亮暗线现象。
参考图8和图9，在一实施例中，所述第一列像素131和第二列像素132对应的数据驱动电压极性相同，所述第一列像素131为偶数列像素，所述第二列像素132为奇数列像素；对应所述奇数列像素的主动开关的沟道宽长比大于所述偶数列像素的主动开关的沟道宽长比。
本方案中，第一列像素131为偶数列像素，第二列像素132为奇数列像素，设计使得所述奇数列像素对应的薄膜晶体管沟道宽长比大于偶数列像素的沟道宽长比，那么奇数列像素的充电效率和充电能力强于偶数列像素，抵消奇数列的充电电压低于偶数列像素的差异，进而减少甚至消除两者最终的充电状态的差异，使得奇数列像素和偶数列像素充电电压相同，从而解决视觉上的亮暗线现象。
在一实施例中，所述偶数列像素包括第一主动开关1311和第一子像素1312，所述奇数列像素包括第二主动开关1321和第二子像素1322，所述数据线120与第一主动开关1311的漏极、第二主动开关1321的漏极连接，所述第一主动开关的源极与第一子像素1312相连，所述第二主动开关的源极与第二子像素1322相连；其中，m*(W/L)奇＝(W/L)偶，m大于等于0.5且小于1。
本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强，若m小于0.5，奇数列像素的充电效率和充电能力虽然强于偶数列像素，能部分抵消奇数列的充电电压低于偶数列像素的差异，亮暗线的现象还是会存在；若m大于1，偶数列像素的充电效率和充电能力远大于奇数列像素的充电效率和充电能力，会使亮暗线的现象更明显。
其中，m＝0.5,0.55,0.6,0.65,0.7,0.75,0.8,0.85,0.9,0.95……但不仅限于此。
Figure PCTCN2018120467-appb-000006
Cox是TFT器件MIS结构的单位面积电容，Vgs为栅源极之间的电压，Vth为阈值电压,Ids为漏电流。
在一实施例中，沟道宽长比满足公式
Figure PCTCN2018120467-appb-000007
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
通过调节影响沟道宽长比的参数，使得所述奇数列像素对应的薄膜晶体管沟道宽长比大于偶数列像素的沟道宽长比，那么奇数列像素的充电效率和充电能力强于偶数列像素，抵消奇数列的充电电压低于偶数列像素的差异，进而减少甚至消除两者最终的充电状态的差异，使得奇数列像素和偶数列像素充电电压相同，从而解决视觉上的亮暗线现象。
在一实施例中，所述显示面板还包括检测电路，所述检测电路检测并比较第一列像素 131和第二列像素132的亮度；若第一列像素131偏暗，则调整第一列像素131对应的充电时间C1和第二列像素132对应的充电时间C2，使得C1大于C2；若第一列像素131偏亮，则调整第一列像素131对应的充电时间C1和第二列像素132对应的充电时间C2，使得C1小于C2。
虽然在生产前已经进行了测试，但是可能最终的产品中，实际设计的效用比预计的要差，仅通过调整沟道宽长比不一样，无法完全弥补亮暗线的差异，利用检测电路检测并比较第一列像素131和第二列像素132的实际亮度，根据实际情况调整充电时间，使得最后的显示效果好。其中，调整充电时间可以通过时序控制芯片来控制第一列像素和第二列像素的充电时间不同，也可以通过预充电或者其他方式实现。
作为本申请的另一实施例，参考图1、图6至图7所示，公开了一种显示面板101,包括：
基板，所述基板上设置有：多条数据线120、多条栅极线110、多个像素和栅极驱动芯片102，所述像素包括沿着栅极线110方向分别具有不同颜色的子像素；所述栅极驱动芯片102输出栅启动信号到栅极线110以打开所述像素；每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素131和在后的第二列像素132，所述第一列像素131和第二列像素132与同一数据线120连接，且所述第一列像素131和第二列像素132连接至两条不同的栅极线110；每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；所述第一列像素131和第二列像素132对应的数据驱动电压极性相反，所述第一列像素131为奇数列像素，所述第二列像素132为偶数列像素；所述奇数列像素包括第一主动开关1311和第一子像素1312，所述偶数列像素包括第二主动开关1321和第二子像素1322，所述数据线120与第一主动开关1311的漏极、第二主动开关1321的漏极连接，所述第一主动开关的源极与第一子像素1312相连，所述第二主动开关的源极与第二子像素1322相连；所述(W/L)奇＝m*(W/L)偶，其中，m大于等于0.5且小于1；沟道宽长比满足公式
Figure PCTCN2018120467-appb-000008
其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。W/L的计算由次公式决定，所以abc根据计算满足W/L计算得出结果即可。
由于数据线120正负极性转换导致当前组的第二列像素132对应的数据驱动电压要一段时间才能反转到预设的电压水平，使得该第二列像素132的充电电压以及充电状态要比同行下一组第一列像素131对应的充电电压以及充电状态要低，最后导致像素的充电电压差异，从而出现垂直亮暗线；本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强；设计使得该当前组的第二列像素132对应的薄膜晶体管的沟道宽长比大于该同行 下一组的第一列像素131的沟道宽长比，那么该第二列像素132的充电效率和充电能力强于该第一列像素131，抵消该第二列像素132的充电电压低于该第一列像素131的差异，进而减少甚至消除两者最终的充电状态的差异，从而使得两个相邻的像素充电电压相同，从而解决视觉上的垂直亮暗线现象。
作为本申请的另一实施例，参考图10所示，公开了一种显示装置100，包括上述的显示面板101。
由于数据线120正负极性转换导致当前组的第二列像素132对应的数据驱动电压要一段时间才能反转到预设的电压水平，使得该第二列像素132的充电电压以及充电状态要比同行下一组第一列像素131对应的充电电压以及充电状态要低，最后导致像素的充电电压差异，从而出现垂直亮暗线；本方案中，基于薄膜晶体管的沟道宽长比越大，开态电流越大，充电能力越强；设计使得该当前组的第二列像素132对应的薄膜晶体管的沟道宽长比大于该同行下一组的第一列像素131的沟道宽长比，那么该第二列像素132的充电效率和充电能力就强于该第一列像素131，抵消该第二列像素132的充电电压低于该第一列像素131的现象，进而减少甚至消除两者最终的充电状态的差异，从而使得两个相邻的像素充电电压相同，从而解决视觉上的垂直亮暗线现象。
本申请的面板可以是TN面板(全称为Twisted Nematic，即扭曲向列型面板)、IPS面板(In-PlaneSwitching，平面转换)、VA面板(Multi-domain Vertical Alignment，多象限垂直配向技术)，当然，也可以是其他类型的面板，适用即可。
以上内容是结合具体的可选实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种显示面板，包括：
    基板，所述基板上设置有：
    多条数据线、多条栅极线及多个像素；以及
    栅极驱动芯片，输出栅启动信号到栅极线以打开所述像素；
    所述像素包括沿着栅极线方向分别设置不同颜色的子像素；
    每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素，所述第一列像素和第二列像素与同一数据线连接，且所述第一列像素和第二列像素连接至两条不同的栅极线；
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；
    所述第二列像素对应的主动开关的沟道宽长比大于对应所述第一列像素对应的主动开关的沟道宽长比。
  2. 如权利要求1所述的一种显示面板，其中，所述第一列像素和第二列像素对应的数据驱动电压极性相反，所述第一列像素为奇数列像素，所述第二列像素为偶数列像素；
    所述偶数列像素对应的主动开关的沟道宽长比大于所述奇数列像素对应的主动开关的沟道宽长比。
  3. 如权利要求2所述的一种显示面板，其中，所述奇数列像素和所述偶数列像素的充电电压相同。
  4. 如权利要求2所述的一种显示面板，其中，所述奇数列像素包括第一主动开关和第一子像素，所述偶数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；
    其中，(W/L)奇＝m*(W/L)偶，m大于等于0.5且小于1。
  5. 如权利要求4所述的一种显示面板，其中，所述m的取值为0.5，0.6，0.7，0.8，0.9的其中的一个值。
  6. 如权利要求4所述的一种显示面板，其中，所述m的取值为0.55，0.65，0.75，0.85，0.95的其中的一个值。
  7. 如权利要求4所述的一种显示面板，其中，沟道宽长比满足公式
    Figure PCTCN2018120467-appb-100001
    其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；
    所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
  8. 如权利要求1所述的一种显示面板，其中，所述第一列像素和第二列像素对应的数据驱动电压极性相同，所述第一列像素为偶数列像素，所述第二列像素为奇数列像素；
    对应所述奇数列像素的主动开关的沟道宽长比大于所述偶数列像素的主动开关的沟道宽长比。
  9. 如权利要求8所述的一种显示面板，其中，所述偶数列像素包括第一主动开关和第一子像素，所述奇数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；
    所述m*(W/L)奇＝(W/L)偶，其中，m大于等于0.5且小于1。
  10. 如权利要求9所述的一种显示面板，其中，所述m的取值为0.5，0.55，0.6，0.65，0.7，0.75，0.8，0.85，0.9，0.95的其中一个值。
  11. 如权利要求9所述的一种显示面板，其中，沟道宽长比满足公式
    Figure PCTCN2018120467-appb-100002
    其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；
    所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
  12. 如权利要求1所述的一种显示面板，其中，所述显示面板还包括检测电路，所述检测电路检测并比较第一列像素和第二列像素的亮度；
    若第一列像素偏暗，则调整第一列像素对应的充电时间C1和第二列像素对应的充电时间C2，使得C1大于C2；
    若第一列像素偏亮，则调整第一列像素对应的充电时间C1和第二列像素对应的充电时间C2，使得C1小于C2。
  13. 如权利要求12所述的一种显示面板，其中，所述第一列像素和第二列像素的充电时间通过时序控制芯片控制。
  14. 如权利要求1所述的一种显示面板，其中，所述显示面板采用半源极驱动架构。
  15. 一种显示面板,包括：
    基板，所述基板上设置有：
    多条数据线、多条栅极线及多个像素；以及
    栅极驱动芯片，输出栅启动信号到栅极线以打开所述像素；
    所述像素包括沿着栅极线方向分别具有不同颜色的子像素；
    每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素和在后 的第二列像素，所述第一列像素和第二列像素与同一数据线连接，且所述第一列像素和第二列像素连接至两条不同的栅极线；
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；
    所述第一列像素和第二列像素对应的数据驱动电压极性相反，所述第一列像素为奇数列像素，所述第二列像素为偶数列像素；
    所述奇数列像素包括第一主动开关和第一子像素，所述偶数列像素包括第二主动开关和第二子像素，所述数据线与第一主动开关的漏极、第二主动开关的漏极连接，所述第一主动开关的源极与第一子像素相连，所述第二主动开关的源极与第二子像素相连；
    其中，(W/L)奇＝m*(W/L)偶，m大于等于0.5且小于1；
    沟道宽长比满足公式
    Figure PCTCN2018120467-appb-100003
    其中，所述W为沟道宽，所述L为沟道长，所述a为源极半圆区的半径，所述b为半圆的圆心到漏极的水平距离，所述c为漏极两侧平行区的长度；
    所述第二主动开关的沟道宽长比W/L大于所述第一主动开关的沟道宽长比W/L。
  16. 一种显示装置，包括显示面板，所述显示面板包括：
    基板，所述基板上设置有：
    多条数据线、多条栅极线及多个像素；以及
    栅极驱动芯片，输出栅启动信号到栅极线以打开所述像素；
    所述像素包括沿着栅极线方向分别设置不同颜色的子像素；
    每一行所述像素包括多个像素组，每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素，所述第一列像素和第二列像素与同一数据线连接，且所述第一列像素和第二列像素连接至两条不同的栅极线；
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反；
    所述第二列像素对应的主动开关的沟道宽长比大于对应所述第一列像素对应的主动开关的沟道宽长比。
  17. 如权利要求16所述的一种显示装置，其中，所述显示装置为扭曲向列型显示装置、平面转换显示装置和多象限垂直配向显示装置中的一种。
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