WO2020103252A1 - 基板、显示面板和显示装置 - Google Patents

基板、显示面板和显示装置

Info

Publication number
WO2020103252A1
WO2020103252A1 PCT/CN2018/122106 CN2018122106W WO2020103252A1 WO 2020103252 A1 WO2020103252 A1 WO 2020103252A1 CN 2018122106 W CN2018122106 W CN 2018122106W WO 2020103252 A1 WO2020103252 A1 WO 2020103252A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
layer
fan
display panel
display area
Prior art date
Application number
PCT/CN2018/122106
Other languages
English (en)
French (fr)
Inventor
何怀亮
Original Assignee
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US16/426,020 priority Critical patent/US10795219B2/en
Publication of WO2020103252A1 publication Critical patent/WO2020103252A1/zh

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00

Definitions

  • the present application relates to the technical field of displays, in particular to a substrate, a display panel and a display device.
  • a transparent conductive layer needs to be provided in the display area of the display panel.
  • the transparent conductive layer forms a pixel electrode in the display area. Since the etching balance when forming the pixel electrode in the display area is taken into consideration to ensure the consistency of the line width and line spacing of the pixel electrode
  • the fan-out area is also provided with a transparent conductive layer, which forms a conductive line. Due to the process, residual particles will adhere to the fan-out area.
  • the main purpose of the present application is to propose a substrate, which aims to solve the problem of increased capacitance due to adhesion of residual particles in the fan-out area of the substrate.
  • the present application discloses a substrate.
  • the substrate includes:
  • a substrate body, the substrate body is provided with a display area and a non-display area;
  • a transparent conductive layer is provided in a non-display area of the substrate body, and is provided in a different layer from the fan-out layer, the fan-out layer is located between the substrate body and the transparent conductive layer;
  • the transparent conductive layer includes a plurality of pattern groups, and the plurality of pattern groups are arranged at intervals; the pattern groups and the traces are alternately arranged; the pattern group includes a plurality of conductive patterns, and the plurality of conductive patterns are arranged alternately.
  • a plurality of the conductive patterns are sequentially arranged along the extending direction of the gap between adjacent traces.
  • the distance between adjacent conductive patterns is equal.
  • the conductive patterns are distributed in dots.
  • the outer contour of the conductive pattern is circular.
  • the diameter of the circle enclosed by the outer contour of the conductive pattern is not less than 3 microns.
  • the conductive pattern is strip-shaped.
  • the material of the conductive pattern is indium tin oxide.
  • the application also discloses a display panel.
  • the display panel includes a substrate;
  • the substrate includes:
  • a substrate body, the substrate body is provided with a display area and a non-display area;
  • a transparent conductive layer is provided in a non-display area of the substrate body, and is provided in a different layer from the fan-out layer, the fan-out layer is located between the substrate body and the transparent conductive layer;
  • the transparent conductive layer includes a plurality of pattern groups, which are arranged at intervals; the pattern groups and the traces are alternately arranged; the pattern group includes a plurality of conductive patterns, and the plurality of conductive patterns are arranged alternately.
  • a plurality of the conductive patterns are sequentially arranged along the extending direction of the gap between adjacent traces.
  • the distance between adjacent conductive patterns is equal.
  • the conductive patterns are distributed in dots.
  • the outer contour of the conductive pattern is circular.
  • the diameter of the circle enclosed by the outer contour of the conductive pattern is not less than 3 microns.
  • the conductive pattern is strip-shaped.
  • the material of the conductive pattern is indium tin oxide.
  • the substrate is an array substrate
  • the display panel also includes:
  • a color filter substrate, the color filter substrate and the array substrate are oppositely arranged;
  • a liquid crystal layer which is provided between the color filter substrate and the array substrate.
  • the application also discloses a display device.
  • the display device includes a display panel
  • the display panel includes a substrate
  • the substrate includes:
  • a substrate body, the substrate body is provided with a display area and a non-display area;
  • a transparent conductive layer is provided in a non-display area of the substrate body, and is provided in a different layer from the fan-out layer, the fan-out layer is located between the substrate body and the transparent conductive layer;
  • the transparent conductive layer includes a plurality of pattern groups, and the plurality of pattern groups are arranged at intervals; the pattern groups and the traces are alternately arranged; the pattern group includes a plurality of conductive patterns, and the plurality of conductive patterns are arranged alternately.
  • a plurality of the conductive patterns are sequentially arranged along the extending direction of the gap between adjacent traces.
  • the display device further includes:
  • a housing, the display panel and the backlight are mounted to the housing, the backlight is located behind the display panel.
  • a transparent conductive layer is provided in the non-display area of the substrate body, and the transparent conductive layer and the fan-out layer are provided in different layers.
  • the transparent conductive layer includes multiple pattern groups, and the pattern group includes multiple conductive patterns, and the conductive patterns are arranged alternately.
  • FIG. 1 is a schematic diagram of a substrate structure in an embodiment of the present application
  • FIG. 2 is a schematic structural diagram of a fan-out layer and a transparent conductive layer in an embodiment of the present application
  • Figure 3 is an enlarged view shown in dotted line in Figure 2;
  • FIG. 4 is a schematic structural diagram of a fan-out layer and a transparent conductive layer in an embodiment of the present application
  • FIG. 5 is an enlarged view shown by the broken line in FIG. 4.
  • fixed may be a fixed connection, a detachable connection, or integrated; It is a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediary. It can be the connection between two elements or the interaction between two elements, unless otherwise clearly defined.
  • first, second, etc. in this application are for descriptive purposes only, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated.
  • the features defined with “first” and “second” may include at least one of the features either explicitly or implicitly.
  • the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of those skilled in the art to realize. When the combination of technical solutions contradicts or cannot be realized, it should be considered that the combination of such technical solutions does not exist , Nor within the scope of protection required by this application.
  • the display device is a device for outputting information, also known as a display. It can transform the data of the computer into various characters, numbers, symbols or images and display it, and can add, delete or change the display content at any time with the help of the computer. Display devices can be divided into liquid crystal displays, organic light-emitting diode displays, etc. according to different principles.
  • the substrate 100 is required for the display panel portion of displays such as liquid crystal displays and organic light emitting diode displays.
  • the display panel of the liquid crystal display is composed of an array substrate and a color filter substrate, and liquid crystal is filled between the array substrate and the color filter substrate.
  • the array substrate and the color filter substrate are respectively one type of substrate, and the materials of the two may be the same (for example, a glass substrate), and the structures formed on the two are different.
  • the organic light emitting diode display has an array substrate, and an organic self-luminous layer is provided on the array substrate. That is, the substrate 100 is an important component of a display panel in a display device. After the substrate 100 is prepared into a display panel, it is installed in a housing with a backlight to form a display device.
  • the substrate 100 (array substrate) is provided with a display area 111 and a non-display area 112.
  • the non-display area 112 needs to be provided with a driving chip, and the driving chip needs to be connected to the display area 111 through a trace 121. Since the signal transmission portion of the driving chip and the corresponding signal transmission portion of the display area 111 are different in width, the trace 121 in the non-display area 112 needs to form a fan structure.
  • the display area 111 includes a plurality of scanning lines and a plurality of data lines, the plurality of scanning lines and the plurality of data lines are crisscrossed to form a plurality of pixel units, and the pins of the driving chip need to be connected to the scanning lines through the wiring 121 Or data cable.
  • a pixel electrode In order to drive the display area 111, a pixel electrode needs to be formed in the display area 111.
  • the function of the pixel electrode is to apply a voltage to the liquid crystal.
  • the material of the pixel electrode may be ITO (indium tin oxide), IZO (indium zinc oxide), AZO (aluminum doped zinc oxide), GZO (gallium doped zinc oxide) and other transparent conductive materials.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • AZO aluminum doped zinc oxide
  • GZO gallium doped zinc oxide
  • the transparent conductive layer 130 is provided in the non-display area 112 of the substrate body 110, and the A fan-out layer 120 is provided in different layers.
  • the fan-out layer 120 is located between the substrate body 110 and the transparent conductive layer 130;
  • the transparent conductive layer 130 includes a plurality of pattern groups 131, and the plurality of pattern groups 131 Arranged at intervals;
  • the pattern group 131 and the trace 121 are alternately arranged;
  • the pattern group 131 includes a plurality of conductive patterns 1311, and the plurality of conductive patterns 1311 are arranged alternately.
  • the added capacitance can be made very small, so as not to cause signal delay .
  • the present application proposes a substrate 100.
  • the substrate 100 includes:
  • a substrate body 110, the substrate body 110 is provided with a display area 111 and a non-display area 112;
  • a transparent conductive layer 130 which is disposed in the non-display area 112 of the substrate body 110, and is provided in a different layer from the fan-out layer 120, and the fan-out layer 120 is located between the substrate body 110 and the Between the transparent conductive layers 130; the transparent conductive layer 130 includes a plurality of pattern groups 131 arranged at intervals; the pattern groups 131 and the traces 121 are alternately arranged; the pattern group 131 includes A plurality of conductive patterns 1311 are arranged alternately.
  • the fan-out layer 120 includes a plurality of traces 121 formed on the non-display area 112 of the substrate body 110, and then a transparent conductive layer 130 is formed on the fan-out layer 120.
  • the transparent conductive layer 130 is used here ITO (indium tin oxide), IZO (indium zinc oxide), AZO (aluminum doped zinc oxide), GZO (gallium doped zinc oxide) and other transparent conductive materials. Referring specifically to FIGS.
  • the transparent conductive layer 130 includes a plurality of pattern groups 131, which are arranged at intervals and alternately arranged with the trace 121, that is, in the projection on the same plane, the pattern group 131 Located between two adjacent traces 121 and insulated from the trace 121.
  • the pattern group 131 includes a plurality of conductive patterns 1311.
  • the plurality of conductive patterns 1311 are insulated from each other.
  • the patterns 1311 are arranged at intervals, that is, the adjacent conductive patterns 1311 are insulated from each other, so even if the residual particles conduct the trace 121 and one of the conductive patterns 1311, the capacitance added by the trace 121 of the fan-out layer 120 at this time It is also very small, so as not to cause a signal delay from the trace 121 of the fan-out layer to the signal line of the display area 111, and there is no delay in the signal, that is, the display panel will not suffer from a weak line.
  • the weak line here refers to the formation of a line incompatible with the content of the screen.
  • the trace 121 can be formed by the following method:
  • Step 1 Clean the glass (substrate body 110) to remove foreign matter
  • Step 2 Divide the area and divide the glass surface into a display area 111 and a non-display area 112;
  • Step three a metal film is formed by sputtering and depositing a metal film on the non-display area 112 of the glass;
  • Step 4 Apply photoresist on the formed metal film
  • Step 5 The ultraviolet ray irradiates the photoresist on the glass through the mask plate for exposure;
  • Step 6 The exposed part of the photoresist is fused by the developer, leaving part of the pattern to take the desired shape;
  • Step 7 Put the glass into the corrosive liquid or corrosive gas to corrode the film not covered by photoresist;
  • Step 8 Remove the remaining photoresist, leaving the desired shape as the trace 121, so as to form a fan-out layer 120 on the glass (a few bodies 110).
  • the conductive pattern 131 has a certain shape and / or structure and is prepared by a transparent conductive material.
  • ITO material is used as an example.
  • the display area 111 and the non-display area 112 are formed by sputtering
  • the ITO film is then coated, exposed, and developed by photoresist, and then the ITO film is etched, and finally the photoresist is peeled off to form a pixel electrode in the display area 111 and a conductive pattern 1311 in the non-display area 112.
  • the capacitance formed by the trace 121 of the fan-out layer 120 when the residual particles adhere to the area where the trace 121 is located is very small, and the fan-out layer is avoided
  • the signal from the trace 121 to the signal line of the display area 111 is delayed.
  • the plurality of conductive patterns 1311 are sequentially arranged along the extending direction of the gap 1211 between the adjacent traces 121. That is, the two adjacent traces 121 are arranged alternately, so there is a gap 1211 between the two adjacent traces 121, and the conductive patterns 1311 are arranged alternately along the extending direction of the gap 1211 to avoid local positions. Short circuit caused by the aggregation of the conductive patterns 1311. Moreover, because the gap 1211 is provided alternately in the extending direction, the conductive patterns 1311 can be arranged more in a limited space to ensure etching balance.
  • the distance between adjacent conductive patterns 1311 is equal, L1 in FIG. 3 is equal to L2, and L3 in FIG. 4 is equal to L4.
  • the conductive pattern 1311 is formed by sequentially performing steps such as sputtering, photoresist coating, exposure and development, and etching. Therefore, in this embodiment, the distances between adjacent conductive patterns 1311 are equal, that is, the conductive patterns 1311 are evenly arranged. In this way, the conductive patterns 1311 are prevented from being too dense, and the process difficulty in the exposure and development stages is reduced.
  • the conductive patterns 1311 are evenly arranged between each other, to avoid local aggregation, and to prevent residual particles from covering multiple conductive patterns 1311 at the same time, which further prevents an increase in capacitance.
  • the distance mentioned above is the shortest distance.
  • the conductive patterns 1311 are distributed in a dot shape.
  • the conductive patterns 1311 are distributed in a dot shape.
  • the outer contour of the conductive patterns 1311 may be circular, quadrangular, pentagonal, hexagonal, or the like. Since the conductive patterns 1311 are distributed in dots, each conductive pattern 1311 can be made sufficiently small. When residual particles adhere to the area where the trace 121 is located, the probability that the residual particles cover the conductive patterns 1311 is greatly reduced, thereby further preventing The area where the trace 121 is located adheres to the residual particles to increase the capacitance.
  • the outer contour of the conductive pattern 1311 is circular. In this embodiment, the outer contour of the conductive pattern 1311 is circular, and the stress of the conductive pattern 1311 tends to be consistent, which effectively prevents the conductive pattern 1311 from peeling off.
  • the diameter of the circle surrounded by the outer contour of the conductive pattern 1311 is not less than 3 microns. In this embodiment, the diameter of the circle surrounded by the outer contour of the conductive pattern 1311 is not less than 3 ⁇ m, so as to ensure etching balance, and the maximum value can be determined according to the distance between adjacent traces 121.
  • the conductive pattern 1311 has a strip shape.
  • the conductive patterns 1311 are in the form of stripes, and the plurality of conductive patterns 1311 are distributed in multiple stages as a whole. That is, the strip-shaped conductive pattern 1311 has a larger area than the dot-shaped conductive pattern 1311, and is easier to prepare and shape, thereby reducing the difficulty of preparation.
  • the material of the conductive pattern 1311 is indium tin oxide.
  • indium tin oxide ITO is the most widely used material.
  • Indium tin oxide is an N-type semiconductor material with semiconductor conductivity. Therefore, when the conductive pattern 1311 is formed, indium tin oxide can be selected to be prepared simultaneously with the pixel electrode to ensure etching balance and improve production efficiency.
  • the application also discloses a display panel.
  • the display panel includes the substrate 100 of any of the above embodiments;
  • the substrate 100 includes:
  • a substrate body 110, the substrate body 110 is provided with a display area 111 and a non-display area 112;
  • a transparent conductive layer 130 which is disposed in the non-display area 112 of the substrate body 110, and is provided in a different layer from the fan-out layer 120, and the fan-out layer 120 is located between the substrate body 110 and the Between the transparent conductive layers 130; the transparent conductive layer 130 includes a plurality of pattern groups 131 arranged at intervals; the pattern groups 131 and the traces 121 are alternately arranged; the pattern group 131 includes A plurality of conductive patterns 1311 are arranged alternately.
  • the display panel includes a substrate 100.
  • the substrate 100 For the specific structure of the substrate 100, refer to the above embodiments. Since the substrate 100 of the display panel of this embodiment adopts all the technical solutions of the above embodiments, it has at least the above embodiments. The effects brought by the technical solutions are not repeated here.
  • the substrate 100 is an array substrate
  • the display panel also includes:
  • a color filter substrate, the color filter substrate and the array substrate are oppositely arranged;
  • a liquid crystal layer which is provided between the color filter substrate and the array substrate.
  • the display area 111 on the array substrate is provided with thin film transistors, signal lines (scanning lines and data lines), pixel electrodes, storage capacitors, etc.
  • the non-display area 112 is provided with traces 121 and driving chips.
  • the display area 111 on the array substrate has a plurality of pixel units, and each pixel unit includes a switching device thin film transistor, a storage capacitor, and a pixel electrode.
  • the drain is connected to the pixel electrode
  • the driving chip is connected to the scan line and the data line through the trace 121, respectively.
  • the color film substrate is provided with a black matrix, a color filter film, an overcoat, and a transparent conductive film ITO (indium tin oxide semiconductor transparent conductive film).
  • the color filter film may be a color filter film of three primary colors of red, green and blue, and each color filter film on the color film substrate corresponds to a unit pixel on the array substrate in a one-to-one correspondence.
  • the liquid crystal layer is prepared by mixing and mixing a variety of liquid crystal molecules, and is filled between the color filter substrate and the array substrate.
  • anisotropic crystals liquid crystal molecules form optical anisotropy, and the optically anisotropic structure has a polarizing function.
  • the liquid crystal molecules rotate, so that the refractive index or light transmittance of the liquid crystal also changes accordingly, thereby controlling the brightness of the light.
  • the liquid crystal relies on the elastic potential energy to return to the state before the external force was applied.
  • the application also discloses a display device.
  • the display device includes the display panel of any of the above embodiments.
  • the display panel substrate 100, the substrate 100 includes:
  • a substrate body 110, the substrate body 110 is provided with a display area 111 and a non-display area 112;
  • a transparent conductive layer 130 which is disposed in the non-display area 112 of the substrate body 110, and is provided in a different layer from the fan-out layer 120, and the fan-out layer 120 is located between the substrate body 110 and the Between the transparent conductive layers 130; the transparent conductive layer 130 includes a plurality of pattern groups 131 arranged at intervals; the pattern groups 131 and the traces 121 are alternately arranged; the pattern group 131 includes A plurality of conductive patterns 1311 are arranged alternately.
  • the display device includes a display panel, and the display panel includes a substrate 100.
  • the substrate 100 For the specific structure of the substrate 100, refer to the foregoing embodiment. Since the substrate 100 of the display panel of the display device of this embodiment adopts all of the foregoing embodiments The technical solution therefore has at least the effect brought about by the technical solution of the above-mentioned embodiments, which will not be repeated here.
  • the display device further includes:
  • a housing, the display panel and the backlight are mounted to the housing, the backlight is located behind the display panel.
  • the backlight is mainly composed of components such as a light source, an optical film, and a light guide plate.
  • the light source determines the photoelectric parameters such as the power consumption, brightness, and color of the backlight, as well as its usage conditions and service life.
  • the light sources are divided into three categories: linear light sources, point light sources, and planar light sources according to the light-emitting shape.
  • the backlight should provide a high-brightness, high-uniformity surface light source to the display panel as much as possible.
  • the optical film used in the backlight is mainly divided into two categories, one is the diffusion film and the reflection film, the main function is to enhance the luminous uniformity of the surface light source, and the other is the incremental mode, the main function is to improve the backlight The brightness of the light.
  • the light guide plate should be set as an edge-lit backlight, so that the linear light emitted by the light source becomes surface light with good luminous efficiency.
  • the light emitted from the light guide plate has a high brightness when viewed from the side. By configuring the optical film on the light guide plate, the brightness of the front viewing angle can be maximized.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
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Abstract

一种基板（100）、显示面板和显示装置。基板（100）包括：基板主体（110）；扇出层（120），扇出层（120）包括多条走线（121），多条走线（121）间隔排列；透明导电层（130），与扇出层（120）异层设置，扇出层（120）位于基板主体（110）和透明导电层（130）之间；透明导电层（130）包括多个图案组（131），多个图案组（131）间隔排列；图案组（131）和走线（121）交替设置；图案组（131）包括多个导电图案（1311），多个导电图案（1311）相间设置。

Description

基板、显示面板和显示装置
相关申请
本申请要求2018年11月22日申请的，申请号为201821940063.5，名称为“基板、显示面板和显示装置”的中国专利申请优先权，在此将其全文引入作为参考。
技术领域
本申请涉及显示器技术领域，特别涉及一种基板、显示面板和显示装置。
背景技术
越来越多的显示面板往高可靠度方向发展，而其中的显示面板的扇出区的可靠度则成为关注的重点。显示面板的显示区需要设置透明导电层，该透明导电层在显示区形成像素电极，因考虑到在显示区形成像素电极时的蚀刻平衡，确保像素电极的线宽与线距一致性，需要在扇出区也设置透明导电层，该透明导电层形成导电线。由于工艺的原因，扇出区会粘附残留颗粒，残留颗粒接触到走线和导电线后，容易形成短路，从而增加了扇出区的电容，从而造成扇出区与显示区的信号线之间的信号延迟，信号延迟后造成充电不足，在显示面板上形成弱线不良现象。
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
申请内容
本申请的主要目的是提出一种基板，旨在解决基板的扇出区由于残留颗粒的粘附造成的电容增加的问题。
为实现上述目的，本申请公开了一种基板，在本申请的一实施例中，所述基板包括：
基板主体，所述基板主体设有显示区和非显示区；
扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
在本申请的一实施例中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
在本申请的一实施例中，相邻的所述导电图案之间的距离相等。
在本申请的一实施例中，所述导电图案呈点状分布。
在本申请的一实施例中，所述导电图案的外轮廓为圆形。
在本申请的一实施例中，所述导电图案的外轮廓所围设的圆形的直径不低于3微米。
在本申请的一实施例中，所述导电图案呈条状。
在本申请的一实施例中，所述导电图案的材质为氧化铟锡。
本申请还公开了一种显示面板，在本申请的一实施例中，所述显示面板包括基板；
所述基板包括：
基板主体，所述基板主体设有显示区和非显示区；
扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
在本申请的一实施例中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
在本申请的一实施例中，相邻的所述导电图案之间的距离相等。
在本申请的一实施例中，所述导电图案呈点状分布。
在本申请的一实施例中，所述导电图案的外轮廓为圆形。
在本申请的一实施例中，所述导电图案的外轮廓所围设的圆形的直径不低于3微米。
在本申请的一实施例中，所述导电图案呈条状。
在本申请的一实施例中，所述导电图案的材质为氧化铟锡。
在本申请的一实施例中，所述基板为阵列基板；
所述显示面板还包括：
彩膜基板，所述彩膜基板和所述阵列基板相对设置；以及
液晶层，所述液晶层设于所述彩膜基板和所述阵列基板之间。
本申请还公开了一种显示装置，在本申请的一实施例中，所述显示装置包括显示面板；
所述显示面板包括基板；
所述基板包括：
基板主体，所述基板主体设有显示区和非显示区；
扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
在本申请的一实施例中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
在本申请的一实施例中，所述显示装置还包括：
背光源；以及
外壳，所述显示面板和所述背光源安装至所述外壳，所述背光源位于所述显示面板的后方。
本申请技术方案通过在基板主体的非显示区设置透明导电层，透明导电层与扇出层异层设置，透明导电层包括多个图案组，图案组包括多个导电图案，导电图案相间设置。在非显示区的扇出层所在的区域粘附残留颗粒后，残留颗粒导通导电图案和走线时，由于导电图案是相间设置的，相邻的导电图案相互绝缘，因此走线增加的电容会非常小，不会造成扇出层的走线到显示区的数据线的信号延迟，从而避免显示面板的弱线不良现象。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请一实施例中的基板结构示意图
图2为本申请一实施例中扇出层和透明导电层结构示意图；
图3为图2虚线所示放大图；
图4为本申请一实施例中扇出层和透明导电层结构示意图；
图5为图4虚线所示放大图。
附图标号说明：
标号 名称 标号 名称
100 基板 121 走线
110 基板主体 1211 间隙
111 显示区 130 透明导电层
112 非显示区 131 图案组
120 扇出层 1311 导电图案
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，本申请实施例中所有方向性指示（诸如上、下、左、右、前、后……）仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
在本申请中，除非另有明确的规定和限定，术语“连接”、“固定”等应做广义理解，例如，“固定”可以是固定连接，也可以是可拆卸连接，或成一体；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系，除非另有明确的限定。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
另外，在本申请中如涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
显示装置为一种输出信息的装置，又称为显示器，它能将计算机的数据变换成各种文字、数字、符号或图像显示出来，并可借助计算机随时增添、删改、变换显示内容。显示装置根据原理的不同可分为液晶显示器、有机发光二极管显示器等。
在液晶显示器和有机发光二极管显示器等显示器中的显示面板部分均需要使用到基板100。例如，对于液晶显示器，液晶显示器的显示面板由阵列基板和彩膜基板构成，在阵列基板和彩膜基板之间填充液晶。阵列基板和彩膜基板分别是基板的一种，两者的材质可以一致（例如为玻璃基板），两者上所形成的结构不同。又例如，对于有机发光二极管显示器，有机发光二极管显示器具有阵列基板，在阵列基板上设置有机发自发光层。也即，基板100是显示装置中的显示面板的一个重要部件，利用基板100制备成显示面板后，与背光源安装至外壳中，从而形成一个显示装置。
为了实现显示面板中内容的显示，需要通过驱动基板100的显示区111来实现。例如，以液晶面板为例，基板100（阵列基板）设置显示区111和非显示区112，非显示区112需要设置驱动芯片，驱动芯片需要通过走线121连接至显示区111。由于驱动芯片传输信号的部分与对应的显示区111传输信号的部分在宽度上有差异，因此在非显示区112的走线121需要形成扇形结构。即，显示区111中包括了多条扫描线和多条数据线，多条扫描线和多条数据线纵横交错以形成多个像素单元，驱动芯片的引脚需要通过走线121连接至扫描线或数据线。
为了实现对显示区111的驱动，需要在显示区111形成像素电极，像素电极的作用在于给液晶合施加电压。像素电极的材质可以为ITO（氧化铟锡）、IZO（铟锌氧化物）、AZO（铝掺杂氧化锌）、GZO（镓掺杂氧化锌）等透明导电材料。以ITO为例说明像素电极的形成，首先，在显示区111通过溅射形成ITO膜，然后通过光刻胶涂敷、曝光和显影，再然后蚀刻ITO膜，最后剥离光刻胶，从而形成像素电极（Pixel ITO）。为了考虑在显示区111蚀刻出像素电极时的蚀刻平衡，保证像素电极的线宽和线距，目前需要在非显示区111也设置ITO膜并蚀刻形成导电线（Dummy ITO）。
由于工艺的原因，走线121所在的区域会粘附残留颗粒，残留颗粒接触到走线121和导电线后容易形成短路，如此会增加扇出层120的走线121的电容，从而造成走线121与显示区111的信号线之间的信号延迟，信号延迟后造成充电不足，在显示面板上形成弱线不良现象。
因此，为了在保证蚀刻平衡的前提下防止残留颗粒导致的电容过大的问题，本申请的主要解决方案是所述透明导电层130设于所述基板主体110的非显示区112，与所述扇出层120异层设置，所述扇出层120位于所述基板主体110和所述透明导电层130之间；所述透明导电层130包括多个图案组131，多个所述图案组131间隔排列；所述图案组131和所述走线121交替设置；所述图案组131包括多个导电图案1311，多个所述导电图案1311相间设置。通过将导电图案1311间隔排列，即使在走线121所在区域粘附了残留颗粒，而残留颗粒导通导电图案1311和走线121时，也能使得增加的电容非常小，不至于造成信号的延迟。
基于上述问题，本申请提出一种基板100。
在本申请的一实施例中，如图1至图5所示，所述基板100包括：
基板主体110，所述基板主体110设有显示区111和非显示区112；
扇出层120，所述扇出层120设于所述基板主体110的非显示区112，所述扇出层120包括多条走线121，多条所述走线121间隔排列；以及
透明导电层130，所述透明导电层130设于所述基板主体110的非显示区112，与所述扇出层120异层设置，所述扇出层120位于所述基板主体110和所述透明导电层130之间；所述透明导电层130包括多个图案组131，多个所述图案组131间隔排列；所述图案组131和所述走线121交替设置；所述图案组131包括多个导电图案1311，多个所述导电图案1311相间设置。
在本实施例中，扇出层120包括多条走线121，形成于基板主体110的非显示区112，然后再于扇出层120上形成透明导电层130，这里的透明导电层130为采用ITO（氧化铟锡）、IZO（铟锌氧化物）、AZO（铝掺杂氧化锌）、GZO（镓掺杂氧化锌）等透明导电材料制备而成。具体参见图2和图4所示，透明导电层130包括多个图案组131，多个图案组131间隔排列，且与走线121交替设置，也即是在同一平面的投影中，图案组131位于相邻的两走线121之间，且与走线121绝缘。图案组131包括多个导电图案1311，多个导电图案1311之间相互绝缘，在走线121所在区域粘附残留颗粒后，残留颗粒导通走线121和导电图案1311，但是由于相邻的导电图案1311是间隔排列的，也即相邻的导电图案1311之间相互绝缘，因此即使残留颗粒导通走线121和其中一个导电图案1311，此时扇出层120的走线121所增加的电容也非常的小，从而不会造成扇出层的走线121到显示区111的信号线的信号延迟，信号没有出现延迟也即显示面板不会出现弱线不良现象。这里的弱线指的是在画面形成一条与画面内容不相容的线。
走线121可以通过如下方法形成：
步骤一、玻璃（基板主体110）清洗，去除异物；
步骤二、划分区域，将玻璃表面个划分出显示区111和非显示区112；
步骤三，采用金属材料在玻璃的非显示区112通过溅射沉积形成金属薄膜；
步骤四，在已形成金属薄膜上涂覆光刻胶；
步骤五，紫外线透过掩模板照射玻璃上的光刻胶进行曝光；
步骤六，光刻胶曝光部分被显影液熔接，留下部分图案呈现所需形状；
步骤七，玻璃放入到腐蚀液或腐蚀气体中，腐蚀掉无光刻胶覆盖的薄膜；
步骤八、去除残余的光刻胶，留下所需形状即为走线121，从而在玻璃（几班主体110）上形成扇出层120。
导电图案131为具有一定的形状和/或结构，通过透明导电材料制备而成，在形成透明导电层130时，以ITO材质为例，首先，在显示区111和非显示区112通过溅射形成ITO膜，然后通过光刻胶涂敷、曝光和显影，再然后蚀刻ITO膜，最后剥离光刻胶，从而在显示区111形成像素电极，在非显示区112形成导电图案1311。
本实施例通过将导电图案1311相间设置，在保证蚀刻平衡的前提下，使得走线121所在区域粘附残留颗粒时扇出层120的走线121所形成的电容非常小，避免了扇出层的走线121到显示区111的信号线的信号延迟。
在本申请的一实施例中，如图2至图4所示，多个所述导电图案1311沿相邻的所述走线121之间的间隙1211的延伸方向依次相间设置。也即，相邻的两条走线121之间是相间设置的，因此相邻的两条走线121之间存在间隙1211，导电图案1311沿着间隙1211的延伸方向相间设置，避免局部位置的导电图案1311的聚集而导致的短路。又因为通过在间隙1211的延伸方向相间设置，使得导电图案1311能在有限的空间内布置更多，保证蚀刻平衡。
在本申请的一实施例中，如图3和图5所示，相邻的所述导电图案1311之间的距离相等，图3中的L1等于L2，图4中的L3等于L4。如上所述，导电图案1311的形成为依次经过溅射，光刻胶涂敷、曝光和显影，以及蚀刻等步骤。因此，在本实施例中，相邻的导电图案1311的距离相等，即导电图案1311均匀相间排布。如此，避免导电图案1311的过于密集，降低曝光、显影阶段的工艺难度。
导电图案1311之间均匀相间排布，避免局部的聚集，防止残留颗粒同时覆盖多个导电图案1311，进一步的防止了电容的增大。
上述所指的距离为最短距离。
在本申请的一实施例中，如图2和图3所示，所述导电图案1311呈点状分布。在本实施例中，导电图案1311呈点状分布，这里导电图案1311的外轮廓可以呈圆形、四边形、五边形、六边形等。由于导电图案1311呈点状分布，因此每一个导电图案1311都可以做得足够小，在走线121所在的区域粘附残留颗粒时，残留颗粒覆盖导电图案1311的概率也大大降低，从而进一步防止走线121所在的区域粘附残留颗粒后增加电容。
在本申请的一实施例中，所述导电图案1311的外轮廓为圆形。在本实施例中，导电图案1311的外轮廓为圆形，导电图案1311的各向受力趋向一致，有效防止导电图案1311的剥落。
在本申请的一实施例中，所述导电图案1311的外轮廓所围设的圆形的直径不低于3微米。在本实施例中，导电图案1311的外轮廓所围设的圆形的直径不低于3微米，从而能保证蚀刻平衡，而最大值可以根据相邻的走线121之间的距离而定。
在本申请的一实施例中，如图4和图5所示，所述导电图案1311呈条状。在本实施例中，与上述实施例的点状分布不一样，导电图案1311呈条状，多个导电图案1311整体呈多段分布。也即，条状的导电图案1311相对于点状的导电图案1311面积更大，更容易制备成型，从而降低了制备难度。
在本申请的一实施例中，所述导电图案1311的材质为氧化铟锡。一般来说，像素电极的材质中，氧化铟锡（ITO）是应用最为广泛的材质，氧化铟锡是一种N型半导体材料，具有半导体的导电性能。因此在形成导电图案1311时，选用氧化铟锡能与像素电极同时制备，保证蚀刻平衡，提高生产效率。
本申请还公开了一种显示面板。
在本申请的一实施例中，所述显示面板包括上述任一实施例的基板100；
所述基板100包括：
基板主体110，所述基板主体110设有显示区111和非显示区112；
扇出层120，所述扇出层120设于所述基板主体110的非显示区112，所述扇出层120包括多条走线121，多条所述走线121间隔排列；以及
透明导电层130，所述透明导电层130设于所述基板主体110的非显示区112，与所述扇出层120异层设置，所述扇出层120位于所述基板主体110和所述透明导电层130之间；所述透明导电层130包括多个图案组131，多个所述图案组131间隔排列；所述图案组131和所述走线121交替设置；所述图案组131包括多个导电图案1311，多个所述导电图案1311相间设置。
在本实施例中，该显示面板包括基板100，该基板100的具体结构参照上述实施例，由于本实施例的显示面板的基板100采用了上述实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的效果，在此不再一一赘述。
在本申请的一实施例中，所述基板100为阵列基板；
所述显示面板还包括：
彩膜基板，所述彩膜基板和所述阵列基板相对设置；以及
液晶层，所述液晶层设于所述彩膜基板和所述阵列基板之间。
在本实施例中，阵列基板上的显示区111设有薄膜晶体管、信号线（扫描线和数据线）、像素电极、储存电容等，非显示区112设有走线121和驱动芯片。具体为，阵列基板上的显示区111具有多个像素单元，每个像素单元包含开关器件薄膜晶体管、存储电容和像素电极，薄膜晶体管的栅极连接在扫描线上，薄膜晶体管的源极连接在数据线上，漏极连接在像素电极上，驱动芯片通过走线121分别与扫描线和数据线连接。
彩膜基板上设有黑矩阵、彩色滤光膜、外层保护膜（overcoat）和透明导电膜ITO（铟锡氧化物半导体透明导电膜）。彩色滤光膜可以为红绿蓝三原色的彩色滤光膜，彩膜基板上每种颜色的滤光膜与阵列基板上的单位像素一一对应。
液晶层为由多种液晶分子混合调配而成，填充于彩膜基板和阵列基板之间。液晶分子作为各向异性晶体，形成了光学各向异性，光学各向异性的结构具有偏光功能。在外加电压控制下，由于液晶具有介电各向异性的特点，液晶分子发生转动，使得液晶的折射率或透光率也发生相应的变换，从而控制出光亮度。在撤销外加电压后，液晶依靠弹性势能恢复到施加外力前的状态。
本申请还公开了一种显示装置。
在本申请的一实施例中，所述显示装置包括上述任一实施例的显示面板。
所述显示面板基板100，所述基板100包括：
基板主体110，所述基板主体110设有显示区111和非显示区112；
扇出层120，所述扇出层120设于所述基板主体110的非显示区112，所述扇出层120包括多条走线121，多条所述走线121间隔排列；以及
透明导电层130，所述透明导电层130设于所述基板主体110的非显示区112，与所述扇出层120异层设置，所述扇出层120位于所述基板主体110和所述透明导电层130之间；所述透明导电层130包括多个图案组131，多个所述图案组131间隔排列；所述图案组131和所述走线121交替设置；所述图案组131包括多个导电图案1311，多个所述导电图案1311相间设置。
在本实施例中，该显示装置包括显示面板，显示面板包括基板100，该基板100的具体结构参照上述实施例，由于本实施例的显示装置的显示面板的基板100采用了上述实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的效果，在此不再一一赘述。
在本申请的一实施例中，所述显示装置还包括：
背光源；以及
外壳，所述显示面板和所述背光源安装至所述外壳，所述背光源位于所述显示面板的后方。
在本实施例中，背光源主要由光源、光学膜片和导光板等部件构成。光源决定了背光源的功耗、亮度、颜色等光电参数，也决定了其使用条件和使用寿命等参数。光源按照发光形状分为线状光源、点状光源和面状光源三大类。
背光源要尽可能地给显示面板提供一个高亮度、高均匀性的面光源。在背光源中使用的光学膜片，主要分为两类，一类是扩散膜和反射片，主要功能时加强面光源的发光均匀性，另一类是增量模，主要功能时提高背光源的出光亮度。
导光板应设置为侧光式背光源中，使光源发出的线性光变为发光效率好的面性光。对导光板面向光源的入射端进行镜面研磨，可以使所有入射角的光线都能够入射到导光板内。从导光板出射的光线，从侧面看亮度大，通过在导光板上配置光学膜片，可以实现正面视角亮度达到最大。
以上所述仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是在本申请的构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (20)

  1. 一种基板，其中，所述基板包括：
    基板主体，所述基板主体设有显示区和非显示区；
    扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
    透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
  2. 如权利要求1所述的基板，其中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
  3. 如权利要求1所述的基板，其中，相邻的所述导电图案之间的距离相等。
  4. 如权利要求1所述的基板，其中，所述导电图案呈点状分布。
  5. 如权利要求4所述的基板，其中，所述导电图案的外轮廓为圆形。
  6. 如权利要求5所述的基板，其中，所述导电图案的外轮廓所围设的圆形的直径不低于3微米。
  7. 如权利要求1所述的基板，其中，所述导电图案呈条状。
  8. 如权利要求1所述的基板，其中，所述导电图案的材质为氧化铟锡。
  9. 一种显示面板，其中，所述显示面板包括基板；
    所述基板包括：
    基板主体，所述基板主体设有显示区和非显示区；
    扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
    透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
  10. 如权利要求9所述的显示面板，其中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
  11. 如权利要求9所述的显示面板，其中，相邻的所述导电图案之间的距离相等。
  12. 如权利要求9所述的显示面板，其中，所述导电图案呈点状分布。
  13. 如权利要求12所述的显示面板，其中，所述导电图案的外轮廓为圆形。
  14. 如权利要求13所述的显示面板，其中，所述导电图案的外轮廓所围设的圆形的直径不低于3微米。
  15. 如权利要求9所述的显示面板，其中，所述导电图案呈条状。
  16. 如权利要求9所述的显示面板，其中，所述导电图案的材质为氧化铟锡。
  17. 如权利要求9所述的显示面板，其中，所述基板为阵列基板；
    所述显示面板还包括：
    彩膜基板，所述彩膜基板和所述阵列基板相对设置；以及
    液晶层，所述液晶层设于所述彩膜基板和所述阵列基板之间。
  18. 一种显示装置，其中，所述显示装置包括显示面板；
    所述显示面板包括基板；
    所述基板包括：
    基板主体，所述基板主体设有显示区和非显示区；
    扇出层，所述扇出层设于所述基板主体的非显示区，所述扇出层包括多条走线，多条所述走线间隔排列；以及
    透明导电层，所述透明导电层设于所述基板主体的非显示区，与所述扇出层异层设置，所述扇出层位于所述基板主体和所述透明导电层之间；所述透明导电层包括多个图案组，多个所述图案组间隔排列；所述图案组和所述走线交替设置；所述图案组包括多个导电图案，多个所述导电图案相间设置。
  19. 如权利要求18所述的显示装置，其中，多个所述导电图案沿相邻的所述走线之间的间隙的延伸方向依次相间设置。
  20. 如权利要求18所述的显示装置，其中，所述显示装置还包括：
    背光源；以及
    外壳，所述显示面板和所述背光源安装至所述外壳，所述背光源位于所述显示面板的后方。
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CN107037646A (zh) * 2017-04-21 2017-08-11 京东方科技集团股份有限公司 一种显示基板及显示装置

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