WO2020088988A1 - Procédé pour la fabrication d'une puce pour diode électroluminescente comprenant une couche de conversion et puce pour diode électroluminescente - Google Patents

Procédé pour la fabrication d'une puce pour diode électroluminescente comprenant une couche de conversion et puce pour diode électroluminescente Download PDF

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Publication number
WO2020088988A1
WO2020088988A1 PCT/EP2019/078713 EP2019078713W WO2020088988A1 WO 2020088988 A1 WO2020088988 A1 WO 2020088988A1 EP 2019078713 W EP2019078713 W EP 2019078713W WO 2020088988 A1 WO2020088988 A1 WO 2020088988A1
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WO
WIPO (PCT)
Prior art keywords
layer
converter
substrate
transparent
light
Prior art date
Application number
PCT/EP2019/078713
Other languages
German (de)
English (en)
Inventor
Siegfried Herrmann
Original Assignee
Osram Opto Semiconductors Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Publication of WO2020088988A1 publication Critical patent/WO2020088988A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0025—Processes relating to coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate

Definitions

  • an inorganic first transparent layer is applied to the converter layer
  • the inorganic first transparent layer is in particular a transparent encapsulation for the
  • Semiconductor layer sequence can in particular be grown epitaxially on the second substrate.
  • the second substrate is in particular one for epitaxial growth of the
  • composition according to the above formula can contain one or more dopants as well as additional ones
  • the converter layer is made with the semiconductor layer sequence connected that the first substrate to one of the
  • Converter layer is arranged.
  • the converter layer can have a comparatively small thickness and a precisely set density of
  • Converter material are manufactured. Deviations in the thickness of the converter layer and / or the density of the
  • the semiconductor layer sequence of the LED chip is avoided in this way. This is particularly advantageous in order to optoelectronic components such as microdisplays to achieve a high contrast ratio.
  • an inorganic second transparent layer is applied to the semiconductor layer sequence before the converter layer is connected
  • Transparent layers are in particular provided to establish a connection between the semiconductor layer sequence and the converter layer.
  • the converter layer is connected to the semiconductor layer sequence by direct bonding of the first transparent layer to the second transparent layer.
  • Direct bonding is a technique for bonding, especially wafer bonding, where none
  • a direct bond is for example
  • the converter layer contains no silicone or epoxy resin. This has the advantage of being improved
  • the LED chip can advantageously be used for
  • the light-emitting diode chip described can advantageously be operated at a temperature of more than 200 ° C. or even at more than 300 ° C. due to the missing organic matrix material of the converter layer. Such high operating temperatures can, for example, when using the LED chips can be achieved in a car headlight or in a stage headlight.
  • the entire LED chip preferably contains no organic material.
  • the first substrate is connected to the first substrate
  • the first substrate can be removed, for example, by a laser lift-off process or by an etching process.
  • the first substrate acts as an intermediate carrier for producing the converter layer and does not remain in the finished light-emitting diode chip. After the removal of the first substrate, the surface of the converter layer lies
  • the converter layer can
  • the at least one further layer is an electrical connection layer, a
  • the substrate on which the converter layer is produced remain in the light-emitting diode chip and thus act as a carrier for the light-emitting diode chip.
  • the surface of the semiconductor layer sequence facing away from the converter layer is exposed and can be after the second substrate has been detached
  • LED chips act.
  • the exposed surface of the LED chips it is also possible for the exposed surface of the LED chips.
  • the converter layer and / or the first substrate which may remain on the converter layer can serve as a radiation exit area.
  • the first substrate is transparent.
  • the first substrate can be any material. According to at least one embodiment of the method, the first substrate is transparent.
  • the first substrate can be any material.
  • Semiconductor layer sequence can be.
  • the light-emitting diode chip contains a semiconductor layer sequence which has an active layer suitable for emitting radiation, and one
  • the light-emitting diode chip in particular contains an interface at which the first inorganic transparent layer and the second inorganic transparent layer are bonded directly to one another, the first transparent layer and the second transparent layer advantageously being oxide layers, in particular SiO 2 layers.
  • the interface created by direct bonding can be detected in the finished LED chip.
  • Figure 2 is a schematic representation of a cross section through an embodiment of the
  • Figure 3 is a schematic representation of a cross section through an embodiment of the
  • Figure 4 is a schematic representation of a cross section through an embodiment of the
  • Figure 5 is a schematic representation of a cross section through an embodiment of the
  • Figure 6 is a schematic representation of a cross section through an embodiment of the LEDs
  • Figure 7 is a schematic representation of a cross section through an embodiment of the
  • Figure 13 is a schematic representation of a plan view of an embodiment of the LED chip.
  • the converter material is particularly suitable for a primary radiation of a first
  • the converter layer 12 can be formed, for example, from converter particles that are applied directly to the first substrate 10, for example by an electrostatic method or a
  • the converter layer 12 is preferably free of an organic matrix material, in particular the converter layer 12 does not contain any silicone or epoxy resin. This has the advantage that the converter layer 12
  • the converter layer 12 is preferably a thin layer which has a layer thickness of not more than 5 ⁇ m, particularly preferably of not more than 0.5 ⁇ m.
  • Converter layer 12 can, for example, have a thickness between 100 nm and 5 ⁇ m, preferably between 100 nm and 0.5 ⁇ m
  • Converter layer 12 improves the heat dissipation from the converter layer 12 during operation of the LED chip.
  • a first transparent layer 11 is on the
  • the transparent layer 11 is an inorganic layer, preferably an oxide layer.
  • the first transparent layer 11 may, for example, Si0 2, AI2O3, Hf0 2, Zr0 2, Ta 2 0s or have Ti0. 2
  • the first transparent layer 11 is particularly preferably an SiO 2 layer.
  • the first transparent layer 11 can by a coating method, in particular by a
  • the first transparent layer 11 is preferably applied by atomic layer deposition (ALD).
  • ALD atomic layer deposition
  • the first transparent layer 11 is polished after being applied to the converter layer 12 in order to achieve a particularly smooth layer with low roughness.
  • CMP chemical mechanical polishing
  • a semiconductor layer sequence 30 has been applied to a second substrate 20.
  • the semiconductor layer sequence 30 is a light-emitting diode layer sequence which in particular has an n-type semiconductor region 31, a p-type semiconductor region 33 and an active layer 32 arranged between the n-type semiconductor region 31 and the p-type semiconductor region 33.
  • the semiconductor layer sequence 20 can in particular be carried out by an epitaxial process such as, for example, organometallic
  • the second substrate 20 can in particular be used for epitaxially growing one
  • Semiconductor layer sequence can be a suitable substrate that a Has semiconductor material, for example GaN, GaAs, GaP or Si, or sapphire.
  • a Has semiconductor material for example GaN, GaAs, GaP or Si, or sapphire.
  • Layer 21 can have, for example, Si0 2 , Al2O3, Hf0 2 , ZrÜ2, Ta 2 0s or Ti0 2 .
  • the second transparent layer 21 is particularly preferably an SiO 2 layer.
  • Transparent layer 21 is preferably formed from the same material as the first transparent layer 11.
  • the second transparent layer 21 is advantageously polished after production, in particular by chemical mechanical polishing.
  • the first substrate 10 can be detached from the converter layer 12. In this way, for example, that shown in Figure 1F
  • the first substrate 10 can be detached, for example, by a laser lift-off process or by an etching process. To remove the first substrate 10
  • a separating layer can be applied to the first substrate 10 before the converter layer 12 is applied.
  • the separating layer can have silicon nitride, for example.
  • the converter layer 12 is advantageously only through
  • the converter layer 12 advantageously has no organic matrix material, and it is between the converter layer 12 and the
  • the purely inorganic connection and encapsulation of the converter layer 12 is particularly advantageous for the heat dissipation from the LED chip 100.
  • FIG. 2 shows an exemplary embodiment of the light-emitting diode chip 100, in which a first opening 14 for a p-contact 41 and a second opening 15 for an n-contact 42 were produced after the method steps according to FIGS. 1A to 1F.
  • the first opening 14 extends through the converter layer 12, the first transparent layer 11 and the second transparent layer 21 to the p-type semiconductor region 33.
  • a p-contact 41 is arranged on the p-type semiconductor region 33.
  • the second opening 15 extends through the converter layer 12, the first transparent layer 11, the second
  • the second substrate 20, on which the semiconductor layer sequence of the light-emitting diode chip 100 is arranged can in particular be a transparent sapphire substrate.
  • the light-emitting diode chip 100 can in particular be a so-called volume emitter.
  • LED chips 100 in which as in the previous
  • Converter layer 12 has been replaced.
  • the light-emitting diode chip 100 is shown in the opposite orientation, since in this example the light emission takes place through the second substrate 20.
  • the second substrate 20 can in particular be a transparent one
  • openings have been created in the converter layer 12 in order to make electrical contact with the semiconductor layer sequence 30.
  • An electrically conductive p-contact bushing 43 extends through the
  • Electrically conductive n-contact bushing 44 extends through the converter layer 12, the first transparent layer 11, the second transparent layer 21 and through the p-type Semiconductor region 33 and the active layer 32 to form the n-type semiconductor region 31.
  • the contact bushings 43, 44 are surrounded in the lateral direction by an electrically insulating layer 47.
  • a first connection layer 45, which is connected to the p-contact bushing 43, and a second connection layer 46, which is connected to the n-type contact bushing 44, are arranged on the converter layer 12.
  • the connection layers 45, 46 preferably have a reflective material.
  • FIG. 4 shows another embodiment of the
  • Light-emitting diode chips 100 This exemplary embodiment can initially be produced analogously to the method steps in FIGS. 1A to IE. Another step is
  • the second substrate 20 can be detached from the semiconductor layer sequence 30 by a laser lift-off method, for example.
  • the second substrate 20 can in particular be the epitaxial substrate used to produce the semiconductor layer sequence 30.
  • a light-emitting diode chip 100, from which the epitaxial substrate 20 has been detached, is often also referred to as a thin-film light-emitting diode chip.
  • the first substrate 10, on which the converter layer 12 has been produced remains in the finished light-emitting diode chip 100 and can in particular serve as a carrier for the light-emitting diode chip 100.
  • FIG. 5 shows a modification of the exemplary embodiment shown in FIG. 4.
  • Mirror layer 16 can advantageously emit radiation emitted in the direction of the first substrate 10 in the direction of an opposite one of the first substrate 10
  • the mirror layer 16 may alternatively be on a rear side of the first one facing away from the converter layer 12
  • Substrate 10 may be arranged.
  • the first substrate 10 is a transparent substrate, so that the radiation can be coupled out of the light-emitting diode chip 100 through the first substrate 10.
  • the electrical contacting of the light-emitting diode chip 100 are on a remote from the first substrate 10
  • a first connection layer 45 and a second connection layer 46 are arranged on the rear side of the LED chip.
  • the first connection layer 45 is connected to the p-type semiconductor region 33, for example, by means of p-type contact bushings 43.
  • the first connection layer 45 and the p-contact bushings 43 are electrical
  • connection layers 45, 46 are connected to the n-type semiconductor region 31.
  • connection layers 45, 46 reflective layers.
  • the light-emitting diode chip 100 it is possible for the light-emitting diode chip 100 to have a mirror layer on a rear side facing the connection layers 45, 46.
  • Substrate has been detached from the semiconductor layer sequence 30.
  • the semiconductor layer sequence 30 the
  • the p-type semiconductor region 33 is the
  • the carrier substrate 50 can have a semiconductor material such as silicon, for example.
  • the carrier substrate 50 it is also possible for the carrier substrate 50 to be formed from a plastic molding compound.
  • the carrier substrate 50 can be formed, for example, by molding.
  • Contact bushing 56 is electrically conductively connected to the n-type semiconductor region 31 by means of n-contact bushings 44.
  • the LED chip 100 is in this embodiment
  • Converter layer 12 is formed from converter particles 17 which have a phosphor or a phosphor mixture. Such phosphors suitable as converters and
  • the micro or nanorods 18 have doped ones
  • the micro or nanorods 18 have a lateral one, for example
  • Mask layer in which the micro or nanorods 18 are grown during manufacture and in the vertical direction for example by the growth time.
  • Semiconductor materials can influence the optical properties of the active areas.
  • Nanorods 18 are particularly suitable for one
  • the color location of the radiation emitted by the light-emitting diode chip which is composed of the primary radiation and the secondary radiation, can be set by the areal density (number per unit area), the diameter and / or the doping of the micro or nanorods.
  • micro or nanorods 18 can do this
  • core-shell nanorods or core-shell micro-rods also English: core shell nanorods or core shell microrods
  • a shell is applied with an active area around a core, which extends in all three spatial directions .
  • the micro or nanorods 18 have one
  • the nano or micro rods 18 are preferably disc-shaped nano or micro rods (disc type nanorods or microrods), the n-type semiconductor region, the active region and the p-type
  • the converter layer is separated at the same time. It is advantageously possible that the

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention concerne un procédé pour la fabrication d'une puce pour diode électroluminescente comprenant une couche de conversion (12), comprenant les étapes de : l'application d'une couche de conversion (12) sur un premier substrat (10), l'application d'une première couche transparente (11) sur la couche de conversion (12) ; la fabrication d'une séquence de couches de semi-conducteur (30), qui comprend une couche active (32) appropriée pour l'émission de rayonnement, sur un deuxième substrat (20) et l'assemblage de la couche de conversion (12) avec la séquence de couches de semi-conducteur (30) de telle façon que le premier substrat (10) est disposé sur une face de la couche de conversion (12) opposée à la séquence de couches de semi-conducteur (30). L'invention concerne en outre une puce pour diode électroluminescente (100) pouvant être fabriquée au moyen du procédé.
PCT/EP2019/078713 2018-10-29 2019-10-22 Procédé pour la fabrication d'une puce pour diode électroluminescente comprenant une couche de conversion et puce pour diode électroluminescente WO2020088988A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102018126924.2A DE102018126924A1 (de) 2018-10-29 2018-10-29 Verfahren zur Herstellung eines Leuchtdiodenchips mit einer Konverterschicht und Leuchtdiodenchip
DE102018126924.2 2018-10-29

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Publication Number Publication Date
WO2020088988A1 true WO2020088988A1 (fr) 2020-05-07

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WO (1) WO2020088988A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116825934A (zh) * 2023-08-30 2023-09-29 南昌凯捷半导体科技有限公司 内嵌对位量子点填充mini-LED芯片及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1914810A1 (fr) * 2005-08-10 2008-04-23 Ube Industries, Ltd. Substrat pour diode électroluminescente et diode électroluminescente
US20100314650A1 (en) * 2009-06-10 2010-12-16 Koito Manufacturing Co., Ltd. Light emitting module and method of manufacturing the same
WO2013045399A1 (fr) * 2011-09-30 2013-04-04 Osram Opto Semiconductors Gmbh Composant à semi-conducteur optoélectronique et procédé de fabrication d'un composant à semi-conducteur optoélectronique

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015113052A1 (de) * 2015-08-07 2017-02-09 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement umfassend ein Konversionselement, Verfahren zur Herstellung eines optoelektronischen Bauelements umfassend ein Konversionselement und Verwendung eines optoelektronischen Bauelements umfassend ein Konversionselement

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1914810A1 (fr) * 2005-08-10 2008-04-23 Ube Industries, Ltd. Substrat pour diode électroluminescente et diode électroluminescente
US20100314650A1 (en) * 2009-06-10 2010-12-16 Koito Manufacturing Co., Ltd. Light emitting module and method of manufacturing the same
WO2013045399A1 (fr) * 2011-09-30 2013-04-04 Osram Opto Semiconductors Gmbh Composant à semi-conducteur optoélectronique et procédé de fabrication d'un composant à semi-conducteur optoélectronique

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
S. SCHMITT ET AL.: "Germanium Template Assisted Integration of Gallium Arsenide Nanocrystals on Silicon: A Versatile Platform for Modern Optoelectronic Materials", ADVANCED OPTICAL MATERIALS, vol. 6, 2018, pages 1701329

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116825934A (zh) * 2023-08-30 2023-09-29 南昌凯捷半导体科技有限公司 内嵌对位量子点填充mini-LED芯片及其制作方法
CN116825934B (zh) * 2023-08-30 2023-11-17 南昌凯捷半导体科技有限公司 内嵌对位量子点填充mini-LED芯片及其制作方法

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