WO2020087874A1 - 回流焊的仿真优化方法、系统、计算机存储介质及设备 - Google Patents

回流焊的仿真优化方法、系统、计算机存储介质及设备 Download PDF

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Publication number
WO2020087874A1
WO2020087874A1 PCT/CN2019/082638 CN2019082638W WO2020087874A1 WO 2020087874 A1 WO2020087874 A1 WO 2020087874A1 CN 2019082638 W CN2019082638 W CN 2019082638W WO 2020087874 A1 WO2020087874 A1 WO 2020087874A1
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Prior art keywords
optimized
circuit board
pcb circuit
reflow soldering
simulation
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PCT/CN2019/082638
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English (en)
French (fr)
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钱胜杰
刘丰收
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上海望友信息科技有限公司
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Publication of WO2020087874A1 publication Critical patent/WO2020087874A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/06—Structured ASICs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/18—Manufacturability analysis or optimisation for manufacturability

Definitions

  • the invention belongs to the field of welding technology and relates to a simulation optimization method and system, in particular to a simulation optimization method, system, computer storage medium and equipment for reflow soldering.
  • the welding defects can only be found in the industry through the actual production process, that is, the soldering problems of SMD components can be found after reflow soldering of SMT placement.
  • the soldering problems found at this time are not entirely caused by the reflow soldering process; because the SMT soldering quality is directly related to the reflow soldering process (temperature curve), it is also related to the design of the PCB pad manufacturability, stencil design and Layout, component selection and solderability of PCB pads, production equipment status, solder paste quality, as well as the process parameters of each process and the operating skills of the operator are closely related; these factors affect each other, and changing any one may eventually Affect the welding results.
  • the object of the present invention is to provide a simulation optimization method, system, computer storage medium and equipment for reflow soldering, which are used to solve the actual production of the prior art that requires SMT patch and reflow soldering Only then can the problem of soldering of SMD components be discovered.
  • one aspect of the present invention provides a simulation optimization method for reflow soldering, which includes: generating a three-dimensional model of a PCB circuit board to be optimized; according to the thickness of the steel mesh opening read one by one or according to the pad The thickness of the generated steel mesh opening generates a corresponding three-dimensional model of solder paste; the components to be reflowed are selected from the three-dimensional model of the PCB circuit board to be optimized, and the selected components are included in the PCB circuit to be optimized according to the selected components Position information on the three-dimensional model of the board, set each of the components to the three-dimensional solder paste model; according to the preset reflow soldering simulation parameters, the selected components and pads will be solder paste welding simulation to form The simulation model of the reflow soldering of the PCB circuit board to be optimized; the PCB circuit board inspection of the simulation model of the reflow soldering of the PCB circuit board to be optimized to find the problem to be optimized; for the problem to be optimized
  • the simulation optimization method of reflow soldering further includes outputting a reflow soldering simulation model of the PCB circuit board to be optimized.
  • the generating the three-dimensional model of the PCB circuit board to be optimized includes: directly receiving the three-dimensional model of the PCB circuit board to be optimized created by the user; or generating the PCB circuit board to be optimized according to the wiring data obtained from EDA Three-dimensional model.
  • the selection criteria for selecting components requiring a reflow process from the three-dimensional model of the PCB circuit board to be optimized is: according to the recommendation of the component manufacturer or the actual circuit board process situation;
  • the position information of the selected components on the three-dimensional model of the PCB circuit board to be optimized includes the coordinates and angles of the selected components on the three-dimensional model of the PCB circuit board to be optimized; preset reflow soldering
  • the simulation parameters include the length of reflow soldering, the temperature range of each section, the transmission speed of each section and / or the length of each section.
  • the simulation optimization method of the reflow soldering further includes stress on the components and the PCB circuit board during and after welding The changes are simulated and displayed.
  • the problem to be optimized includes the problem of solder distance on the PCB circuit board to be optimized, solder bridging problem, component tombstone problem, component tilt problem, component offset problem and / or element Stress and deformation of devices and circuit boards.
  • the step of performing PCB circuit board inspection on the reflow soldering simulation model of the PCB circuit board to be optimized includes: checking the soldering distance on the PCB circuit board to be optimized; The solder bridge on the PCB circuit board to be optimized is inspected; the tombstone inspection is performed on the components selected on the PCB circuit board to be optimized; the tilted inspection is performed on the components selected on the PCB circuit board to be optimized; Perform an offset check on the selected components on the PCB circuit board to be optimized; and / or perform a stress and deformation check on the selected components and the circuit board on the PCB circuit board to be optimized.
  • Another aspect of the present invention provides a simulation optimization system for reflow soldering, including: a generating module for generating a three-dimensional model of a PCB circuit board to be optimized; a generating module for generating a one-by-one thickness of a steel mesh opening or according to The thickness of the steel mesh opening generated by the pad generates a corresponding three-dimensional model of solder paste; the setting module is used to select the components that need to be reflowed from the three-dimensional model of the PCB circuit board to be optimized, according to the selected components Position information on the three-dimensional model of the PCB circuit board to be optimized, and set each of the components to the three-dimensional model of solder paste; a simulation module is used to select the selected ones according to preset simulation parameters of reflow soldering.
  • Components and pads are subjected to solder paste welding simulation to form a reflow soldering simulation model of the PCB circuit board to be optimized; an inspection module is used to inspect the PCB circuit board of the reflow soldering simulation model of the PCB circuit board to be optimized to find Optimization problem; optimization modification module, used for optimization modification of corresponding design and process for the problem to be optimized.
  • Another aspect of the present invention provides a computer storage medium on which a computer program is stored, and when the program is executed by a processor, the simulation optimization method for reflow soldering is realized.
  • a final aspect of the present invention provides an apparatus, including: a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the device performs the reflow soldering Simulation optimization method.
  • the reflow soldering simulation optimization method, system, computer storage medium and equipment provided by the present invention can use the reflow soldering simulation technology in the design stage to find possible welding problems in advance, and then enable the technician to modify the design and optimization process.
  • the amount of work completed in a few days was completed in just 1-2 hours, which greatly improved the manufacturing quality and manufacturing efficiency of the product; and made the electronic manufacturing enterprise from the original diagnosis and analysis of the lagging production results to the design
  • the simulation of the front-end can be prevented, and the problems in production can be prevented in advance; therefore, it can be said that the simulation optimization method for reflow soldering provided by this embodiment is an effective solution and technical support for electronic manufacturing enterprises to realize intelligent manufacturing and Industry 4.0.
  • FIG. 1 is a schematic flowchart of an embodiment of a simulation optimization method for reflow soldering of the present invention.
  • FIG. 2 shows an example diagram of a three-dimensional model of solder paste brushed out of a steel mesh opening on a PCB circuit board according to the present invention.
  • FIG. 3 shows an example diagram of a three-dimensional model of solder paste formed by the present invention.
  • FIG. 4 shows an example diagram of the reflow soldering simulation model of the present invention.
  • FIG. 5 shows a schematic structural diagram of the simulation optimization system of the reflow soldering of the present invention in an embodiment.
  • This embodiment provides a simulation optimization method for reflow soldering, including:
  • the selected components and pads are subjected to solder paste welding simulation to form a reflow soldering simulation model of the PCB circuit board to be optimized;
  • FIG. 1 shows a schematic flow chart of the simulation optimization method for reflow soldering in one embodiment.
  • the simulation optimization method of reflow soldering specifically includes the following steps:
  • the S11 generate a three-dimensional model of the PCB circuit board to be optimized.
  • the S11 includes directly receiving the three-dimensional model of the PCB circuit board to be optimized created by the user; or generating the three-dimensional model of the PCB circuit board to be optimized according to the wiring data obtained from EDA.
  • the step of generating a three-dimensional model of the PCB circuit board to be optimized according to obtaining wiring data from EDA includes:
  • the three-dimensional model of the PCB circuit board to be optimized includes the thickness and material of the conductive material of each layer of the circuit board, the thickness and material of the insulating layer, and the communication holes and non-communication holes directly between the layers.
  • selecting components to be reflowed from the three-dimensional model of the PCB circuit board to be optimized and according to the position information of the selected components on the three-dimensional model of the PCB circuit board to be optimized, each The three-dimensional model of the component is set on the three-dimensional model of solder paste.
  • the selection criteria for selecting components to be reflowed from the three-dimensional model of the PCB circuit board to be optimized is: according to the recommendation of the component manufacturer or the actual circuit board process situation.
  • the position information of the selected component on the three-dimensional model of the PCB circuit board to be optimized includes the coordinates and angle of the selected component on the three-dimensional model of the PCB circuit board to be optimized.
  • the component manufacturer's recommendation or actual circuit board process conditions are used as the selection criteria for components requiring reflow soldering process, and the components requiring reflow soldering process are selected from the three-dimensional model of the PCB circuit board to be optimized, and According to the coordinates and angles of the selected components on the three-dimensional model of the PCB circuit board to be optimized, the three-dimensional model of each of the components is set on the three-dimensional model of solder paste.
  • An example diagram of the three-dimensional model of the formed solder paste is shown in FIG. 3.
  • the preset simulation parameters of reflow soldering include parameters such as the length of reflow soldering, the temperature range of each section, the transmission speed of each section, and / or the length of each section.
  • the problem to be optimized includes the problem of solder distance on the PCB circuit board to be optimized, solder bridging problem, component tombstone problem, component tilt problem, component offset problem and / or component and circuit Plate stress and deformation problems and so on.
  • the S16 includes:
  • Steps such as stress and deformation inspection are performed on the components and circuit boards selected on the PCB circuit board to be optimized.
  • the component solder pitch is less than the preset solder pitch 0.127mm in the reflow soldering simulation model shown in Figure 4, and then the three-dimensional PCB circuit board to be optimized before reflow soldering is checked.
  • the model immediately checks that the solder pitch due to too much solder paste on the left pad of R2 is less than the preset solder pitch.
  • PCB layout optimization pads, lines, etc .; this optimization is aimed at the problem of too much or too little solder.
  • SMT equipment optimization placement machine coordinate offset, AOI key inspection, increase process foolproof means, etc. This optimization is aimed at optimizing the device when it cannot be optimized from 1 to 4.
  • the corresponding design and process optimization modification adopted is to modify the opening size of the steel mesh
  • the optimization and modification of the corresponding design and process adopted is to modify the size of the copper foil of the PCB design for optimization, or the design can be modified synchronously through the Cadence allegro skill API.
  • the above five types of problems to be optimized for welding can be optimized, but the optimization cost is high and the difficulty of optimization is high and low.
  • the priority order is: 4> 3> 1> 5> 2, of course, it depends on the actual situation.
  • This embodiment also provides a computer storage medium (also referred to as a computer-readable storage medium) on which a computer program is stored.
  • a computer storage medium also referred to as a computer-readable storage medium
  • the simulation optimization method for reflow soldering described above is implemented.
  • the aforementioned computer program may be stored in a computer-readable storage medium.
  • the steps including the foregoing method embodiments are executed; and the foregoing storage medium includes various media that can store program codes, such as ROM, RAM, magnetic disk, or optical disk.
  • the simulation and optimization method of reflow soldering provided in this embodiment can use the technology of reflow soldering simulation in the design stage to find possible welding problems in advance, and then enable the technician to modify the design and optimization process to reduce the workload that originally required several days. Completed in just 1-2 hours, greatly improved the manufacturing quality and manufacturing efficiency of the product; and made the electronic manufacturing enterprise from the original diagnosis and analysis of the lagging production results to the simulation prevention at the front end of the design, and can It is possible to prevent problems in production in advance; therefore, it can be said that the simulation optimization method for reflow soldering provided by this embodiment is an effective solution and technical support for electronic manufacturing enterprises to realize intelligent manufacturing and Industry 4.0.
  • This embodiment provides a simulation optimization system for reflow soldering, including:
  • the generation module is used to generate a three-dimensional model of the PCB circuit board to be optimized
  • the generating module is used to generate a corresponding three-dimensional model of solder paste according to the thickness of the steel mesh opening read one by one or the thickness of the steel mesh opening generated by the pad;
  • the setting module is used to select components to be reflowed from the three-dimensional model of the PCB circuit board to be optimized, and according to the position information of the selected components on the three-dimensional model of the PCB circuit board to be optimized, each component A said component is set on the three-dimensional model of solder paste;
  • the simulation module is used to perform solder paste welding simulation on the selected components and pads according to preset simulation parameters of reflow soldering to form a reflow soldering simulation model of the PCB circuit board to be optimized;
  • the inspection module is used to inspect the PCB circuit board of the reflow soldering simulation model of the PCB circuit board to be optimized to find the problem to be optimized;
  • the optimization modification module is used for optimization modification of the corresponding design and process for the problem to be optimized.
  • each module of the following simulation optimization system is only a division of logical functions, and in actual implementation, it may be integrated in whole or in part into a physical entity or may be physically separated.
  • these modules can be implemented in the form of software invocation through processing elements, or in the form of hardware, and some modules can be implemented in the form of software invocation of processing elements, and some modules can be implemented in the form of hardware.
  • the x module can be a separate processing element, or it can be integrated in a chip of the following simulation optimization system.
  • the x module may also be stored in the memory of the following device in the form of program code, and be called and executed by one of the processing elements of the above device to perform the following functions of the x module.
  • the implementation of other modules is similar. All or part of these modules can be integrated together or can be implemented independently.
  • the processing element described here may be an integrated circuit with signal processing capabilities. In the implementation process, the steps of the above method or the following various modules may be completed by instructions in the form of hardware integrated logic circuits or software in the processor element.
  • the following modules may be one or more integrated circuits configured to implement the above method, for example: one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), one or more microprocessors (Digital Singnal Processor, (Referred to as DSP), one or more field programmable gate array (Field Programmable Gate Array, referred to as FPGA), etc.
  • ASIC Application Specific Integrated Circuit
  • DSP Digital Singnal Processor
  • FPGA Field Programmable Gate Array
  • the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processor that can call program code.
  • CPU central processing unit
  • SOC system-on-a-chip
  • FIG. 5 shows a schematic structural diagram of the simulation optimization system for reflow soldering in one embodiment.
  • the simulation optimization system 5 for reflow soldering includes a generation module 51, a generation module 52, a setting module 53, a selection module 54, a simulation module 55, an inspection module 56, an optimization module 57 and an output module 58.
  • the generating module 51 is used to generate a three-dimensional model of the PCB circuit board to be optimized.
  • the S11 includes directly receiving the three-dimensional model of the PCB circuit board to be optimized created by the user; or generating the three-dimensional model of the PCB circuit board to be optimized according to the wiring data obtained from EDA.
  • the generating module 51 is specifically used to directly obtain the two-dimensional PCB graphic data of the PCB circuit board to be optimized from the cadence allegro skill API, and then generate a three-dimensional model of the PCB circuit board to be optimized according to the thickness of each layer of the PCB.
  • the three-dimensional model of the PCB circuit board to be optimized includes the thickness and material of the conductive material of each layer of the circuit board, the thickness and material of the insulating layer, and the communication holes and non-communication holes directly between the layers.
  • the generating module 52 coupled with the generating module 51 is used to generate a corresponding three-dimensional model of solder paste according to the thickness of the steel mesh opening read in one by one or the thickness of the steel mesh opening generated according to the pad.
  • the PCB circuit board is a double-sided board
  • the three-dimensional model of solder paste needs to be generated on both the TOP and BOTTOM surfaces of the PCB circuit board, and the three-dimensional model of solder paste brushed from the steel mesh opening on the PCB circuit board
  • An example of is shown in Figure 2.
  • a setting module 53 coupled with the generating module 51 and the generating module 52 is used to select components requiring reflow soldering process from the three-dimensional model of the PCB circuit board to be optimized, and select the components to be optimized on the PCB according to the selected components
  • the position information on the three-dimensional model of the circuit board sets the three-dimensional model of each component to the three-dimensional model of solder paste.
  • the selection criteria for selecting components to be reflowed from the three-dimensional model of the PCB circuit board to be optimized is: according to the recommendation of the component manufacturer or the actual circuit board process situation.
  • the position information of the selected component on the three-dimensional model of the PCB circuit board to be optimized includes the coordinates and angle of the selected component on the three-dimensional model of the PCB circuit board to be optimized.
  • the setting module 53 uses the component manufacturer's recommendation or actual circuit board process conditions as the selection criteria for components requiring reflow soldering process, and selects the reflow soldering process from the three-dimensional model of the PCB circuit board to be optimized Components, and according to the coordinates and angles of the selected components on the three-dimensional model of the PCB circuit board to be optimized, set the three-dimensional model of each component to the three-dimensional model of solder paste.
  • An example diagram of the three-dimensional model of the formed solder paste is shown in FIG. 3.
  • the selection module 54 coupled with the setting module 53 is used to start a database of reflow soldering parameters, select preset simulation parameters of reflow soldering, and can read in the previous solder reflow curve generation parameters (solder profile generation parameters are based on The preset simulation parameters of reflow soldering generate a visual chart, and then the chart is restored to the parameter, and the parameter can be directly generated using solder profile).
  • the required parameters can be continuously increased.
  • the preset simulation parameters of reflow soldering include parameters such as the length of reflow soldering, the temperature range of each section, the transmission speed of each section, and / or the length of each section.
  • the simulation module 55 coupled with the setting module 53 and the selection module 54 is used to perform solder paste welding simulation on the selected components and pads according to the preset simulation parameters of reflow soldering to form a reflow of the PCB circuit board to be optimized Welding simulation model, after generating the reflow soldering simulation model of the PCB circuit board to be optimized (specifically, generating a three-dimensional welding model of each solder joint on the PCB circuit board to be optimized), neutralize the components and the PCB circuit after welding Changes in the stress of the board (in this embodiment, the changes in stress on the components and the PCB circuit board refer to: where the PCB circuit board is deformed during reflow soldering, and / or the components are bent, etc., and This change can cause damage such as cracking of the components.) Simulate and display, an example of the reflow soldering simulation model is shown in Figure 4.
  • the inspection module 56 coupled with the simulation module 55 is used for inspecting the PCB circuit board of the reflow soldering simulation model of the PCB circuit board to be optimized to find the problem to be optimized.
  • the problem to be optimized includes the problem of solder distance on the PCB circuit board to be optimized, solder bridging problem, component tombstone problem, component tilt problem, component offset problem and / or component and circuit Plate stress and deformation problems and so on.
  • the inspection module 56 is used to inspect the solder distance on the PCB circuit board to be optimized; inspect the solder bridge on the PCB circuit board to be optimized; and select the PCB circuit board to be optimized Tombstone inspection of the selected components; tilt inspection of the components selected on the PCB circuit board to be optimized; offset inspection of the components selected on the PCB circuit board to be optimized; and / or
  • the components and the circuit board selected on the PCB circuit board to be optimized are subjected to stress and deformation inspection and so on.
  • An optimization module 57 coupled with the inspection module 56 is used to optimize and modify the corresponding design and process for the problem to be optimized.
  • the optimization modification of the design and process corresponding to the optimization module 57 includes:
  • PCB layout optimization pads, lines, etc .; this optimization is aimed at the problem of too much or too little solder.
  • SMT equipment optimization placement machine coordinate offset, AOI key inspection, increase process foolproof means, etc. This optimization is aimed at optimizing the device when it cannot be optimized from 1 to 4.
  • the output module 58 coupled with the optimization module 57 is used for outputting the reflow soldering simulation model of the PCB circuit board to be optimized if no problems to be optimized are found in the PCB circuit board inspection.
  • the simulation optimization system using the reflow soldering does not require AOI to learn a sample online as a standard test board.
  • This embodiment provides a device including: a processor, a memory, a transceiver, a communication interface, and / or a system bus; the memory and the communication interface are connected to the processor and the transceiver through the system bus and complete communication with each other.
  • the memory It is used to store the computer program, the communication interface is used to communicate with other devices, the processor and the transceiver are used to run the computer program, so that the device executes the steps of the simulation optimization method for reflow soldering as described in the first embodiment.
  • the system bus mentioned above may be a peripheral component interconnection standard (Peripheral Component Interconnect, PCI for short) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA for short) bus, etc.
  • PCI peripheral component interconnection standard
  • EISA Extended Industry Standard Architecture
  • the system bus can be divided into address bus, data bus, control bus and so on.
  • the communication interface is used to implement communication between the database access device and other devices (such as client, read-write library, and read-only library).
  • the memory may include random access memory (Random Access Memory, RAM for short), or may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
  • the aforementioned processor may be a general-purpose processor, including a central processor (Central Processing Unit, CPU for short), a network processor (Network Processor, short for NP), etc .; or a digital signal processor (Digital Signal Processing, DSP for short) , Application Specific Integrated Circuit (Application Specific Integrated Circuit, ASIC for short), Field Programmable Gate Array (Field Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • a central processor Central Processing Unit, CPU for short
  • a network processor Network Processor, short for NP
  • DSP Digital Signal Processing
  • ASIC Application Specific Integrated Circuit
  • FPGA Field Programmable Gate Array
  • the invention also provides a simulation optimization system for reflow soldering.
  • the simulation optimization system for reflow soldering can realize the simulation optimization method for reflow soldering according to the invention, but the device for implementing the simulation optimization method for reflow soldering according to the invention Including but not limited to the structure of the simulation optimization system for reflow soldering listed in this embodiment, any structural modification and replacement of the prior art made according to the principles of the present invention are included in the protection scope of the present invention.
  • the reflow soldering simulation optimization method, system, computer storage medium and equipment provided by the present invention can use the reflow soldering simulation technology in the design stage to discover possible welding problems in advance, and then enable the technician to modify the design and optimization
  • the process which originally required a few days to complete the workload in just 1-2 hours, greatly improved the manufacturing quality and manufacturing efficiency of the product; and made the electronic manufacturing enterprise from the original diagnosis and analysis of the lagging production results It becomes simulation prevention at the front end of the design, and can prevent problems in production in advance; therefore, it can be said that the simulation optimization method of reflow soldering provided by this embodiment is effective for electronic manufacturing enterprises to achieve intelligent manufacturing and Industry 4.0 Solutions and technical support.
  • the invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

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Abstract

一种回流焊的仿真优化方法、系统、计算机存储介质及设备，所述方法包括：生成待优化PCB电路板的三维模型；产生对应的焊膏三维模型；挑选出需回流焊工艺的元器件，根据所挑选出的元器件在待优化PCB电路板的三维模型上的位置信息，将每一元器件设置到焊膏三维模型上；根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；对待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；针对待优化问题，采取对应的设计和工艺的优化修改。该方法可以在设计阶段通过回流焊仿真的技术，预先发现可能出现的焊接问题，进而使技术人员修改设计与优化工艺。

Description

回流焊的仿真优化方法、系统、计算机存储介质及设备 技术领域
本发明属于焊接技术领域，涉及一种仿真优化方法和系统，特别是涉及一种回流焊的仿真优化方法、系统、计算机存储介质及设备。
背景技术
随着经济和科学技术的发展，人们对电子产品的要求也越来越高，既要能满足多功能、小型化、高密度、高性能的要求，同时还需要有良好的产品品质。作为电子组装的核心工艺——SMT工艺，其焊接质量的好坏直接影响产品的整体质量和生产成本。因此，对于电子制造行业来说，优质的焊接质量是产品的立足之本，是产品与别人竞争的资本和筹码。
目前，行业内都是经过实际的生产环节才能发现焊接缺陷，即将SMT贴装再进行回流焊后才能发现SMD元件的焊接问题。此时发现的焊接问题并不完全是由回流焊工艺造成的；因为SMT焊接质量除了与回流焊工艺(温度曲线)有直接关系外，还与PCB焊盘的可制造性设计、钢网设计和布局、元件选型和PCB焊盘可焊性、生产设备状态、锡膏质量，以及每道工序的工艺参数和操作人员的操作技能有着密切关系；这些因素互相影响，改变任何一个都可能会最终影响焊接结果。
当下，行业内没有与本发明相似的系统化方案，现有方法都是技术人员基于自身经验进行判断实际生产后出现焊接问题的原因，进而修改设计或优化工艺；然而这些经验都来自对日积月累的生产实践的总结，因此企业在效率上难以提升，且对技术人员的依赖性很大。那么有没有一种方法能够实现不需要经过SMT贴片再回流焊的实际生产环节就能提前预防焊接缺陷，通过预先优化设计和工艺的方法，减少试产，提升产品品质和生产效率呢？
因此，如何提供一种回流焊的仿真优化方法、系统、计算机存储介质及设备，以解决现有技术需要经过SMT贴片再回流焊的生产环节才能发现SMD元件的焊接等缺陷，实已成为本领域技术人员亟待解决的技术问题。
发明内容
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种回流焊的仿真优化方法、系统、计算机存储介质及设备，用于解决现有技术需要经过SMT贴片再回流焊的实际生产环节才能发现SMD元件的焊接的问题。
为实现上述目的及其他相关目的，本发明一方面提供一种回流焊的仿真优化方法，包括： 生成待优化PCB电路板的三维模型；根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；针对所述待优化问题，采取对应的设计和工艺的优化修改。
于本发明的一实施例中，若PCB电路板检查未发现待优化问题后，所述回流焊的仿真优化方法还包括输出所述待优化PCB电路板的回流焊仿真模型。
于本发明的一实施例中，所述生成待优化PCB电路板的三维模型包括：直接接收用户创建的待优化PCB电路板的三维模型；或根据获取来自EDA布线数据，生成待优化PCB电路板的三维模型。
于本发明的一实施例中，所述从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件中挑选标准为：根据元器件制造商的推荐或实际的电路板工艺情况；所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息包括所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度；预设的回流焊的模拟参数包括回流焊的长度、每个区间的温度范围、每个区间的传送速度和/或每个区间的长度。
于本发明的一实施例中，在形成待优化PCB电路板的回流焊仿真模型的步骤后，所述回流焊的仿真优化方法还包括将焊接中和焊接后对元器件和PCB电路板的应力变化进行仿真并显示。
于本发明的一实施例中，待优化问题包括所述待优化PCB电路板上的焊锡距离问题、焊锡桥接问题、元器件立碑问题、元器件倾斜问题、元器件偏移问题和/或元器件和电路板应力变形问题。
于本发明的一实施例中，所述对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查的步骤包括：对所述待优化PCB电路板上的焊锡距离进行检查；对所述待优化PCB电路板上的焊锡桥接进行检查；对所述待优化PCB电路板上挑选出的元器件进行立碑检查；对所述待优化PCB电路板上挑选出的元器件进行倾斜检查；对所述待优化PCB电路板上挑选出的元器件进行偏移检查；和/或对所述待优化PCB电路板上挑选出的元器件和电路板进行应力变形检查。
本发明另一方面提供一种回流焊的仿真优化系统，包括：生成模块，用于生成待优化PCB 电路板的三维模型；产生模块，用于根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；设置模块，用于从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；仿真模块，用于根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；检查模块，用于对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；优化修改模块，用于针对所述待优化问题进行对应的设计和工艺的优化修改。
本发明又一方面提供一种计算机存储介质，其上存储有计算机程序，该程序被处理器执行时实现所述回流焊的仿真优化方法。
本发明最后一方面提供一种设备，包括：处理器及存储器；所述存储器用于存储计算机程序，所述处理器用于执行所述存储器存储的计算机程序，以使所述设备执行所述回流焊的仿真优化方法。
如上所述，本发明所述的回流焊的仿真优化方法、系统、计算机存储介质及设备，具有以下有益效果：
本发明提供的回流焊的仿真优化方法、系统、计算机存储介质及设备可以在设计阶段通过回流焊仿真的技术，预先发现可能出现的焊接问题，进而使技术人员修改设计与优化工艺，将原来需要几天完成的工作量在短短的1-2个小时内完成，大大提升了产品的制造品质及制造效率；且使得电子制造企业由原来的对滞后生产结果的诊断和分析变成到在设计前端的仿真预防，并且可以做到将生产中的问题点提前预防；因此，可以说本实施例提供的回流焊的仿真优化方法是电子制造企业实现智能制造和工业4.0的有效方案和技术支撑。
附图说明
图1显示为本发明的回流焊的仿真优化方法于一实施例中的流程示意图。
图2显示为通过本发明在PCB电路板上钢网开口刷出的焊膏三维模型的一示例图。
图3显示为通过本发明形成的焊膏三维模型的示例图。
图4显示为通过本发明回流焊仿真模型的示例图。
图5显示为本发明的回流焊的仿真优化系统于一实施例中的原理结构示意图。
元件标号说明
5         回流焊的仿真优化系统
51        生成模块
52        产生模块
53        设置模块
54        选取模块
55        仿真模块
56        检查模块
57        优化模块
58        输出模块
S11～S18  步骤
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。需说明的是，在不冲突的情况下，以下实施例及实施例中的特征可以相互组合。
需要说明的是，以下实施例中所提供的图示仅以示意方式说明本发明的基本构想，遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制，其实际实施时各组件的型态、数量及比例可为一种随意的改变，且其组件布局型态也可能更为复杂。
实施例一
本实施例提供一种回流焊的仿真优化方法，包括：
生成待优化PCB电路板的三维模型；
根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；
从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；
根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优 化PCB电路板的回流焊仿真模型；
对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；
针对所述待优化问题，采取对应的设计和工艺的优化修改。
以下将结合图示对本实施例所提供的回流焊的仿真优化方法进行详细描述。请参阅图1，显示为回流焊的仿真优化方法于一实施例中的流程示意图。如图1所示，所述回流焊的仿真优化方法具体包括以下几个步骤：
S11，生成待优化PCB电路板的三维模型。在本实施例中，所述S11包括直接接收用户创建的待优化PCB电路板的三维模型；或根据获取来自EDA布线数据，生成待优化PCB电路板的三维模型。
具体地，根据获取来自EDA布线数据，生成待优化PCB电路板的三维模型的步骤包括：
从cadence allegro skill API直接获取待优化PCB电路板的二维PCB图形数据，而后根据PCB每层的厚度生成待优化PCB电路板的三维模型。所述待优化PCB电路板的三维模型包括电路板每一层的导电物质厚度和材质，绝缘层厚度和材质，层与层直接的连通孔和非连通孔等。
S12，根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型。在本实施例中，若PCB电路板是双面板时，PCB电路板的TOP面和BOTTOM面上都需要产生对应的焊膏三维模型，在PCB电路板上钢网开口刷出的焊膏三维模型的一示例如图2所示。
S13，从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件的三维模型设置到焊膏三维模型上。在本实施例中，所述从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件中挑选标准为：根据元器件制造商的推荐或实际的电路板工艺情况。所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息包括所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度。
具体地，将元器件制造商的推荐或实际的电路板工艺情况作为需回流焊工艺的元器件的挑选标准，从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，并根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度，将每一所述元器件的三维模型设置到焊膏三维模型上。形成的焊膏三维模型的示例图如图3所示。
S14，启动回流焊的参数的数据库，选取预设的回流焊的模拟参数，并且可以读入之前的回流焊曲线生成参数(solder profile生成参数是根据预设的回流焊的模拟参数生成可视化图 表，由图表再还原成参数，就可以直接使用solder profile生成参数)。在本实施例中，根据回流焊仿真的精确性，可以不断增加需要的参数。在本实施例中，所述预设的回流焊的模拟参数包括回流焊的长度、每个区间的温度范围、每个区间的传送速度和/或每个区间的长度等等参数。
S15，根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型，在产生待优化PCB电路板的回流焊仿真模型后(具体地，产生待优化PCB电路板上每个焊点的焊接三维模型)，将焊接中和焊接后对元器件和PCB电路板的应力变化(在本实施例中，对元器件和PCB电路板的应力变化是指：哪个地方在经过回流焊的时候PCB电路板有变形，或/和造成元器件有弯曲等变化，以及该变化可导致元器件开裂等损坏)进行仿真并显示，回流焊仿真模型的示例图如图4所示。
S16，对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题。
在本实施例中，待优化问题包括所述待优化PCB电路板上的焊锡距离问题、焊锡桥接问题、元器件立碑问题、元器件倾斜问题、元器件偏移问题和/或元器件和电路板应力变形问题等等问题。
具体地，所述S16包括：
对所述待优化PCB电路板上的焊锡距离进行检查；
对所述待优化PCB电路板上的焊锡桥接进行检查；
对所述待优化PCB电路板上挑选出的元器件进行立碑检查；
对所述待优化PCB电路板上挑选出的元器件进行倾斜检查；
对所述待优化PCB电路板上挑选出的元器件进行偏移检查；和/或
对所述待优化PCB电路板上挑选出的元器件和电路板进行应力变形检查等等步骤。
例如一检查问题，在如图4所示的回流焊仿真模型中检查到元器件焊锡间距小于预设焊锡间距0.127mm，则被报告出来，这时查看回流焊前的待优化PCB电路板的三维模型，随即检查到由于R2的左边焊盘焊膏过多造成的焊锡间距小于预设焊锡间距。
例如另一检查问题，在如图4所示的回流焊仿真模型中报告元器件坐标位置偏移超过预设偏移值0.005mm，查看回流焊前待优化PCB电路板的三维模型，随即检查到是由于元器件一边的铜箔过大，造成左侧焊膏焊接过快，右边焊膏还没有冷却焊接就已完成，导致元器件位置发生了移动。
S17，针对所述待优化问题，采取对应的设计和工艺的优化修改。
在本实施例中，对应的设计和工艺的优化修改包括：
1.PCB布线优化：焊盘，线路等；该优化针对焊锡过多或过少等问题。
2.元器件选型优化：更换制造商，定制元器件等；该优化针对元器件引脚过大/过小，质量过重或太轻造成的焊接不良等问题。
3.钢网开口优化：开口重新设计等；该优化针对焊接锡球多，短路等问题。
4.回流焊设备参数优化，甚至定制回流焊功能；该优化针对虚焊等问题。
5.SMT设备优化：贴片机坐标偏移，AOI重点检查，增加工艺防呆手段等。该优化针对1到4无法优化的时候对设备进行优化等问题。
例如，针对上述一检查问题，所采取对应的设计和工艺的优化修改为修改钢网开口大小；
例如，针对上述另一检查问题，所采取对应的设计和工艺的优化修改为修改PCB设计铜箔大小来进行优化，也可以通过Cadence allegro skill API同步修改的设计。
在本实施例中，以上5种对焊接的待优化问题都可以优化，只是优化成本有高低，优化难易程度有高低。依次优先顺序为：4>3>1>5>2，当然也要看实际情况。
S18，若PCB电路板检查未发现待优化问题后，输出所述待优化PCB电路板的回流焊仿真模型。在本实施例中，应用所述回流焊的仿真优化方法无需AOI在线学习一块样本作为标准测试板。
本实施例还提供一种计算机存储介质(亦称为计算机可读存储介质)，其上存储有计算机程序，该计算机程序被处理器执行时实现上述回流焊的仿真优化方法。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤可以通过计算机程序相关的硬件来完成。前述的计算机程序可以存储于一计算机可读存储介质中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
本实施例提供的回流焊的仿真优化方法可以在设计阶段通过回流焊仿真的技术，预先发现可能出现的焊接问题，进而使技术人员修改设计与优化工艺，将原来需要几天完成的工作量在短短的1-2个小时内完成，大大提升了产品的制造品质及制造效率；且使得电子制造企业由原来的对滞后生产结果的诊断和分析变成到在设计前端的仿真预防，并且可以做到将生产中的问题点提前预防；因此，可以说本实施例提供的回流焊的仿真优化方法是电子制造企业实现智能制造和工业4.0的有效方案和技术支撑。
实施例二
本实施例提供一种回流焊的仿真优化系统，包括：
生成模块，用于生成待优化PCB电路板的三维模型；
产生模块，用于根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；
设置模块，用于从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；
仿真模块，用于根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；
检查模块，用于对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；
优化修改模块，用于针对所述待优化问题进行对应的设计和工艺的优化修改。
以下将结合图示对本实施例所提供的回流焊的仿真优化系统进行详细描述。需要说明的是，应理解以下仿真优化系统的各个模块的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。且这些模块可以全部以软件通过处理元件调用的形式实现，也可以全部以硬件的形式实现，还可以部分模块通过处理元件调用软件的形式实现，部分模块通过硬件的形式实现。例如：x模块可以为单独设立的处理元件，也可以集成在以下仿真优化系统的某一个芯片中实现。此外，x模块也可以以程序代码的形式存储于下述装置的存储器中，由上述装置的某一个处理元件调用并执行以下x模块的功能。其它模块的实现与之类似。这些模块全部或部分可以集成在一起，也可以独立实现。这里所述的处理元件可以是一种集成电路，具有信号的处理能力。在实现过程中，上述方法的各步骤或以下各个模块可以通过处理器元件中的硬件的集成逻辑电路或者软件形式的指令完成。以下这些模块可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(Application Specific Integrated Circuit，简称ASIC)，一个或多个微处理器(Digital Singnal Processor，简称DSP)，一个或者多个现场可编程门阵列(Field Programmable Gate Array，简称FPGA)等。当以下某个模块通过处理元件调用程序代码的形式实现时，该处理元件可以是通用处理器，如中央处理器(Central Processing Unit，简称CPU)或其它可以调用程序代码的处理器。这些模块可以集成在一起，以片上系统(System-on-a-chip，简称SOC)的形式实现。
请参阅图5，显示为回流焊的仿真优化系统于一实施例中的原理结构示意图。如图5所示，所述回流焊的仿真优化系统5包括：生成模块51、产生模块52、设置模块53、选取模 块54、仿真模块55、检查模块56、优化模块57及输出模块58。
所述生成模块51用于生成待优化PCB电路板的三维模型。在本实施例中，所述S11包括直接接收用户创建的待优化PCB电路板的三维模型；或根据获取来自EDA布线数据，生成待优化PCB电路板的三维模型。
所述生成模块51具体用于从cadence allegro skill API直接获取待优化PCB电路板的二维PCB图形数据，而后根据PCB每层的厚度生成待优化PCB电路板的三维模型。所述待优化PCB电路板的三维模型包括电路板每一层的导电物质厚度和材质，绝缘层厚度和材质，层与层直接的连通孔和非连通孔等。
与所述生成模块51耦合的产生模块52用于根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型。在本实施例中，若PCB电路板是双面板时，PCB电路板的TOP面和BOTTOM面上都需要产生对应的焊膏三维模型，在PCB电路板上钢网开口刷出的焊膏三维模型的一示例如图2所示。
与所述生成模块51和产生模块52耦合的设置模块53用于从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件的三维模型设置到焊膏三维模型上。在本实施例中，所述从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件中挑选标准为：根据元器件制造商的推荐或实际的电路板工艺情况。所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息包括所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度。
具体地，所述设置模块53将元器件制造商的推荐或实际的电路板工艺情况作为需回流焊工艺的元器件的挑选标准，从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，并根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度，将每一所述元器件的三维模型设置到焊膏三维模型上。形成的焊膏三维模型的示例图如图3所示。
与所述设置模块53耦合的选取模块54用于启动回流焊的参数的数据库，选取预设的回流焊的模拟参数，并且可以读入之前的焊料回流焊曲线生成参数(solder profile生成参数是根据预设的回流焊的模拟参数生成可视化图表，由图表再还原成参数，就可以直接使用solder profile生成参数)。在本实施例中，根据回流焊仿真的精确性，可以不断增加需要的参数。在本实施例中，所述预设的回流焊的模拟参数包括回流焊的长度、每个区间的温度范围、每个区间的传送速度和/或每个区间的长度等等参数。
与所述设置模块53和选取模块54耦合的仿真模块55用于根据预设的回流焊的模拟参 数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型，在产生待优化PCB电路板的回流焊仿真模型后(具体地，产生待优化PCB电路板上每个焊点的焊接三维模型)，将焊接中和焊接后对元器件和PCB电路板的应力变化(在本实施例中，对元器件和PCB电路板的应力变化是指：哪个地方在经过回流焊的时候PCB电路板有变形，和/或造成元器件有弯曲等变化，以及该变化可导致元器件开裂等损坏)进行仿真并显示，回流焊仿真模型的示例图如图4所示。
与所述仿真模块55耦合的检查模块56用于对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题。
在本实施例中，待优化问题包括所述待优化PCB电路板上的焊锡距离问题、焊锡桥接问题、元器件立碑问题、元器件倾斜问题、元器件偏移问题和/或元器件和电路板应力变形问题等等问题。
具体地，所述检查模块56用于对所述待优化PCB电路板上的焊锡距离进行检查；对所述待优化PCB电路板上的焊锡桥接进行检查；对所述待优化PCB电路板上挑选出的元器件进行立碑检查；对所述待优化PCB电路板上挑选出的元器件进行倾斜检查；对所述待优化PCB电路板上挑选出的元器件进行偏移检查；和/或对所述待优化PCB电路板上挑选出的元器件和电路板进行应力变形检查等等。
与所述检查模块56耦合的优化模块57用于针对所述待优化问题，采取对应的设计和工艺的优化修改。
在本实施例中，所述优化模块57对应的设计和工艺的优化修改包括：
1.PCB布线优化：焊盘，线路等；该优化针对焊锡过多或过少等问题。
2.元器件选型优化：更换制造商，定制元器件等；该优化针对元器件引脚过大/过小，质量过重或太轻造成的焊接不良的问题。
3.钢网开口优化：开口重新设计等；该优化针对焊接锡球多，短路等问题。
4.回流焊设备参数优化，甚至定制回流焊功能；该优化针对虚焊等问题。
5.SMT设备优化：贴片机坐标偏移，AOI重点检查，增加工艺防呆手段等。该优化针对1到4无法优化的时候对设备进行优化等问题。
与所述优化模块57耦合的输出模块58用于若PCB电路板检查未发现待优化问题后，输出所述待优化PCB电路板的回流焊仿真模型。在本实施例中，应用所述回流焊的仿真优化系统无需AOI在线学习一块样本作为标准测试板。
实施例三
本实施例提供一种设备，该设备包括：处理器、存储器、收发器、通信接口或/和系统总线；存储器和通信接口通过系统总线与处理器和收发器连接并完成相互间的通信，存储器用于存储计算机程序，通信接口用于和其他设备进行通信，处理器和收发器用于运行计算机程序，使设备执行如实施例一所述回流焊的仿真优化方法的各个步骤。
上述提到的系统总线可以是外设部件互连标准(Peripheral Component Interconnect，简称PCI)总线或扩展工业标准结构(Extended Industry Standard Architecture，简称EISA)总线等。该系统总线可以分为地址总线、数据总线、控制总线等。通信接口用于实现数据库访问装置与其他设备(如客户端、读写库和只读库)之间的通信。存储器可能包含随机存取存储器(Random Access Memory，简称RAM)，也可能还包括非易失性存储器(non-volatile memory)，例如至少一个磁盘存储器。
上述的处理器可以是通用处理器，包括中央处理器(Central Processing Unit，简称CPU)、网络处理器(Network Processor，简称NP)等；还可以是数字信号处理器(Digital Signal Processing，简称DSP)、专用集成电路(Application Specific Integrated Circuit，简称ASIC)、现场可编程门阵列(Field Programmable Gate Array，简称FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。
本发明所述的回流焊的仿真优化方法的保护范围不限于本实施例列举的步骤执行顺序，凡是根据本发明的原理所做的现有技术的步骤增减、步骤替换所实现的方案都包括在本发明的保护范围内。
本发明还提供一种回流焊的仿真优化系统，所述回流焊的仿真优化系统可以实现本发明所述的回流焊的仿真优化方法，但本发明所述的回流焊的仿真优化方法的实现装置包括但不限于本实施例列举的回流焊的仿真优化系统的结构，凡是根据本发明的原理所做的现有技术的结构变形和替换，都包括在本发明的保护范围内。
综上所述，本发明提供的回流焊的仿真优化方法、系统、计算机存储介质及设备可以在设计阶段通过回流焊仿真的技术，预先发现可能出现的焊接问题，进而使技术人员修改设计与优化工艺，将原来需要几天完成的工作量在短短的1-2个小时内完成，大大提升了产品的制造品质及制造效率；且使得电子制造企业由原来的对滞后生产结果的诊断和分析变成到在设计前端的仿真预防，并且可以做到将生产中的问题点提前预防；因此，可以说本实施例提供的回流焊的仿真优化方法是电子制造企业实现智能制造和工业4.0的有效方案和技术支撑。本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技 术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (10)

  1. 一种回流焊的仿真优化方法，其特征在于，包括：
    生成待优化PCB电路板的三维模型；
    根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；
    从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；
    根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；
    对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；
    针对所述待优化问题，采取对应的设计和工艺的优化修改。
  2. 根据权利要求1所述的回流焊的仿真优化方法，其特征在于，若PCB电路板检查未发现待优化问题后，所述回流焊的仿真优化方法还包括输出所述待优化PCB电路板的回流焊仿真模型。
  3. 根据权利要求1所述的回流焊的仿真优化方法，其特征在于，所述生成待优化PCB电路板的三维模型包括：
    直接接收用户创建的待优化PCB电路板的三维模型；或
    根据获取来自EDA布线数据，生成待优化PCB电路板的三维模型。
  4. 根据权利要求1所述的回流焊的仿真优化方法，其特征在于，
    所述从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件中挑选标准为：
    根据元器件制造商的推荐或实际的电路板工艺情况；
    所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息包括所挑选出的元器件在所述待优化PCB电路板的三维模型上的坐标和角度；
    预设的回流焊的模拟参数包括回流焊的长度、每个区间的温度范围、每个区间的传送速度和/或每个区间的长度。
  5. 根据权利要求1所述的回流焊的仿真优化方法，其特征在于，在形成待优化PCB电路板 的回流焊仿真模型的步骤后，所述回流焊的仿真优化方法还包括将焊接中和焊接后对元器件和PCB电路板的应力变化进行仿真并显示。
  6. 根据权利要求1所述的回流焊的仿真优化方法，其特征在于，待优化问题包括所述待优化PCB电路板上的焊锡距离问题、焊锡桥接问题、元器件立碑问题、元器件倾斜问题、元器件偏移问题和/或元器件和电路板应力变形问题。
  7. 根据权利要求6所述的回流焊的仿真优化方法，其特征在于，所述对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查的步骤包括：
    对所述待优化PCB电路板上的焊锡距离进行检查；
    对所述待优化PCB电路板上的焊锡桥接进行检查；
    对所述待优化PCB电路板上挑选出的元器件进行立碑检查；
    对所述待优化PCB电路板上挑选出的元器件进行倾斜检查；
    对所述待优化PCB电路板上挑选出的元器件进行偏移检查；和/或
    对所述待优化PCB电路板上挑选出的元器件和电路板进行应力变形检查。
  8. 一种回流焊的仿真优化系统，其特征在于，包括：
    生成模块，用于生成待优化PCB电路板的三维模型；
    产生模块，用于根据一一读入的钢网开口的厚度或者根据焊盘生成的钢网开口的厚度，产生对应的焊膏三维模型；
    设置模块，用于从待优化PCB电路板的三维模型上挑选出需回流焊工艺的元器件，根据所挑选出的元器件在所述待优化PCB电路板的三维模型上的位置信息，将每一所述元器件设置到焊膏三维模型上；
    仿真模块，用于根据预设的回流焊的模拟参数，将挑选出的元器件和焊盘进行焊膏焊接仿真，形成待优化PCB电路板的回流焊仿真模型；
    检查模块，用于对所述待优化PCB电路板的回流焊仿真模型进行PCB电路板检查，以发现待优化问题；
    优化修改模块，用于针对所述待优化问题进行对应的设计和工艺的优化修改。
  9. 一种计算机存储介质，其上存储有计算机程序，其特征在于，该程序被处理器执行时实现权利要求1至7中任一项所述回流焊的仿真优化方法。
  10. 一种设备，其特征在于，包括：处理器及存储器；
    所述存储器用于存储计算机程序，所述处理器用于执行所述存储器存储的计算机程序，以使所述设备执行如权利要求1至7中任一项所述回流焊的仿真优化方法。
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