WO2020038040A1 - 信号链路信号质量评估方法、装置、设备及可读存储介质 - Google Patents

信号链路信号质量评估方法、装置、设备及可读存储介质 Download PDF

Info

Publication number
WO2020038040A1
WO2020038040A1 PCT/CN2019/089277 CN2019089277W WO2020038040A1 WO 2020038040 A1 WO2020038040 A1 WO 2020038040A1 CN 2019089277 W CN2019089277 W CN 2019089277W WO 2020038040 A1 WO2020038040 A1 WO 2020038040A1
Authority
WO
WIPO (PCT)
Prior art keywords
model
link
signal
simulation
transmission line
Prior art date
Application number
PCT/CN2019/089277
Other languages
English (en)
French (fr)
Inventor
李德恒
武宁
Original Assignee
郑州云海信息技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 郑州云海信息技术有限公司 filed Critical 郑州云海信息技术有限公司
Publication of WO2020038040A1 publication Critical patent/WO2020038040A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
    • H04L43/0817—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking functioning

Definitions

  • the present invention relates to the technical field of computer applications, and in particular, to a method, an apparatus, a device, and a readable storage medium for evaluating signal quality of a signal link.
  • the design of the server is mainly divided into two parts, signal design and power supply design.
  • the power supply design is the basis of the entire server design, and all chips need a stable power supply to work properly.
  • Signal design is the soul of server design.
  • the realization of various functions needs to be controlled by signals.
  • the quality of signal design is related to the realization and stability of each function of the circuit board.
  • An object of the present invention is to provide a method, an apparatus, a device, and a readable storage medium for evaluating a signal quality of a signal link, so as to quickly and effectively evaluate the signal quality of the signal link.
  • the present invention provides the following technical solutions:
  • a signal link signal quality evaluation method includes:
  • the target simulation link is used to obtain a signal quality evaluation result corresponding to the target signal link.
  • the searching the preset model library for the sending end model, transmission line model, via model, and receiving end model matching the target signal link includes:
  • the receiving model corresponding to the receiving chip of the target signal link is searched in the preset model library.
  • inputting a signal simulation parameter and a transmission line length corresponding to the target signal link into the simulation link to obtain the target simulation link includes:
  • the method further includes:
  • obtaining the transmission line model includes:
  • IMLC or ADS tools to create transmission line models for signal transmission losses with different line widths for the transmission lines to be evaluated in the circuit board.
  • obtaining the via model includes:
  • the connecting the transmitting end model, the transmission line model, the via model and the receiving end model to obtain a simulation link includes:
  • the transmitting end model, the transmission line model, the via hole model, and the receiving end model are connected according to a one-to-one correspondence with the target signal link to obtain a simulated link.
  • a signal link signal quality evaluation device includes:
  • a target signal link acquisition module configured to acquire a target signal link to be evaluated
  • a model search module configured to search a preset model library for a sender model, a transmission line model, a via model, and a receiver model that match the target signal link;
  • a simulation link acquisition module configured to connect the sending end model, the transmission line model, the via model, and the receiving end model to obtain a simulation link
  • a target simulation link acquisition module configured to input signal simulation parameters and transmission line lengths corresponding to the target signal link into the simulation link to obtain a target simulation link;
  • the signal quality evaluation result acquisition module is configured to use the target simulation link to obtain a signal quality evaluation result corresponding to the target signal link.
  • a signal link signal quality evaluation device includes:
  • a processor configured to implement the steps of the foregoing signal link signal quality evaluation method when the computer program is executed.
  • a readable storage medium stores a computer program on the readable storage medium.
  • the computer program is executed by a processor, the steps of the method for evaluating signal quality of a signal link are implemented.
  • the sender model, transmission line model, via model, and receiver model that match the target signal link can be found in a preset model library.
  • the sender model, transmission line model, via model and receiver model are connected to form a simulation link.
  • the signal simulation parameters and transmission line length in the target signal link are input into the simulation link, and a target simulation link matching the target signal link can be obtained.
  • a signal quality evaluation result corresponding to the target signal link can be obtained, that is, the signal quality evaluation of the target signal link is completed.
  • the target simulation link When obtaining the target simulation link that matches the target signal link, directly find the corresponding model from the preset model library and connect it, and set the signal simulation parameters and transmission line length consistent with the target signal link, which not only can quickly Obtaining the target simulation link can also make the simulation results obtained by performing signal simulation with the target simulation link more closely match the actual target signal link. In this way, the cycle of circuit board design can be further shortened, and the signal quality of circuit board design can be improved.
  • a pre-set model is used to set up a simulation link, which does not need to perform signal transmission performance analysis on each part of the signal link, which can reduce the work complexity and workload of development and test personnel, and further reduce Development test time.
  • the embodiments of the present invention further provide a signal link signal quality evaluation apparatus, device, and readable storage medium corresponding to the foregoing signal link signal quality evaluation method, which have the above technical effects, and are not described herein again.
  • FIG. 1 is an implementation flowchart of a signal link signal quality assessment method according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a connection structure of a signal link according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a signal link signal quality evaluation device according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a signal link signal quality evaluation device according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a specific structure of a signal link signal quality evaluation device according to an embodiment of the present invention.
  • FIG. 1 is a flowchart of a signal link signal quality evaluation method according to an embodiment of the present invention. The method includes the following steps:
  • a target signal link can be randomly determined for signal quality detection, or a target signal link can be filtered for signal quality detection through pre-set screening conditions.
  • the sender model, transmission line model, via model, and receiver model can be created in advance, and the sender model, transmission line model, via model, and receiver model can be stored in the model library.
  • the sender model may correspond to the type of the sender chip commonly used in current circuit design;
  • the transmission line model may correspond to the line width of the transmission line, that is, one type of wire control corresponds to one type of transmission line;
  • a via hole The model can correspond to the characteristics of vias, that is, each type of via (vias passing through different layers) corresponds to a type of via;
  • the receiver model is similar to the send model, and the receiver model can be used in current circuit time. Corresponding chip type at the receiving end. That is, the sender model, transmission line model, via model, and receiver model are obtained and stored in the model library.
  • IMLC or ADS tools can be used to specifically create transmission line models for the transmission lines to be evaluated in the circuit board, and the corresponding signal transmission losses of different line widths.
  • the creation of the transmission line model will be described in detail by taking the platform motherboard as two stacking schemes, assuming Stackup1 and Stackup2, and the designed PCB as a 6-layer board as an example.
  • the line width of the signal packaging area in the PCB corresponding to the server motherboard is generally 3mil, 3.5mil, and 4mil.
  • the line width in the normal routing area is generally 3.5mil, 4mil, 4.5mil, 5mil, 5.5mil and 6mil. Since the signal transmission loss corresponding to different line widths and different regions will be different, corresponding to the server circuit board design, IMLC or ADS tools can be used in advance to create 9 types of transmission line models.
  • the signal link is in a 6-layer board structure shown in Table 1, where L1-L6 represent the first to sixth layers, x1 represents the transmitting end, and x2 represents Receiving end. That is, TOP or L1 is the upper layer or the first layer, L2 is the second layer, L3 is the third layer, L4 is the fourth layer, L5 is the fifth layer, and BOT or L6 is the lower layer or the sixth layer.
  • L1, L3, L4, and L6 are signal layers
  • L2 and L5 are ground layers for providing reference to the signal layers.
  • TOP and BOT, L3 and L4 can be combined into one model to build a database.
  • the transmission line parameters are mainly extracted based on data such as line width, line spacing, reference plane distance, dielectric constant, and loss tangent.
  • the model of the transmission line model with unit length is as follows:
  • the transmission line models in the package area include:
  • stackup1_TOP_BOT_3mil_IC stackup1_TOP_BOT_3p5mil_IC, stackup1_TOP_BOT_4mil_IC, stackup2_TOP_BOT_3mil_IC, stackup2_TOP_BOT_3p5mil_IC, stackup2_TOP_BOT_4mil_IC, stackup1_L3_L4_3mil_IC, stackup1_L3_L4_3p5mil_IC, stackup1_L3_L4_4mil_IC, stackup2_L3_L4_3mil_IC, stackup2_L3_L4_3p5mil_IC, stackup2_L3_L4_4mil_IC.
  • Transmission line models for normal areas include:
  • Each transmission line model corresponds to a corresponding signal transmission loss of a line width, that is, a transmission line model can be used to calculate a signal input to the transmission line and output a signal corresponding to the transmission line.
  • a via model is obtained, and a via model corresponding to a signal transmission loss corresponding to a via between different connection layers may be specifically established.
  • Corresponding via models are created for vias passing through different layers, that is, via parameters are extracted based on the via connection relationship. Taking the six-layer board shown in Table 1 as an example, the via model can include:
  • they are mainly named according to different connection levels. Of course, in other embodiments of the present invention, there may be other naming methods.
  • the sending end is modeled, including IC models, packaging models, connector models, etc., and then the sending end models are put into the model library for backup.
  • Modeling the receiving end includes IC models, packaging models, connector models, etc., and then placing the receiving end model in the model library for backup.
  • the creation of the receiver model and the creation of the sender model can refer to the common chip model creation process.
  • the manufacturer of the chip can provide the corresponding chip model, such as the IBIS model or the Hspice model, when selling the chip, so the creation process of the sender model and the receiver model will not be repeated here.
  • the sender model, transmission line model, via model, and receiver model that match the target signal link can be found in the preset model library.
  • finding a model corresponding to a target signal link includes:
  • Step 1 Find a sender model corresponding to the sender chip of the target signal link in a preset model library
  • Step 2 Find a transmission line model that matches the transmission line width of the target signal link in a preset model library
  • Step 3 Find the via model corresponding to the via feature of the target signal link in the preset model library
  • Step 4 Find a receiver model corresponding to the receiver chip of the target signal link in the preset model library.
  • the execution order of the above four steps can be performed without any sequence, and the execution method can be sequential execution or parallel execution.
  • the types of models that match the target signal link include the sender model, the transmission line model, the via model, and the receiver model, but the types of each type of model match the specific form of the target signal link. For example, if the target signal link is shown in Figure 1, the found transmitter model matches the chip corresponding to sender 1, the receiver model matches the chip corresponding to receiver 1, and the transmission line model includes the encapsulation layer and normal
  • the line width transmission line models corresponding to the routing layers, and the via models include the via models corresponding to TOP-L4, L4-BOT, and BOT-TOP.
  • the models can be connected to obtain a simulation link.
  • the sender model, the transmission line model, the via model, and the receiver model can be connected in a one-to-one correspondence with the target signal link to obtain a simulated link.
  • the target signal link is: chip A-layer 3 transmission line with 3.5mil line width-vias in layer 3 and layer 5-layer 5 transmission line with 4.5mil line width-layer 5 and
  • the second layer of vias-the second layer of 3.5mil transmission line-chip B and the model corresponding to the target signal link found in the preset model library includes: the sender model 1 corresponding to chip A, normal Transmission line model 1 with a line width of 3.5 mil in the routing area, and transmission line model 2 with a line width of 4.5 mil in the normal routing area.
  • connection order of the model corresponding to the target signal link is: sender model 1-transmission line model 1-via 1-transmission line model 2-via 2-transmission line model 1-receiver model 1 , You can get the simulation link.
  • S104. Input the signal simulation parameters and transmission line length corresponding to the target signal link into the simulation link to obtain the target simulation link.
  • the signal simulation parameters and transmission line lengths corresponding to the target signal link can be input into the simulation link to obtain the target simulation link.
  • the signal simulation parameters include simulation time, simulation accuracy, and observation points.
  • the length of the specific simulation time, the value of the simulation accuracy, and the position of the observation point can be set in advance, and can also be set and adjusted according to actual application requirements. For example, when the target signal link to be detected is simply modified or improved based on the existing signal link, the simulation time can be shorter and the simulation accuracy can also be lower.
  • the process of obtaining the target simulation link includes:
  • Step 1 input the signal simulation parameters corresponding to the target signal link into the simulation link;
  • Step 2 Enter the transmission line model according to the transmission line length corresponding to the target signal link, where the transmission line model is a unit length model.
  • the signal simulation parameters corresponding to the target signal link are input into the simulation link.
  • the output pin of the chip corresponding to the sender model is specifically which pin, that is, the different input signal. Because the signal loss caused by different transmission line lengths is different, you need to enter the specific transmission line length in the transmission line model.
  • the corresponding transmission line model of the transmission line is stackup2_TOP_BOT_4mil_PCB. You can change the model length to the actual board by passing .param The length of the trace.
  • the simulation process is to input signals to the target simulation link, and sequentially calculate the connection order between the models of the target simulation link of the case, and finally obtain the output signal.
  • the sender model, transmission line model, via model, and receiver model that match the target signal link can be found in a preset model library.
  • the sender model, transmission line model, via model and receiver model are connected to form a simulation link.
  • the signal simulation parameters and transmission line length in the target signal link are input into the simulation link, and a target simulation link matching the target signal link can be obtained.
  • a signal quality evaluation result corresponding to the target signal link can be obtained, that is, the signal quality evaluation of the target signal link is completed.
  • the target simulation link When obtaining the target simulation link that matches the target signal link, directly find the corresponding model from the preset model library and connect it, and set the signal simulation parameters and transmission line length consistent with the target signal link, which not only can quickly Obtaining the target simulation link can also make the simulation results obtained by performing signal simulation with the target simulation link more closely match the actual target signal link. In this way, the cycle of circuit board design can be further shortened, and the signal quality of circuit board design can be improved.
  • a pre-set model is used to set up a simulation link, which does not need to perform signal transmission performance analysis on each part of the signal link, which can reduce the work complexity and workload of development and test personnel, and further reduce Development test time.
  • steps S103 and S104 can be reversed, that is, the steps S103 and S104 described above can be performed in addition to step S104 and then step S103.
  • the transmission line model is described below as an example.
  • the trace length on the actual board corresponding to the target signal link can be set to the model first, and then the transmission line model and the target signal chain can be set.
  • Each model corresponding to the road is connected. Specifically, you can use the .lib ′. ⁇ Model ⁇ routing_lib.lib ′ stackup2_TOP_BOT_4mil_PCB instruction to call a unit length model of a signal line with stackup2, wiring layer as top or bot layer, and a width of 4mil.
  • the X_stackup2_TOP_BOT_4mil_PCB, pkg_out, length, and stackup2_TOP_BOT_4mil_PCB L_stackup2_TOP_BOT_4mil_PCB instruction can be used to connect the transmission line model with the chip model at the transmitter or receiver.
  • Step 1 According to the layered design of the platform, build the model library as described above and the link simulation document signal1.sp.
  • This model library and simulation link document can be used for subsequent evaluations unlimited times.
  • the link simulation file signal1.sp is a link simulation file that can implement a signal simulation test on a simulated signal link established by a module.
  • Step 2 Analyze the connection mode of the link to be simulated and determine the overlay. For example, as shown in the connection relationship shown in FIG. 2, the line width of the transmission line at the IC end is 3 mil, the line width of the other transmission lines is 4 mil, and the stackup is Stackup1.
  • Step 3 Open signal1.sp for editing, call the pre-compiled sender and receiver models, and replace the signal and via models in the order with stackup1_TOP_BOT_3mil_IC, stackup1_TOP_L4_via, stackup1_L3_L4_4mil_PCB, stackup1_TOP_L3_via, stackOT1_P_TO_P_TOP_TOP_TOP_TO_PUP stackup1_TOP_BOT_3mil_IC;
  • Step 4 Replace the L1 of the transmission line model in Step 3 with the actual length in signal1.sp;
  • Step 5 Set the simulation signal parameters in the simulation file signal1.sp, such as simulation time, simulation accuracy, observation points, etc., and then run the simulation file signal1.sp to view the results.
  • an embodiment of the present invention further provides a signal link signal quality evaluation device.
  • the signal link signal quality evaluation device described below and the signal link signal quality evaluation method described above may correspond to each other. Reference.
  • the device includes the following modules:
  • a target signal link acquisition module 101 configured to acquire a target signal link to be evaluated
  • a model search module 102 is configured to search a preset model library for a sending end model, a transmission line model, a via model, and a receiving end model that match a target signal link;
  • the simulation link obtaining module 103 is configured to connect a sending end model, a transmission line model, a via model and a receiving end model to obtain a simulation link;
  • the target simulation link acquisition module 104 is configured to input signal simulation parameters and transmission line lengths corresponding to the target signal link into the simulation link to obtain the target simulation link;
  • the signal quality evaluation result acquisition module 105 is configured to obtain a signal quality evaluation result corresponding to the target signal link by using the target simulation link.
  • the sender model, transmission line model, via model, and receiver model that match the target signal link can be found in a preset model library.
  • the sender model, transmission line model, via model and receiver model are connected to form a simulation link.
  • the signal simulation parameters and transmission line length in the target signal link are input into the simulation link, and a target simulation link matching the target signal link can be obtained.
  • a signal quality evaluation result corresponding to the target signal link can be obtained, that is, the signal quality evaluation of the target signal link is completed.
  • the target simulation link When obtaining the target simulation link that matches the target signal link, directly find the corresponding model from the preset model library and connect it, and set the signal simulation parameters and transmission line length consistent with the target signal link, which not only can quickly Obtaining the target simulation link can also make the simulation results obtained by performing signal simulation with the target simulation link more closely match the actual target signal link. In this way, the cycle of circuit board design can be further shortened, and the signal quality of circuit board design can be improved.
  • a pre-set model is used to set up a simulation link, which does not need to perform signal transmission performance analysis on each part of the signal link, which can reduce the work complexity and workload of development and test personnel, and further reduce Development test time.
  • the model search module 102 includes:
  • a sender model searching unit configured to find a sender model corresponding to a sender chip of a target signal link in a preset model library
  • a transmission line model searching unit configured to find a transmission line model matching a transmission line width of a target signal link in a preset model library
  • Via model search unit used to find the via model corresponding to the via feature of the target signal link in the preset model library
  • the receiving-end model searching unit is configured to find a receiving-end model corresponding to a receiving-end chip of a target signal link in a preset model library.
  • the target simulation link acquisition module 104 includes:
  • a signal simulation parameter setting unit for inputting a signal simulation parameter corresponding to a target signal link into the simulation link
  • the transmission line length setting unit is used to input the transmission line model according to the transmission line length corresponding to the target signal link, where the transmission line model is a unit length model.
  • the method further includes:
  • a model acquisition module is used to obtain a transmitting end model, a transmission line model, a via hole model, and a receiving end model before acquiring a target signal link to be evaluated, and store them in a model library.
  • the model acquisition module is specifically configured to use IMLC or ADS tools to respectively create transmission line models of signal transmission losses corresponding to different line widths for the transmission lines to be evaluated in the circuit board.
  • the model acquisition module is specifically configured to separately establish a via model of signal transmission loss corresponding to vias between different connection layers.
  • the simulation link acquisition module 103 is specifically configured to connect the sender model, the transmission line model, the via model, and the receiver model in a one-to-one correspondence with the target signal link. To get the simulation link.
  • an embodiment of the present invention further provides a signal link signal quality evaluation device, a signal link signal quality evaluation device described below and a signal link signal quality evaluation described above Methods can be cross-referenced.
  • the signal link signal quality evaluation device includes:
  • the processor D2 is configured to implement steps of the signal link signal quality evaluation method of the foregoing method embodiment when executing a computer program.
  • FIG. 5 is a schematic structural diagram of a signal link signal quality evaluation device according to this embodiment.
  • the signal link signal quality evaluation device may have a large difference due to different configurations or performances.
  • the memory 332 and the storage medium 330 may be temporary storage or persistent storage.
  • the program stored in the storage medium 330 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations on the data processing device.
  • the central processing unit 322 may be configured to communicate with the storage medium 330, and execute a series of instruction operations in the storage medium 330 on the signal link signal quality evaluation device 301.
  • the signal link signal quality evaluation device 301 may further include one or more power sources 326, one or more wired or wireless network interfaces 350, one or more input / output interfaces 358, and / or, one or more operating systems 341, For example, Windows ServerTM, Mac OSXTM, UnixTM, LinuxTM, FreeBSDTM and so on.
  • the steps in the signal link signal quality evaluation method described above may be implemented by the structure of the signal link signal quality evaluation device.
  • an embodiment of the present invention further provides a readable storage medium.
  • a readable storage medium described below and a signal link signal quality evaluation method described above may correspond to each other.
  • a readable storage medium stores a computer program on the readable storage medium.
  • the computer program is executed by a processor, the steps of the method for evaluating signal quality of a signal link in the foregoing method embodiment are implemented.
  • the readable storage medium may specifically be various kinds of storable program codes such as a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk. Readable storage medium.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Environmental & Geological Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

一种信号链路信号质量评估方法、装置、设备及可读存储介质，该方法包括：获取待评估的目标信号链路；在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路；将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路；利用目标仿真链路，获得与目标信号链路对应的信号质量评估结果。可完成对目标信号链路的信号质量评估，进一步缩短电路板设计的周期，提升电路板设计的信号质量。

Description

信号链路信号质量评估方法、装置、设备及可读存储介质
本申请要求于2018年08月22日提交至中国专利局、申请号为201810960100.7、发明名称为“信号链路信号质量评估方法、装置、设备及可读存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及计算机应用技术领域，特别是涉及一种信号链路信号质量评估方法、装置、设备及可读存储介质。
背景技术
服务器的设计主要分为两个部分，信号设计和电源设计。其中，电源设计为整个服务器设计的基础，所有芯片需要有一个稳定的电源才能正常工作。信号设计为服务器设计的灵魂，各种功能的实现都需要由信号来控制，信号设计的好坏关系到电路板各个功能的实现和稳定性。
目前，对信号链路进行信号质量评估，需要对待评估的信号链路的各个部分，如发送端芯片、传输线、过孔、接收芯片的信号传输性能分别进行分析。然后，利用各个部分的性能分析结果进行仿真分析，最终得到信号质量评估结果。但是，伴随着互联网、大数据的快速发展，云计算时代的到来，越来越多的业务需要借助服务器实现图形处理、数据计算。随着业务量的增加，服务器的内需进行信号质量评估的信号链路越来越多，且服务器设计周期也越来越短，依靠现有的先分析链路，再依据分析结果进行仿真评估的模式，任务量较大，且复杂，已经无法适应当前的信号质量评估的需求了。
综上所述，如何有效的在设计前期评估信号设计质量等问题，是本领域技术人员急需解决的技术问题。
发明内容
本发明的目的是提供一种信号链路信号质量评估方法、装置、设备及 可读存储介质，以快速、有效地评估信号链路的信号质量。
为解决上述技术问题，本发明提供如下技术方案：
一种信号链路信号质量评估方法，包括：
获取待评估的目标信号链路；
在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；
将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路；
将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路；
利用所述目标仿真链路，获得与所述目标信号链路对应的信号质量评估结果。
优选地，所述在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型，包括：
在预设模型库中查找与所述目标信号链路的发送端芯片对应的发送端模型；
在所述预设模型库中查找与所述目标信号链路的传输线宽匹配的传输线模型；
在所述预设模型库中查找与所述目标信号链路的过孔特征对应的过孔模型；
在所述预设模型库中查找与所述目标信号链路的接收端芯片对应的接收端模型。
优选地，将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路，包括：
将所述目标信号链路对应的信号仿真参数输入至所述仿真链路中；
按照所述目标信号链路对应的传输线长度，输入至所述传输线模型中，其中所述传输线模型为单位长度模型。
优选地，在所述获取待评估的目标信号链路之前，还包括：
获取发送端模型、传输线模型、过孔模型和接收端模型，并存入模型库中。
优选地，获取传输线模型，包括：
利用IMLC或ADS工具，为电路板中需评估的传输线，分别创建不同线宽分别对应的信号传输损耗的传输线模型。
优选地，获取过孔模型，包括：
分别建立不同连接层间的过孔对应的信号传输损耗的过孔模型。
优选地，所述将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路，包括：
将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行按照与所述目标信号链路一一对应的关系进行连接，获得仿真链路。
一种信号链路信号质量评估装置，包括：
目标信号链路获取模块，用于获取待评估的目标信号链路；
模型查找模块，用于在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；
仿真链路获取模块，用于将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路；
目标仿真链路获取模块，用于将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路；
信号质量评估结果获取模块，用于利用所述目标仿真链路，获得与所述目标信号链路对应的信号质量评估结果。
一种信号链路信号质量评估设备，包括：
存储器，用于存储计算机程序；
处理器，用于执行所述计算机程序时实现上述信号链路信号质量评估方法的步骤。
一种可读存储介质，所述可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现上述信号链路信号质量评估方法的步骤。
应用本发明实施例所提供的方法，获取待评估的目标信号链路；在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路；将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路；利用目标仿真链路，获得与目 标信号链路对应的信号质量评估结果。
在需要对设计出的目标信号链路进行信号质量评估时，可以在预先设置的模型库中查找出与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型。并将发送端模型、传输线模型、过孔模型和接收端模型进行连接，形成仿真链路。然后，将目标信号链路中的信号仿真参数和传输线长度输入至仿真链路中，可获得与目标信号链路匹配的目标仿真链路。在该目标仿真链路进行信号仿真，可获得与目标信号链路对应的信号质量评估结果，即完成对目标信号链路的信号质量评估。由于在获取与目标信号链路匹配的目标仿真链路时，直接从预设模型库中查找对应的模型并进行连接，并设置与目标信号链路一致的信号仿真参数和传输线长度，不仅可以快速获得目标仿真链路，还可以使得以目标仿真链路进行信号仿真所得的仿真结果与实际的目标信号链路更为匹配。如此，便可进一步缩短电路板设计的周期，提升电路板设计的信号质量。
另外，在进行信号质量评估过程中，利用预先设置的模型来搭建仿真链路，无需对信号链路的各个部分进行信号传输性能分析，可减轻开发测试人员的工作复杂度和工作量，进一步缩短开发测试时间。
相应地，本发明实施例还提供了与上述信号链路信号质量评估方法相对应的信号链路信号质量评估装置、设备和可读存储介质，具有上述技术效果，在此不再赘述。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例中一种信号链路信号质量评估方法的实施流程图；
图2为本发明实施例中一种信号链路的连接结构示意图；
图3为本发明实施例中一种信号链路信号质量评估装置的结构示意 图；
图4为本发明实施例中一种信号链路信号质量评估设备的结构示意图；
图5为本发明实施例中一种信号链路信号质量评估设备的具体结构示意图。
具体实施方式
为了使本技术领域的人员更好地理解本发明方案，下面结合附图和具体实施方式对本发明作进一步的详细说明。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参考图1，图1为本发明实施例中一种信号链路信号质量评估方法的流程图，该方法包括以下步骤：
S101、获取待评估的目标信号链路。
可以从设计前期的电路板中的多条信号链路，选择出一条目标信号链路进行信号质量评估。例如，从设计的服务器主板对应的PCB板中，可随机确定出一条目标信号链路进行信号质量检测，也可以通过预先设置的筛选条件筛选出一条目标信号链路进行信号质量检测。
S102、在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型。
可以预先创建发送端模型、传输线模型、过孔模型和接收端模型，并将发送端模型、传输线模型、过孔模型和接收端模型存入到模型库中。需要说明是，在预设模型中，发送端模型可以与当前电路设计中常用的发送端芯片类型对应；传输线模型可以与传输线的线宽对应，即一种线控对应一种传输线模型；过孔模型可以与过孔特征相对应，即每一种过孔(穿越不同层的过孔)对应一种过孔模型；接收端模型与发送端模型类似，接收端模型可以与当前电路时间中常用的接收端芯片类型对应。即，获取发送端模型、传输线模型、过孔模型和接收端模型，并存入模型库中。
其中，获取传输线模型，具体可以利用IMLC或ADS工具，为电路板 中需评估的传输线，分别创建不同线宽分别对应的信号传输损耗的传输线模型。下面在服务器电路板设计中，以平台主板有两种叠层方案，假设为Stackup1，Stackup2，且设计的PCB为6层板为例对传输线模型的创建进行详细说明。
服务器的主板对应的PCB板内的信号封装区域的线宽一般为3mil，3.5mil和4mil三种情况。正常走线区域的线宽一般为3.5mil，4mil，4.5mil，5mil，5.5mil和6mil六种情况。由于不同的线宽，以及不同的区域对应的信号传输损耗会各不相同，因此，对应与服务器电路板设计中，可以预先利用IMLC或ADS工具，创建出9种传输线模型。
以图2所示的信号链路为例，该信号链路在以表1所示的6层板结构中，其中L1-L6分别表示第一层至第六层，x1表示发送端，x2表示接收端。即TOP或L1为上表层或者第一层，L2为第二层，L3为第三层，L4为第四层，L5为第五层，BOT或L6为下表层或者第六层。
信号：TOP或L1
介质
地：L2
介质
信号：L3
介质
信号：L4
介质
地：L5
介质
信号：BOT或L6
表1
其中，L1，L3，L4，L6为信号层，L2，L5为接地地层用于给信号层提供参考。
优选地，由于每种叠层上下对称，为减少创建传输线模型的种类，可以将TOP与BOT，L3和L4分别合并为一个模型进行建库。建立传输线模型时，主要根据线宽、线距、参考面距离、介电常数、损耗角正切等数 据提取传输线参数。所建立传输线模型为单位长度的模型如下：
封装区域内的传输线模型的包括：
stackup1_TOP_BOT_3mil_IC、stackup1_TOP_BOT_3p5mil_IC、stackup1_TOP_BOT_4mil_IC、stackup2_TOP_BOT_3mil_IC、stackup2_TOP_BOT_3p5mil_IC、stackup2_TOP_BOT_4mil_IC、stackup1_L3_L4_3mil_IC、stackup1_L3_L4_3p5mil_IC、stackup1_L3_L4_4mil_IC、stackup2_L3_L4_3mil_IC、stackup2_L3_L4_3p5mil_IC、stackup2_L3_L4_4mil_IC。
正常区域的传输线模型包括：
stackup1_TOP_BOT_3p5mil_PCB、stackup1_TOP_BOT_4mil_PCB、stackup1_TOP_BOT_4p5mil_PCB、stackup1_TOP_BOT_5mil_PCB、stackup1_TOP_BOT_5p5mil_PCB、stackup1_TOP_BOT_6mil_PCB；Stackup2_TOP_BOT_3p5mil_PCB、stackup2_TOP_BOT_4mil_PCB、stackup2_TOP_BOT_4p5mil_PCB、stackup2_TOP_BOT_5mil_PCB、stackup2_TOP_BOT_5p5mil_PCB、stackup2_TOP_BOT_6mil_PCB、stackup1_L3_L4_3p5mil_PCB、stackup1_L3_L4_4mil_PCB、stackup1_L3_L4_4p5mil_PCB、stackup1_L3_L4_5mil_PCB、stackup1_L3_L4_5p5mil_PCB、stackup1_L3_L4_6mil_PCB、Stackup2_L3_L4_3p5mil_PCB、stackup2_L3_L4_4mil_PCB、stackup2_L3_L4_4p5mil_PCB、stackup2_L3_L4_5mil_PCB、stackup2_L3_L4_5p5mil_PCB、stackup2_L3_L4_6mil_PCB
上述模型的命名主要以其对应的线宽以及在PCB板中的位置命名的，当然，在本发明的其他实施例中还可以有其他命名方式。每一个传输线模型分别对应一种线宽的对应信号传输损耗，也就是说，可以利用传输线模型，计算出一个输入传输线的信号对应的输出该传输线的信号。
其中，获取过孔模型，具体可以分别建立不同连接层间的过孔对应的信号传输损耗的过孔模型。为穿越不同层的过孔分别创建对应的过孔模型，即，根据过孔连接关系提取过孔参数。以表1所示的六层板为例，过孔模型可以包括：
stackup1_TOP_L3_via、stackup1_TOP_L4_via、 stackup1_TOP_BOT_via、stackup2_TOP_L3_via、stackup2_TOP_L4_via、stackup2_TOP_BOT_via。这里主要根据不同连接层面为其分别命名，当然在本发明的其他实施例中，还可以有其它命名方式。
其中，对发送端进行建模，包含IC模型，封装模型，连接器模型等，然后将发送端模型放入模型库备用。对接收端进行建模包含IC模型，封装模型，连接器模型等，然后将接收端模型放入模型库备用。在对发送端和接收端进行建模时，可根据不同芯片的属性进行建模。因而，对接收端模型的创建和发送端模型的创建可参照常见的芯片模型的创建过程。另外，考虑到实际应用中，生产芯片的厂商在出售芯片可以提供相应的芯片模型，如IBIS模型或Hspice模型，因而在此不再赘述发送端模型和接收端模型的创建过程。
预先设置好模型库之后，当获取到目标信号链路之后，可以在预设模型库中，查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型。
具体的，查找与目标信号链路对应的模型具体包括：
步骤一、在预设模型库中查找与目标信号链路的发送端芯片对应的发送端模型；
步骤二、在预设模型库中查找与目标信号链路的传输线宽匹配的传输线模型；
步骤三、在预设模型库中查找与目标信号链路的过孔特征对应的过孔模型；
步骤四、在预设模型库中查找与目标信号链路的接收端芯片对应的接收端模型。
为便于描述，下面将上述四个步骤结合起来进行说明。
首先，需要说明的是，上述四个步骤的执行顺序可无先后顺利，执行的方式可以为依次执行，也可以为并行执行。其中，与目标信号链路匹配的模型的种类包括发送端模型、传输线模型、过孔模型和接收端模型，但每一类模型的种类则与目标信号链路的具体形式匹配。例如，若目标信号链路如图1所示，则查找到的发送端模型则与发送端1对应的芯片匹配，接收端模型与接收端1对应的芯片匹配，传输线模型则包括封装层和正常 走线层各自对应的线宽的传输线模型，过孔模型则包括TOP-L4、L4-BOT、BOT-TOP分别对应的过孔模型。
S103、将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路。
确定了与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型之后，可以将各个模型连接起来，获得仿真链路。
其中，可将发送端模型、传输线模型、过孔模型和接收端模型进行按照与目标信号链路一一对应的关系进行连接，获得仿真链路。例如，若目标信号链路依次为：芯片A-第3层线宽为3.5mil的传输线-第3层与第5层的过孔-第5层线宽为4.5mil的传输线-第5层与第2层的过孔-第2层线宽为3.5mil的传输线-芯片B，且在预设模型库中找到该目标信号链路对应的模型则包括：芯片A对应的发送端模型1，正常走线区域线宽为3.5mil对应的传输线模型1，正常走线区域为线宽为4.5mil对应的传输线模型2，第5层与第2层的过孔对应的过孔模型1，第5层与第2层的过孔对应的过孔模型2，芯片B对应的接收端模型1。即，目标信号链路对应的模型的连接顺序为：发送端模型1-传输线模型1-过孔1-传输线模型2-过孔2-传输线模型1-接收端模型1，按照此顺序进行连接之后，即可获得仿真链路。S104、将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路。
为使得仿真链路与目标信号链路保持一致，可将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路。其中，信号仿真参数包括仿真时间，仿真精度，观测点等。具体的仿真时间的长短和仿真精度的数值以及观测点的位置，均可预先设置，也可以根据实际应用需求进行设置和调整。例如，当待检测的目标信号链路的仅是基于现有的信号链路进行简单修饰或改进的，则仿真时间可较短，仿真精度也可较低。
获取目标仿真链路的过程具体包括：
步骤一、将目标信号链路对应的信号仿真参数输入至仿真链路中；
步骤二、按照目标信号链路对应的传输线长度，输入至传输线模型中，其中传输线模型为单位长度模型。
为便于描述，下面将上述两个步骤结合起来进行说明。
将目标信号链路对应的信号仿真参数输入到仿真链路中。例如，发送端模型对应的芯片的输出引脚具体为哪个引脚，即不同的输入信号。由于不同的传输线长度所带来的信号损耗是不同的，因而需要在传输线模型中输入具体的传输线的长度。例如，当涉及到的传输线长度为0.0254mil的BOT层或TOP层的传输线，该传输线对应的传输线模型为stackup2_TOP_BOT_4mil_PCB，可通过.param L_stackup2_TOP_BOT_4mil_PCB＝′L1*0.0254′，将模型长度更改为实际板卡上走线的长度。
S105、利用目标仿真链路，获得与目标信号链路对应的信号质量评估结果。
得到目标仿真链路之后，对该目标仿真链路进行仿真测试，获得仿真测试结果。由于该目标仿真链路与目标信号链路的器件、信号走向等保持一致，因此，可以将目标仿真链路的仿真结果作为目标信号链路对应的信号质量评估结果。具体的，仿真过程即通过向目标仿真链路输入信号，案子目标仿真链路的各个模型之间的连接顺序依次进行计算，最终获得输出信号。
应用本发明实施例所提供的方法，获取待评估的目标信号链路；在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路；将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路；利用目标仿真链路，获得与目标信号链路对应的信号质量评估结果。
在需要对设计出的目标信号链路进行信号质量评估时，可以在预先设置的模型库中查找出与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型。并将发送端模型、传输线模型、过孔模型和接收端模型进行连接，形成仿真链路。然后，将目标信号链路中的信号仿真参数和传输线长度输入至仿真链路中，可获得与目标信号链路匹配的目标仿真链路。在该目标仿真链路进行信号仿真，可获得与目标信号链路对应的信号质量评估结果，即完成对目标信号链路的信号质量评估。由于在获取与 目标信号链路匹配的目标仿真链路时，直接从预设模型库中查找对应的模型并进行连接，并设置与目标信号链路一致的信号仿真参数和传输线长度，不仅可以快速获得目标仿真链路，还可以使得以目标仿真链路进行信号仿真所得的仿真结果与实际的目标信号链路更为匹配。如此，便可进一步缩短电路板设计的周期，提升电路板设计的信号质量。
另外，在进行信号质量评估过程中，利用预先设置的模型来搭建仿真链路，无需对信号链路的各个部分进行信号传输性能分析，可减轻开发测试人员的工作复杂度和工作量，进一步缩短开发测试时间。
需要说明是，上述步骤S103和步骤S104的执行顺序可进行调换，即相应于上述的描述步骤S103、步骤S104的顺序进行执行之外，还可以先执行步骤S104再执行步骤S103。为便于说明，下面仅针对其中的传输线模型为例进行说明。
在步骤S102中确定出目标信号链路对应的传输线模型包括stackup2_TOP_BOT_4mil_PCB之后，可以先将目标信号链路对应的实际板卡上走线长度设置到该模型中，然后再将该传输线模型与目标信号链路对应的各个模型进行连接。具体的，可以利用.lib′.\model\routing_lib.lib′stackup2_TOP_BOT_4mil_PCB指令，调用叠层为stackup2，布线层为top或bot层，宽度为4mil的信号线的单位长度模型。然后，可先将stackup2_TOP_BOT_4mil_PCB的模型长度设置为与实际板卡上走线的长度一致。具体的，可利用.param L_stackup2_TOP_BOT_4mil_PCB＝′L1*0.0254′指令，将模型长度更改为实际板卡上走线的长度。然后，再将stackup2_TOP_BOT_4mil_PCB与目标信号链路对应的其他模型，按照与目标信号链路中的各个模块一一对应的关系进行连接。具体的，可利用X_stackup2_TOP_BOT_4mil_PCB pkg_out in1 gnd Length stackup2_TOP_BOT_4mil_PCB＝L_stackup2_TOP_BOT_4mil_PCB指令，将传输线模型与发送端或者接收端芯片模型连接。
为便于本领域技术人员理解本发明实施例所提供的技术方案，下面以具体的信号链路信号质量评估测试为例，对本发明实施例所提供的技术方案进行详细说明。
具体的测试过程如下：
步骤1、据平台的叠层设计，搭建如上文所描述的模型库，以及链路仿真文档signal1.sp，此模型库和仿真链路文档可供后续的评估无限次使用。其中，链路仿真文档signal1.sp，为可实现对有模块建立的仿真信号链路进行信号仿真测试的链路仿真文档。
步骤2、分析需仿真链路的连接方式及确定叠层。例如，如图2所示的连接关系，其IC端的传输线的线宽为3mil，其它传输线的线宽为4mil，叠层为Stackup1。
步骤3、打开signal1.sp进行编辑，调用预先编译好的发送端和接收端模型，并将其中的信号和过孔模型按顺序分别替换为stackup1_TOP_BOT_3mil_IC，stackup1_TOP_L4_via，stackup1_L3_L4_4mil_PCB，stackup1_TOP_L3_via，stackup1_TOP_BOT_4mil_PCB，stackup1_TOP_BOT_via，stackup1_TOP_BOT_4mil_PCB，stackup1_TOP_BOT_3mil_IC；
步骤4、在signal1.sp中将步骤3中的传输线模型的L1用实际长度代替；
步骤5、在仿真文档signal1.sp中设置仿真信号参数，比如仿真时间，仿真精度，观测点等即可运行仿真文档signal1.sp，查看结果即可。
这样，即可完成信号链路质量的快速评估。利用上述步骤对信号链路进行信号测试，相对于现有的信号质量评估方法，具有以下优点：
1、对于固定的平台建立信号和过孔模型库，并建立链路仿真文档，需要仿真评估时直接将信号和过孔在链路仿真文档中将信号和过孔模型替换即可，可节省了仿真链路搭建和模型提取时间，提高了效率。
2、运用此方法，可加快产品设计周期，提高产品竞争力。
相应于上面的方法实施例，本发明实施例还提供了一种信号链路信号质量评估装置，下文描述的信号链路信号质量评估装置与上文描述的信号链路信号质量评估方法可相互对应参照。
参见图3所示，该装置包括以下模块：
目标信号链路获取模块101，用于获取待评估的目标信号链路；
模型查找模块102，用于在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；
仿真链路获取模块103，用于将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路；
目标仿真链路获取模块104，用于将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路；
信号质量评估结果获取模块105，用于利用目标仿真链路，获得与目标信号链路对应的信号质量评估结果。
应用本发明实施例所提供的装置，获取待评估的目标信号链路；在预设模型库中查找与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；将发送端模型、传输线模型、过孔模型和接收端模型进行连接，获得仿真链路；将目标信号链路对应的信号仿真参数和传输线长度输入至仿真链路中，获得目标仿真链路；利用目标仿真链路，获得与目标信号链路对应的信号质量评估结果。
在需要对设计出的目标信号链路进行信号质量评估时，可以在预先设置的模型库中查找出与目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型。并将发送端模型、传输线模型、过孔模型和接收端模型进行连接，形成仿真链路。然后，将目标信号链路中的信号仿真参数和传输线长度输入至仿真链路中，可获得与目标信号链路匹配的目标仿真链路。在该目标仿真链路进行信号仿真，可获得与目标信号链路对应的信号质量评估结果，即完成对目标信号链路的信号质量评估。由于在获取与目标信号链路匹配的目标仿真链路时，直接从预设模型库中查找对应的模型并进行连接，并设置与目标信号链路一致的信号仿真参数和传输线长度，不仅可以快速获得目标仿真链路，还可以使得以目标仿真链路进行信号仿真所得的仿真结果与实际的目标信号链路更为匹配。如此，便可进一步缩短电路板设计的周期，提升电路板设计的信号质量。
另外，在进行信号质量评估过程中，利用预先设置的模型来搭建仿真链路，无需对信号链路的各个部分进行信号传输性能分析，可减轻开发测 试人员的工作复杂度和工作量，进一步缩短开发测试时间。
在本发明的一种具体实施方式中，模型查找模块102，包括：
发送端模型查找单元，用于在预设模型库中查找与目标信号链路的发送端芯片对应的发送端模型；
传输线模型查找单元，用于在预设模型库中查找与目标信号链路的传输线宽匹配的传输线模型；
过孔模型查找单元，用于在预设模型库中查找与目标信号链路的过孔特征对应的过孔模型；
接收端模型查找单元，用于在预设模型库中查找与目标信号链路的接收端芯片对应的接收端模型。
在本发明的一种具体实施方式中，目标仿真链路获取模块104，包括：
信号仿真参数设置单元，用于将目标信号链路对应的信号仿真参数输入至仿真链路中；
传输线长度设置单元，用于按照目标信号链路对应的传输线长度，输入至传输线模型中，其中传输线模型为单位长度模型。
在本发明的一种具体实施方式中，还包括：
模型获取模块，用于在获取待评估的目标信号链路之前，获取发送端模型、传输线模型、过孔模型和接收端模型，并存入模型库中。
在本发明的一种具体实施方式中，模型获取模块，具体用于利用IMLC或ADS工具，为电路板中需评估的传输线，分别创建不同线宽分别对应的信号传输损耗的传输线模型。
在本发明的一种具体实施方式中，模型获取模块，具体用于分别建立不同连接层间的过孔对应的信号传输损耗的过孔模型。
在本发明的一种具体实施方式中，仿真链路获取模块103，具体用于将发送端模型、传输线模型、过孔模型和接收端模型进行按照与目标信号链路一一对应的关系进行连接，获得仿真链路。
相应于上面的方法实施例，本发明实施例还提供了一种信号链路信号质量评估设备，下文描述的一种信号链路信号质量评估设备与上文描述的 一种信号链路信号质量评估方法可相互对应参照。
参见图4所示，该信号链路信号质量评估设备包括：
存储器D1，用于存储计算机程序；
处理器D2，用于执行计算机程序时实现上述方法实施例的信号链路信号质量评估方法的步骤。
具体的，请参考图5，为本实施例提供的信号链路信号质量评估设备的一种具体结构示意图，该信号链路信号质量评估设备可因配置或性能不同而产生比较大的差异，可以包括一个或一个以上处理器(central processing units，CPU)322(例如，一个或一个以上处理器)和存储器332，一个或一个以上存储应用程序342或数据344的存储介质330(例如一个或一个以上海量存储设备)。其中，存储器332和存储介质330可以是短暂存储或持久存储。存储在存储介质330的程序可以包括一个或一个以上模块(图示没标出)，每个模块可以包括对数据处理设备中的一系列指令操作。更进一步地，中央处理器322可以设置为与存储介质330通信，在信号链路信号质量评估设备301上执行存储介质330中的一系列指令操作。
信号链路信号质量评估设备301还可以包括一个或一个以上电源326，一个或一个以上有线或无线网络接口350，一个或一个以上输入输出接口358，和/或，一个或一个以上操作系统341，例如Windows ServerTM，Mac OS XTM，UnixTM，LinuxTM，FreeBSDTM等等。
上面所描述的信号链路信号质量评估方法中的步骤可以由信号链路信号质量评估设备的结构实现。
相应于上面的方法实施例，本发明实施例还提供了一种可读存储介质，下文描述的一种可读存储介质与上文描述的一种信号链路信号质量评估方法可相互对应参照。
一种可读存储介质，可读存储介质上存储有计算机程序，计算机程序被处理器执行时实现上述方法实施例的信号链路信号质量评估方法的步骤。
该可读存储介质具体可以为U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁 碟或者光盘等各种可存储程序代码的可读存储介质。
专业人员还可以进一步意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、计算机软件或者二者的结合来实现，为了清楚地说明硬件和软件的可互换性，在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。

Claims (10)

  1. 一种信号链路信号质量评估方法，其特征在于，包括：
    获取待评估的目标信号链路；
    在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；
    将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路；
    将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路；
    利用所述目标仿真链路，获得与所述目标信号链路对应的信号质量评估结果。
  2. 根据权利要求1所述的信号链路信号质量评估方法，其特征在于，所述在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型，包括：
    在预设模型库中查找与所述目标信号链路的发送端芯片对应的发送端模型；
    在所述预设模型库中查找与所述目标信号链路的传输线宽匹配的传输线模型；
    在所述预设模型库中查找与所述目标信号链路的过孔特征对应的过孔模型；
    在所述预设模型库中查找与所述目标信号链路的接收端芯片对应的接收端模型。
  3. 根据权利要求1所述的信号链路信号质量评估方法，其特征在于，将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路，包括：
    将所述目标信号链路对应的信号仿真参数输入至所述仿真链路中；
    按照所述目标信号链路对应的传输线长度，输入至所述传输线模型中，其中所述传输线模型为单位长度模型。
  4. 根据权利要求1所述的信号链路信号质量评估方法，其特征在于，在所述获取待评估的目标信号链路之前，还包括：
    获取发送端模型、传输线模型、过孔模型和接收端模型，并存入模型库中。
  5. 根据权利要求4所述的信号链路信号质量评估方法，其特征在于，获取传输线模型，包括：
    利用IMLC或ADS工具，为电路板中需评估的传输线，分别创建不同线宽分别对应的信号传输损耗的传输线模型。
  6. 根据权利要求4所述的信号链路信号质量评估方法，其特征在于，获取过孔模型，包括：
    分别建立不同连接层间的过孔对应的信号传输损耗的过孔模型。
  7. 根据权利要求1至6任一项所述的信号链路信号质量评估方法，其特征在于，所述将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路，包括：
    将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行按照与所述目标信号链路一一对应的关系进行连接，获得仿真链路。
  8. 一种信号链路信号质量评估装置，其特征在于，包括：
    目标信号链路获取模块，用于获取待评估的目标信号链路；
    模型查找模块，用于在预设模型库中查找与所述目标信号链路匹配的发送端模型、传输线模型、过孔模型和接收端模型；
    仿真链路获取模块，用于将所述发送端模型、所述传输线模型、所述过孔模型和所述接收端模型进行连接，获得仿真链路；
    目标仿真链路获取模块，用于将所述目标信号链路对应的信号仿真参数和传输线长度输入至所述仿真链路中，获得目标仿真链路；
    信号质量评估结果获取模块，用于利用所述目标仿真链路，获得与所述目标信号链路对应的信号质量评估结果。
  9. 一种信号链路信号质量评估设备，其特征在于，包括：
    存储器，用于存储计算机程序；
    处理器，用于执行所述计算机程序时实现如权利要求1至7任一项所述信号链路信号质量评估方法的步骤。
  10. 一种可读存储介质，其特征在于，所述可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求1至7任一项 所述信号链路信号质量评估方法的步骤。
PCT/CN2019/089277 2018-08-22 2019-05-30 信号链路信号质量评估方法、装置、设备及可读存储介质 WO2020038040A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810960100.7 2018-08-22
CN201810960100.7A CN109086546B (zh) 2018-08-22 2018-08-22 信号链路信号质量评估方法、装置、设备及可读存储介质

Publications (1)

Publication Number Publication Date
WO2020038040A1 true WO2020038040A1 (zh) 2020-02-27

Family

ID=64794174

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/089277 WO2020038040A1 (zh) 2018-08-22 2019-05-30 信号链路信号质量评估方法、装置、设备及可读存储介质

Country Status (2)

Country Link
CN (1) CN109086546B (zh)
WO (1) WO2020038040A1 (zh)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112001139A (zh) * 2020-08-14 2020-11-27 浪潮电子信息产业股份有限公司 一种pcb的选择方法、系统及装置
CN113221376A (zh) * 2021-05-31 2021-08-06 山东英信计算机技术有限公司 一种服务器线缆选型的方法、装置、设备及可读介质
CN114706718A (zh) * 2022-03-31 2022-07-05 浪潮(山东)计算机科技有限公司 一种PCIe信号完整性验证方法、装置、设备及介质
CN114757225A (zh) * 2022-03-31 2022-07-15 北京百度网讯科技有限公司 信号采样质量的确定方法、装置、设备及存储介质
CN117692940A (zh) * 2024-02-04 2024-03-12 北京大业桥科技股份有限公司 一种基于微波链路的微波系统性能检测方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109086546B (zh) * 2018-08-22 2021-10-29 郑州云海信息技术有限公司 信号链路信号质量评估方法、装置、设备及可读存储介质
CN110888040A (zh) * 2019-11-28 2020-03-17 苏州长风航空电子有限公司 一种信号链路故障模拟测试方法
CN112069767B (zh) * 2020-08-28 2022-06-14 苏州浪潮智能科技有限公司 一种传输线布线长度预估方法、装置、设备和介质
CN114492291B (zh) * 2022-04-06 2022-07-15 飞腾信息技术有限公司 高速串行链路的设计方法、装置、电子设备及存储介质
CN115209433B (zh) * 2022-07-22 2023-07-21 大连市共进科技有限公司 基站高频信号仿真方法、装置、终端设备和可读存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020142728A1 (en) * 2001-04-02 2002-10-03 Alcatel Method for evaluating a radio link quality indicator in a wireless communication network and corresponding receiver
CN105404754A (zh) * 2015-12-09 2016-03-16 浪潮电子信息产业股份有限公司 一种基于power影响评估si信号质量的方法
CN106126799A (zh) * 2016-06-20 2016-11-16 浪潮(北京)电子信息产业有限公司 一种无源仿真链路构建系统及方法
CN109086546A (zh) * 2018-08-22 2018-12-25 郑州云海信息技术有限公司 信号链路信号质量评估方法、装置、设备及可读存储介质

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06194415A (ja) * 1992-09-30 1994-07-15 American Teleph & Telegr Co <Att> 論理回路の試験方法とその装置
CN103954886A (zh) * 2014-04-24 2014-07-30 华南理工大学 一种时域反射法电缆故障定位仿真方法
US9864827B1 (en) * 2015-10-14 2018-01-09 Cadence Design Systems, Inc. System and method for modeling electronic circuit designs
CN105930601B (zh) * 2016-04-29 2019-03-29 中国人民解放军国防科学技术大学 一种基于查找表的ddr时序及延时偏斜仿真评估方法
CN107590338B (zh) * 2017-09-14 2020-08-04 深圳市一博科技股份有限公司 一种拟合传输线阻抗上漂的数学模型的方法
CN107944112A (zh) * 2017-11-16 2018-04-20 郑州云海信息技术有限公司 一种快速评估系统高速链路风险点的方法及系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020142728A1 (en) * 2001-04-02 2002-10-03 Alcatel Method for evaluating a radio link quality indicator in a wireless communication network and corresponding receiver
CN105404754A (zh) * 2015-12-09 2016-03-16 浪潮电子信息产业股份有限公司 一种基于power影响评估si信号质量的方法
CN106126799A (zh) * 2016-06-20 2016-11-16 浪潮(北京)电子信息产业有限公司 一种无源仿真链路构建系统及方法
CN109086546A (zh) * 2018-08-22 2018-12-25 郑州云海信息技术有限公司 信号链路信号质量评估方法、装置、设备及可读存储介质

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112001139A (zh) * 2020-08-14 2020-11-27 浪潮电子信息产业股份有限公司 一种pcb的选择方法、系统及装置
CN113221376A (zh) * 2021-05-31 2021-08-06 山东英信计算机技术有限公司 一种服务器线缆选型的方法、装置、设备及可读介质
CN113221376B (zh) * 2021-05-31 2023-08-08 山东英信计算机技术有限公司 一种服务器线缆选型的方法、装置、设备及可读介质
CN114706718A (zh) * 2022-03-31 2022-07-05 浪潮(山东)计算机科技有限公司 一种PCIe信号完整性验证方法、装置、设备及介质
CN114757225A (zh) * 2022-03-31 2022-07-15 北京百度网讯科技有限公司 信号采样质量的确定方法、装置、设备及存储介质
CN114757225B (zh) * 2022-03-31 2023-05-30 北京百度网讯科技有限公司 信号采样质量的确定方法、装置、设备及存储介质
CN114706718B (zh) * 2022-03-31 2023-12-08 浪潮(山东)计算机科技有限公司 一种PCIe信号完整性验证方法、装置、设备及介质
CN117692940A (zh) * 2024-02-04 2024-03-12 北京大业桥科技股份有限公司 一种基于微波链路的微波系统性能检测方法
CN117692940B (zh) * 2024-02-04 2024-04-26 北京大业桥科技股份有限公司 一种基于微波链路的微波系统性能检测方法

Also Published As

Publication number Publication date
CN109086546A (zh) 2018-12-25
CN109086546B (zh) 2021-10-29

Similar Documents

Publication Publication Date Title
WO2020038040A1 (zh) 信号链路信号质量评估方法、装置、设备及可读存储介质
JP6168536B2 (ja) Ｓｍｔ装置の高速プロセスシステム及び方法
US7559045B2 (en) Database-aided circuit design system and method therefor
CN111950225B (zh) 一种芯片布局方法、装置、存储介质和电子设备
EP2517182A2 (en) An improved computer-implemented method of geometric feature detection
US20150026651A1 (en) Preventing double patterning odd cycles
CN104765822A (zh) 电子器件三维数据库系统及其应用
CN109241681A (zh) 回流焊的仿真优化方法、系统、计算机存储介质及设备
US7424690B2 (en) Interconnect integrity verification
CN109492310B (zh) 一种线路检查的方法及检查装置
US10691868B1 (en) Process for analyzing printed circuit board and packaging manufacturing design rules
US10176288B1 (en) System and method for placing components in an electronic circuit design
US9256707B2 (en) Trace routing according to freeform sketches
CN107133377A (zh) 螺栓连接的建模方法和装置
US8464200B1 (en) Thermal relief optimization
CN111257723B (zh) 一种背钻的检查方法、系统、设备以及介质
US7185296B2 (en) Method of extraction of wire capacitances in LSI device having diagonal wires and extraction program for same
US20070276770A1 (en) Method and system for predicting shrinkable yield for business assessment of integrated circuit design shrink
US8566773B2 (en) Thermal relief automation
CN116306486B (zh) 芯片设计的设计规则检查方法及相关设备
CN115081389B (zh) 一种印刷电路板走线检查方法、装置、设备、存储介质
CN113705143A (zh) 一种自动化仿真系统和自动化仿真方法
CN116011955A (zh) 一种机器人流程自动化需求实现方法、装置、设备和存储介质
US11720726B1 (en) Systems and methods of simulating drop shock reliability of solder joints with a multi-scale model
CN110852035B (zh) 可自主学习的pcb设计平台

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19851954

Country of ref document: EP

Kind code of ref document: A1