WO2020082961A1 - 导线结构、显示面板、显示装置和制造方法 - Google Patents

导线结构、显示面板、显示装置和制造方法 Download PDF

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Publication number
WO2020082961A1
WO2020082961A1 PCT/CN2019/107458 CN2019107458W WO2020082961A1 WO 2020082961 A1 WO2020082961 A1 WO 2020082961A1 CN 2019107458 W CN2019107458 W CN 2019107458W WO 2020082961 A1 WO2020082961 A1 WO 2020082961A1
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Prior art keywords
layer
wire
conductive layer
thermally conductive
display panel
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PCT/CN2019/107458
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English (en)
French (fr)
Inventor
彭利满
刘祺
张倩倩
薛智勇
吴岩
杨津
张国苹
徐海峰
黎文秀
王磊
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Priority to US16/756,144 priority Critical patent/US11489033B2/en
Publication of WO2020082961A1 publication Critical patent/WO2020082961A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/87—Arrangements for heating or cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present disclosure relates to the field of display technology, and particularly to a wire structure for a display panel, a display panel, a display device, and a manufacturing method.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • the AMOLED mainly emits light by current driving, so the required driving circuit is relatively complicated. Such a complicated circuit structure increases the difficulty of the process and will increase the occurrence of some undesirable risks.
  • TFT Thin Film Transistor, thin film transistor
  • uneven characteristics of TFT may cause bright spots. That is, when a certain pixel is displayed, it is brighter than surrounding pixels, which is a bright spot visually.
  • an aging process can be performed after the display panel is completed to eliminate such problems of poor display.
  • a high voltage needs to be applied to the inside of the display panel (for example, the power supply voltage VDD is applied as 15V, and the high potential is applied as 20V).
  • a wire structure for a display panel including: a first wire layer; and a thermally conductive layer above the first wire layer, wherein the thermal conductivity of the thermally conductive layer Greater than the thermal conductivity of the first wire layer.
  • the wire structure further includes: a first insulating layer between the first wire layer and the thermally conductive layer.
  • the thermal conductivity of the thermally conductive layer is greater than 200 W / (m ⁇ K).
  • the material of the thermally conductive layer includes at least one of aluminum, copper, gold, and silver.
  • the orthographic projection of the first wire layer on the plane of the thermally conductive layer and the orthographic projection of the thermally conductive layer on the plane of the thermally conductive layer at least partially overlap.
  • the first conductive layer is electrically connected to the gate of the thin film transistor of the display panel.
  • the first wire layer includes a plurality of first wire portions spaced apart in the same layer, wherein the thermally conductive layer is above the plurality of first wire portions.
  • the orthographic projection of the plurality of first conducting wire portions on the plane where the thermally conductive layer is located and the orthographic projection of the thermally conductive layer on the plane where the thermally conductive layer is located at least partially overlap.
  • the wire structure further includes: a second insulating layer on a side of the heat conductive layer facing away from the first wire layer; and a side of the second insulating layer facing away from the heat conductive layer A second wire layer on one side, wherein the second wire layer is electrically connected to the source or drain of the thin film transistor of the display panel.
  • a display panel including: the wire structure as described above.
  • a display device including: the display panel as described above.
  • a method for manufacturing a wire structure for a display panel including: forming a first wire layer; and forming a thermally conductive layer above the first wire layer, wherein The thermal conductivity of the thermal conductive layer is greater than the thermal conductivity of the first wire layer.
  • the step of forming a thermally conductive layer above the first wire layer includes: forming a first insulating layer on the first wire layer; and away from the first wire on the first insulating layer One side of the layer forms a thermally conductive layer.
  • the material of the thermally conductive layer includes at least one of aluminum, copper, gold, and silver.
  • the step of forming the first wire layer includes forming a first wire layer electrically connected to the gate of the thin film transistor of the display panel.
  • a plurality of spaced first wire portions are formed in the same layer; wherein, the thermally conductive layer is formed on the plurality of first wire portions Above.
  • the manufacturing method further includes: forming a second insulating layer on a side of the thermally conductive layer facing away from the first wire layer; and forming a second insulating layer on the side of the second insulating layer facing away from the thermal conductive layer A second wire layer is formed on one side, wherein the second wire layer is electrically connected to the source or drain of the thin film transistor of the display panel.
  • the manufacturing method further includes: forming a second wire layer on a side of the first insulating layer facing away from the first wire layer, the second wire layer and the thin film transistor of the display panel The source electrode or the drain electrode is electrically connected; wherein, the heat conductive layer is formed during the process of forming the second wire layer.
  • FIG. 1A is a cross-sectional view showing a wire structure for a display panel according to an embodiment of the present disclosure
  • FIG. 1B is a cross-sectional view illustrating a wire structure for a display panel according to another embodiment of the present disclosure
  • FIG. 2 is a cross-sectional view showing a wire structure for a display panel according to another embodiment of the present disclosure
  • FIG. 3 is a top view showing a wire structure for a display panel according to an embodiment of the present disclosure
  • FIG. 4 is a flowchart illustrating a method of manufacturing a wire structure for a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a cross-sectional view showing the structure of a stage in the manufacturing process of a wire structure for a display panel according to an embodiment of the present disclosure
  • FIG. 6 is a cross-sectional view showing a structure at a stage in a manufacturing process of a wire structure for a display panel according to an embodiment of the present disclosure
  • FIG. 7 is a cross-sectional view showing a structure at a stage in the manufacturing process of a wire structure for a display panel according to an embodiment of the present disclosure.
  • a specific device when it is described that a specific device is located between the first device and the second device, there may or may not be an intervening device between the specific device and the first device or the second device.
  • the specific device When it is described that a specific device is connected to another device, the specific device may be directly connected to the other device without intervening devices, or may be directly connected to the other device without intervening devices.
  • the inventor of the present disclosure has found that after applying a high voltage to the inside of the display panel, some of the wire regions to which the high voltage is input cannot be dissipated due to large instantaneous heat, causing burns or peeling off of the inorganic layer above the metal wires. During the appearance inspection, you will find that there is a burn problem.
  • the power supply voltage Vdd as a high voltage (for example, 10-20V).
  • the high voltage applied to the wire may cause the wire to burn.
  • the insulating layer eg, Planarization Layer (PLN) and / or Pixel Definition Layer (PDL)
  • PDL Pixel Definition Layer
  • the material of the gate wire is metal Mo, and the thermal conductivity of Mo is small (Mo has a thermal conductivity of 138W / (m ⁇ K) (watts / (m ⁇ Kelvin)). In the case of voltage, more heat is generated on the wire, and it cannot be dissipated in a very short time, causing the insulation layer above it to fall off due to heat.
  • the inventors of the present disclosure further researched and found that after the high voltage is applied to the wires electrically connected to the source or the drain (correspondingly, the source wires or the drain wires), the insulating layer (eg flat Chemical layer and / or pixel-defining layer) are not prone to falling off, that is, no burn problem occurs.
  • the material of the source wire or the drain wire is metal Al, and Al has a large thermal conductivity (Al has a thermal conductivity of 237 W / (m ⁇ K)).
  • Al has a thermal conductivity of 237 W / (m ⁇ K)
  • the embodiments of the present disclosure provide a wire structure for a display panel, so as to improve the heat dissipation effect and reduce the problem of burning or peeling of the planarization layer and / or the pixel defining layer.
  • the wire structure according to some embodiments of the present disclosure will be described in detail below with reference to the drawings.
  • FIG. 1A is a cross-sectional view illustrating a wire structure for a display panel according to an embodiment of the present disclosure.
  • the wire structure may include a first wire layer 101 and a thermally conductive layer 121 above the first wire layer 101.
  • the thermal conductivity of the thermal conductive layer 121 is greater than the thermal conductivity of the first conductive layer 101.
  • the first conductive layer 101 may be electrically connected to the gate (not shown) of the thin film transistor of the display panel.
  • the thermal conductive layer may be a metal cushion layer.
  • FIG. 1A also shows the planarization layer 103 on the thermally conductive layer 121 and the pixel defining layer 104 on the planarization layer 103.
  • the heat generated by the high voltage applied to the first wire layer can be dissipated relatively quickly.
  • the insulating layer (such as the planarization layer and / or the pixel defining layer) above the first wire layer may burn or peel off.
  • the wire structure does not affect the display of the pixel area inside the display panel.
  • the wire structure may further include a first insulating layer 111 between the first wire layer 101 and the thermal conductive layer 121.
  • the material of the first insulating layer 111 may include silicon oxide or silicon nitride. In this way, it is possible to prevent the thermal conductive layer from being short-circuited to the different first wire layers, thereby preventing the short-circuit between the different first wire layers.
  • the first insulating layer 111 may not be provided between the first conductive layer 101 and the thermal conductive layer 121, that is, the thermal conductive layer 121 may be on the surface of the first conductive layer 101, as long as the thermal conductive layer is not It only needs to be in contact with other first wire layers.
  • the "above” may be a guide to the heat layer 121 to be located above the first wire layer 101 in a non-contact manner
  • the thermal layer 121 may be directed to be located on the surface of the first wire layer 101 in direct contact.
  • the material of the first wire layer may include molybdenum (Mo).
  • Mo molybdenum
  • the thermal conductivity of molybdenum is 138W / (m ⁇ K).
  • the thermal conductivity of the thermally conductive layer 121 is greater than 200 W / (m ⁇ K).
  • the material of the heat conductive layer may include at least one of aluminum (Al), copper (Cu), gold (Au), and silver (Ag).
  • the thermal conductivity of aluminum is 237W / (m ⁇ K)
  • the thermal conductivity of copper is 401W / (m ⁇ K)
  • the thermal conductivity of gold is 317W / (m ⁇ K)
  • the thermal conductivity of silver is 429W / (m ⁇ K) ).
  • the thermal conductivity of the thermally conductive layer of the embodiments of the present disclosure does not have to be greater than 200 W / (m ⁇ K).
  • the thermal conductivity may be less than 200 W / (m ⁇ K), as long as it is greater than the thermal conductivity of the first wire layer (for example, molybdenum).
  • the material of the thermal conductive layer may include tungsten (W), magnesium (Mg), or the like.
  • the thermal conductivity of tungsten is 180 W / (m ⁇ K), and the thermal conductivity of magnesium is 156 W / (m ⁇ K).
  • the orthographic projection of the first conductive layer 101 on the plane of the thermal conductive layer 121 and the orthographic projection of the thermal conductive layer 121 on the plane of the thermal conductive layer 121 at least partially overlap.
  • the orthographic projection of the first conductive layer 101 on the plane where the thermal conductive layer 121 is located may be located inside the orthographic projection of the thermal conductive layer 121 on the plane where the thermal conductive layer 121 is located.
  • FIG. 1B is a cross-sectional view illustrating a wire structure for a display panel according to another embodiment of the present disclosure.
  • This FIG. 1B shows the first wire layer 101, the heat conductive layer 121, the first insulating layer 111, the planarization layer 103, and the pixel defining layer 104.
  • the first wire layer 101 may include a plurality of first wire portions 1011 spaced apart in the same layer.
  • the display panel may include a plurality of thin film transistors, and the gate of each thin film transistor may be connected to a corresponding first lead portion. That is, the gates of the plurality of thin film transistors may be connected to the plurality of first lead portions in a one-to-one correspondence. Therefore, the wire structure may include a plurality of first wire portions on the same layer.
  • the heat conductive layer 121 is above the plurality of first lead portions 1011.
  • an integral heat-conducting layer may be provided above the plurality of first lead portions, which is relatively simple and convenient in manufacturing.
  • a thermally conductive layer may also be provided above each of the plurality of first lead portions.
  • the orthographic projections of the first conductive wire portions 1011 on the plane where the thermal conductive layer 121 is located at least partially overlap with the orthographic projections of the thermal conductive layer 121 on the plane where the thermal conductive layer 121 is located.
  • the orthographic projections of the plurality of first conductive wire portions 1011 on the plane where the thermal conductive layer 121 is located may be located inside the orthographic projections of the thermal conductive layer 121 on the plane where the thermal conductive layer 121 is located.
  • the wire structure shown in FIG. 2 may include a first wire layer 101, a thermally conductive layer 121 and a first insulating layer 111.
  • the planarization layer 103 and the pixel defining layer 104 are also shown in FIG. 2.
  • the wire structure may further include a second insulating layer 212 on a side of the thermal conductive layer 121 facing away from the first wire layer 101.
  • the second insulating layer 212 is on the thermal conductive layer 121.
  • the material of the second insulating layer 212 may include silicon oxide or silicon nitride.
  • the wire structure may further include a second wire layer 202 on a side of the second insulating layer 212 facing away from the thermal conductive layer 121.
  • the second conductive layer 202 is on the second insulating layer 212.
  • the second insulating layer 212 is between the heat conductive layer 121 and the second wire layer 202.
  • the second conductive layer 202 is electrically connected to the source or drain (not shown) of the thin film transistor of the display panel.
  • the material of the second wire layer may include metals such as aluminum.
  • FIG. 2 shows the case where the second wire layer and the thermal conductive layer are in different layers.
  • the second wire layer and the heat conductive layer may be in the same layer, and the second wire layer is separated from the heat conductive layer. In this way, a heat conduction layer can also be formed during the formation of the second wire layer, which simplifies the manufacturing process.
  • FIG. 3 is a top view illustrating a wire structure for a display panel according to an embodiment of the present disclosure.
  • FIG. 2 is a cross-sectional view of the structure taken along line A-A 'in FIG. 3.
  • a first wire layer 101, a heat conductive layer 121, and two second wire layers 202 are shown.
  • the edge of the first wire layer 101 is shown by a dotted line, indicating that the first wire layer 101 is below the thermal conductive layer 121.
  • the thermal conductive layer 121 may be an integral metal layer, which is more convenient in manufacturing.
  • FIG. 3 also shows the first connector 331 connected to the first wire layer 101 and the second connector 332 connected to the second wire layer 202.
  • the first connector 331 and the second connector 332 are used to receive voltages, respectively.
  • a display panel is also provided.
  • the display panel may include the wire structure as described above, for example, as shown in FIG. 1A or FIG. 2.
  • a display device may include the display panel as described above.
  • the display device may include a display, a mobile phone, a tablet computer, or a notebook computer.
  • the manufacturing method may include steps S402 to S404.
  • step S402 a first wire layer is formed.
  • this step S402 may include: forming a first wire layer electrically connected to the gate of the thin film transistor of the display panel.
  • the first wire layer may be formed on the substrate through processes such as deposition and patterning.
  • a thermally conductive layer is formed above the first wire layer.
  • the thermal conductivity of the thermally conductive layer is greater than the thermal conductivity of the first wire layer.
  • the material of the thermal conductive layer may include at least one of aluminum, copper, gold, and silver.
  • this step S404 may include: forming a first insulating layer on the first wire layer; and forming a thermally conductive layer on a side of the first insulating layer facing away from the first wire layer.
  • a method for manufacturing a wire structure for a display panel according to some embodiments of the present disclosure is provided.
  • the heat generated by the high voltage applied to the first wire layer can be dissipated relatively quickly, which can improve the heat dissipation effect of the wire structure and reduce the The insulation layer above a wire layer may burn or peel off.
  • a plurality of spaced apart first wire portions are formed in the same layer.
  • the thermally conductive layer is formed above the plurality of first lead portions.
  • an integral heat conduction layer may be formed above the plurality of first wire portions.
  • a patterning process may be performed on the thermally conductive layer, so that an active region including a transistor or the like does not include the thermally conductive layer, but the thermally conductive layer remains above the plurality of first conductive wire portions.
  • the manufacturing method may further include: forming a second insulating layer on a side of the thermally conductive layer facing away from the first wire layer.
  • a second insulating layer is formed on the surface of the thermally conductive layer.
  • the manufacturing method may further include: forming a second wire layer on a side of the second insulating layer facing away from the heat conductive layer.
  • a second wire layer is formed on the surface of the second insulating layer.
  • the second wire layer is electrically connected to the source or drain of the thin film transistor of the display panel.
  • the second wire layer may be a source wire or a drain wire.
  • a second conductive layer is formed on a side of the first insulating layer facing away from the first conductive layer, and the second conductive layer is electrically connected to the source or drain of the thin film transistor of the display panel.
  • a thermally conductive layer is formed in the process of forming the second wire layer. In this way, the second wire layer and the heat conductive layer are on the same layer and are isolated from each other.
  • the reticle of the second wire layer can be modified to form a thermal conductive layer in the same layer as these second wire layers during the formation of the second wire layer
  • the heat conducting layer is located above the first wire layer. This can simplify the process.
  • FIGS. 5 to 7 are cross-sectional views illustrating structures at several stages in the manufacturing process of a wire structure for a display panel according to some embodiments of the present disclosure.
  • the manufacturing process of the wire structure according to some embodiments of the present disclosure will be described in detail below with reference to FIGS. 5 to 7 and FIG. 2.
  • a first wire layer 101 is formed on a substrate (not shown).
  • the first conductive layer 101 may be electrically connected to the gate (not shown) of the thin film transistor of the display panel.
  • the first insulating layer 111 is formed on the first wire layer 101 by, for example, a deposition process.
  • the first insulating layer 111 covers the first conductive layer 101.
  • the material of the first insulating layer 111 may include silicon oxide or silicon nitride.
  • a thermally conductive layer 121 is formed on the side of the first insulating layer 111 facing away from the first wire layer 101 by, for example, deposition and patterning.
  • a second insulating layer 212 is formed on the side of the thermally conductive layer 121 facing away from the first wire layer 101.
  • the material of the second insulating layer 212 may include silicon oxide or silicon nitride.
  • a second wire layer 202 is formed on the side of the second insulating layer 212 facing away from the heat conductive layer 121.
  • a planarization layer 103 covering the second conductive layer 202 is formed, and a pixel defining layer 104 is formed on the planarization layer 103, thereby forming the structure shown in FIG.
  • a method for manufacturing a wire structure for a display panel is provided.
  • the heat conducting layer above the first wire layer, the heat generated by the first wire layer due to the application of the high voltage can be relatively quickly dissipated during the aging process of the thin film transistor.
  • the heat dissipation effect of the wire structure can be improved, and the problem that the planarization layer and / or the pixel defining layer may burn or peel off may be reduced.
  • the manufacturing method is relatively simple and easy to implement.

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  • Physics & Mathematics (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

一种用于显示面板的导线结构、显示面板、显示装置和制造方法。导线结构包括第一导线层（101）和在第一导线层（101）上方的导热层（121）。导热层（121）的导热系数大于第一导线层（101）的导热系数。可以提高导线结构的散热效果，减少在第一导线层（101）上方的绝缘层可能灼伤或剥落的问题。

Description

导线结构、显示面板、显示装置和制造方法
相关申请的交叉引用
本申请是以CN申请号为201811229077.0，申请日为2018年10月22日的申请为基础，并主张其优先权，该CN申请的公开内容在此作为整体引入本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种用于显示面板的导线结构、显示面板、显示装置和制造方法。
背景技术
AMOLED(Active Matrix Organic Light Emitting Diode，主动矩阵有机发光二极管)为主动发光器件。该AMOLED主要通过电流驱动方式发光，因此所需要的驱动电路比较复杂。这样复杂的电路结构增加了工艺的难度，将会增加一些不良风险的发生。
例如，由TFT(Thin Film Transistor，薄膜晶体管)特性不均等可能会引起亮点问题。即，某一个像素在显示时，比周围像素更亮，在视觉上就是一个亮点。针对该问题，可以在显示面板完成后，进行老化工艺以消除此类显示不良的问题。在对TFT进行老化处理的过程中，需要向显示面板内部施加高电压(例如，电源电压VDD被施加为15V，高电位被施加为20V)。
发明内容
根据本公开实施例的一个方面，提供了一种用于显示面板的导线结构，包括：第一导线层；以及在所述第一导线层上方的导热层，其中，所述导热层的导热系数大于所述第一导线层的导热系数。
在一些实施例中，所述导线结构还包括：在所述第一导线层与所述导热层之间的第一绝缘层。
在一些实施例中，所述导热层的导热系数大于200W/(m·K)。
在一些实施例中，所述导热层的材料包括铝、铜、金和银中的至少一种。
在一些实施例中，所述第一导线层在所述导热层所在平面上的正投影与所述导热 层在所述导热层所在平面上的正投影至少部分重叠。
在一些实施例中，所述第一导线层与显示面板的薄膜晶体管的栅极电连接。
在一些实施例中，所述第一导线层包括处于同一层的间隔开的多个第一导线部，其中，所述导热层在所述多个第一导线部的上方。
所述多个第一导线部在所述导热层所在平面上的正投影与所述导热层在所述导热层所在平面上的正投影至少部分重叠。
在一些实施例中，所述导线结构还包括：在所述导热层的背离所述第一导线层的一侧的第二绝缘层；和在所述第二绝缘层的背离所述导热层的一侧的第二导线层，其中，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。
根据本公开实施例的另一个方面，提供了一种显示面板，包括：如前所述的导线结构。
根据本公开实施例的另一个方面，提供了一种显示装置，包括：如前所述的显示面板。
根据本公开实施例的另一个方面，提供了一种用于显示面板的导线结构的制造方法，包括：形成第一导线层；以及在所述第一导线层的上方形成导热层，其中，所述导热层的导热系数大于所述第一导线层的导热系数。
在一些实施例中，所述第一导线层的上方形成导热层的步骤包括：在所述第一导线层上形成第一绝缘层；以及在所述第一绝缘层的背离所述第一导线层的一侧形成导热层。
在一些实施例中，所述导热层的材料包括铝、铜、金和银中的至少一种。
在一些实施例中，形成第一导线层的步骤包括：形成与显示面板的薄膜晶体管的栅极电连接的第一导线层。
在一些实施例中，在形成所述第一导线层的过程中，形成处于同一层的间隔开的多个第一导线部；其中，所述导热层形成在所述多个第一导线部的上方。
在一些实施例中，所述制造方法还包括：在所述导热层的背离所述第一导线层的一侧形成第二绝缘层；和在所述第二绝缘层的背离所述导热层的一侧形成第二导线层，其中，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。
在一些实施例中，所述制造方法还包括：在所述第一绝缘层的背离所述第一导线层的一侧形成第二导线层，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接；其中，在形成所述第二导线层的过程中形成所述导热层。
通过以下参照附图对本公开的示例性实施例的详细描述，本公开的其它特征及其优点将会变得清楚。
附图说明
构成说明书的一部分的附图描述了本公开的实施例，并且连同说明书一起用于解释本公开的原理。
参照附图，根据下面的详细描述，可以更加清楚地理解本公开，其中：
图1A是示出根据本公开一个实施例的用于显示面板的导线结构的截面图；
图1B是示出根据本公开另一个实施例的用于显示面板的导线结构的截面图；
图2是示出根据本公开另一个实施例的用于显示面板的导线结构的截面图；
图3是示出根据本公开一个实施例的用于显示面板的导线结构的顶视图；
图4是示出根据本公开一个实施例的用于显示面板的导线结构的制造方法的流程图；
图5是示出根据本公开一个实施例的用于显示面板的导线结构的制造过程中一个阶段的结构的截面图；
图6是示出根据本公开一个实施例的用于显示面板的导线结构的制造过程中一个阶段的结构的截面图；
图7是示出根据本公开一个实施例的用于显示面板的导线结构的制造过程中一个阶段的结构的截面图。
应当明白，附图中所示出的各个部分的尺寸并不必须按照实际的比例关系绘制。此外，相同或类似的参考标号表示相同或类似的构件。
具体实施方式
现在将参照附图来详细描述本公开的各种示例性实施例。对示例性实施例的描述仅仅是说明性的，决不作为对本公开及其应用或使用的任何限制。本公开可以以许多不同的形式实现，不限于这里所述的实施例。提供这些实施例是为了使本公开透彻且完整，并且向本领域技术人员充分表达本公开的范围。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、材料的组分、数字表达式和数值应被解释为仅仅是示例性的，而不是作为限制。
本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或 者重要性，而只是用来区分不同的部分。“包括”或者“包含”等类似的词语意指在该词前的要素涵盖在该词后列举的要素，并不排除也涵盖其他要素的可能。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在本公开中，当描述到特定器件位于第一器件和第二器件之间时，在该特定器件与第一器件或第二器件之间可以存在居间器件，也可以不存在居间器件。当描述到特定器件连接其它器件时，该特定器件可以与所述其它器件直接连接而不具有居间器件，也可以不与所述其它器件直接连接而具有居间器件。
本公开使用的所有术语(包括技术术语或者科学术语)与本公开所属领域的普通技术人员理解的含义相同，除非另外特别定义。还应当理解，在诸如通用字典中定义的术语应当被解释为具有与它们在相关技术的上下文中的含义相一致的含义，而不应用理想化或极度形式化的意义来解释，除非这里明确地这样定义。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
本公开的发明人发现，在向显示面板内部施加高电压后，对于被输入高电压的一些导线区域，由于瞬间热量较大，无法散掉，对金属导线上方的无机层产生灼伤或剥落。在外观检测时就会发现有烧伤问题。
例如，在AMOLED产品上，在TFT老化处理的过程中，通常需要将电源电压Vdd施加为高电压(例如10-20V)。在一些导线区域，例如对于与薄膜晶体管的栅极电连接的导线(可以简称为栅极导线)，施加到该导线上的高电压会造成导线灼伤。本公开的发明人研究发现，在灼伤位置，在导线上方的绝缘层(例如，平坦化层(Planarization layer，简称为PLN)和/或像素界定层(Pixel Definition Layer，简称为PDL))可能会发生脱落。这主要是由于栅极导线的材料是金属Mo，而Mo的导热系数较小(Mo的导热系数为138W/(m·K)(瓦/(米·开尔文))。在向栅极导线输入高电压的情况下，导线上产生比较多的热量，而且在极短时间内无法散失掉，导致其上面的绝缘层受热发生脱落。
本公开的发明人进一步研究发现，与源极或漏极电连接的导线(相应地，可以简称为源极导线或漏极导线)在被施加高电压后，这些导线上方的绝缘层(例如平坦化层和/或像素界定层)不容易发生脱落，即没有发生灼伤问题。这是由于源极导线或漏极导线的材料为金属Al，而Al的导热系数较大(Al的导热系数为237W/(m·K))。 热量能够通过金属Al较快地散失掉，从而对导线上方的绝缘层的损伤较小。因此，在源极导线或漏极导线上方的绝缘层不容易发生脱落。
鉴于此，本公开的实施例提供了一种用于显示面板的导线结构，从而提高散热效果，减少平坦化层和/或像素界定层灼伤或剥落的问题。下面结合附图详细描述根据本公开一些实施例的导线结构。
图1A是示出根据本公开一个实施例的用于显示面板的导线结构的截面图。
如图1A所示，该导线结构可以包括第一导线层101和在该第一导线层101上方的导热层121。该导热层121的导热系数大于该第一导线层101的导热系数。例如，该第一导线层101可以与显示面板的薄膜晶体管的栅极(图中未示出)电连接。例如，该导热层可以是金属垫层。另外，图1A中还示出了在导热层121上的平坦化层103和在该平坦化层103上的像素界定层104。
在该实施例中，通过在第一导线层的上方设置导热层，可以将第一导线层由于被施加高电压而产生的热量比较快地散掉，这样可以提高导线结构的散热效果，减少在第一导线层上方的绝缘层(例如平坦化层和/或像素界定层)可能灼伤或剥落的问题。另外，该导线结构对显示面板内部的像素区域的显示不会造成影响。
在一些实施例中，如图1A所示，该导线结构还可以包括在第一导线层101与导热层121之间的第一绝缘层111。例如，该第一绝缘层111的材料可以包括氧化硅或氮化硅等。这样可以防止导热层与不同的第一导线层短路，进而防止不同第一导线层之间短路。
在另一些实施例中，可以在第一导线层101与导热层121之间不设置第一绝缘层111，即该导热层121可以在该第一导线层101的表面上，只要确保导热层不与其他的第一导线层接触即可。
因此，上面在描述导热层121位于第一导线层101上方时，该“上方”可以是指导热层121非接触地位于第一导线层101的上方(例如，在第一导线层101与导热层121之间存在第一绝缘层111)，也可以是指导热层121直接接触地位于第一导线层101的表面上。
在一些实施例中，第一导线层的材料可以包括钼(Mo)。钼的导热系数为138W/(m·K)。
在一些实施例中，该导热层121的导热系数大于200W/(m·K)。例如，该导热层的材料可以包括铝(Al)、铜(Cu)、金(Au)和银(Ag)中的至少一种。铝的导热 系数为237W/(m·K)，铜的导热系数为401W/(m·K)，金的导热系数为317W/(m·K)，银的导热系数为429W/(m·K)。
当然，本领域技术人员可以理解，本公开实施例的导热层的导热系数不必须大于200W/(m·K)。例如，导热系数可以小于200W/(m·K)，只要大于第一导线层(例如钼)的导热系数即可。例如，导热层的材料可以包括钨(W)或镁(Mg)等。钨的导热系数为180W/(m·K)，镁的导热系数为156W/(m·K)。
在一些实施例中，第一导线层101在导热层121所在平面上的正投影与该导热层121在该导热层121所在平面上的正投影至少部分重叠。例如，第一导线层101在导热层121所在平面上的正投影可以位于该导热层121在该导热层121所在平面上的正投影的内部。
图1B是示出根据本公开另一个实施例的用于显示面板的导线结构的截面图。该图1B示出了第一导线层101、导热层121、第一绝缘层111、平坦化层103和像素界定层104。
在一些实施例中，如图1B所示，第一导线层101可以包括处于同一层的间隔开的多个第一导线部1011。例如，在显示面板中可以包括多个薄膜晶体管，每个薄膜晶体管的栅极均可以与一个相应的第一导线部相连。即，多个薄膜晶体管的栅极可以与多个第一导线部一一对应地连接。因此，导线结构可以包括处于同一层的多个第一导线部。在这样的情况下，导热层121在该多个第一导线部1011的上方。例如，可以在该多个第一导线部的上方设置一个整体的导热层，这样在制造时比较简单方便。在另一些实施例中，也可以在多个第一导线部的每一个的上方分别设置一个导热层。
在一些实施例中，多个第一导线部1011在导热层121所在平面上的正投影与该导热层121在该导热层121所在平面上的正投影至少部分重叠。例如，多个第一导线部1011在导热层121所在平面上的正投影可以位于该导热层121在该导热层121所在平面上的正投影的内部。
图2是示出根据本公开另一个实施例的用于显示面板的导线结构的截面图。与图1A所示的导线结构类似地，图2所示的导线结构可以包括第一导线层101、导热层121和第一绝缘层111。另外，图2中还示出了平坦化层103和像素界定层104。
在一些实施例中，如图2所示，该导线结构还可以包括在导热层121的背离第一导线层101的一侧的第二绝缘层212。该第二绝缘层212在该导热层121上。例如，第二绝缘层212的材料可以包括氧化硅或氮化硅等。
在一些实施例中，如图2所示，该导线结构还可以包括在该第二绝缘层212的背离导热层121的一侧的第二导线层202。该第二导线层202在该第二绝缘层212上。该第二绝缘层212在该导热层121与该第二导线层202之间。该第二导线层202与显示面板的薄膜晶体管的源极或漏极(图中未示出)电连接。例如，该第二导线层的材料可以包括铝等金属。
在上述实施例中，通过设置第二绝缘层，可以防止导热层与第二导线层短路。
需要说明的是，图2示出了第二导线层与导热层处于不同层的情况。但是本公开的实施例并不仅限于此。第二导线层与导热层可以处于同一层，并且第二导线层与导热层隔离开。这样在形成第二导线层的过程中也可以形成导热层，简化了制造工艺。
图3是示出根据本公开一个实施例的用于显示面板的导线结构的顶视图。其中，图2是沿着图3中的线A-A’截取的结构的截面图。在图3中，示出了第一导线层101、导热层121和两个第二导线层202。其中，第一导线层101的边缘用虚线示出，表示该第一导线层101在导热层121的下方。从图3可以看出，导热层121可以是一个整体的金属层，这样在制造时比较方便。另外，图3中还示出了与第一导线层101连接的第一连接件331和与第二导线层202连接的第二连接件332。该第一连接件331和第二连接件332分别用于接收电压。
在本公开的一些实施例中，还提供了一种显示面板。该显示面板可以包括如前所述的导线结构，例如如图1A或图2所示的导线结构。
在本公开的一些实施例中，还提供了一种显示装置。该显示装置可以包括如前所述的显示面板。例如，该显示装置可以包括显示器、手机、平板电脑或笔记本电脑等。
图4是示出根据本公开一个实施例的用于显示面板的导线结构的制造方法的流程图。如图4所示，该制造方法可以包括步骤S402至S404。
在步骤S402，形成第一导线层。
在一些实施例中，该步骤S402可以包括：形成与显示面板的薄膜晶体管的栅极电连接的第一导线层。例如，可以通过沉积和图案化等工艺在衬底上形成第一导线层。
在步骤S404，在第一导线层的上方形成导热层。该导热层的导热系数大于该第一导线层的导热系数。例如，该导热层的材料可以包括铝、铜、金和银中的至少一种。
在一些实施例中，该步骤S404可以包括：在第一导线层上形成第一绝缘层；以及在该第一绝缘层的背离该第一导线层的一侧形成导热层。
至此，提供了根据本公开一些实施例的用于显示面板的导线结构的制造方法。在 该方法中，通过在第一导线层的上方设置导热层，可以将第一导线层由于被施加高电压而产生的热量比较快地散掉，这样可以提高导线结构的散热效果，减少在第一导线层上方的绝缘层可能灼伤或剥落的问题。
在一些实施例中，在形成第一导线层的过程中，形成处于同一层的间隔开的多个第一导线部。该导热层形成在该多个第一导线部的上方。例如，可以在该多个第一导线部的上方形成一个整体的导热层。在形成该导热层的过程中，可以对该导热层执行图案化处理，使得包含晶体管等的有源区不包括该导热层，而在该多个第一导线部的上方保留该导热层。
在一些实施例中，该制造方法还可以包括：在导热层的背离第一导线层的一侧形成第二绝缘层。例如，在导热层的表面上形成第二绝缘层。该制造方法还可以包括：在该第二绝缘层的背离该导热层的一侧形成第二导线层。例如，在第二绝缘层的表面上形成第二导线层。该第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。该第二导线层可以是源极导线或漏极导线。
在一些实施例中，在第一绝缘层的背离第一导线层的一侧形成第二导线层，该第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。在形成该第二导线层的过程中形成导热层。这样第二导线层与导热层处于同一层并且互相隔离开。
例如，在某些情况下，在一些第一导线层的上方可以不存在第二导线层。这样可以在制造其他位置的第二导线层的过程中，可以通过修改第二导线层的掩模版，从而在形成第二导线层的过程中也形成与这些第二导线层处于相同层的导热层，该导热层位于第一导线层的上方。这样可以简化工艺。
图5至图7是示出根据本公开一些实施例的用于显示面板的导线结构的制造过程中若干阶段的结构的截面图。下面结合图5至图7以及图2详细描述根据本公开一些实施例的导线结构的制造过程。
首先，如图5所示，例如在衬底(图中未示出)上形成第一导线层101。例如，该第一导线层101可以与显示面板的薄膜晶体管的栅极(图中未示出)电连接。
接下来，如图5所示，例如通过沉积工艺在第一导线层101上形成第一绝缘层111。该第一绝缘层111覆盖该第一导线层101。例如，该第一绝缘层111的材料可以包括氧化硅或氮化硅等。
接下来，如图6所示，例如通过沉积和图案化等工艺在该第一绝缘层111的背离该第一导线层101的一侧形成导热层121。
接下来，如图7所示，在导热层121的背离第一导线层101的一侧形成第二绝缘层212。例如，第二绝缘层212的材料可以包括氧化硅或氮化硅等。
接下来，如图7所示，在第二绝缘层212的背离导热层121的一侧形成第二导线层202。
接下来，形成覆盖第二导线层202的平坦化层103，以及在平坦化层103上形成像素界定层104，从而形成如图2所示的结构。
至此，提供了根据本公开一些实施例的用于显示面板的导线结构的制造方法。通过在第一导线层的上方设置导热层，可以在对薄膜晶体管老化处理的过程中，将第一导线层由于被施加高电压而产生的热量比较快地散掉。这样可以提高导线结构的散热效果，减少平坦化层和/或像素界定层可能灼伤或剥落的问题。该制造方法比较简单，易于实施。
至此，已经详细描述了本公开的各实施例。为了避免遮蔽本公开的构思，没有描述本领域所公知的一些细节。本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。
虽然已经通过示例对本公开的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本公开的范围。本领域的技术人员应该理解，可在不脱离本公开的范围和精神的情况下，对以上实施例进行修改或者对部分技术特征进行等同替换。本公开的范围由所附权利要求来限定。

Claims (18)

  1. 一种用于显示面板的导线结构，包括：
    第一导线层；以及
    在所述第一导线层上方的导热层，其中，所述导热层的导热系数大于所述第一导线层的导热系数。
  2. 根据权利要求1所述的导线结构，还包括：
    在所述第一导线层与所述导热层之间的第一绝缘层。
  3. 根据权利要求1或2所述的导线结构，其中，
    所述导热层的导热系数大于200W/(m·K)。
  4. 根据权利要求1至3任意一项所述的导线结构，其中，
    所述导热层的材料包括铝、铜、金和银中的至少一种。
  5. 根据权利要求1至4任意一项所述的导线结构，其中，
    所述第一导线层在所述导热层所在平面上的正投影与所述导热层在所述导热层所在平面上的正投影至少部分重叠。
  6. 根据权利要求1至5任意一项所述的导线结构，其中，
    所述第一导线层与显示面板的薄膜晶体管的栅极电连接。
  7. 根据权利要求1至6任意一项所述的导线结构，其中，
    所述第一导线层包括处于同一层的间隔开的多个第一导线部，其中，所述导热层在所述多个第一导线部的上方。
  8. 根据权利要求7所述的导线结构，其中，
    所述多个第一导线部在所述导热层所在平面上的正投影与所述导热层在所述导热层所在平面上的正投影至少部分重叠。
  9. 根据权利要求1至8任意一项所述的导线结构，还包括：
    在所述导热层的背离所述第一导线层的一侧的第二绝缘层；和
    在所述第二绝缘层的背离所述导热层的一侧的第二导线层，其中，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。
  10. 一种显示面板，包括：如权利要求1至9任意一项所述的导线结构。
  11. 一种显示装置，包括：如权利要求10所述的显示面板。
  12. 一种用于显示面板的导线结构的制造方法，包括：
    形成第一导线层；以及
    在所述第一导线层的上方形成导热层，其中，所述导热层的导热系数大于所述第一导线层的导热系数。
  13. 根据权利要求12所述的制造方法，其中，在所述第一导线层的上方形成导热层的步骤包括：
    在所述第一导线层上形成第一绝缘层；以及
    在所述第一绝缘层的背离所述第一导线层的一侧形成导热层。
  14. 根据权利要求12或13所述的制造方法，其中，
    所述导热层的材料包括铝、铜、金和银中的至少一种。
  15. 根据权利要求12至14任意一项所述的制造方法，其中，形成第一导线层的步骤包括：
    形成与显示面板的薄膜晶体管的栅极电连接的第一导线层。
  16. 根据权利要求12至15任意一项所述的制造方法，其中，
    在形成所述第一导线层的过程中，形成处于同一层的间隔开的多个第一导线部；其中，所述导热层形成在所述多个第一导线部的上方。
  17. 根据权利要求12至16任意一项所述的制造方法，还包括：
    在所述导热层的背离所述第一导线层的一侧形成第二绝缘层；和
    在所述第二绝缘层的背离所述导热层的一侧形成第二导线层，其中，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接。
  18. 根据权利要求13所述的制造方法，还包括：
    在所述第一绝缘层的背离所述第一导线层的一侧形成第二导线层，所述第二导线层与显示面板的薄膜晶体管的源极或漏极电连接；
    其中，在形成所述第二导线层的过程中形成所述导热层。
PCT/CN2019/107458 2018-10-22 2019-09-24 导线结构、显示面板、显示装置和制造方法 WO2020082961A1 (zh)

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