WO2020057215A1 - 一种实现网卡热插拔的系统 - Google Patents

一种实现网卡热插拔的系统 Download PDF

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Publication number
WO2020057215A1
WO2020057215A1 PCT/CN2019/093318 CN2019093318W WO2020057215A1 WO 2020057215 A1 WO2020057215 A1 WO 2020057215A1 CN 2019093318 W CN2019093318 W CN 2019093318W WO 2020057215 A1 WO2020057215 A1 WO 2020057215A1
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control chip
power supply
resistor
capacitor
unit
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PCT/CN2019/093318
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English (en)
French (fr)
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孙辉
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郑州云海信息技术有限公司
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Publication of WO2020057215A1 publication Critical patent/WO2020057215A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4081Live connection to bus, e.g. hot-plugging

Definitions

  • the present application relates to the field of circuit technology, and in particular, to a system for implementing hot swap of a network card.
  • Servers are playing an increasingly important role in the rapid development of electronic information technology, and the research and development capabilities of servers are receiving more and more attention from society.
  • the server's thermal maintenance requirements are increasing, and the server can support hot-swap operations.
  • the number of components is expected to be as large as possible. .
  • hot-plug functions have been implemented for hard disks and fans, but hot-plug functions have not been implemented for network card components.
  • an embodiment of the present application provides a system for implementing hot swap of a network card to implement a hot swap function of a network card.
  • a system for implementing hot swap of a network card includes:
  • a first hot-swap module and a second hot-swap module the input end of the first hot-swap module is connected to the first power supply link of the motherboard, and the output end of the first hot-swap module is connected to the first A power supply end is connected; an input end of the second hot-swap module is connected to a second power supply link of the motherboard, and an output end of the second hot-swap module is connected to a second power supply end of the network card;
  • the first hot-swap module is configured to input a first voltage provided by the first power supply link to a first power supply end of the network card;
  • the second hot-swap module is configured to input a second voltage provided by the second power supply link to a second power supply terminal of the network card.
  • the first hot-swap module includes:
  • the first current feedback unit is configured to input a first voltage difference after the first voltage passes through a first precision resistor to the first control chip unit;
  • the first control chip unit is configured to drive the first conducting unit to be turned on when a first voltage provided by the first power supply link reaches a first preset condition; and calculated according to the first voltage difference A first working current, when the first working current exceeds a first current threshold, driving the first conducting unit to turn off;
  • the first conduction unit is configured to input a first voltage provided by the first power supply link to a first power supply terminal of the network card when the first conduction unit is turned on, and to the first power supply terminal of the network card when the power is turned off. Enter zero volts.
  • the first control chip unit includes:
  • a power pin of the first control chip is connected to a first power supply link of the motherboard;
  • a first power supply link of the motherboard is connected to a first end of the first resistor, and a second end of the first resistor is respectively connected to a first end of the second resistor and an operation of the first control chip.
  • the pins can be connected, and the second end of the second resistor is grounded;
  • a first end of the third resistor is connected to an overcurrent protection pin of the first control chip, and a second end of the third resistor is grounded.
  • the first control chip unit further includes: a first capacitor
  • the first terminal of the first capacitor is connected to the first terminal of the second resistor and the enable pin of the first control chip, respectively; the second terminal of the first capacitor is grounded.
  • the first current feedback unit includes:
  • the first precision resistor, the second capacitor, the third capacitor, and the fourth capacitor are The first precision resistor, the second capacitor, the third capacitor, and the fourth capacitor;
  • a first power supply link of the motherboard is connected to a first end of the first precision resistor, and a first end of the first precision resistor is connected to a first feedback pin of the first control chip.
  • a second end of a precision resistor is respectively connected to the second feedback pin of the first control chip and the first conducting unit;
  • the first end of the second capacitor is connected to the first end of the first precision resistor and the first feedback pin of the first control chip, respectively, and the second end of the second capacitor is connected to the first A second end of a precision resistor is connected to a second feedback pin of the first control chip;
  • a first end of the third capacitor is connected to a first end of the second capacitor, and a second end of the third capacitor is grounded;
  • a first terminal of the fourth capacitor is connected to a second terminal of the second capacitor, and a second terminal of the fourth capacitor is grounded.
  • the first conducting unit is a first MOS tube
  • a control end of the first MOS tube is connected to a driving pin of the first control chip
  • the first MOS tube The first end of the first precision resistor is connected to the second end of the first precision resistor, and the second end of the first MOS transistor is connected to the first power supply end of the network card.
  • the second hot-swap module includes:
  • the second current feedback unit is configured to input a second voltage difference after the second voltage passes through a second precision resistor to the second control chip unit;
  • the second control chip unit is configured to drive the second conducting unit to be turned on when a second voltage provided by the second power supply link reaches a second preset condition; and calculated according to the second voltage difference A second working current, when the second working current exceeds a second current threshold, driving the second conducting unit to turn off;
  • the second conduction unit is configured to input a second voltage provided by the second power supply link to a second power supply terminal of the network card when the second conduction unit is turned on; and to the second power supply terminal of the network card when the power is turned off. Enter zero volts.
  • the second control chip unit includes:
  • a second control chip a fourth resistor, a fifth resistor, and a sixth resistor
  • a power pin of the second control chip is connected to a second power supply link of the motherboard;
  • the second power supply link of the motherboard is connected to the first end of the fourth resistor, and the second end of the fourth resistor is respectively connected to the first end of the fifth resistor and the second control chip.
  • the pins can be connected, and the second end of the fifth resistor is grounded;
  • a first end of the sixth resistor is connected to an overcurrent protection pin of the second control chip, and a second end of the sixth resistor is grounded.
  • the second control chip unit further includes: a fifth capacitor
  • the first terminal of the fifth capacitor is connected to the first terminal of the fifth resistor and the enable pin of the second control chip, respectively; the second terminal of the fifth capacitor is grounded.
  • the second current feedback unit includes:
  • the second precision resistor, the sixth capacitor, the seventh capacitor, and the eighth capacitor are The second precision resistor, the sixth capacitor, the seventh capacitor, and the eighth capacitor;
  • a second power supply link of the motherboard is connected to a first end of the second precision resistor, and a first end of the second precision resistor is connected to a first feedback pin of the second control chip.
  • the second ends of the two precision resistors are respectively connected to the second feedback pin of the second control chip and the second conduction unit;
  • the first end of the sixth capacitor is connected to the first end of the second precision resistor and the first feedback pin of the second control chip, and the second end of the sixth capacitor is connected to the first The second ends of the two precision resistors are connected to the second feedback pin of the second control chip;
  • a first terminal of the seventh capacitor is connected to a first terminal of the sixth capacitor, and a second terminal of the seventh capacitor is grounded;
  • a first terminal of the eighth capacitor is connected to a second terminal of the sixth capacitor, and a second terminal of the eighth capacitor is grounded.
  • the second conducting unit is a second MOS tube
  • a control end of the second MOS tube is connected to a driving pin of the second control chip
  • the second MOS tube A first end of the second precision resistor is connected to a second end of the second precision resistor, and a second end of the second MOS tube is connected to a second power supply end of the network card.
  • a hot-swap module is added to the power supply link of the motherboard to the network card to isolate the power supply of the motherboard and the network card, to ensure that there is no interference with the power supply link of the motherboard during the hot-plug operation, and to implement the hot-plug function of the network card.
  • FIG. 1 is a schematic diagram of a connection between a motherboard and a network card in the prior art
  • FIG. 2 is a schematic diagram of a system for implementing hot swap of a network card according to an embodiment of the present application
  • FIG. 3 is a schematic diagram of a first hot-swap module according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a first hot-swap module according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a second hot-swap module according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a second hot-swap module according to an embodiment of the present application.
  • the network card components on the server motherboard did not implement the hot swap function.
  • the motherboard directly provides two power supply links for the network card, and there is no protection device on the power supply link. .
  • the motherboard provides two power supply links for the OCP3.0 network card as P12V_AUX and P3V3_AUX, thereby providing 12V and 3.3V for the OCP3.0 network card. Since there is no protection device on the power supply link of the motherboard to the network card, the network card cannot implement the hot plug function.
  • an internal short circuit occurs due to an abnormality in the network card, it will directly trigger the short circuit protection of the power supply link of the motherboard, resulting in power failure and data loss of the motherboard.
  • the embodiment of the present application adds a first hot-swap module between the first power supply link of the main board and the first power supply end of the network card, and adds between the second power supply link of the main board and the second power supply end of the network card.
  • the second hot-swap module realizes the power supply isolation of the motherboard and the network card, guarantees no interference to the power supply link of the motherboard during the hot-swap operation, and realizes the hot-swap function of the network card.
  • the system may include:
  • the input end of the second hot-swap module is connected to the second power supply link of the motherboard, and the output end of the second hot-swap module is connected to the second power supply end of the network card.
  • the first hot-swap module is configured to input a first voltage provided by a first power supply link to a first power supply end of the network card.
  • the second hot-swap module is configured to input a second voltage provided by the second power supply link to a second power supply end of the network card.
  • a first hot-swap module is added between the first power supply link of the main board and the first power supply end of the network card, and between the second power supply link of the main board and the second power supply end of the network card is added
  • the second hot-swap module inputs the first voltage provided by the first power supply link to the first power supply terminal of the network card by the first hot-swap module, and the second hot-swap module receives the second voltage provided by the second power supply link.
  • the voltage is input to the second power supply terminal of the network card, thereby supplying power to the network card.
  • the network card may be an OCP 3.0 network card.
  • a first hot-swap module may be added to the first power supply link P12V_AUX on the motherboard, and a second hot-swap module may be added to the second power supply link P3V3_AUX on the motherboard. Achieve the power supply isolation between the motherboard and the OCP3.0 network card.
  • the first hot-swap module converts the first voltage provided by the first power supply link P12V_AUX into a voltage P12V_AUX_OCP, provides 12V voltage for the OCP3.0 network card, and converts the second voltage provided by the second power supply link P3V3_AUX into a voltage P3V3_AUX_OCP, as OCP3.0 network card provides 3.3V voltage to ensure the normal operation of the network card.
  • the value of the first voltage provided by P12V_AUX and the voltage P12V_AUX_OCP may be the same, and the value of the second voltage provided by P3V3_AUX and the voltage P3V3_AUX_OCP may be the same.
  • the power supply isolation of the motherboard and the network card is achieved, ensuring that the hot-plug operation has no interference with the power supply link of the motherboard, and the network card is hot-swappable.
  • the first hot-swap module may include:
  • the first current feedback unit is configured to input a first voltage difference to the first control chip unit after the first voltage passes through the first precision resistor.
  • the first control chip unit is configured to drive the first conducting unit to be turned on when the first voltage provided by the first power supply link reaches a first preset condition; and calculate the first working current according to the first voltage difference. When the working current exceeds the first current threshold, the first conducting unit is driven to turn off.
  • the first conduction unit is configured to input a first voltage provided by the first power supply link to the first power supply terminal of the network card during the turn-on; and input a zero volt voltage to the first power supply terminal of the network card when the switch is turned off.
  • the first voltage can enable the first control chip in the first control chip unit to drive the first conduction unit to conduct
  • the The first voltage is input to the first power supply terminal of the network card; at the same time, the real-time first control chip unit monitors the working current in real time.
  • the first conduction unit is turned off and the power supply to the network card is stopped.
  • the first hot-swap module provides an overcurrent protection function, which can avoid the problem of power failure of the motherboard when the network card is shorted internally, and increase the design reliability.
  • the first control chip unit may include:
  • the first control chip U1 the first resistor R1, the second resistor R2, and the third resistor R3.
  • the power pin VCC of the first control chip U1 is connected to the first power supply link P12V_AUX of the motherboard.
  • the first power supply link P12V_AUX of the motherboard is connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2 and the enable pin EN of the first control chip U1, respectively.
  • the second end of the second resistor R2 is grounded.
  • the first end of the third resistor R3 is connected to the overcurrent protection pin Ilim of the first control chip U1, and the second end of the third resistor R3 is grounded.
  • the first control chip unit further includes: a first capacitor C1.
  • the first terminal of the first capacitor C1 is connected to the first terminal of the second resistor R2 and the enable pin EN of the first control chip U1, respectively; the second terminal of the first capacitor C1 is grounded.
  • the first current feedback unit may include:
  • the first power supply link P12V_AUX of the motherboard is connected to the first end of the first precision resistor R7.
  • the first end of the first precision resistor R7 is connected to the first feedback pin CSP of the first control chip U1.
  • the second terminal is respectively connected to the second feedback pin CSN of the first control chip U1 and the first conducting unit.
  • the first end of the second capacitor C2 is connected to the first end of the first precision resistor R7 and the first feedback pin CSP of the first control chip U1, and the second ends of the second capacitor C2 are respectively connected to the first precision resistor R7.
  • the second terminal is connected to the second feedback pin CSN of the first control chip U1.
  • the first terminal of the third capacitor C3 is connected to the first terminal of the second capacitor C2, and the second terminal of the third capacitor C3 is grounded.
  • a first terminal of the fourth capacitor C4 is connected to a second terminal of the second capacitor C2, and a second terminal of the fourth capacitor C4 is grounded.
  • the first conducting unit may be a first MOS transistor MOSFET1, a control terminal of the first MOS transistor MOSFET1 is connected to a driving pin Gate of the first control chip U1, and the first MOS
  • the first terminal of the first MOSFET R1 is connected to the second terminal of the first precision resistor R7, and the second terminal of the first MOS MOSFET 1 is connected to the first power supply terminal of the network card, and outputs P12V_AUX_OCP.
  • the input voltage P12V_AUX is directly connected to the VCC pin of the first control chip U1 to provide the working voltage for the first control chip U1.
  • the input voltage P12V_AUX is connected to the EN pin of the first control chip U1 after being divided by the first resistor R1 and the second resistor R2 to provide an enable driving signal for the first control chip U1.
  • the EN pin of the first control chip U1 is set with a threshold threshold V0.
  • V0 When the voltage divided by the first resistor R1 and the second resistor R2 of the input voltage P12V_AUX is greater than or equal to V0, the gate tube of the first control chip U1 The pin will output a high level and drive MOSFET1 to be turned on.
  • the first hot-swap module outputs the P12V_AUX_OCP voltage to supply power to the network card, for example, to provide 12V voltage to the network card.
  • the EN pin of the first control chip U1 adds a high-frequency filtering capacitor C1 to filter out high-frequency noise interference caused by the input voltage P12V_AUX, so as to avoid the malfunction of the first control chip U1.
  • the control chip U1 decides. When the first current feedback unit monitors that the operating current I1 is greater than the overcurrent protection point I0, the Gate pin of the first control chip U1 outputs a low level, the MOSFET1 is turned off, and the output voltage of the first hot-swap module is 0, and stops Network card power.
  • the two ends of the first precision resistor R7 are connected to the CSN and CSP pins of the first control chip U1, and are used to collect the voltage difference V1 across the first precision resistor R7 to further calculate the input current.
  • the two ends of the second capacitor C2 are connected to the two ends of the first precision resistor R7 to filter out common mode interference.
  • One end of the third capacitor C3 and the fourth capacitor C4 are respectively connected to two current feedback links, and the other ends are respectively grounded to filter out differential mode interference.
  • a controller (gate) of the MOSFET1 is connected to the Gate pin of the first control chip U1, and the first control chip U1 controls its on and off.
  • the first hot-swap module realizes power supply isolation between the first power supply link of the motherboard and the first power supply end of the network card, and can provide a first voltage for the network card.
  • FIG. 5 a schematic diagram of a second hot-swap module in an embodiment of the present application is shown.
  • the structure of the second hot-swap module is similar to that of the first hot-swap module.
  • the second hot-swap module may include :
  • the second current feedback unit is configured to input a second voltage difference after the second voltage passes through the second precision resistor to the second control chip unit.
  • the second control chip unit is configured to drive the second conduction unit to be turned on when the second voltage provided by the second power supply link reaches a second preset condition; and calculate the second working current according to the second voltage difference. When the working current exceeds the second current threshold, the second conducting unit is turned off.
  • the second conduction unit is configured to input a second voltage provided by the second power supply link to the second power supply terminal of the network card during the turn-on; and input a zero volt voltage to the second power supply terminal of the network card when the switch is turned off.
  • the second voltage can enable the second control chip in the second control chip unit to drive the second conduction unit to conduct
  • the second voltage is input to the second power supply end of the network card; at the same time, the real-time second control chip unit monitors the working current in real time.
  • the second conduction unit is turned off and the power supply to the network card is stopped.
  • the second hot-swap module provides an over-current protection function, which can avoid the problem of power failure of the motherboard when the internal short circuit of the network card occurs, and increase the design reliability.
  • the second control chip unit may include:
  • the second control chip U2, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 are the second control chip U2, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6.
  • the power supply pin VCC of the second control chip U2 is connected to the second power supply link P3V3_AUX of the motherboard.
  • the second power supply link P3V3_AUX of the motherboard is connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5 and the enable pin EN of the second control chip U2, respectively.
  • the second end of the fifth resistor R5 is grounded.
  • the first end of the sixth resistor R6 is connected to the overcurrent protection pin Ilim of the second control chip U2, and the second end of the sixth resistor R6 is grounded.
  • the second control chip unit further includes: a fifth capacitor C5.
  • the first terminal of the fifth capacitor C5 is connected to the first terminal of the fifth resistor R5 and the enable pin EN of the second control chip U2, respectively; the second terminal of the fifth capacitor C5 is grounded.
  • the second current feedback unit may include:
  • the second precision resistor R8 the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8.
  • the second power supply link P3V3_AUX of the motherboard is connected to the first end of the second precision resistor R8.
  • the first end of the second precision resistor R8 is connected to the first feedback pin CSP of the second control chip U2.
  • the second end is respectively connected to the second feedback pin CSN and the second conducting unit of the second control chip U2.
  • the first end of the sixth capacitor C6 is respectively connected to the first end of the second precision resistor R8 and the first feedback pin CSP of the second control chip U2, and the second ends of the sixth capacitor C6 are respectively connected to the second precision resistor R8.
  • the second terminal and the second feedback pin CSN of the second control chip U2 are connected.
  • the first terminal of the seventh capacitor C7 is connected to the first terminal of the sixth capacitor C6, and the second terminal of the seventh capacitor C7 is grounded.
  • a first terminal of the eighth capacitor C8 is connected to a second terminal of the sixth capacitor C6, and a second terminal of the eighth capacitor C8 is grounded.
  • the second conducting unit may be a second MOS transistor MOSFET2, a control terminal of the second MOS transistor MOSFET2 is connected to a driving pin Gate of the second control chip U2, and the second MOS
  • the first end of the tube MOSFET2 is connected to the second end of the second precision resistor R8, the second end of the second MOS tube MOSFET2 is connected to the second power supply end of the network card, and outputs P3V3_AUX_OCP.
  • the working principle of the second hot-swap module is similar to that of the first hot-swap module.
  • the working principle of the second hot-swap module is described below.
  • the input voltage P3V3_AUX is directly connected to the VCC pin of the second control chip U2 to provide the working voltage for the second control chip U2.
  • the input voltage P3V3_AUX is connected to the EN pin of the second control chip U2 after being divided by the fourth resistor R4 and the fifth resistor R5 to provide an enable driving signal for the second control chip U2.
  • the EN pin of the second control chip U2 is set with a threshold threshold V0 ′.
  • V0 ′ When the voltage divided by the fourth resistor R4 and the fifth resistor R5 of the input voltage P3V3_AUX is greater than or equal to V0 ′, the The Gate pin will output a high level and drive MOSFET2 to be turned on.
  • the second hot-swap module outputs the P3V3_AUX_OCP voltage to provide power to the network card, such as providing a 3.3V voltage to the network card.
  • a high-frequency filter capacitor C5 is added to the EN pin of the second control chip U2 to filter out high-frequency noise interference caused by the input voltage P3V3_AUX, so as to avoid the malfunction of the second control chip U2.
  • the second control chip U2 decides. When the second current feedback unit detects that the operating current I1 'is greater than the overcurrent protection point I0', the Gate pin of the second control chip U2 outputs a low level, the MOSFET2 is turned off, and the output voltage of the second hot-swap module is 0. Stop powering the network card.
  • the two ends of the second precision resistor R8 are connected to the CSN and CSP pins of the second control chip U2, and are used to collect the voltage difference V1 'across the second precision resistor R8 to further calculate the input current.
  • the two ends of the sixth capacitor C6 are connected to the two ends of the second precision resistor R8 to filter out common mode interference.
  • One end of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to two current feedback links, and the other ends are respectively grounded to filter out differential mode interference.
  • a controller (gate) of the MOSFET 2 is connected to the Gate pin of the second control chip U2, and the second control chip U2 controls its on and off.
  • the second hot-swap module realizes power supply isolation between the second power supply link of the motherboard and the second power supply end of the network card, and can provide a second voltage for the network card.
  • a hot-swap module is added to the power supply link of the motherboard to the network card to isolate the power supply of the motherboard and the network card, to ensure that there is no interference with the power supply link of the motherboard during the hot-plug operation, and to implement the hot-plug function of the network card. At the same time, it has over-current protection function to avoid the power failure of the motherboard when the internal short circuit of the network card.
  • At least one (a), a, b, or c can represent: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", Where a, b, and c can be single or multiple.
  • RAM random access memory
  • ROM read-only memory
  • electrically programmable ROM electrically erasable programmable ROM
  • registers hard disks, removable disks, CD-ROMs, or in technical fields Any other form of storage medium known in the art.

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Abstract

本申请实施例公开了一种实现网卡热插拔的系统,该系统包括:第一热插拔模块以及第二热插拔模块;第一热插拔模块的输入端与主板的第一供电链路相连,第一热插拔模块的输出端与网卡的第一供电端相连;第二热插拔模块的输入端与主板的第二供电链路相连,第二热插拔模块的输出端与网卡的第二供电端相连;第一热插拔模块,用于将第一供电链路提供的第一电压输入网卡的第一供电端;第二热插拔模块,用于将第二供电链路提供的第二电压输入网卡的第二供电端。通过本申请实施例可以实现网卡的热插拔。

Description

一种实现网卡热插拔的系统
本申请要求于2018年9月21日提交中国专利局、申请号为201811109212.8、发明名称为“一种实现网卡热插拔的系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电路技术领域,具体涉及一种实现网卡热插拔的系统。
背景技术
服务器在高速发展的电子信息技术中占据越来越重要的地位,服务器的研发能力也越来越受到社会的高度重视。现阶段,在服务器的设计中,服务器的热维护需求不断增加,服务器所能支持热插拔操作的部件不断增多,人们希望能尽大可能的实现对服务器中绝大部分部件的热插拔操作。
同时,在部件进行热插拔操作时,需要保证服务器整体系统和部件无任何损坏,主板无干扰,主板和部件均可正常工作。目前服务器的设计中,硬盘和风扇等部件已实现热插拔功能,但是网卡部件等并未实现热插拔功能。
发明内容
有鉴于此,本申请实施例提供一种实现网卡热插拔的系统,以实现网卡的热插拔功能。
为解决上述问题,本申请实施例提供的技术方案如下:
一种实现网卡热插拔的系统,所述系统包括:
第一热插拔模块以及第二热插拔模块;所述第一热插拔模块的输入端与主板的第一供电链路相连,所述第一热插拔模块的输出端与网卡的第一供电端相连;所述第二热插拔模块的输入端与所述主板的第二供电链路相连,所述第二热插拔模块的输出端与所述网卡的第二供电端相连;
所述第一热插拔模块,用于将所述第一供电链路提供的第一电压输入所述网卡的第一供电端;
所述第二热插拔模块,用于将所述第二供电链路提供的第二电压输入所述 网卡的第二供电端。
在一种可能的实现方式中,所述第一热插拔模块包括:
第一控制芯片单元、第一电流反馈单元以及第一导通单元;所述第一控制芯片单元与所述第一电流反馈单元相连,所述第一电流反馈单元与所述第一导通单元相连;
所述第一电流反馈单元,用于向所述第一控制芯片单元输入所述第一电压经过第一精密电阻后的第一电压差;
所述第一控制芯片单元,用于当所述第一供电链路提供的第一电压达到第一预设条件时,驱动所述第一导通单元导通;根据所述第一电压差计算第一工作电流,当所述第一工作电流超过第一电流阈值,驱动所述第一导通单元关断;
所述第一导通单元,用于在导通时将所述第一供电链路提供的第一电压输入所述网卡的第一供电端;在关断时向所述网卡的第一供电端输入零伏电压。
在一种可能的实现方式中,所述第一控制芯片单元包括:
第一控制芯片、第一电阻、第二电阻以及第三电阻;
所述第一控制芯片的电源管脚与所述主板的第一供电链路相连;
所述主板的第一供电链路与所述第一电阻的第一端相连,所述第一电阻的第二端分别与所述第二电阻的第一端以及所述第一控制芯片的使能管脚相连,所述第二电阻的第二端接地;
所述第三电阻的第一端与所述第一控制芯片的过流保护管脚相连,所述第三电阻的第二端接地。
在一种可能的实现方式中,所述第一控制芯片单元还包括:第一电容;
所述第一电容的第一端分别与所述第二电阻的第一端以及所述第一控制芯片的使能管脚相连;所述第一电容的第二端接地。
在一种可能的实现方式中,所述第一电流反馈单元包括:
所述第一精密电阻、第二电容、第三电容以及第四电容;
所述主板的第一供电链路与所述第一精密电阻的第一端相连,所述第一精密电阻的第一端与所述第一控制芯片的第一反馈管脚相连,所述第一精密电阻的第二端分别与所述第一控制芯片的第二反馈管脚以及所述第一导通单元相连;
所述第二电容的第一端分别与所述第一精密电阻的第一端以及所述第一控制芯片的第一反馈管脚相连,所述第二电容的第二端分别与所述第一精密电阻的第二端以及所述第一控制芯片的第二反馈管脚相连;
所述第三电容的第一端与所述第二电容的第一端相连,所述第三电容的第二端接地;
所述第四电容的第一端与所述第二电容的第二端相连,所述第四电容的第二端接地。
在一种可能的实现方式中,所述第一导通单元为第一MOS管,所述第一MOS管的控制端与所述第一控制芯片的驱动管脚相连,所述第一MOS管的第一端与所述第一精密电阻的第二端相连,所述第一MOS管的第二端与所述网卡的第一供电端相连。
在一种可能的实现方式中,所述第二热插拔模块包括:
第二控制芯片单元、第二电流反馈单元以及第二导通单元;所述第二控制芯片单元与所述第二电流反馈单元相连,所述第二电流反馈单元与所述第二导通单元相连;
所述第二电流反馈单元,用于向所述第二控制芯片单元输入所述第二电压经过第二精密电阻后的第二电压差;
所述第二控制芯片单元,用于当所述第二供电链路提供的第二电压达到第二预设条件时,驱动所述第二导通单元导通;根据所述第二电压差计算第二工作电流,当所述第二工作电流超过第二电流阈值,驱动所述第二导通单元关断;
所述第二导通单元,用于在导通时将所述第二供电链路提供的第二电压输入所述网卡的第二供电端;在关断时向所述网卡的第二供电端输入零伏电压。
在一种可能的实现方式中,所述第二控制芯片单元包括:
第二控制芯片、第四电阻、第五电阻以及第六电阻;
所述第二控制芯片的电源管脚与所述主板的第二供电链路相连;
所述主板的第二供电链路与所述第四电阻的第一端相连,所述第四电阻的第二端分别与所述第五电阻的第一端以及所述第二控制芯片的使能管脚相连,所述第五电阻的第二端接地;
所述第六电阻的第一端与所述第二控制芯片的过流保护管脚相连,所述第 六电阻的第二端接地。
在一种可能的实现方式中,所述第二控制芯片单元还包括:第五电容;
所述第五电容的第一端分别与所述第五电阻的第一端以及所述第二控制芯片的使能管脚相连;所述第五电容的第二端接地。
在一种可能的实现方式中,所述第二电流反馈单元包括:
所述第二精密电阻、第六电容、第七电容以及第八电容;
所述主板的第二供电链路与所述第二精密电阻的第一端相连,所述第二精密电阻的第一端与所述第二控制芯片的第一反馈管脚相连,所述第二精密电阻的第二端分别与所述第二控制芯片的第二反馈管脚以及所述第二导通单元相连;
所述第六电容的第一端分别与所述第二精密电阻的第一端以及所述第二控制芯片的第一反馈管脚相连,所述第六电容的第二端分别与所述第二精密电阻的第二端以及所述第二控制芯片的第二反馈管脚相连;
所述第七电容的第一端与所述第六电容的第一端相连,所述第七电容的第二端接地;
所述第八电容的第一端与所述第六电容的第二端相连,所述第八电容的第二端接地。
在一种可能的实现方式中,所述第二导通单元为第二MOS管,所述第二MOS管的控制端与所述第二控制芯片的驱动管脚相连,所述第二MOS管的第一端与所述第二精密电阻的第二端相连,所述第二MOS管的第二端与所述网卡的第二供电端相连。
由此可见,本申请实施例具有如下有益效果:
本申请实施例通过在主板向网卡的供电链路上增加热插拔模块,实现主板和网卡的供电隔离,保证热插拔操作时对主板供电链路无干扰,实现网卡的热插拔功能。
附图说明
图1为现有技术中主板与网卡连接示意图;
图2为本申请实施例提供的实现网卡热插拔的系统的示意图;
图3为本申请实施例提供的第一热插拔模块的示意图;
图4为本申请实施例提供的第一热插拔模块的结构示意图;
图5为本申请实施例提供的第二热插拔模块的示意图;
图6为本申请实施例提供的第二热插拔模块的结构示意图。
具体实施方式
为使本申请的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本申请实施例作进一步详细的说明。
在现有技术中,服务器主板上的网卡部件并未实现热插拔功能,参见图1所示,现有技术中主板直接为网卡提供两路供电链路,供电链路上不存在任何保护器件。以网卡为OCP3.0网卡为例,主板为OCP3.0网卡提供两条供电链路分别为P12V_AUX、P3V3_AUX,从而为OCP3.0网卡提供12V和3.3V。由于主板对网卡的供电链路上不存在任何保护器件,网卡无法实现热插拔功能。另外,当网卡内部发生异常导致内部短路时,将直接触发主板供电链路发生短路保护,造成主板掉电和数据丢失。
基于此,本申请实施例在主板的第一供电链路与网卡的第一供电端之间增加第一热插拔模块,在主板的第二供电链路与网卡的第二供电端之间增加第二热插拔模块,实现主板和网卡的供电隔离,保证热插拔操作时对主板供电链路无干扰,实现网卡的热插拔功能。
为便于理解本申请的技术方案,下面将结合附图对本申请提供的实现数据显示的方法进行说明。
参见图2所示,示出了本申请实施例中提供的实现网卡热插拔的系统实施例,该系统可以包括:
第一热插拔模块201以及第二热插拔模块202;第一热插拔模块的输入端与主板的第一供电链路相连,第一热插拔模块的输出端与网卡的第一供电端相连;第二热插拔模块的输入端与主板的第二供电链路相连,第二热插拔模块的输出端与网卡的第二供电端相连。
第一热插拔模块,用于将第一供电链路提供的第一电压输入网卡的第一供电端。
第二热插拔模块,用于将第二供电链路提供的第二电压输入网卡的第二供电端。
本实施例中,在主板的第一供电链路与网卡的第一供电端之间增加了第一热插拔模块,在主板的第二供电链路与网卡的第二供电端之间增加了第二热插拔模块,由第一热插拔模块将第一供电链路提供的第一电压输入网卡的第一供电端,由第二热插拔模块将第二供电链路提供的第二电压输入网卡的第二供电端,从而为网卡供电。
在实际应用中,网卡可以为OCP3.0网卡,可以在主板的上第一供电链路P12V_AUX增加第一热插拔模块,在主板的上第二供电链路P3V3_AUX增加第二热插拔模块,实现主板和OCP3.0网卡的供电隔离。第一热插拔模块将第一供电链路P12V_AUX提供的第一电压转换为电压P12V_AUX_OCP,为OCP3.0网卡提供12V电压,将第二供电链路P3V3_AUX提供的第二电压转换为电压P3V3_AUX_OCP,为OCP3.0网卡提供3.3V电压,保证网卡正常工作。P12V_AUX提供的第一电压与电压P12V_AUX_OCP的值可以相同,P3V3_AUX提供的第二电压与电压P3V3_AUX_OCP的值可以相同。
这样,本申请实施例通过在主板向网卡的供电链路上增加热插拔模块,实现主板和网卡的供电隔离,保证热插拔操作时对主板供电链路无干扰,实现网卡的热插拔功能。
参见图3所示,示出了本申请实施例中第一热插拔模块的示意图,第一热插拔模块可以包括:
第一控制芯片单元301、第一电流反馈单元302以及第一导通单元303;第一控制芯片单元与第一电流反馈单元相连,第一电流反馈单元与第一导通单元相连。
第一电流反馈单元,用于向第一控制芯片单元输入第一电压经过第一精密电阻后的第一电压差。
第一控制芯片单元,用于当第一供电链路提供的第一电压达到第一预设条件时,驱动第一导通单元导通;根据第一电压差计算第一工作电流,当第一工作电流超过第一电流阈值,驱动第一导通单元关断。
第一导通单元,用于在导通时将第一供电链路提供的第一电压输入网卡的 第一供电端;在关断时向网卡的第一供电端输入零伏电压。
也即在本实施例中,第一热插拔模块在具体工作过程中,如果第一电压可以使能第一控制芯片单元中的第一控制芯片,驱动第一导通单元导通,则将第一电压输入至网卡的第一供电端;同时,实时第一控制芯片单元实时监测工作电流,当出现过流时,第一导通单元关断,停止为网卡供电。则第一热插拔模块提供过流保护功能,可避免网卡内部短路时造成主板掉电的问题,增加设计可靠性。
参见图4所示,示出了本申请实施例中第一热插拔模块的一种具体实现示意图,其中,第一控制芯片单元可以包括:
第一控制芯片U1、第一电阻R1、第二电阻R2以及第三电阻R3。
第一控制芯片U1的电源管脚VCC与主板的第一供电链路P12V_AUX相连。
主板的第一供电链路P12V_AUX与第一电阻R1的第一端相连,第一电阻R1的第二端分别与第二电阻R2的第一端以及第一控制芯片U1的使能管脚EN相连,第二电阻R2的第二端接地。
第三电阻R3的第一端与第一控制芯片U1的过流保护管脚Ilim相连,第三电阻R3的第二端接地。
在一种可能的实现方式中,第一控制芯片单元还包括:第一电容C1。
第一电容C1的第一端分别与第二电阻R2的第一端以及第一控制芯片U1的使能管脚EN相连;第一电容C1的第二端接地。
继续基于图4进行说明,在本申请实施例一种可能的实现方式中,第一电流反馈单元可以包括:
第一精密电阻R7、第二电容C2、第三电容C3以及第四电容C4。
主板的第一供电链路P12V_AUX与第一精密电阻R7的第一端相连,第一精密电阻R7的第一端与第一控制芯片U1的第一反馈管脚CSP相连,第一精密电阻R7的第二端分别与第一控制芯片U1的第二反馈管脚CSN以及第一导通单元相连。
第二电容C2的第一端分别与第一精密电阻R7的第一端以及第一控制芯片U1的第一反馈管脚CSP相连,第二电容C2的第二端分别与第一精密电阻 R7的第二端以及第一控制芯片U1的第二反馈管脚CSN相连。
第三电容C3的第一端与第二电容C2的第一端相连,第三电容C3的第二端接地。
第四电容C4的第一端与第二电容C2的第二端相连,第四电容C4的第二端接地。
在本申请实施例一种可能的实现方式中,第一导通单元可以为第一MOS管MOSFET1,第一MOS管MOSFET1的控制端与第一控制芯片U1的驱动管脚Gate相连,第一MOS管MOSFET1的第一端与第一精密电阻R7的第二端相连,第一MOS管MOSFET1的第二端与网卡的第一供电端相连,输出P12V_AUX_OCP。
以下对第一热插拔模块的工作原理进行说明。
在第一控制芯片单元,输入电压P12V_AUX直接连接至第一控制芯片U1的VCC管脚,为第一控制芯片U1提供工作电压。输入电压P12V_AUX经过第一电阻R1和第二电阻R2分压后连接至第一控制芯片U1的EN管脚,为第一控制芯片U1提供使能驱动信号。
第一控制芯片U1的EN管脚内部设定有门槛阈值V0,当输入电压P12V_AUX经第一电阻R1和第二电阻R2分压后的电压大于或等于V0时,第一控制芯片U1的Gate管脚将输出高电平,驱动MOSFET1导通,第一热插拔模块输出P12V_AUX_OCP电压,为网卡供电,例如为网卡提供12V电压。第一控制芯片U1的EN管脚增加高频滤波电容C1,滤除输入电压P12V_AUX带来的高频杂讯干扰,避免第一控制芯片U1误动作现象发生。
第一控制芯片U1的Ilim管脚经由第三电阻R3直接接地,设定第一热插拔模块的过流保护点I0,其中I0=k1*R3,其中k1为过流保护系数,由第一控制芯片U1决定。当第一电流反馈单元监测到工作电流I1大于过流保护点I0时,第一控制芯片U1的Gate管脚输出低电平,MOSFET1关断,第一热插拔模块输出电压为0,停止为网卡供电。
在第一电流反馈单元,第一精密电阻R7两端连接第一控制芯片U1的CSN和CSP管脚,用于采集第一精密电阻R7两端的压差V1,进一步计算输入电流。输入电压P12V_AUX流经第一精密电阻R7的工作电流I1的计算公式为 I1=V1/R7。
第二电容C2两端连接第一精密电阻R7两端,用来滤除共模干扰。第三电容C3和第四电容C4一端分别接两条电流反馈链路,另一端分别接地,用来滤除差模干扰。
在第一导通单元,MOSFET1的控制器(gate极)连接第一控制芯片U1的Gate管脚,由第一控制芯片U1控制其导通和关断。
从而第一热插拔模块实现主板的第一供电链路与网卡的第一供电端之间的供电隔离,可以为网卡提供第一电压。
参见图5所示,示出了本申请实施例中第二热插拔模块的示意图,第二热插拔模块的结构和第一热插拔模块的结构类似,第二热插拔模块可以包括:
第二控制芯片单元501、第二电流反馈单元502以及第二导通单元503;第二控制芯片单元与第二电流反馈单元相连,第二电流反馈单元与第二导通单元相连。
第二电流反馈单元,用于向第二控制芯片单元输入第二电压经过第二精密电阻后的第二电压差。
第二控制芯片单元,用于当第二供电链路提供的第二电压达到第二预设条件时,驱动第二导通单元导通;根据第二电压差计算第二工作电流,当第二工作电流超过第二电流阈值,驱动第二导通单元关断。
第二导通单元,用于在导通时将第二供电链路提供的第二电压输入网卡的第二供电端;在关断时向网卡的第二供电端输入零伏电压。
也即在本实施例中,第二热插拔模块在具体工作过程中,如果第二电压可以使能第二控制芯片单元中的第二控制芯片,驱动第二导通单元导通,则将第二电压输入至网卡的第二供电端;同时,实时第二控制芯片单元实时监测工作电流,当出现过流时,第二导通单元关断,停止为网卡供电。则第二热插拔模块提供过流保护功能,可避免网卡内部短路时造成主板掉电的问题,增加设计可靠性。
参见图6所示,示出了本申请实施例中第二热插拔模块的一种具体实现示意图,其中,第二控制芯片单元可以包括:
第二控制芯片U2、第四电阻R4、第五电阻R5以及第六电阻R6。
第二控制芯片U2的电源管脚VCC与主板的第二供电链路P3V3_AUX相连。
主板的第二供电链路P3V3_AUX与第四电阻R4的第一端相连,第四电阻R4的第二端分别与第五电阻R5的第一端以及第二控制芯片U2的使能管脚EN相连,第五电阻R5的第二端接地。
第六电阻R6的第一端与第二控制芯片U2的过流保护管脚Ilim相连,第六电阻R6的第二端接地。
在一种可能的实现方式中,第二控制芯片单元还包括:第五电容C5。
第五电容C5的第一端分别与第五电阻R5的第一端以及第二控制芯片U2的使能管脚EN相连;第五电容C5的第二端接地。
继续基于图6进行说明,在本申请实施例一种可能的实现方式中,第二电流反馈单元可以包括:
第二精密电阻R8、第六电容C6、第七电容C7以及第八电容C8。
主板的第二供电链路P3V3_AUX与第二精密电阻R8的第一端相连,第二精密电阻R8的第一端与第二控制芯片U2的第一反馈管脚CSP相连,第二精密电阻R8的第二端分别与第二控制芯片U2的第二反馈管脚CSN以及第二导通单元相连。
第六电容C6的第一端分别与第二精密电阻R8的第一端以及第二控制芯片U2的第一反馈管脚CSP相连,第六电容C6的第二端分别与第二精密电阻R8的第二端以及第二控制芯片U2的第二反馈管脚CSN相连。
第七电容C7的第一端与第六电容C6的第一端相连,第七电容C7的第二端接地。
第八电容C8的第一端与第六电容C6的第二端相连,第八电容C8的第二端接地。
在本申请实施例一种可能的实现方式中,第二导通单元可以为第二MOS管MOSFET2,第二MOS管MOSFET2的控制端与第二控制芯片U2的驱动管脚Gate相连,第二MOS管MOSFET2的第一端与第二精密电阻R8的第二端相连,第二MOS管MOSFET2的第二端与网卡的第二供电端相连,输出P3V3_AUX_OCP。
第二热插拔模块的工作原理与第一热插拔模块的工作原理类似,以下对第二热插拔模块的工作原理进行说明。
在第二控制芯片单元,输入电压P3V3_AUX直接连接至第二控制芯片U2的VCC管脚,为第二控制芯片U2提供工作电压。输入电压P3V3_AUX经过第四电阻R4和第五电阻R5分压后连接至第二控制芯片U2的EN管脚,为第二控制芯片U2提供使能驱动信号。
第二控制芯片U2的EN管脚内部设定有门槛阈值V0’,当输入电压P3V3_AUX经第四电阻R4和第五电阻R5分压后的电压大于或等于V0’时,第二控制芯片U2的Gate管脚将输出高电平,驱动MOSFET2导通,第二热插拔模块输出P3V3_AUX_OCP电压,为网卡供电,例如为网卡提供3.3V电压。第二控制芯片U2的EN管脚增加高频滤波电容C5,滤除输入电压P3V3_AUX带来的高频杂讯干扰,避免第二控制芯片U2误动作现象发生。
第二控制芯片U2的Ilim管脚经由第六电阻R6直接接地,设定第二热插拔模块的过流保护点I0’,其中I0’=k2*R6,其中k2为过流保护系数,由第二控制芯片U2决定。当第二电流反馈单元监测到工作电流I1’大于过流保护点I0’时,第二控制芯片U2的Gate管脚输出低电平,MOSFET2关断,第二热插拔模块输出电压为0,停止为网卡供电。
在第二电流反馈单元,第二精密电阻R8两端连接第二控制芯片U2的CSN和CSP管脚,用于采集第二精密电阻R8两端的压差V1’,进一步计算输入电流。输入电压P3V3_AUX流经第二精密电阻R8的工作电流I1’的计算公式为I1’=V1’/R8。
第六电容C6两端连接第二精密电阻R8两端,用来滤除共模干扰。第七电容C7和第八电容C8一端分别接两条电流反馈链路,另一端分别接地,用来滤除差模干扰。
在第二导通单元,MOSFET2的控制器(gate极)连接第二控制芯片U2的Gate管脚,由第二控制芯片U2控制其导通和关断。
从而第二热插拔模块实现主板的第二供电链路与网卡的第二供电端之间的供电隔离,可以为网卡提供第二电压。
本申请实施例通过在主板向网卡的供电链路上增加热插拔模块,实现主板 和网卡的供电隔离,保证热插拔操作时对主板供电链路无干扰,实现网卡的热插拔功能。同时,具有过流保护功能,避免网卡内部短路时造成主板掉电的问题。
需要说明的是,本说明书中各个实施例采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似部分互相参见即可。对于实施例公开的系统或装置而言,由于其与实施例公开的方法相对应,所以描述的比较简单,相关之处参见方法部分说明即可。
应当理解,在本申请中,“至少一个(项)”是指一个或者多个,“多个”是指两个或两个以上。“和/或”,用于描述关联对象的关联关系,表示可以存在三种关系,例如,“A和/或B”可以表示:只存在A,只存在B以及同时存在A和B三种情况,其中A,B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达,是指这些项中的任意组合,包括单项(个)或复数项(个)的任意组合。例如,a,b或c中的至少一项(个),可以表示:a,b,c,“a和b”,“a和c”,“b和c”,或“a和b和c”,其中a,b,c可以是单个,也可以是多个。
还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
结合本文中所公开的实施例描述的方法或算法的步骤可以直接用硬件、处理器执行的软件模块,或者二者的结合来实施。软件模块可以置于随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM、或技术领域内所公知的任意其它形式的存储介质中。
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本 申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下,在其它实施例中实现。因此,本申请将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (11)

  1. 一种实现网卡热插拔的系统,其特征在于,所述系统包括:
    第一热插拔模块以及第二热插拔模块;所述第一热插拔模块的输入端与主板的第一供电链路相连,所述第一热插拔模块的输出端与网卡的第一供电端相连;所述第二热插拔模块的输入端与所述主板的第二供电链路相连,所述第二热插拔模块的输出端与所述网卡的第二供电端相连;
    所述第一热插拔模块,用于将所述第一供电链路提供的第一电压输入所述网卡的第一供电端;
    所述第二热插拔模块,用于将所述第二供电链路提供的第二电压输入所述网卡的第二供电端。
  2. 根据权利要求1所述的系统,其特征在于,所述第一热插拔模块包括:
    第一控制芯片单元、第一电流反馈单元以及第一导通单元;所述第一控制芯片单元与所述第一电流反馈单元相连,所述第一电流反馈单元与所述第一导通单元相连;
    所述第一电流反馈单元,用于向所述第一控制芯片单元输入所述第一电压经过第一精密电阻后的第一电压差;
    所述第一控制芯片单元,用于当所述第一供电链路提供的第一电压达到第一预设条件时,驱动所述第一导通单元导通;根据所述第一电压差计算第一工作电流,当所述第一工作电流超过第一电流阈值,驱动所述第一导通单元关断;
    所述第一导通单元,用于在导通时将所述第一供电链路提供的第一电压输入所述网卡的第一供电端;在关断时向所述网卡的第一供电端输入零伏电压。
  3. 根据权利要求2所述的系统,其特征在于,所述第一控制芯片单元包括:
    第一控制芯片、第一电阻、第二电阻以及第三电阻;
    所述第一控制芯片的电源管脚与所述主板的第一供电链路相连;
    所述主板的第一供电链路与所述第一电阻的第一端相连,所述第一电 阻的第二端分别与所述第二电阻的第一端以及所述第一控制芯片的使能管脚相连,所述第二电阻的第二端接地;
    所述第三电阻的第一端与所述第一控制芯片的过流保护管脚相连,所述第三电阻的第二端接地。
  4. 根据权利要求3所述的系统,其特征在于,所述第一控制芯片单元还包括:第一电容;
    所述第一电容的第一端分别与所述第二电阻的第一端以及所述第一控制芯片的使能管脚相连;所述第一电容的第二端接地。
  5. 根据权利要求3所述的系统,其特征在于,所述第一电流反馈单元包括:
    所述第一精密电阻、第二电容、第三电容以及第四电容;
    所述主板的第一供电链路与所述第一精密电阻的第一端相连,所述第一精密电阻的第一端与所述第一控制芯片的第一反馈管脚相连,所述第一精密电阻的第二端分别与所述第一控制芯片的第二反馈管脚以及所述第一导通单元相连;
    所述第二电容的第一端分别与所述第一精密电阻的第一端以及所述第一控制芯片的第一反馈管脚相连,所述第二电容的第二端分别与所述第一精密电阻的第二端以及所述第一控制芯片的第二反馈管脚相连;
    所述第三电容的第一端与所述第二电容的第一端相连,所述第三电容的第二端接地;
    所述第四电容的第一端与所述第二电容的第二端相连,所述第四电容的第二端接地。
  6. 根据权利要求5所述的系统,其特征在于,所述第一导通单元为第一MOS管,所述第一MOS管的控制端与所述第一控制芯片的驱动管脚相连,所述第一MOS管的第一端与所述第一精密电阻的第二端相连,所述第一MOS管的第二端与所述网卡的第一供电端相连。
  7. 根据权利要求1所述的系统,其特征在于,所述第二热插拔模块包括:
    第二控制芯片单元、第二电流反馈单元以及第二导通单元;所述第二 控制芯片单元与所述第二电流反馈单元相连,所述第二电流反馈单元与所述第二导通单元相连;
    所述第二电流反馈单元,用于向所述第二控制芯片单元输入所述第二电压经过第二精密电阻后的第二电压差;
    所述第二控制芯片单元,用于当所述第二供电链路提供的第二电压达到第二预设条件时,驱动所述第二导通单元导通;根据所述第二电压差计算第二工作电流,当所述第二工作电流超过第二电流阈值,驱动所述第二导通单元关断;
    所述第二导通单元,用于在导通时将所述第二供电链路提供的第二电压输入所述网卡的第二供电端;在关断时向所述网卡的第二供电端输入零伏电压。
  8. 根据权利要求7所述的系统,其特征在于,所述第二控制芯片单元包括:
    第二控制芯片、第四电阻、第五电阻以及第六电阻;
    所述第二控制芯片的电源管脚与所述主板的第二供电链路相连;
    所述主板的第二供电链路与所述第四电阻的第一端相连,所述第四电阻的第二端分别与所述第五电阻的第一端以及所述第二控制芯片的使能管脚相连,所述第五电阻的第二端接地;
    所述第六电阻的第一端与所述第二控制芯片的过流保护管脚相连,所述第六电阻的第二端接地。
  9. 根据权利要求8所述的系统,其特征在于,所述第二控制芯片单元还包括:第五电容;
    所述第五电容的第一端分别与所述第五电阻的第一端以及所述第二控制芯片的使能管脚相连;所述第五电容的第二端接地。
  10. 根据权利要求8所述的系统,其特征在于,所述第二电流反馈单元包括:
    所述第二精密电阻、第六电容、第七电容以及第八电容;
    所述主板的第二供电链路与所述第二精密电阻的第一端相连,所述第二精密电阻的第一端与所述第二控制芯片的第一反馈管脚相连,所述第二 精密电阻的第二端分别与所述第二控制芯片的第二反馈管脚以及所述第二导通单元相连;
    所述第六电容的第一端分别与所述第二精密电阻的第一端以及所述第二控制芯片的第一反馈管脚相连,所述第六电容的第二端分别与所述第二精密电阻的第二端以及所述第二控制芯片的第二反馈管脚相连;
    所述第七电容的第一端与所述第六电容的第一端相连,所述第七电容的第二端接地;
    所述第八电容的第一端与所述第六电容的第二端相连,所述第八电容的第二端接地。
  11. 根据权利要求10所述的系统,其特征在于,所述第二导通单元为第二MOS管,所述第二MOS管的控制端与所述第二控制芯片的驱动管脚相连,所述第二MOS管的第一端与所述第二精密电阻的第二端相连,所述第二MOS管的第二端与所述网卡的第二供电端相连。
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