WO2020056881A1 - 阵列基板及制造方法、显示装置 - Google Patents

阵列基板及制造方法、显示装置 Download PDF

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Publication number
WO2020056881A1
WO2020056881A1 PCT/CN2018/114043 CN2018114043W WO2020056881A1 WO 2020056881 A1 WO2020056881 A1 WO 2020056881A1 CN 2018114043 W CN2018114043 W CN 2018114043W WO 2020056881 A1 WO2020056881 A1 WO 2020056881A1
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Prior art keywords
conductive layer
substrate
layer
display area
area
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PCT/CN2018/114043
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English (en)
French (fr)
Inventor
汪衎
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武汉华星光电半导体显示技术有限公司
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Priority to US16/464,595 priority Critical patent/US10978542B2/en
Publication of WO2020056881A1 publication Critical patent/WO2020056881A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/40—Thermal treatment, e.g. annealing in the presence of a solvent vapour
    • H10K71/441—Thermal treatment, e.g. annealing in the presence of a solvent vapour in the presence of solvent vapors, e.g. solvent vapour annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to the field of liquid crystal displays, and in particular, to an array substrate, a manufacturing method thereof, and a display device.
  • OLED devices include the main display area, such as pixels, touch electrodes, etc., and peripheral secondary functional areas, such as the driving circuit board Cell on Film (COF); the two need to be connected by wires.
  • main display area such as pixels, touch electrodes, etc.
  • peripheral secondary functional areas such as the driving circuit board Cell on Film (COF); the two need to be connected by wires.
  • COF Cell on Film
  • the prior art bends the wire area, thereby placing the secondary functional area below the main display area, and shortening the distance between the main display area and the frame of the OLED device.
  • the secondary functional area needs to be completely bent below the main display area, the bending angle is large, so the flexibility requirements of the bending area are higher, the product cost is increased, and there are risks such as film breakage at the bend, resulting in Defective product.
  • the present application provides an array substrate, a manufacturing method and a display device, so as to solve the technical problem that the prior art needs to provide a bending area to completely bend the secondary functional area below the main display area.
  • An embodiment of the present application provides an array substrate including a primary display area and a secondary functional area.
  • the secondary functional area is disposed on at least one side of the primary display area.
  • the array substrate and the secondary function The corresponding sections of the zone include:
  • a first conductive layer disposed on a side of the substrate facing away from the main display area
  • a second conductive layer disposed on a side of the substrate that is directed to the main display area
  • the driving circuit board is disposed on a side of the first conductive layer facing away from the main display area;
  • the lines in the second conductive layer are electrically connected to the lines in the main display area; the lines in the driving circuit board are electrically connected to the lines in the first conductive layer.
  • a portion of the array substrate corresponding to the secondary functional region further includes an insulating layer, the insulating layer is provided between the substrate and the second conductive layer, and the conductive layer The through layer penetrates the substrate and the insulating layer.
  • the insulating layer includes an inorganic insulating layer.
  • a portion of the array substrate corresponding to the secondary functional region further includes a packaging layer, and the packaging layer covers the second conductive layer.
  • the substrate includes a flexible substrate.
  • the second conductive layer and the conductive layer are formed in a same process.
  • the conductive layer is formed by doping the substrate.
  • An embodiment of the present application provides a display device including an array substrate.
  • the array substrate includes a primary display area and a secondary functional area.
  • the secondary functional area is disposed on at least one side of the primary display area.
  • the portion of the array substrate corresponding to the secondary functional area includes:
  • a first conductive layer disposed on a side of the substrate facing away from the main display area
  • a second conductive layer disposed on a side of the substrate that is directed to the main display area
  • the driving circuit board is disposed on a side of the first conductive layer facing away from the main display area;
  • the lines in the second conductive layer are electrically connected to the lines in the main display area; the lines in the driving circuit board are electrically connected to the lines in the first conductive layer.
  • a portion of the array substrate corresponding to the secondary functional region further includes an insulating layer, the insulating layer is provided between the substrate and the second conductive layer, and the conduction A layer penetrates the substrate and the insulating layer.
  • the insulating layer includes an inorganic insulating layer.
  • a portion of the array substrate corresponding to the secondary functional region further includes a packaging layer, and the packaging layer covers the second conductive layer.
  • the substrate includes a flexible substrate.
  • An embodiment of the present application provides a method for manufacturing an array substrate, which includes:
  • the first substrate is provided with a primary display area and a secondary functional area, and the secondary functional area is disposed on at least one side of the primary display area;
  • the driving circuit board is adhered to the surfaces of the second substrate and the first conductive layer, and the driving circuit board and the main display area on the first substrate are conducted.
  • the step of preparing a release layer on the flexible layer includes: using a thermal evaporation process to prepare a release layer on the flexible layer.
  • a material of the release layer is a parylene polymer material.
  • a material of the flexible layer is polyimide.
  • a material of the first conductive layer is one of aluminum, copper, titanium, indium tin oxide, and indium-zinc oxide-based oxide.
  • a material of the first conductive layer is one of aluminum, copper, titanium, indium tin oxide, and indium-zinc oxide-based oxide.
  • the method further includes: preparing an insulating layer on the second substrate.
  • the step of preparing a conductive layer and a second conductive layer on the second substrate includes:
  • connection portion of the second conductive layer forms the conductive layer.
  • the present application provides a new array substrate, a manufacturing method thereof, and a display device.
  • the portion of the array substrate corresponding to the secondary functional area includes a substrate, a first conductive layer and a second conductive layer provided on opposite surfaces of the substrate, and The conductive layer penetrating the substrate, the conductive layer electrically connects the first conductive layer and the second conductive layer, the driving circuit board provided on the surface of the first conductive layer, and the lines in the second conductive layer are electrically connected with the lines of the main display area.
  • the circuit of the driving circuit board is electrically connected to the circuit of the first conductive layer; this eliminates the bending area that was originally used to connect the main display area and the secondary functional area, and places the COF directly on the back of the substrate.
  • the conduction layer connects the main display area with the COF, which eliminates the need for bending, which improves the reliability of the device and solves the technical problem that the prior art needs to set a bending area to completely bend the secondary functional area below the main display area. It also further reduces the distance between the main display area and the frame of the display panel, and improves the user experience of the OLED device.
  • FIG. 1 is a first schematic diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 2 is a second schematic diagram of an array substrate provided by an embodiment of the present application.
  • 3a to 3p are schematic diagrams of manufacturing an array substrate provided by an embodiment of the present application.
  • the array substrate provided in the present application includes a main display area and a secondary functional area.
  • the secondary functional area is disposed on at least one side of the main display area.
  • the corresponding sections of the ribbon include:
  • the first conductive layer 102 is disposed on a side of the substrate 101 facing away from the main display area;
  • the second conductive layer 103 is disposed on a side of the substrate 101 that faces the main display area;
  • the conductive layer 104 penetrates the substrate 101 and electrically connects the lines of the first conductive layer 102 and the lines of the second conductive layer 103;
  • the driving circuit board 105 is disposed on a side of the first conductive layer 102 facing away from the main display area;
  • the lines in the second conductive layer 103 are electrically connected to the lines in the main display area; the lines in the driving circuit board 105 are electrically connected to the lines in the first conductive layer 102.
  • the substrate includes a flexible substrate.
  • the conductive layer is formed by doping the substrate.
  • a portion of the array substrate provided in the present application corresponding to the secondary functional region further includes an insulating layer 106, and the insulating layer 106 is provided on the substrate 101 and the first Between the two conductive layers 103, the conducting layer 104 penetrates the substrate 101 and the insulating layer 106.
  • the insulating layer includes an inorganic insulating layer.
  • a portion of the array substrate provided in the present application corresponding to the secondary functional area further includes an encapsulation layer 107.
  • the encapsulation layer 107 covers the second conductive layer 103. ⁇ ⁇ consistent conductive layer 103.
  • the second conductive layer and the conductive layer are formed in the same process.
  • an embodiment of the present application provides a method for manufacturing an array substrate, which includes the following steps:
  • Step 1 Provide a first substrate, where the first substrate is provided with a primary display area and a secondary functional area, and the secondary functional area is disposed on at least one side of the primary display area;
  • a first substrate is provided as shown in FIG. 3a, and the first substrate is provided with a primary display area and a secondary functional area.
  • Step 2 preparing a flexible layer in a secondary functional area of the first substrate
  • a flexible polymer material layer is prepared on a first substrate, such as a rigid transparent substrate (such as glass), that is, the flexible layer 301 polymer material is not required, such as PI (polyimide), etc .; There is no requirement on the thickness of the flexible layer 301.
  • the flexible layer 301 is located outside the main display area (including the OLED light-emitting area, the packaging area, the module area, and the touch area) and cannot cover the main display area.
  • Step 3 A release layer is prepared on the flexible layer, and the release layer covers the flexible layer;
  • a previous release layer 302 is prepared above the flexible layer 301.
  • the preparation process is not required. Processes such as thermal evaporation and CVD (Chemical Vapor Deposition, chemical vapor deposition) can be used.
  • the material can be parylene. Para-xylene) polymer materials, such as Parylene C, Parylene N, Parylene AF4, etc. This type of material has high temperature resistance, UV resistance, and no corrosion to the substrate.
  • the release layer 302 is non-adhesive and easy to peel from the substrate surface. Display area, no thickness required.
  • Step 4 Prepare a first conductive layer on the release layer
  • a first conductive layer 303 is prepared over the release layer 302, and there is no requirement for conductive materials, such as aluminum Al, copper Cu, titanium Ti, indium tin oxide ITO, indium oxide-zinc oxide oxide IZO, etc .; There are no process requirements, such as: Physical Vapor Deposition (PVD), sputtering Sputting, etc .; the coverage area of the first conductive layer 303 cannot exceed the coverage area of the flexible layer 301 below, and the thickness is not required.
  • PVD Physical Vapor Deposition
  • a patterning process is performed on the first conductive layer 303 to form a circuit of the first conductive layer.
  • Step 5 A second substrate is prepared in the secondary functional area of the first substrate, and the second substrate covers the first conductive layer;
  • the surface of the secondary functional area is coated with a flexible polymer material layer to form a second substrate such as a flexible substrate layer 304.
  • the polymer material is not required, such as PI (polyimide), etc .; the flexible substrate
  • the thickness of the layer 304 is not mandatory, but it must be able to completely cover the flexible layer 301, the release layer 302, and the first conductive layer 303.
  • Step 6 A conductive layer and a second conductive layer are prepared on the second substrate, and the first conductive layer is connected to the second conductive layer through the conductive layer;
  • This step includes: preparing an insulating layer on the second substrate; etching the second substrate and the insulating layer in a part of the area corresponding to the first conductive layer; and the etching area leaks out of the first substrate.
  • a conductive layer; preparing the second conductive layer on the insulating layer; the second conductive layer covering the insulating layer and the first conductive layer in the etched area; the first conductive layer in the etched area A connection portion between the conductive layer and the second conductive layer forms the conductive layer.
  • an inorganic insulating layer 305 is prepared above the flexible substrate layer 304 to prevent water and oxygen from invading from below. Materials are not required, such as SiNx, SiOxNy, SiOx, AlOx, ZrOx, etc., and the inorganic insulating layer 305 is required to be completely The thickness of the inorganic insulating film layer is not required to cover the surface of the non-display area.
  • the inorganic insulating film layer 305 and the flexible substrate layer 304 over the first conductive layer 303 are respectively etched by using an exposure-development-etching process to prepare corresponding patterns, and it is required that the boundaries of the pattern regions not exceed the first
  • the boundary of a conductive layer 303, the inorganic insulating film layer 305 and the flexible substrate layer 304 at the pattern are completely etched, and the first conductive layer 303 is exposed on the surface; the number and the pattern of the pattern are not required.
  • the surface of the inorganic insulating film layer 305 is shown in FIG. 3i.
  • a second conductive layer 306 is deposited in the second conductive layer setting area on the entire surface of the secondary functional area.
  • the second conductive layer 306 is in communication with the first conductive layer 303 at the pattern.
  • Requirements such as Al, Cu, Ti, ITO, IZO, etc .; there are no requirements for the preparation process, such as: PVD, Sputting, etc .; thickness is not required.
  • a patterning process is performed on the second conductive layer 306 to obtain a circuit of the second conductive layer.
  • an encapsulation layer 307 is deposited on the entire surface of the secondary functional area.
  • Step 7 Strip the first substrate, the flexible layer, and the peeling layer;
  • the laser lift-off technology Laser Lift-off is used to separate the flexible substrate layer 304 and the flexible layer 301 from the first substrate.
  • the peeling layer 302 and the flexible layer 301 below the peeling layer 302 are removed from below.
  • the tearing process of the peeling layer 302 is not required.
  • a bare first conductive layer 303 is obtained on the lower surface of the layer 304.
  • Step 8 The driving circuit board 308 is adhered to the surfaces of the second substrate and the first conductive layer, and the driving circuit board 308 and the main display area on the first substrate are conducted.
  • the driving circuit board COF is directly bonded to the lower surface of the first conductive layer under the flexible substrate, so that the COF and the main display area can be conducted.
  • an embodiment of the present application provides a display device including an array substrate.
  • the array substrate includes a primary display area and a secondary functional area.
  • the secondary functional area is disposed on at least one side of the primary display area.
  • the portion of the array substrate corresponding to the secondary functional area includes:
  • the first conductive layer 102 is disposed on a side of the substrate 101 facing away from the main display area;
  • the second conductive layer 103 is disposed on a side of the substrate 101 that faces the main display area;
  • the conductive layer 104 penetrates the substrate 101 and electrically connects the lines of the first conductive layer 102 and the lines of the second conductive layer 103;
  • the driving circuit board 105 is disposed on a side of the first conductive layer 102 facing away from the main display area;
  • the lines in the second conductive layer 103 are electrically connected to the lines in the main display area; the lines in the driving circuit board 105 are electrically connected to the lines in the first conductive layer 102.
  • the substrate includes a flexible substrate.
  • the conductive layer is formed by doping the substrate.
  • a portion of the array substrate corresponding to the secondary functional region further includes an insulating layer 106, which is disposed between the substrate 101 and the second conductive layer 103.
  • the through layer 104 penetrates the substrate 101 and the insulating layer 106.
  • the insulating layer includes an inorganic insulating layer.
  • a portion of the array substrate corresponding to the secondary functional area further includes an encapsulation layer 107 that covers the second conductive layer 103 for protecting the conductive layer 103.
  • the second conductive layer and the conductive layer are formed in the same process.
  • the present application provides a new array substrate, a display device, and a manufacturing method.
  • the array substrate includes a primary display area and a secondary functional area.
  • a portion of the array substrate corresponding to the secondary functional area includes: a substrate; a first conductive layer provided on A side of the substrate facing away from the main display area; a second conductive layer provided on a side of the substrate pointing to the main display area; a conductive layer penetrating the substrate and electrically connecting a line of the first conductive layer A circuit with the second conductive layer; a driving circuit board provided on a side of the first conductive layer facing away from the main display area; wherein the circuit in the second conductive layer and the line in the main display area Electrical connection; the line of the driving circuit board is electrically connected to the line of the first conductive layer; this eliminates the bending area that was originally used to connect the main display area and the secondary functional area, and places the COF directly on the On the back of the substrate, the main display area and the COF are connected by a

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Abstract

一种阵列基板及制造方法、显示装置，该阵列基板与次要功能区对应的部分包括设于基板(101)相对两个表面的第一导电层(102)以及第二导电层(103)，第二导电层内的线路与主要显示区的线路电连接，驱动电路板(105)的线路与第一导电层的线路电连接，这样直接将COF放置于基板背面，利用贯通基板的导通层(104)连接主要显示区域与COF，无需再弯折。

Description

阵列基板及制造方法、显示装置 技术领域
本申请涉及液晶显示领域，尤其涉及一种阵列基板及制造方法、显示装置。
 背景技术
OLED器件包括了主要显示区，如像素点、触控电极等，以及外围的次要功能区，如驱动电路板Cell on Film（COF）；二者需要通过导线进行连接。
为了实现OLED器件的窄边框设计，现有技术将导线区域进行弯折，从而将次要功能区放置在主要显示区的下方，缩短主要显示区与OLED器件边框之间的距离。
由于需要将次要功能区域完全弯折至主要显示区下方，弯折角度大，因此对弯折区的柔韧性要求较高，增加了产品成本，同时弯折处存在膜层断裂等风险，导致产品不良。
即，现有技术需要设置弯折区将次要功能区域完全弯折至主要显示区下方的技术问题。
 技术问题
本申请提供一种阵列基板及制造方法、显示装置，以解决现有技术需要设置弯折区将次要功能区域完全弯折至主要显示区下方的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供了一种阵列基板，其包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
基板；
第一导电层，设于所述基板背离所述主要显示区的一面；
第二导电层，设于所述基板指向所述主要显示区的一面；
导通层，贯穿所述基板，电连接所述第一导电层的线路与所述第二导电层的线路；
驱动电路板，设于所述第一导电层背离所述主要显示区的一面；
其中，所述第二导电层内的线路与所述主要显示区的线路电连接；所述驱动电路板的线路与所述第一导电层的线路电连接。
在本申请的阵列基板中，所述阵列基板与所述次要功能区对应的部分还包括一绝缘层，所述绝缘层设于所述基板与所述第二导电层之间，所述导通层贯穿所述基板以及所述绝缘层。
在本申请的阵列基板中，所述绝缘层包括无机绝缘层。
在本申请的阵列基板中，所述阵列基板与所述次要功能区对应的部分还包括一封装层，所述封装层覆盖所述第二导电层。
在本申请的阵列基板中，所述基板包括一柔性基板。
在本申请的阵列基板中，所述第二导电层与所述导通层在同一道工艺内形成。
在本申请的阵列基板中，所述导通层为对所述基板进行掺杂形成。
本申请实施例提供了一种显示装置，其包括阵列基板，所述阵列基板包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
基板；
第一导电层，设于所述基板背离所述主要显示区的一面；
第二导电层，设于所述基板指向所述主要显示区的一面；
导通层，贯穿所述基板，电连接所述第一导电层的线路与所述第二导电层的线路；
驱动电路板，设于所述第一导电层背离所述主要显示区的一面；
其中，所述第二导电层内的线路与所述主要显示区的线路电连接；所述驱动电路板的线路与所述第一导电层的线路电连接。
在本申请的显示装置中，所述阵列基板与所述次要功能区对应的部分还包括绝缘层，所述绝缘层设于所述基板与所述第二导电层之间，所述导通层贯穿所述基板以及所述绝缘层。
在本申请的显示装置中，所述绝缘层包括无机绝缘层。
在本申请的显示装置中，所述阵列基板与所述次要功能区对应的部分还包括封装层，所述封装层覆盖所述第二导电层。
在本申请的显示装置中，所述基板包括柔性基板。
本申请实施例提供了一种阵列基板的制造方法，其包括：
提供第一基板，所述第一基板设置有主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧；
在所述第一基板的次要功能区内制备柔性层；
在所述柔性层上制备剥离层，所述剥离层覆盖所述柔性层；
在所述剥离层上制备第一导电层；
在所述第一基板的次要功能区内制备第二基板，所述第二基板覆盖所述第一导电层；
在所述第二基板上制备导通层以及第二导电层，并使所述第一导电层通过所述导通层与所述第二导电层导通；
剥离所述第一基板、所述柔性层以及所述剥离层；
将驱动电路板贴合在所述第二基板与所述第一导电层的表面，并使所述驱动电路板与所述第一基板上的主要显示区导通。
在本申请的制造方法中，所述在所述柔性层上制备剥离层的步骤包括：采用热蒸镀工艺，在所述柔性层上制备剥离层。
在本申请的制造方法中，所述剥离层的材料为聚对二甲苯类聚合物材料。
在本申请的制造方法中，所述柔性层的材料为聚酰亚胺。
在本申请的制造方法中，所述第一导电层的材料为铝、铜、钛、氧化铟锡、氧化铟‑氧化锌类氧化物中的一种。
在本申请的制造方法中，所述第一导电层的材料为铝、铜、钛、氧化铟锡、氧化铟‑氧化锌类氧化物中的一种。
在本申请的制造方法中，在所述第一基板的次要功能区内制备第二基板的步骤之后，还包括：在所述第二基板上制备绝缘层。
在本申请的制造方法中，所述在所述第二基板上制备导通层以及第二导电层的步骤包括：
在对应所述第一导电层的部分区域内，对所述第二基板以及所述绝缘层进行蚀刻；所述蚀刻区域漏出所述第一导电层；
在所述绝缘层上制备所述第二导电层；所述第二导电层覆盖所述绝缘层以及所述蚀刻区域内的第一导电层；所述蚀刻区域内所述第一导电层与所述第二导电层的连接部形成所述导通层。
 有益效果
本申请提供一种新的阵列基板及制造方法、显示装置，该阵列基板与次要功能区对应的部分包括:基板，设于基板相对两个表面的第一导电层以及第二导电层，以及贯穿基板的导通层，导通层电连接第一导电层和第二导电层，设于第一导电层表面的驱动电路板，第二导电层内的线路与主要显示区的线路电连接，驱动电路板的线路与第一导电层的线路电连接；这样就取消了原本用于连接主要显示区及次要功能区之间的弯折区，直接将COF放置于基板背面，利用贯通基板的导通层连接主要显示区域与COF，无需再弯折，提高了器件的可靠性，解决了现有技术需要设置弯折区将次要功能区域完全弯折至主要显示区下方的技术问题，同时也进一步降低了主要显示区距显示面板边框之间的间距，提高了OLED器件的用户体验。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的阵列基板的第一种示意图。
图2为本申请实施例提供的阵列基板的第二种示意图。
图3a至图3p为本申请实施例提供的阵列基板的制造示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
针对现有技术需要设置弯折区将次要功能区域完全弯折至主要显示区下方的技术问题，本申请能够解决该缺陷。
如图1所示，本申请提供的阵列基板，其包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
基板101；
第一导电层102，设于所述基板101背离所述主要显示区的一面；
第二导电层103，设于所述基板101指向所述主要显示区的一面；
导通层104，贯穿所述基板101，电连接所述第一导电层102的线路与所述第二导电层103的线路；
驱动电路板105，设于所述第一导电层102背离所述主要显示区的一面；
其中，所述第二导电层103内的线路与所述主要显示区的线路电连接；所述驱动电路板105的线路与所述第一导电层102的线路电连接。
在一种实施例中，为了增强设备韧性，所述基板包括柔性基板。
在一种实施例中，所述导通层为对所述基板进行掺杂形成。
在一种实施例中，如图2所示，本申请提供的阵列基板与所述次要功能区对应的部分还包括绝缘层106，所述绝缘层106设于所述基板101与所述第二导电层103之间，所述导通层104贯穿所述基板101以及所述绝缘层106。
在一种实施例中，所述绝缘层包括无机绝缘层。
在一种实施例中，如图2所示，本申请提供的阵列基板与所述次要功能区对应的部分还包括封装层107，所述封装层107覆盖所述第二导电层103，用于保护导电层103。
在一种实施例中，如图2所示，所述第二导电层与所述导通层在同一道工艺内形成。
为了得到上述实施例中的阵列基板，本申请实施例提供了一种阵列基板的制造方法，其包括以下步骤：
步骤1、提供第一基板，所述第一基板设置有主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧；
提供如图3a所示的第一基板，第一基板设置有主要显示区和次要功能区。
步骤2、在所述第一基板的次要功能区内制备柔性层；
如图3b所示，在第一基板，如硬性透明基板（如玻璃）上制备一层柔性聚合物材料层，即柔性层301聚合物材料不做要求，如PI（聚酰亚胺）等；对柔性层301的厚度不做要求，柔性层301位于主要显示区（包括OLED发光区域、封装区域、模组区域、触控区域）外，不能覆盖主要显示区。
步骤3、在所述柔性层上制备剥离层，所述剥离层覆盖所述柔性层；
如图3c所示，在柔性层301上方制备上一层剥离层302，制备工艺无要求，可采用热蒸镀、CVD（Chemical Vapor Deposition，化学气相淀积）等工艺，材料可为parylene（聚对二甲苯）类聚合物材料，如Parylene C、Parylene N、Parylene AF4等，该类材料具有耐高温、抗紫外、对基板无腐蚀，同时该剥离层302无粘性，易从基板表面剥离；要求剥离层302需完全覆盖柔性层301表面，不能覆盖主要显示区，厚度无要求。
步骤4、在所述剥离层上制备第一导电层；
如图3d所示，在剥离层302上方制备第一导电层303，导电材料无要求，如铝Al、铜Cu、钛Ti、氧化铟锡ITO、氧化铟‑氧化锌类氧化物IZO等；制备工艺无要求，如：PVD（Physical Vapor Deposition，物理气相沉积）、溅射Sputting等；要求第一导电层303覆盖区域不能超过下方柔性层301覆盖区域，厚度不做要求。
如图3e所示，对第一导电层303进行图案化处理，形成第一导电层的线路。
步骤5、在所述第一基板的次要功能区内制备第二基板，所述第二基板覆盖所述第一导电层；
如图3f所示，在次要功能区域表面涂覆柔性聚合物材料层，从而形成柔性基板层304等第二基板，聚合物材料不做要求，如PI（聚酰亚胺）等；柔性基板层304厚度无强制要求，但必须完全能包覆住柔性层301、剥离层302以及第一导电层303。
步骤6、在所述第二基板上制备导通层以及第二导电层，并使所述第一导电层通过所述导通层与所述第二导电层导通；
本步骤包括：在所述第二基板上制备绝缘层；在对应所述第一导电层的部分区域内，对所述第二基板以及所述绝缘层进行蚀刻；所述蚀刻区域漏出所述第一导电层；在所述绝缘层上制备所述第二导电层；所述第二导电层覆盖所述绝缘层以及所述蚀刻区域内的第一导电层；所述蚀刻区域内所述第一导电层与所述第二导电层的连接部形成所述导通层。
如图3g所示，在柔性基板层304上方制备无机绝缘层305，用于阻隔水氧从下方入侵，材料不做要求，如SiNx、SiOxNy、SiOx、AlOx、ZrOx等，要求无机绝缘层305完全覆盖非显示区域表面，无机绝缘膜层厚度无要求。
如图3h所示，利用曝光-显影-蚀刻工艺，分别对第一导电层303上方的无机绝缘膜层305以及柔性基板层304进行蚀刻，制备出相应图案，要求制备该图案区域边界不能超出第一导电层303边界，图案处无机绝缘膜层305以及柔性基板层304被完全蚀刻，表面露出第一导电层303；该图案的个数和图案不做要求。蚀刻处理后，无机绝缘膜层305的表面如图3i所示。
如图3j所示，在整个次要功能区表面的第二导电层设定区域内沉积第二导电层306，其中第二导电层306在图案处与第一导电层303相连通，导电材料无要求，如Al、Cu、Ti、ITO、IZO等；制备工艺无要求，如：PVD、Sputting等；厚度不做要求。
如图3k所示，对第二导电层306进行图案化处理，得到第二导电层的线路。
如图3l所示，在整个次要功能区表面沉积封装层307。
步骤7、剥离所述第一基板、所述柔性层以及所述剥离层；
如图3m以及图3n所示，利用激光剥离技术Laser Lift-off将柔性基板层304和柔性层301与第一基板进行分离。
如图3o所示，从下方撕除剥离层302以及剥离层302下方的柔性层301，剥离层302的撕膜工艺不做要求，如手工撕除或胶带粘黏后撕除，从而在柔性基板层304下表面获得裸露的第一导电层303。
步骤8、将驱动电路板308贴合在所述第二基板与所述第一导电层的表面，并使所述驱动电路板308与所述第一基板上的主要显示区导通。
如图3p所示，直接将驱动电路板COF贴合在柔性基板下方的第一导电层下表面，即可实现COF与主要显示区域的导通。
对应的，本申请实施例提供了一种显示装置，其包括阵列基板，该阵列基板包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
基板101；
第一导电层102，设于所述基板101背离所述主要显示区的一面；
第二导电层103，设于所述基板101指向所述主要显示区的一面；
导通层104，贯穿所述基板101，电连接所述第一导电层102的线路与所述第二导电层103的线路；
驱动电路板105，设于所述第一导电层102背离所述主要显示区的一面；
其中，所述第二导电层103内的线路与所述主要显示区的线路电连接；所述驱动电路板105的线路与所述第一导电层102的线路电连接。
在一种实施例中，为了增强设备韧性，所述基板包括柔性基板。
在一种实施例中，所述导通层为对所述基板进行掺杂形成。
在一种实施例中，阵列基板与所述次要功能区对应的部分还包括绝缘层106，所述绝缘层106设于所述基板101与所述第二导电层103之间，所述导通层104贯穿所述基板101以及所述绝缘层106。
在一种实施例中，所述绝缘层包括无机绝缘层。
在一种实施例中，阵列基板与所述次要功能区对应的部分还包括封装层107，所述封装层107覆盖所述第二导电层103，用于保护导电层103。
在一种实施例中，所述第二导电层与所述导通层在同一道工艺内形成。
根据上述实施例可知：
本申请提供一种新的阵列基板、显示装置及制造方法，该阵列基板包括主要显示区和次要功能区，阵列基板与次要功能区对应的部分包括:基板；第一导电层，设于所述基板背离所述主要显示区的一面；第二导电层，设于所述基板指向所述主要显示区的一面；导通层，贯穿所述基板，电连接所述第一导电层的线路与所述第二导电层的线路；驱动电路板，设于所述第一导电层背离所述主要显示区的一面； 其中，所述第二导电层内的线路与所述主要显示区的线路电连接；所述驱动电路板的线路与所述第一导电层的线路电连接；这样就取消了原本用于连接主要显示区及次要功能区之间的弯折区，直接将COF放置于基板背面，利用贯通基板的导通层连接主要显示区域与COF，无需再弯折，提高了器件的可靠性，解决了现有技术需要设置弯折区将次要功能区域完全弯折至主要显示区下方的技术问题，同时也进一步降低了主要显示区距显示面板边框之间的间距，提高了OLED器件的用户体验。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种阵列基板，其包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
    基板；
    第一导电层，设于所述基板背离所述主要显示区的一面；
    第二导电层，设于所述基板指向所述主要显示区的一面；
    导通层，贯穿所述基板，电连接所述第一导电层的线路与所述第二导电层的线路；
    驱动电路板，设于所述第一导电层背离所述主要显示区的一面；
    其中，所述第二导电层内的线路与所述主要显示区的线路电连接；所述驱动电路板的线路与所述第一导电层的线路电连接。
  2. 根据权利要求1所述的阵列基板，其中，所述阵列基板与所述次要功能区对应的部分还包括绝缘层，所述绝缘层设于所述基板与所述第二导电层之间，所述导通层贯穿所述基板以及所述绝缘层。
  3. 根据权利要求1所述的阵列基板，其中，所述绝缘层包括无机绝缘层。
  4. 根据权利要求1所述的阵列基板，其中，所述阵列基板与所述次要功能区对应的部分还包括封装层，所述封装层覆盖所述第二导电层。
  5. 根据权利要求1所述的阵列基板，其中，所述基板包括柔性基板。
  6. 根据权利要求1所述的阵列基板，其中，所述第二导电层与所述导通层在同一道工艺内形成。
  7. 根据权利要求1所述的阵列基板，其中，所述导通层为对所述基板进行掺杂形成。
  8. 一种显示装置，其包括阵列基板，所述阵列基板包括主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧，所述阵列基板与所述次要功能区对应的部分包括:
    基板；
    第一导电层，设于所述基板背离所述主要显示区的一面；
    第二导电层，设于所述基板指向所述主要显示区的一面；
    导通层，贯穿所述基板，电连接所述第一导电层的线路与所述第二导电层的线路；
    驱动电路板，设于所述第一导电层背离所述主要显示区的一面；
    其中，所述第二导电层内的线路与所述主要显示区的线路电连接；所述驱动电路板的线路与所述第一导电层的线路电连接。
  9. 根据权利要求8所述的显示装置，其中，所述阵列基板与所述次要功能区对应的部分还包括绝缘层，所述绝缘层设于所述基板与所述第二导电层之间，所述导通层贯穿所述基板以及所述绝缘层。
  10. 根据权利要求8所述的显示装置，其中，所述绝缘层包括无机绝缘层。
  11. 根据权利要求8所述的显示装置，其中，所述阵列基板与所述次要功能区对应的部分还包括封装层，所述封装层覆盖所述第二导电层。
  12. 根据权利要求8所述显示装置，其中，所述基板包括柔性基板。
  13. 一种阵列基板的制造方法，其包括：
    提供第一基板，所述第一基板设置有主要显示区和次要功能区，所述次要功能区设置于所述主要显示区的至少一侧；
    在所述第一基板的次要功能区内制备柔性层；
    在所述柔性层上制备剥离层，所述剥离层覆盖所述柔性层；
    在所述剥离层上制备第一导电层；
    在所述第一基板的次要功能区内制备第二基板，所述第二基板覆盖所述第一导电层；
    在所述第二基板上制备导通层以及第二导电层，并使所述第一导电层通过所述导通层与所述第二导电层导通；
    剥离所述第一基板、所述柔性层以及所述剥离层；
    将驱动电路板贴合在所述第二基板与所述第一导电层的表面，并使所述驱动电路板与所述第一基板上的主要显示区导通。
  14. 根据权利要求13所述的制造方法，其中，所述在所述柔性层上制备剥离层的步骤包括：采用热蒸镀工艺，在所述柔性层上制备剥离层。
  15. 根据权利要求14所述的制造方法，其中，所述剥离层的材料为聚对二甲苯类聚合物材料。
  16. 根据权利要求13所述的制造方法，其中，所述柔性层的材料为聚酰亚胺。
  17. 根据权利要求13所述的制造方法，其中，所述第一导电层的材料为铝、铜、钛、氧化铟锡、氧化铟‑氧化锌类氧化物中的一种。
  18. 根据权利要求13所述的制造方法，其中，所述第一导电层的材料为铝、铜、钛、氧化铟锡、氧化铟‑氧化锌类氧化物中的一种。
  19. 根据权利要求13所述的制造方法，其中，在所述第一基板的次要功能区内制备第二基板的步骤之后，还包括：在所述第二基板上制备绝缘层。
  20. 根据权利要求13所述的制造方法，其中，所述在所述第二基板上制备导通层以及第二导电层的步骤包括：
    在对应所述第一导电层的部分区域内，对所述第二基板以及所述绝缘层进行蚀刻；所述蚀刻区域漏出所述第一导电层；
    在所述绝缘层上制备所述第二导电层；所述第二导电层覆盖所述绝缘层以及所述蚀刻区域内的第一导电层；所述蚀刻区域内所述第一导电层与所述第二导电层的连接部形成所述导通层。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103594485A (zh) * 2012-08-17 2014-02-19 苹果公司 窄边框有机发光二极管显示器
CN104025178A (zh) * 2011-10-28 2014-09-03 苹果公司 具有用于附接隐藏式印刷电路和部件的通孔的显示器
CN104851892A (zh) * 2015-05-12 2015-08-19 深圳市华星光电技术有限公司 窄边框柔性显示装置及其制作方法
CN104992956A (zh) * 2015-05-15 2015-10-21 深圳市华星光电技术有限公司 无边框显示装置及其制作方法
US20160329386A1 (en) * 2015-05-05 2016-11-10 Apple Inc. Display With Vias to Access Driver Circuitry
CN106973520A (zh) * 2017-05-27 2017-07-21 京东方科技集团股份有限公司 一种显示面板、显示装置及显示面板的制作方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9504124B2 (en) 2013-01-03 2016-11-22 Apple Inc. Narrow border displays for electronic devices
CN106950763A (zh) 2017-03-28 2017-07-14 武汉华星光电技术有限公司 显示模组及终端

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104025178A (zh) * 2011-10-28 2014-09-03 苹果公司 具有用于附接隐藏式印刷电路和部件的通孔的显示器
CN103594485A (zh) * 2012-08-17 2014-02-19 苹果公司 窄边框有机发光二极管显示器
US20160329386A1 (en) * 2015-05-05 2016-11-10 Apple Inc. Display With Vias to Access Driver Circuitry
CN104851892A (zh) * 2015-05-12 2015-08-19 深圳市华星光电技术有限公司 窄边框柔性显示装置及其制作方法
CN104992956A (zh) * 2015-05-15 2015-10-21 深圳市华星光电技术有限公司 无边框显示装置及其制作方法
CN106973520A (zh) * 2017-05-27 2017-07-21 京东方科技集团股份有限公司 一种显示面板、显示装置及显示面板的制作方法

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