WO2020056869A1 - 一种有机发光二极管显示器及其制作方法 - Google Patents

一种有机发光二极管显示器及其制作方法 Download PDF

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WO2020056869A1
WO2020056869A1 PCT/CN2018/113340 CN2018113340W WO2020056869A1 WO 2020056869 A1 WO2020056869 A1 WO 2020056869A1 CN 2018113340 W CN2018113340 W CN 2018113340W WO 2020056869 A1 WO2020056869 A1 WO 2020056869A1
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layer
light emitting
diode display
emitting diode
organic light
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French (fr)
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王纯阳
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/339,382 priority Critical patent/US20200161392A1/en
Publication of WO2020056869A1 publication Critical patent/WO2020056869A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/842—Containers
    • H10K50/8428—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the invention relates to the field of display technology, in particular to an organic light emitting diode display and a manufacturing method thereof.
  • OLED display panels have the advantages of light weight, self-emission, wide viewing angle, low driving voltage, high luminous efficiency, low power consumption, and fast response speed, and are widely used.
  • the aperture ratio is the ratio between the area of the light-emitting area and the area of the entire pixel.
  • the aperture ratio is an important parameter directly related to product performance. Higher aperture ratio can improve the brightness, efficiency and life of the product.
  • An object of the present invention is to provide an organic light emitting diode display and a manufacturing method thereof, which can improve the aperture ratio.
  • the present invention provides a method for manufacturing an organic light emitting diode display, which includes:
  • a switch array layer provided on a substrate; the switch array layer includes a plurality of switching elements;
  • a pixel definition layer provided on the conductive layer, the pixel definition layer including a plurality of pixel definition units arranged at intervals;
  • a plurality of light-emitting units are disposed on a conductive layer between two adjacent pixel-defining units, the light-emitting units intersect with a horizontal plane, and the area of the light-emitting units is larger than a predetermined area.
  • the sawtooth unit has two oblique edges and a bottom edge, and an angle between the oblique edge and the bottom edge is within a preset range.
  • the light emitting unit is disposed obliquely with respect to a horizontal plane.
  • the conductive layer includes a plurality of staggered tops and depressions, and the pixel definition unit is provided on the top and the depressions, and the light emitting unit is disposed on Between the top and the recess.
  • the organic light emitting diode display of the present invention there are two included angles between the light emitting unit and a horizontal plane.
  • the conductive layer includes a plurality of staggered tops and depressions, the pixel defining unit is disposed on the top or the depressions, and the light emitting units are disposed adjacent to each other. Between two of the recesses or between two adjacent tops.
  • the pixel defining unit has a flat top, and the tops of a plurality of the pixel defining units are flush.
  • the organic light emitting diode display of the present invention further includes a spacer, a cathode, and an encapsulation layer.
  • the spacer is disposed on the pixel defining unit
  • the cathode is disposed on the light emitting unit
  • the encapsulation layer is located The topmost layer of the organic light emitting diode display.
  • the present invention provides a method for manufacturing an organic light emitting diode display, which includes:
  • a switch array layer provided on a substrate; the switch array layer includes a plurality of switching elements;
  • a flat layer disposed on the switch array layer, and a cross-sectional shape of the flat layer is zigzag
  • a pixel definition layer provided on the conductive layer; the pixel definition layer includes a plurality of pixel definition units arranged at intervals;
  • a plurality of light-emitting units are disposed on a conductive layer between two adjacent pixel-defining units, and the light-emitting units intersect with a horizontal plane.
  • the flat layer includes a plurality of sawtooth units, and a cross-sectional shape of the sawtooth unit is at least one of a triangle or a trapezoid.
  • the sawtooth unit has two oblique edges and a bottom edge, and an angle between the oblique edge and the bottom edge is within a preset range.
  • an area of the light emitting unit is larger than a preset area.
  • the light emitting unit is disposed obliquely with respect to a horizontal plane.
  • the conductive layer includes a plurality of staggered tops and depressions, and the pixel definition unit is provided on the top and the depressions, and the light emitting unit is disposed on Between the top and the recess.
  • the organic light emitting diode display of the present invention there are two included angles between the light emitting unit and a horizontal plane.
  • the conductive layer includes a plurality of staggered tops and depressions, the pixel defining unit is disposed on the top or the depressions, and the light emitting units are disposed adjacent to each other. Between two of the recesses or between two adjacent tops.
  • the pixel defining unit has a flat top, and the tops of a plurality of the pixel defining units are flush.
  • the organic light emitting diode display of the present invention further includes a spacer, a cathode, and an encapsulation layer.
  • the spacer is disposed on the pixel defining unit
  • the cathode is disposed on the light emitting unit
  • the encapsulation layer is located The topmost layer of the organic light emitting diode display.
  • the invention also provides a method for manufacturing an organic light emitting diode display, which includes:
  • a conductive layer is made on the flat layer, and the conductive layer is patterned to form an anode; the cross-sectional shape of the conductive layer is also zigzag;
  • a light emitting unit is fabricated on a conductive layer between two adjacent pixel defining units.
  • a photoresistive spacer layer is formed on the pixel defining layer, and the pixel defining layer and the photoresistive spacer layer are patterned through a photomask process to form the pixel defining unit and the spacer.
  • the cross-sectional shape of the flat layer is set to a zigzag shape, so that the light-emitting unit intersects with a horizontal plane, so that the area of the light-emitting unit is increased, thereby increasing
  • the aperture ratio also improves the performance of the display.
  • FIG. 1 is a schematic structural diagram of a conventional organic light emitting diode display
  • FIG. 2 is a schematic structural diagram of an organic light emitting diode display according to a first embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a flat layer in an organic light emitting diode display of the present invention.
  • FIG. 4 is a schematic structural diagram of a conductive layer in an organic light emitting diode display of the present invention.
  • FIG. 5 is a schematic structural diagram of an organic light emitting diode display according to a second embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of an organic light emitting diode display according to a third embodiment of the present invention.
  • the existing organic light emitting diode display includes a substrate 11, a switch array layer 12, a flat layer 13, a conductive layer 14, a pixel definition layer 15, and a plurality of light emitting units 16, wherein the switch array layer 12 includes a plurality of light emitting units 16.
  • a switching element such as a thin film transistor
  • the conductive layer 14 includes an anode.
  • the pixel definition layer 15 includes a plurality of pixel definition units 151.
  • the light emitting unit 16 is disposed between two adjacent pixel definition units 151, and the light emitting unit 16 is disposed in parallel with the horizontal plane.
  • FIG. 2 is a schematic structural diagram of an organic light emitting diode display according to a first embodiment of the present invention.
  • the organic light emitting diode display of the present invention includes a substrate 11, a switch array layer 12, a flat layer 21, a conductive layer 22, a pixel definition layer 23, and a plurality of light emitting units 24.
  • the bottom 11 it includes a plurality of switching elements, such as a thin film transistor.
  • a flat layer 21 is disposed on the switch array layer 12, and a cross-sectional shape of the flat layer 21 is zigzag.
  • the zigzag flat layer 21 is obtained by performing a patterning process on a flat layer disposed on the switch array layer 12.
  • the flat layer 21 includes a plurality of sawtooth units 211, and a cross-sectional shape of the sawtooth unit 211 is at least one of a triangle or a trapezoid.
  • the cross-sectional shape of the sawtooth unit 211 is at least one of an isosceles triangle and an isosceles trapezoid.
  • each of the sawtooth units 211 has a bottom edge 31 and two hypotenuse edges 32, and the angles a1 and a2 between the hypotenuse edge 32 and the bottom edge 31 are within a preset range.
  • the acute angles of a1 and a2 are in the range of 0-90 degrees, and are not equal to 0 degrees or 90 degrees. In one embodiment, the angles of the acute angles between the hypotenuses of the plurality of sawtooth units 211 and the horizontal plane are all equal, such as 40 degrees.
  • the conductive layer 22 is disposed on the flat layer 21; the cross-sectional shape of the conductive layer 22 is also zigzag.
  • the conductive layer 22 includes an anode. The anode is connected to the drain of the thin film transistor.
  • the pixel definition layer 23 is disposed on the conductive layer 22; the pixel definition layer 23 includes a plurality of pixel definition units 231 disposed at intervals; in one embodiment, the pixel definition unit 231 has a flat top and a plurality of The top of the pixel definition unit 231 is flush.
  • the light emitting unit 24 is disposed on the conductive layer 22 between two adjacent pixel definition units 231, and the light emitting unit 24 and a horizontal plane intersect. It can be understood that the light emitting unit 24 corresponds to the position of the anode.
  • the light-emitting unit 24 is inclined with respect to a horizontal plane. That is, there is an included angle between each of the light-emitting units 24 and a horizontal plane.
  • the conductive layer 22 includes a plurality of staggered top portions 221 and recessed portions 222.
  • the pixel definition unit 231 is provided on the top portions 221 and the recessed portions 222, and the light emitting unit 24 is provided. Between the top portion 221 and the recessed portion 222.
  • the pixel definition unit 231 is disposed only on the recessed portion 222, and the light emitting unit 24 is disposed between two adjacent recessed portions 222. A cross-sectional shape of the light-emitting unit 24 is curved.
  • the pixel definition unit 231 is disposed only on the top portion 221, and the light emitting unit 24 is disposed between two adjacent top portions 221.
  • the cross-sectional shape of the light-emitting unit 24 is also curved.
  • the light-emitting units of the present invention are arranged obliquely or in a curved shape, so that the area of the light-emitting unit 24 is larger than a predetermined area.
  • the preset area is, for example, the area of the light emitting unit 24 in FIG. 1. As the area of the light-emitting unit increases, the aperture ratio is increased, and the performance of the display is also improved, such as the brightness, efficiency, and life of the product.
  • the organic light emitting diode display in the present invention may further include a spacer, a cathode, and a packaging layer (none of which is shown in the figure).
  • the spacer is disposed on the pixel definition unit 231
  • the cathode is disposed on the light emitting unit 24, and the packaging layer is located The topmost level of the display.
  • the manufacturing method of the organic light emitting diode display of the present invention mainly includes the following steps:
  • a substrate 11 is fabricated on a glass substrate before fabrication, and the array layer 12 is switched on the substrate 11 in sequence, which specifically includes forming an active layer and a first gate on the substrate 11.
  • the first metal layer includes a gate
  • the second metal layer includes a source and a drain.
  • a flattening layer is formed on the switch array layer, and the flattening layer is patterned to form a flat layer having a sawtooth shape in cross section;
  • a flattened layer is made on the second metal layer, and then the flattened layer is exposed and developed to obtain a flat layer 21 having a sawtooth shape in cross section.
  • the material of the flattened layer may be an insulating material.
  • a conductive layer is formed on the flat layer, and the conductive layer is patterned to form an anode.
  • the cross-sectional shape of the conductive layer is also zigzag.
  • a conductive layer 22 is fabricated on the flat layer 21, and the cross-sectional shape of the conductive layer 22 is also zigzag.
  • the conductive layer 22 is patterned to form an anode.
  • S104 Create a pixel definition layer on the conductive layer, and pattern the pixel definition layer to form a plurality of pixel definition units arranged at intervals.
  • a pixel definition layer 23 is fabricated on the conductive layer 22; a patterning process is performed on the pixel definition layer 23 to form a plurality of pixel definition units 231 disposed at intervals.
  • a light emitting unit 24 is fabricated on the conductive layer 22 between two adjacent pixel definition units 231.
  • the method further includes:
  • a photoresistive spacer layer is formed on the pixel defining layer 23.
  • the pixel defining layer 23 and the photoresistive spacer layer can be patterned through a photomask process to form a pixel defining unit and a spacer.
  • the method further includes: fabricating a cathode on the light emitting unit and fabricating an encapsulation layer on the spacer and the cathode.
  • the cross-sectional shape of the flat layer is set to a zigzag shape, so that the light-emitting unit intersects with a horizontal plane, so that the area of the light-emitting unit is increased, thereby increasing the area.
  • the aperture ratio also improves the performance of the display.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种有机发光二极管显示器及其制作方法，该显示器包括：依次设置在衬底（11）上的开关阵列层（12）、平坦层（21）、导电层（22）、多个间隔设置的像素定义单元（231）以及多个发光单元（24），所述平坦层（21）和所述导电层（22）的截面形状均为锯齿状；所述发光单元（24）设置在相邻两个像素定义单元（231）之间的导电层（22）上，所述发光单元（24）与水平面之间相交。

Description

一种有机发光二极管显示器及其制作方法 技术领域
本发明涉及显示技术领域，特别是涉及一种有机发光二极管显示器及其制作方法。
 背景技术
有机发光二极管（Organic Light-Emitting Diode，OLED）显示面板，具有重量轻、自发光、广视角、驱动电压低、发光效率高、功耗低及响应速度快等优点，被广泛应用。
在中小尺寸的OLED显示面板中，开口率是发光区的面积与整个像素的面积之间的比值，开口率是一项与产品性能直接关联的重要参数。较高的开口率，能提高产品的亮度、效率及寿命。
 技术问题
然而，由于受到掩膜板阴影（Mask Shadow）、掩膜板精度（Mask PPA）、掩膜板上图形线宽（Mask CD）以及蒸镀时的对位精度等因素的影响，限制了开口率，导致开口率较低。
 技术解决方案
本发明的目的在于提供一种有机发光二极管显示器及其制作方法，能够提高开口率。
为解决上述技术问题，本发明提供一种有机发光二极管显示器的制作方法，其包括：
设置在衬底上的开关阵列层；所述开关阵列层包括多个开关元件；
设置在所述开关阵列层上的平坦层，所述平坦层的截面形状为锯齿状；所述平坦层包括多个锯齿单元，所述锯齿单元的截面形状为三角形或者梯形中的至少一种；
设置在所述平坦层上的导电层，所述导电层的截面形状也为锯齿状；所述导电层包括阳极；
设置在所述导电层上的像素定义层，所述像素定义层包括多个间隔设置的像素定义单元；以及
多个发光单元，所述发光单元设置在相邻两个像素定义单元之间的导电层上，所述发光单元与水平面之间相交，所述发光单元的面积大于预设面积。
在本发明的有机发光二极管显示器中，所述锯齿单元具有两条斜边和底边，所述斜边与所述底边之间的角度位于预设范围内。
在本发明的有机发光二极管显示器中，所述发光单元相对于水平面倾斜设置。
在本发明的有机发光二极管显示器中，所述导电层包括多个交错设置的顶部和凹陷部，在所述顶部和所述凹陷部上均设置有所述像素定义单元，所述发光单元设置在所述顶部和所述凹陷部之间。
在本发明的有机发光二极管显示器中，所述发光单元与水平面之间存在两个夹角。
在本发明的有机发光二极管显示器中，所述导电层包括多个交错设置的顶部和凹陷部，所述像素定义单元设置在所述顶部或者所述凹陷部上，所述发光单元设置在相邻两个所述凹陷部之间或者相邻两个所述顶部之间。
在本发明的有机发光二极管显示器中，所述像素定义单元具有平整的顶部，且多个所述像素定义单元的顶部齐平。
在本发明的有机发光二极管显示器中，其还包括间隙子、阴极、封装层，所述间隙子设置在所述像素定义单元上，所述阴极设置在所述发光单元上，所述封装层位于所述有机发光二极管显示器的最顶层。
为解决上述技术问题，本发明提供一种有机发光二极管显示器的制作方法，其包括：
设置在衬底上的开关阵列层；所述开关阵列层包括多个开关元件；
设置在所述开关阵列层上的平坦层，所述平坦层的截面形状为锯齿状；
设置在所述平坦层上的导电层，所述导电层的截面形状也为锯齿状；所述导电层包括阳极；
设置在所述导电层上的像素定义层；所述像素定义层包括多个间隔设置的像素定义单元；
多个发光单元，所述发光单元设置在相邻两个像素定义单元之间的导电层上，所述发光单元与水平面之间相交。
在本发明的有机发光二极管显示器中，所述平坦层包括多个锯齿单元，所述锯齿单元的截面形状为三角形或者梯形中的至少一种。
在本发明的有机发光二极管显示器中，所述锯齿单元具有两条斜边和底边，所述斜边与所述底边之间的角度位于预设范围内。
在本发明的有机发光二极管显示器中，所述发光单元的面积大于预设面积。
在本发明的有机发光二极管显示器中，所述发光单元相对于水平面倾斜设置。
在本发明的有机发光二极管显示器中，所述导电层包括多个交错设置的顶部和凹陷部，在所述顶部和所述凹陷部上均设置有所述像素定义单元，所述发光单元设置在所述顶部和所述凹陷部之间。
在本发明的有机发光二极管显示器中，所述发光单元与水平面之间存在两个夹角。
在本发明的有机发光二极管显示器中，所述导电层包括多个交错设置的顶部和凹陷部，所述像素定义单元设置在所述顶部或者所述凹陷部上，所述发光单元设置在相邻两个所述凹陷部之间或者相邻两个所述顶部之间。
在本发明的有机发光二极管显示器中，所述像素定义单元具有平整的顶部，且多个所述像素定义单元的顶部齐平。
在本发明的有机发光二极管显示器中，其还包括间隙子、阴极、封装层，所述间隙子设置在所述像素定义单元上，所述阴极设置在所述发光单元上，所述封装层位于所述有机发光二极管显示器的最顶层。
本发明还提供一种有机发光二极管显示器的制作方法，其包括：
在衬底上制作开关阵列层；
在所述开关阵列层上制作平整层，对所述平整层进行图案化处理，以形成截面形状为锯齿状的平坦层；
在所述平坦层上制作导电层，对所述导电层进行图案化处理，以形成阳极；所述导电层的截面形状也为锯齿状；
在所述导电层上制作像素定义层，对所述像素定义层进行图案化处理，以形成多个间隔设置的像素定义单元；
在相邻两个像素定义单元之间的导电层上制作发光单元。
在本发明的有机发光二极管显示器的制作方法中，在所述导电层上制作像素定义层的步骤之后，以及在所述在相邻两个像素定义单元之间的导电层上制作发光单元的步骤之前，其还包括：
在所述像素定义层上形成光阻间隔层，通过一道光罩制程对所述像素定义层和所述光阻间隔层进行图案化处理，以形成所述像素定义单元和间隙子。
 有益效果
本发明的有机发光二极管显示器及其制作方法，通过将平坦层的截面形状设置为锯齿状，使得所述发光单元与水平面之间相交，从而使得所述发光单元的面积增大，进而增大了开口率，此外还提升了显示器的性能。
 附图说明
图1为现有有机发光二极管显示器的结构示意图；
图2为本发明实施例一的有机发光二极管显示器的结构示意图；
图3为本发明有机发光二极管显示器中平坦层的结构示意图；
图4为本发明有机发光二极管显示器中导电层的结构示意图；
图5为本发明实施例二的有机发光二极管显示器的结构示意图；
图6为本发明实施例三的有机发光二极管显示器的结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
如图1所示，现有的有机发光二极管显示器包括衬底11、开关阵列层12、平坦层13、导电层14、像素定义层15以及多个发光单元16，其中开关阵列层12包括多个开关元件，比如薄膜晶体管，所述导电层14包括阳极。像素定义层15包括多个像素定义单元151，发光单元16设置在相邻两个像素定义单元151之间，且发光单元16与水平面平行设置。
请参照图2至6，图2为本发明实施例一的有机发光二极管显示器的结构示意图。
如图2所示，本发明的有机发光二极管显示器包括衬底11、开关阵列层12、平坦层21、导电层22、像素定义层23以及多个发光单元24，其中开关阵列层12设置在衬底11上，其包括多个开关元件，开关元件比如薄膜晶体管。
平坦层21设置在所述开关阵列层12上，所述平坦层21的截面形状为锯齿状。在一实施方式中，所述锯齿状的平坦层21是通过对设置在所述开关阵列层12上的平整层进行图案化处理得到的。其中所述平坦层21包括多个锯齿单元211，所述锯齿单元211的截面形状为三角形或者梯形中的至少一种。在一实施方式中，所述锯齿单元211的截面形状为等腰三角形或者等腰梯形中的至少一种。
如图3所示，每个所述锯齿单元211具有底边31和两条斜边32，所述斜边32与所述底边31之间的角度a1、a2位于预设范围内。a1、a2的锐角角度位于0-90度范围内，且不等于0度或者90度。在一实施方式中，多个所述锯齿单元211的斜边与水平面之间的锐角的角度均相等，比如为40度。
返回图2，导电层22设置在所述平坦层21上；所述导电层22的截面形状也为锯齿状。所述导电层22包括阳极。阳极与薄膜晶体管的漏极连接。
像素定义层23设置在所述导电层22上；所述像素定义层23包括多个间隔设置的像素定义单元231；在一实施方式中，所述像素定义单元231具有平整的顶部，且多个所述像素定义单元231的顶部齐平。
所述发光单元24设置在相邻两个像素定义单元231之间的导电层22上，所述发光单元24与水平面之间相交。可以理解的，发光单元24与阳极的位置对应。
在一实施例中，如图2所示，所述发光单元24相对于水平面倾斜设置。也即每个所述发光单元24与水平面之间存在一个夹角。
结合图4，所述导电层22包括多个交错设置的顶部221和凹陷部222，在所述顶部221和所述凹陷部222上均设置有所述像素定义单元231，所述发光单元24设置在所述顶部221和所述凹陷部222之间。
在另一实施例中，结合图4和5，每个所述发光单元24与水平面之间存在两个夹角。
所述像素定义单元231仅设置在所述凹陷部222上，所述发光单元24设置在相邻两个所述凹陷部222之间。所述发光单元24的截面形状为弯曲状。
在又一实施例中，结合图4和6，所述像素定义单元231仅设置在所述顶部221上，所述发光单元24设置在相邻两个所述顶部221之间。所述发光单元24的截面形状也为弯曲状。
由于本发明的平坦层的截面形状为锯齿状，使得本发明的发光单元倾斜排布或者成弯曲状，从而使得所述发光单元24的面积大于预设面积。该预设面积比如为图1中发光单元24的面积。由于所述发光单元的面积增大，进而增大了开口率，此外还提升了显示器的性能，比如提高了产品的亮度、效率及寿命。
本发明中的有机发光二极管显示器还可包括间隙子、阴极、封装层（图中均未示出），所述间隙子设置在像素定义单元231上，阴极设置在发光单元24上，封装层位于显示器的最顶层。
本发明的有机发光二极管显示器的制作方法主要包括如下步骤：
S101、在衬底上制作开关阵列层；
如图2、5、6所示，在制作之前先在玻璃基板上制作衬底11，依次在衬底11上开关阵列层12，具体包括在衬底11上形成有源层、第一栅极绝缘层、第一金属层、第二栅极绝缘层、第二金属层。所述第一金属层包括栅极，所述第二金属层包括源极和漏极。
S102、在所述开关阵列层上制作平整层，对所述平整层进行图案化处理，以形成截面形状为锯齿状的平坦层；
比如，在所述第二金属层上制作整层的平整层，之后对所述平整层进行曝光、显影以得到截面形状为锯齿状的平坦层21，其中该平整层的材料可为绝缘材料。
S103、在所述平坦层上制作导电层，对所述导电层进行图案化处理，以形成阳极；所述导电层的截面形状也为锯齿状；
例如，在平坦层21上制作导电层22，所述导电层22的截面形状也为锯齿状。对所述导电层22进行图案化处理，以形成阳极。
S104、在所述导电层上制作像素定义层，对所述像素定义层进行图案化处理，以形成多个间隔设置的像素定义单元；
例如，在所述导电层22上制作像素定义层23；对所述像素定义层23进行图案化处理，以形成多个间隔设置的像素定义单元231。
S105、在相邻两个像素定义单元之间的导电层上制作发光单元。
例如，在相邻两个像素定义单元231之间的导电层22上制作发光单元24。
在所述导电层上制作像素定义层的步骤之后，以及在所述在相邻两个像素定义单元之间的导电层上制作发光单元的步骤之前，所述方法还包括：
S106、在像素定义层23上形成光阻间隔层，可通过一道光罩制程对该像素定义层23和光阻间隔层进行图案化处理形成像素定义单元和间隙子。
所述方法还包括：在发光单元上制作阴极以及在间隙子和阴极上制作封装层。
本发明的有机发光二极管显示器及其制作方法，通过将平坦层的截面形状设置为锯齿状，使得所述发光单元与水平面之间相交，从而使得所述发光单元的面积增大，进而增大了开口率，此外还提升了显示器的性能。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种有机发光二极管显示器，其包括：
    设置在衬底上的开关阵列层；所述开关阵列层包括多个开关元件；
    设置在所述开关阵列层上的平坦层，所述平坦层的截面形状为锯齿状；所述平坦层包括多个锯齿单元，所述锯齿单元的截面形状为三角形或者梯形中的至少一种；
    设置在所述平坦层上的导电层，所述导电层的截面形状也为锯齿状；所述导电层包括阳极；
    设置在所述导电层上的像素定义层，所述像素定义层包括多个间隔设置的像素定义单元；以及
    多个发光单元，所述发光单元设置在相邻两个像素定义单元之间的导电层上，所述发光单元与水平面之间相交，所述发光单元的面积大于预设面积。
  2. 根据权利要求1所述的有机发光二极管显示器，其中
    所述锯齿单元具有两条斜边和底边，所述斜边与所述底边之间的角度位于预设范围内。
  3. 根据权利要求1所述的有机发光二极管显示器，其中所述发光单元相对于水平面倾斜设置。
  4. 根据权利要求3所述的有机发光二极管显示器，其中所述导电层包括多个交错设置的顶部和凹陷部，在所述顶部和所述凹陷部上均设置有所述像素定义单元，所述发光单元设置在所述顶部和所述凹陷部之间。
  5. 根据权利要求1所述的有机发光二极管显示器，其中所述发光单元与水平面之间存在两个夹角。
  6. 根据权利要求5所述的有机发光二极管显示器，其中所述导电层包括多个交错设置的顶部和凹陷部，所述像素定义单元设置在所述顶部或者所述凹陷部上，所述发光单元设置在相邻两个所述凹陷部之间或者相邻两个所述顶部之间。
  7. 根据权利要求1所述的有机发光二极管显示器，其中所述像素定义单元具有平整的顶部，且多个所述像素定义单元的顶部齐平。
  8. 根据权利要求1所述的有机发光二极管显示器，其中其还包括间隙子、阴极、封装层，所述间隙子设置在所述像素定义单元上，所述阴极设置在所述发光单元上，所述封装层位于所述有机发光二极管显示器的最顶层。
  9. 一种有机发光二极管显示器，其包括：
    设置在衬底上的开关阵列层；所述开关阵列层包括多个开关元件；
    设置在所述开关阵列层上的平坦层，所述平坦层的截面形状为锯齿状；
    设置在所述平坦层上的导电层，所述导电层的截面形状也为锯齿状；所述导电层包括阳极；
    设置在所述导电层上的像素定义层，所述像素定义层包括多个间隔设置的像素定义单元；以及
    多个发光单元，所述发光单元设置在相邻两个像素定义单元之间的导电层上，所述发光单元与水平面之间相交。
  10. 根据权利要求9所述的有机发光二极管显示器，其中所述平坦层包括多个锯齿单元，所述锯齿单元的截面形状为三角形或者梯形中的至少一种。
  11. 根据权利要求10所述的有机发光二极管显示器，其中所述锯齿单元具有两条斜边和底边，所述斜边与所述底边之间的角度位于预设范围内。
  12. 根据权利要求9所述的有机发光二极管显示器，其中所述发光单元的面积大于预设面积。
  13. 根据权利要求9所述的有机发光二极管显示器，其中所述发光单元相对于水平面倾斜设置。
  14. 根据权利要求13所述的有机发光二极管显示器，其中所述导电层包括多个交错设置的顶部和凹陷部，在所述顶部和所述凹陷部上均设置有所述像素定义单元，所述发光单元设置在所述顶部和所述凹陷部之间。
  15. 根据权利要求9所述的有机发光二极管显示器，其中所述发光单元与水平面之间存在两个夹角。
  16. 根据权利要求15所述的有机发光二极管显示器，其中所述导电层包括多个交错设置的顶部和凹陷部，所述像素定义单元设置在所述顶部或者所述凹陷部上，所述发光单元设置在相邻两个所述凹陷部之间或者相邻两个所述顶部之间。
  17. 根据权利要求9所述的有机发光二极管显示器，其中所述像素定义单元具有平整的顶部，且多个所述像素定义单元的顶部齐平。
  18. 根据权利要求9所述的有机发光二极管显示器，其还包括间隙子、阴极、封装层，所述间隙子设置在所述像素定义单元上，所述阴极设置在所述发光单元上，所述封装层位于所述有机发光二极管显示器的最顶层。
  19. 一种有机发光二极管显示器的制作方法，其包括：
    在衬底上制作开关阵列层；
    在所述开关阵列层上制作平整层，对所述平整层进行图案化处理，以形成截面形状为锯齿状的平坦层；
    在所述平坦层上制作导电层，对所述导电层进行图案化处理，以形成阳极，所述导电层的截面形状也为锯齿状；
    在所述导电层上制作像素定义层，对所述像素定义层进行图案化处理，以形成多个间隔设置的像素定义单元；以及
    在相邻两个像素定义单元之间的导电层上制作发光单元。
  20. 根据权利要求19所述的有机发光二极管显示器的制作方法，其中在所述导电层上制作像素定义层的步骤之后，以及在所述在相邻两个像素定义单元之间的导电层上制作发光单元的步骤之前，其还包括：
    在所述像素定义层上形成光阻间隔层，通过一道光罩制程对所述像素定义层和所述光阻间隔层进行图案化处理，以形成所述像素定义单元和间隙子。
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