WO2020029626A1 - 一种led显示屏及其制作方法 - Google Patents

一种led显示屏及其制作方法 Download PDF

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Publication number
WO2020029626A1
WO2020029626A1 PCT/CN2019/086163 CN2019086163W WO2020029626A1 WO 2020029626 A1 WO2020029626 A1 WO 2020029626A1 CN 2019086163 W CN2019086163 W CN 2019086163W WO 2020029626 A1 WO2020029626 A1 WO 2020029626A1
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led
deposited
display screen
insulating layer
substrate
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PCT/CN2019/086163
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English (en)
French (fr)
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林健源
罗崇辉
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深圳Tcl新技术有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission

Definitions

  • the invention relates to the technical field of LED display screens, in particular to an LED display screen and a manufacturing method thereof.
  • LED display is currently the most promising display, especially mini LED or micro LED display, composed of a large number of LED (R, G, B) array, with high brightness, high contrast, ultra-high resolution and color saturation Degree, each LED can be driven independently, and also has the advantages of power saving and fast response speed.
  • the LED display does not require the LCD module to use a backlight, which can reduce the thickness.
  • mini LEDs or micro LEDs have the problems of huge amount of LED transfer and difficult alignment of the LEDs, and additional packaging processes are required.
  • an object of the present invention is to provide an LED display screen and a manufacturing method thereof, which are aimed at solving the problems of huge LED transfer and adhesion alignment during the manufacturing process of miniLED or microLED. The problem.
  • An LED display screen includes a substrate and a plurality of LED structural units disposed on the substrate.
  • the LED structural unit includes: a TFT structure prepared on the substrate, LED dies prepared on the substrate, and TFT structures filled with the TFT structure.
  • a first insulating layer between the LED dies, and the anode of the LED dies is connected to the TFT structure through a first wire.
  • the LED display screen wherein the LED grains include an N-type semiconductor layer deposited on a substrate, a P-type semiconductor layer and an LED grain negative electrode deposited on the N-type semiconductor layer at intervals, and a P-type semiconductor deposited LED die positive on the layer.
  • the TFT structure includes a gate electrode deposited on a substrate, a second insulating layer deposited on the gate electrode, a TFT semiconductor active layer deposited on the second insulating layer, and a spacer.
  • a third insulating layer is filled between the source electrode and the drain electrode.
  • the LED display screen wherein the TFT semiconductor active layer includes an active layer deposited on a second insulating layer, and a source contact portion and a drain contact portion deposited on the active layer at intervals.
  • the source layer is an amorphous silicon semiconductor layer
  • the source contact portion and the drain contact portion are both phosphorus-containing amorphous silicon semiconductor layers
  • the source electrode is deposited on the source contact portion
  • the drain electrode is deposited on the drain electrode. Contact area.
  • a fourth insulating layer is filled between the LED die negative electrode, the LED die positive electrode, and the P-type semiconductor layer.
  • the LED die is a red LED die, a green LED die, or a blue LED die.
  • the LED structural unit further includes a negative electrode contact portion prepared on the substrate, and the negative electrode contact portion communicates with the negative electrode of the LED die through a second wire.
  • the negative contact portion and the LED die are filled with a fifth insulating layer.
  • the first and second wires are copper wires or aluminum wires.
  • a material of the first insulating layer is silicon nitride.
  • a method for manufacturing an LED display screen comprising the steps:
  • a substrate is provided, and a TFT structure and an LED die are produced on the substrate at intervals.
  • a first insulating layer is filled between the TFT structure and the LED die, and a first insulating layer is formed on the first insulating layer to connect the TFT structure and the LED die.
  • a wire is
  • the steps of manufacturing the TFT structure specifically include:
  • a gate that can be connected to a high level is deposited on the substrate, a second insulating layer is deposited on the gate, an amorphous silicon semiconductor layer is deposited on the second insulating layer, and an interval is deposited on the amorphous silicon semiconductor layer.
  • a phosphorous-containing amorphous silicon semiconductor layer, and a drain electrode and a source electrode connected to the positive electrode of the power source are respectively deposited on the two phosphorous-containing amorphous silicon semiconductor layers.
  • the method for manufacturing an LED display screen further includes the step of: filling a third insulating layer between the two amorphous silicon semiconductor layers and between the source and the drain.
  • the steps of manufacturing the LED die specifically include:
  • N-type semiconductor layer is deposited on the substrate, a P-type semiconductor layer and an LED grain negative electrode connected to the power source negative electrode are deposited on the N-type semiconductor layer at intervals, and an LED grain positive electrode is deposited on the P-type semiconductor layer.
  • the method for manufacturing an LED display screen further includes the step of: filling a fourth insulating layer between the LED die negative electrode, the LED die positive electrode, and the P-type semiconductor layer.
  • the manufacturing method of the LED display screen further includes steps:
  • a negative electrode contact portion is deposited on the substrate, a fifth insulating layer is filled between the negative electrode contact portion and the LED die, and then a second wire for connecting the negative electrode contact portion and the LED die negative electrode is deposited.
  • the LED display screen, the TFT structure and the LED die provided in the embodiment of the present invention are directly prepared on a substrate, and a first insulating layer is filled between the TFT structure and the LED die.
  • the TFT structure and the LED die are The positive electrodes of the grains are communicated through the first wire, which realizes the isolation and protection of the TFT structure and the LED die. This not only eliminates the LED transfer and bonding alignment process, but also eliminates the need for additional packaging structures for protection and fixation. There are technologies that have the problems of huge amount of LED transfer and difficult to align the LEDs when manufacturing mini LEDs or micro LEDs.
  • FIG. 1 is a schematic structural diagram of an LED display screen according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of an equivalent circuit of a TFT structure in an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of an equivalent circuit of an LED structural unit according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of an equivalent circuit of an LED display screen according to an embodiment of the present invention.
  • the embodiment of the present invention provides an LED display screen, which is suitable for miniLED or microLED As shown in FIG. 1, it includes a substrate 10 and a plurality of LED structural units disposed on the substrate 10.
  • the LED structural units include: a TFT structure 20 prepared on the substrate 10, an LED die 30 prepared on the substrate 10, and The first insulating layer 40 is filled between the TFT structure 20 and the LED die 30.
  • the TFT structure 20 is connected to the positive electrode of the power source.
  • the positive electrode of the LED die 30 is connected to the TFT structure through the first wire 50.
  • the negative electrode of the LED die 30 is connected to the negative electrode of the power supply, and the single LED structure unit is controlled by controlling the single TFT structure 20, so as to emit red, blue, or green light.
  • the LED structural unit should be provided with a plurality of red, green, and blue primary colors, one red LED structural unit, one green LED structural unit, and one blue light.
  • the LED structural unit constitutes one LED pixel unit, and the LED display screen has a plurality of LED pixel units.
  • the substrate 10 may be transparent glass or transparent flexible material, and the flexible material may implement curl display.
  • the TFT structure 20 includes a gate electrode 23 deposited on the substrate 10, a second insulating layer 24 deposited on the gate electrode 23, and a TFT semiconductor active layer deposited on the second insulating layer 24.
  • a layer 25 is deposited between the source 21 and the drain 22 of the TFT semiconductor active layer 25 at intervals.
  • a third insulating layer 26 is filled between the source 21 and the drain 22, and the gate 23 passes through a high level
  • the drain electrode 22 and the positive electrode of the LED die 30 (referred to as the LED die positive electrode 31) communicate with each other through the first lead 50, so
  • the source electrode 21 is connected to a positive electrode of a power source (not shown), and the negative electrode of the LED chip 30 (referred to as the LED chip negative electrode 32 for short) is connected to a negative electrode 60 of the power source.
  • the flat opening and closing to control the ON or OFF of the source electrode 21 and the drain electrode 22 can realize the connection or disconnection of the LED chip 30 and the positive and negative electrodes of the power supply, and then control the light emission and extinction of the LED chip 30.
  • a third insulating layer 26 is filled between the source electrode 21 and the drain electrode 22 to ensure that the source electrode 21 and the drain electrode 22 are not in direct contact.
  • the TFT semiconductor active layer 25 includes an active layer 251 deposited on the second insulating layer 24, and source contact portions 252 and drain contact portions 253 deposited on the active layer 251 at intervals.
  • the active layer 251 is an amorphous silicon semiconductor layer (a-Si layer)
  • the source contact portion 252 and the drain contact portion 253 are phosphorus-containing amorphous silicon semiconductor layers (N + a-Si layer), Add P (phosphorus) to the amorphous silicon semiconductor material to provide electrons and increase conductivity;
  • the source 21 shown as S-pole
  • drain 22 shown as D-pole
  • the drain contact portion 253 when the G pole provides a high level, the electrons in the a-Si layer are adsorbed to the bottom layer of a-Si, so that the upper layer of a-Si forms a positive electrode, and the P electrons in the N + a-Si layer are It will be closer to the a-Si layer,
  • the LED die 30 includes an N-type semiconductor layer 33 deposited on the substrate 10, a P-type semiconductor layer 34 deposited on the N-type semiconductor layer 33, and the LED die.
  • a fourth insulating layer 35 is filled between the LED die negative electrode 32 and the LED die positive electrode 31 and the P-type semiconductor layer 34.
  • the LED die 30 may be a red LED die, a green LED die, or a blue LED die, so as to realize the three primary color lights of red, green, and blue. In this way, an adjacent red LED structure is formed.
  • the unit, a green LED structure unit and a blue light LED structure unit constitute an LED pixel unit.
  • the LED pixel unit can emit light of various colors, and then cooperate with other LED pixel units to achieve a display effect.
  • the LED structural unit further includes a negative electrode contact portion 60 (denoted as an E-pole) deposited on the substrate 10 and used to contact the negative electrode of the power source.
  • a fifth insulating layer 70 is filled between the negative electrode contact portion 60 and the LED die.
  • the negative electrode contact portion 60 is in communication with the LED die negative electrode 32 through the second wire 80, that is, each LED structural unit is protruded outwardly and is provided with a negative electrode contact portion 60 which is specifically connected to the negative electrode of the power supply, so as to facilitate the unified wiring.
  • the negative contact portion 60 is connected to the negative electrode of the power source, so that an equivalent circuit diagram of a single LED structural unit is shown in FIG.
  • FIG. 4 a partial schematic diagram of the LED display circuit is shown in FIG. 4, where G1, G2, and Gn represent All indicate high levels, S1, S2, and S3 are positive poles of the power supply, and E1, E2, and E3 all indicate negative poles of the power supply.
  • each functional layer is made by a deposition method, and specifically, it can be made by a method of film formation, photoresist coating, exposure, development, etching, and peeling.
  • each insulating layer (including the first insulating layer 40, the second insulating layer 24, the third insulating layer 26, the fourth insulating layer 35, and the fifth insulating layer 70) is made of a non-conductive material. Preferably, Made of silicon nitride material.
  • each functional layer is directly deposited and prepared on the substrate 10 and separated and fixed by each insulating layer, so the process of LED transfer and bonding alignment is omitted, and no additional packaging structure is required for protection and fixing.
  • each electrode including the source 21, the drain 22, the LED die positive electrode 31, the LED die negative electrode 32, the gate electrode 23, and the negative electrode contact portion 60
  • the lead wire including the first lead wire 50 and the first Both wires 80
  • a conductive metal material such as copper or aluminum.
  • An embodiment of the present invention further provides a method for manufacturing an LED display screen as described above, which includes the following steps:
  • a substrate is provided, and the TFT structure and the LED die are deposited on the substrate at intervals, and a first insulating layer is filled between the TFT structure and the LED die, and then the first TFT structure and the LED die are deposited on the first insulating layer to make the connection.
  • First wire is provided, and the TFT structure and the LED die are deposited on the substrate at intervals, and a first insulating layer is filled between the TFT structure and the LED die, and then the first TFT structure and the LED die are deposited on the first insulating layer to make the connection.
  • the step of depositing and fabricating the TFT structure specifically includes:
  • a gate that can be connected to a high level is deposited on the substrate, a second insulating layer is deposited on the gate, an amorphous silicon semiconductor layer is deposited on the second insulating layer, and an interval is deposited on the amorphous silicon semiconductor layer.
  • a phosphorous-containing amorphous silicon semiconductor layer, and a drain electrode and a source electrode connected to the positive electrode of the power source are respectively deposited on the two phosphorous-containing amorphous silicon semiconductor layers.
  • a third insulating layer is further filled between the two amorphous silicon semiconductor layers and between the source and the drain.
  • the step of manufacturing the LED die specifically includes:
  • N-type semiconductor layer is deposited on the substrate, a P-type semiconductor layer and an LED grain negative electrode connected to the power source negative electrode are deposited on the N-type semiconductor layer at intervals, and the LED grain positive electrode is deposited on the P-type semiconductor layer.
  • a fourth insulating layer is further filled between the LED die negative electrode, the LED die positive electrode, and the P-type semiconductor layer.
  • the method for manufacturing an LED display screen further includes steps:
  • a negative electrode contact portion for connecting to the negative electrode of the power supply is deposited on the substrate, and a fifth insulating layer is filled between the negative electrode contact portion and the LED die, and then a second wire for connecting the negative electrode contact portion and the LED die negative electrode is deposited.
  • An embodiment of the present invention further provides a method for controlling an LED display screen as described above, which includes the following steps:
  • the TFT structure is controlled to be connected to a high level, and the LED chip lights up and emits light;
  • the control TFT structure is disconnected from the high level, and the LED die is turned off.
  • the LED display screen, the TFT structure and the LED crystal grains are directly deposited on the substrate, and the first insulating layer is filled between the TFT structure and the LED crystal grains.
  • the LED die is connected through the first wire, which realizes the isolation and protection of the TFT structure and the LED die. It not only eliminates the LED transfer and bonding alignment process, but also eliminates the need for additional packaging structures for protection and fixation. There are technologies that have the problems of huge amount of LED transfer and difficult to align the LEDs when manufacturing mini LEDs or micro LEDs.

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Abstract

一种LED显示屏及其制作方法，其中，包括基板（10）及设置在基板（10）上的若干LED结构单元，LED结构单元包括：制备在基板（10）上的TFT结构（20）、制备在基板（10）上的LED晶粒（30）以及填充在TFT结构（20）与LED晶粒（30）之间的第一绝缘层（40），LED晶粒（30）通过第一导线（50）与TFT结构（20）相接。解决了现有技术在制作过程mini LED或micro LED时存在LED巨量转移及粘接对位难的问题。

Description

一种LED显示屏及其制作方法 技术领域
涉及LED显示屏技术领域，尤其涉及一种LED显示屏及其制作方法。
背景技术
LED显示屏是目前最具有应用前景的显示屏，尤其是mini LED或micro LED显示屏，为多量LED(R、G、B)阵列组成，具有高亮度、高对比度、超高解析度与色彩饱和度，每个LED都能独立驱动，还具有省电、反应速度快等优点。同时，LED显示屏不需要液晶模组要用过背光源，能减少厚度。但是，目前mini LED或micro LED存在LED巨量转移及粘接对位难的问题，而且需要进行额外的封装工序。
因此，现有技术还有待于改进和发展。
发明内容
鉴于上述现有技术的不足，本发明的目的在于提供一种LED显示屏及其制作方法，旨在解决现有技术在制作过程mini LED或micro LED时存在LED巨量转移及粘接对位难的问题。
本发明的技术方案如下：
一种LED显示屏，其中，包括基板及设置在基板上的若干LED结构单元，所述LED结构单元包括：制备在基板上的TFT结构、制备在基板上的LED晶粒以及填充在TFT结构与LED晶粒之间的第一绝缘层，所述LED晶粒的正极通过一第一导线与TFT结构相接。
所述的LED显示屏，其中，所述LED晶粒包括沉积在基板上的N型半导体层、间隔沉积在N型半导体层上的P型半导体层与LED晶粒负极、以及沉积在P型半导体层上的LED晶粒正极。
所述的LED显示屏，其中，所述TFT结构包括沉积在基板上的栅极、沉积在栅极上的第二绝缘层、沉积在所述第二绝缘层上的TFT半导体有源层、间隔 沉积在TFT半导体有源层的源极与漏极；所述漏极与LED晶粒的正极通过所述第一导线连通。
所述的LED显示屏，其中，所述源极与漏极之间填充有第三绝缘层。
所述的LED显示屏，其中，所述TFT半导体有源层包括沉积在第二绝缘层上的有源层、间隔沉积在有源层上的源极接触部与漏极接触部，所述有源层为非晶硅半导体层，所述源极接触部与漏极接触部均为含磷非晶硅半导体层，所述源极沉积在源极接触部上，所述漏极沉积在漏极接触部上。
所述的LED显示屏，其中，所述LED晶粒负极与LED晶粒正极及P型半导体层之间填充有第四绝缘层。
所述的LED显示屏，其中，所述LED晶粒为红光LED晶粒、绿光LED晶粒或蓝光LED晶粒。
所述的LED显示屏，其中，LED结构单元还包括制备在基板上的负极接触部，负极接触部通过一第二导线与LED晶粒的负极连通。
所述的LED显示屏，其中，所述负极接触部与LED晶粒填充有第五绝缘层。
所述的LED显示屏，其中，第一导线与第二导线为铜线或铝线。
所述的LED显示屏，其中，所述第一绝缘层的材料为氮化硅。
一种LED显示屏的制作方法，其中，包括步骤：
提供基板，在所述基板上间隔制作TFT结构及LED晶粒，并在TFT结构及LED晶粒之间填充第一绝缘层，再在第一绝缘层上制作连通TFT结构与LED晶粒的第一导线。
所述的LED显示屏的制作方法，其中，制作TFT结构的步骤具体包括：
在基板上沉积可与高电平接通的栅极，在栅极上沉积第二绝缘层，在所述第二绝缘层上沉积非晶硅半导体层，间隔在非晶硅半导体层上沉积2个含磷非晶硅半导体层，在2个含磷非晶硅半导体层上分别沉积漏极以及与电源正极相接的源极。
所述的LED显示屏的制作方法，其中，还包括步骤：在2个非晶硅半导体层之间及源极与漏极之间填充第三绝缘层。
所述的LED显示屏的制作方法，其中，制作LED晶粒的步骤具体包括：
在基板上沉积N型半导体层、间隔在N型半导体层上沉积P型半导体层及 与电源负极相接的LED晶粒负极，在P型半导体层上沉积LED晶粒正极。
所述的LED显示屏的制作方法，其中，还包括步骤：在LED晶粒负极与LED晶粒正极及P型半导体层之间填充第四绝缘层。
所述的LED显示屏的制作方法，其中，还包括步骤：
在基板上沉积负极接触部，并在负极接触部与LED晶粒之间填充第五绝缘层，再沉积用于连通负极接触部与LED晶粒负极的第二导线。
有益效果：本发明的实施方式所提供的LED显示屏，TFT结构及LED晶粒直接制备在基板上，并在TFT结构及LED晶粒之间填充第一绝缘层，所述TFT结构与LED晶粒的正极通过第一导线连通，实现TFT结构及LED晶粒隔离保护及固定作用，不仅省去了LED转移及粘接对位工序，而且不再需要额外的封装结构进行保护固定，解决了现有技术在制作过程mini LED或micro LED时存在LED巨量转移及粘接对位难的问题。
附图说明
图1为本发明实施方式中LED显示屏的结构示意图。
图3为本发明实施方式中TFT结构的等效电路示意图。
图4为本发明实施方式中LED结构单元的等效电路结构示意图。
图5为本发明实施方式中LED显示屏的等效电路示意图。
具体实施方式
为使本发明的目的、技术方案及效果更加清楚、明确，以下对本发明进一步详细说明。应当理解，此处所描述的实施方式和具体实施例仅仅用以解释本发明，并不用于限定本发明。
现有技术是把尺寸较小的LED一颗颗焊接在PCB板上，还需要区分LED PIN脚的正负极，而本发明的实施方式提供一种LED显示屏，适用于mini LED或micro LED，如图1所示，包括基板10及设置在基板10上的若干LED结构单元，所述LED结构单元包括：制备在基板10上的TFT结构20、制备在基板10上的LED晶粒30以及填充在TFT结构20与LED晶粒30之间的第一绝缘层40，所述TFT结构20与电源正极相接，所述LED晶粒30的正极通过第一导线 50与TFT结构相接，所述LED晶粒30的负极与电源负极相接，通过对单个TFT结构20控制进行实现对单个LED结构单元的控制，从而实现发出红光、蓝光或绿光。
显然，为了实现LED显示屏功能，所述LED结构单元应设置有若干个，能够发出红、绿、蓝三基色光，1个红光LED结构单元、1个绿光LED结构单元和1个蓝光LED结构单元组成1个LED像素单元，所述LED显示屏具有多个LED像素单元。
在一些实施方式中，所述的LED显示屏中，基板10可以是透明玻璃或透明柔性材料，柔性材料可以实现卷曲显示。
在一些实施方式中，所述TFT结构20包括沉积在基板10上的栅极23、沉积在栅极23上的第二绝缘层24、沉积在所述第二绝缘层24上的TFT半导体有源层25、间隔沉积在TFT半导体有源层25的源极21与漏极22，所述源极21与漏极22之间填充有第三绝缘层26，所述栅极23通过与高电平的开合来控制源极21与漏极22之间的导通或断开，所述漏极22与LED晶粒30的正极(简称为LED晶粒正极31)通过第一导线50连通，所述源极21与电源正极(图未示)相接，而所述LED晶粒30的负极(简称为LED晶粒负极32)与电源负极60相接，这样通过所述栅极23与高电平的开合来控制源极21与漏极22的导通或断开即可实现LED晶粒30与电源正负极的连通或断开，进而控制LED晶粒30的发光与熄灭。
在一些实施方式中，在所述源极21与漏极22之间填充有第三绝缘层26，以保证源极21与漏极22不会直接接触。
在一些具体实施方式中，所述TFT半导体有源层25包括沉积在第二绝缘层24上的有源层251、间隔沉积在有源层251上的源极接触部252与漏极接触部253，所述有源层251为非晶硅半导体层(a-Si层)，所述源极接触部252与漏极接触部253为含磷非晶硅半导体层(N+a-Si层)，在非晶硅半导体材料中加入P(磷)，提供电子，增大导电性；所述源极21(表示为S极)与漏极22(表示为D极)分别沉积在源极接触部252与漏极接触部253上，当G极提供高电平时，a-Si层中的电子向a-Si的底层吸附，使a-Si上层形成正极，N+a-Si层中的P电子则会向a-Si层靠拢，使a-Si岛能导电，导通S极和D极，使“开关”处于闭合 状态，即该LED结构单元导通；反之，则不导通该LED结构单元导通，所述的TFT结构的等效电路如图2所示。
在一些实施方式中，所述的LED显示屏中，LED晶粒30包括沉积在基板10上的N型半导体层33、间隔沉积在N型半导体层33上的P型半导体层34与LED晶粒负极32、以及沉积在P型半导体层34上的LED晶粒正极31。在一些具体实施方式中，所述LED晶粒负极32与LED晶粒正极31及P型半导体层34之间填充有第四绝缘层35。
所述LED晶粒30可以为红光LED晶粒、绿光LED晶粒或蓝光LED晶粒，以实现能够发出红、绿、蓝三基色光，这样再将相邻的1个红光LED结构单元、1个绿光LED结构单元和1个蓝光LED结构单元组成1个LED像素单元，该LED像素单元即可发出各种颜色的光，进而与其他LED像素单元配合实现显示效果。
在一些实施方式中，所述的LED结构单元还包括沉积在基板10上并用于与电源负极相接的负极接触部60(表示为E极)。在一些具体实施方式中，所述负极接触部60与LED晶粒之间填充有第五绝缘层70。负极接触部60通过第二导线80与LED晶粒负极32连通，即每个LED结构单元均向外伸出设置有1个专门与电源负极相导通的负极接触部60，这样便于通过统一布线将负极接触部60与电源负极接通，这样单个LED结构单元的等效电路图如图3所述，而所述LED显示屏的电路局部示意图如图4所示，其中，G1、G2、Gn表示均表示高电平，S1、S2、S3均为电源正极，E1、E2、E3均表示电源负极。
本发明中，各功能层均通过沉积方法制作而成，具体可以采用成膜-涂光刻胶-曝光-显影-蚀刻-剥离的方法制作。
本发明中，各个绝缘层(包括第一绝缘层40、第二绝缘层24、第三绝缘层26、第四绝缘层35及第五绝缘层70)均由不导电材料制成，优选地，由氮化硅材料制成。本发明正是将各功能层直接沉积制备在基板10上并通过各绝缘层隔开固定，因而省去了LED转移及粘接对位的工序，也不再需要额外的封装结构进行保护固定。
优选地，本发明中，各个电极(包括源极21、漏极22、LED晶粒正极31、LED晶粒负极32、栅极23及负极接触部60)及导线(包括第一导线50与第二 导线80)均由导电金属材料制成，如铜或铝等。
本发明的实施方式还提供了一种如上所述的LED显示屏的制作方法，其中，包括步骤：
提供基板，在所述基板上间隔沉积制作TFT结构及LED晶粒，并在TFT结构及LED晶粒之间填充第一绝缘层，再在第一绝缘层上沉积制作连通TFT结构与LED晶粒的第一导线。
在一些实施方式中，沉积制作TFT结构的步骤具体包括：
在基板上沉积可与高电平接通的栅极，在栅极上沉积第二绝缘层，在所述第二绝缘层上沉积非晶硅半导体层，间隔在非晶硅半导体层上沉积2个含磷非晶硅半导体层，在2个含磷非晶硅半导体层上分别沉积漏极以及与电源正极相接的源极。在一些具体实施方式中，再在2个非晶硅半导体层之间及源极与漏极之间填充第三绝缘层。
在一些实施方式中，制作LED晶粒的步骤具体包括：
在基板上沉积N型半导体层、间隔在N型半导体层上沉积P型半导体层及与电源负极相接的LED晶粒负极，在P型半导体层上沉积LED晶粒正极。在一些具体实施方式中，再在LED晶粒负极与LED晶粒正极及P型半导体层之间填充第四绝缘层。
在一些实施方式中，所述LED显示屏的制作方法还包括步骤：
在基板上沉积用于与电源负极相接的负极接触部，并在负极接触部与LED晶粒之间填充第五绝缘层，再沉积用于连通负极接触部与LED晶粒负极的第二导线。
本发明的实施方式还提供了一种如上所述的LED显示屏的控制方法，其中，包括步骤：
S1、控制TFT结构与高电平接通，LED晶粒点亮发光；
S2、控制TFT结构与高电平断开，LED晶粒熄灭。
综上所述，本发明的实施方式提供的LED显示屏，TFT结构及LED晶粒直接沉积制备在基板上，并在TFT结构及LED晶粒之间填充第一绝缘层，所述TFT结构与LED晶粒通过第一导线连通，实现TFT结构及LED晶粒隔离保护及固定作用，不仅省去了LED转移及粘接对位工序，而且不再需要额外的封装结构 进行保护固定，解决了现有技术在制作过程mini LED或micro LED时存在LED巨量转移及粘接对位难的问题。
应当理解的是，本发明的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (17)

  1. 一种LED显示屏，其特征在于，包括基板及设置在基板上的若干LED结构单元，所述LED结构单元包括：制备在基板上的TFT结构、制备在基板上的LED晶粒以及填充在TFT结构与LED晶粒之间的第一绝缘层，所述LED晶粒通过一第一导线与TFT结构相接。
  2. 根据权利要求1所述的LED显示屏，其特征在于，所述LED晶粒包括沉积在基板上的N型半导体层、间隔沉积在N型半导体层上的P型半导体层与LED晶粒负极、以及沉积在P型半导体层上的LED晶粒正极。
  3. 根据权利要求2所述的LED显示屏，其特征在于，所述TFT结构包括沉积在基板上的栅极、沉积在栅极上的第二绝缘层、沉积在所述第二绝缘层上的TFT半导体有源层、间隔沉积在TFT半导体有源层的源极与漏极；所述漏极与所述LED晶粒的正极通过所述第一导线连通。
  4. 根据权利要求3所述的LED显示屏，其特征在于，所述源极与漏极之间填充有第三绝缘层。
  5. 根据权利要求4所述的LED显示屏，其特征在于，所述TFT半导体有源层包括沉积在第二绝缘层上的有源层、间隔沉积在有源层上的源极接触部与漏极接触部，所述有源层为非晶硅半导体层，所述源极接触部与漏极接触部均为含磷非晶硅半导体层，所述源极沉积在源极接触部上，所述漏极沉积在漏极接触部上。
  6. 根据权利要求2所述的LED显示屏，其特征在于，所述LED晶粒负极与LED晶粒正极及P型半导体层之间填充有第四绝缘层。
  7. 根据权利要求1所述的LED显示屏，其特征在于，所述LED晶粒为红光LED晶粒、绿光LED晶粒或蓝光LED晶粒。
  8. 根据权利要求2所述的LED显示屏，其特征在于，LED结构单元还包括制备在基板上的负极接触部，负极接触部通过一第二导线与LED晶粒的负极连通。
  9. 根据权利要求8所述的LED显示屏，其特征在于，所述负极接触部与LED晶粒填充有第五绝缘层。
  10. 根据权利要求8所述的LED显示屏，其特征在于，第一导线与第二导线为铜线或铝铝线。
  11. 根据权利要求1所述的LED显示屏，其特征在于，所述第一绝缘层的材料为氮化硅。
  12. 一种LED显示屏的制作方法，其特征在于，包括步骤：
    提供基板，在所述基板上间隔制作TFT结构及LED晶粒，并在TFT结构及LED晶粒之间填充第一绝缘层，再在第一绝缘层上制作连通TFT结构与LED晶粒的第一导线。
  13. 根据权利要求12所述的LED显示屏的制作方法，其特征在于，制作TFT结构的步骤具体包括：
    在基板上沉积可与高电平接通的栅极，在栅极上沉积第二绝缘层，在所述第二绝缘层上沉积非晶硅半导体层，间隔在非晶硅半导体层上沉积2个含磷非晶硅半导体层，在2个含磷非晶硅半导体层上分别沉积漏极以及与电源正极相接的源极。
  14. 根据权利要求13所述的LED显示屏的制作方法，其特征在于，还包括步骤：在2个非晶硅半导体层之间及源极与漏极之间填充第三绝缘层。
  15. 根据权利要求12所述的LED显示屏的制作方法，其特征在于，制作LED晶粒的步骤具体包括：
    在基板上沉积N型半导体层、间隔在N型半导体层上沉积P型半导体层及与电源负极相接的LED晶粒负极，在P型半导体层上沉积LED晶粒正极。
  16. 根据权利要求15所述的LED显示屏的制作方法，其特征在于，还包括步骤：在LED晶粒负极与LED晶粒正极及P型半导体层之间填充第四绝缘层。
  17. 根据权利要求15所述的LED显示屏的制作方法，其特征在于，还包括步骤：
    在基板上沉积负极接触部，并在负极接触部与LED晶粒之间填充第五绝缘层，再沉积用于连通负极接触部与LED晶粒负极的第二导线。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050248708A1 (en) * 2001-12-28 2005-11-10 Hyun-Tak Park Array substrate for a liquid crystal display device and fabricating method thereof
CN101847646A (zh) * 2010-02-02 2010-09-29 孙润光 一种无机发光二极管显示装置
CN104112756A (zh) * 2013-04-19 2014-10-22 鸿富锦精密工业（深圳）有限公司 主动式固态发光显示器
CN106206611A (zh) * 2016-08-19 2016-12-07 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
CN106941108A (zh) * 2017-05-23 2017-07-11 深圳市华星光电技术有限公司 微发光二极管显示面板及其制作方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050248708A1 (en) * 2001-12-28 2005-11-10 Hyun-Tak Park Array substrate for a liquid crystal display device and fabricating method thereof
CN101847646A (zh) * 2010-02-02 2010-09-29 孙润光 一种无机发光二极管显示装置
CN104112756A (zh) * 2013-04-19 2014-10-22 鸿富锦精密工业（深圳）有限公司 主动式固态发光显示器
CN106206611A (zh) * 2016-08-19 2016-12-07 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
CN106941108A (zh) * 2017-05-23 2017-07-11 深圳市华星光电技术有限公司 微发光二极管显示面板及其制作方法

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