WO2020015335A1 - 用于侦测感测线电容的侦测电路、侦测方法与oled显示装置 - Google Patents

用于侦测感测线电容的侦测电路、侦测方法与oled显示装置 Download PDF

Info

Publication number
WO2020015335A1
WO2020015335A1 PCT/CN2018/124830 CN2018124830W WO2020015335A1 WO 2020015335 A1 WO2020015335 A1 WO 2020015335A1 CN 2018124830 W CN2018124830 W CN 2018124830W WO 2020015335 A1 WO2020015335 A1 WO 2020015335A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
terminal
sensing line
reference voltage
operational amplifier
Prior art date
Application number
PCT/CN2018/124830
Other languages
English (en)
French (fr)
Inventor
邝继木
解红军
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Publication of WO2020015335A1 publication Critical patent/WO2020015335A1/zh

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • the present invention relates to the field of display technology, and in particular, to a detection circuit, a detection method and an OLED display device for detecting the capacitance of a sensing line.
  • Organic light emitting diode (Organic Light Emitting Display, OLED) display devices have self-emission, low driving voltage, high luminous efficiency, short response time, high definition and contrast, near 180 ° viewing angle, wide operating temperature range, and flexible display and display. Large-area full-color display and many other advantages are recognized by the industry as the most promising display devices.
  • An OLED is a current-driven device. When a current flows through the organic light emitting diode, the organic light emitting diode emits light, and the light emission brightness is determined by the current flowing through the organic light emitting diode itself. Most existing integrated circuits Circuit (IC) only transmits voltage signals, so the pixel driving circuit of the OLED needs to complete the task of converting a voltage signal into a current signal.
  • IC integrated circuits Circuit
  • each pixel of the OLED display device includes an OLED device and a pixel driving circuit for driving the OLED device to emit light.
  • the pixel driving circuit is provided with a driving thin film transistor (TFT) connected to the OLED device, and is configured to convert a voltage signal into a current signal to drive the OLED device to emit light.
  • TFT driving thin film transistor
  • the threshold voltage drift of the driving thin film transistor and the aging of the OLED device may occur, thereby affecting the display quality. Therefore, compensation techniques are generally required to compensate the driving threshold voltage drift of the thin film transistor and the aging of the OLED device.
  • the compensation technology usually uses multiple sense lines to obtain the voltages of key nodes in each pixel driving circuit.
  • An object of the present invention is to provide a detection circuit for detecting a capacitance of a sensing line, which can simply and accurately detect a parasitic capacitance between the sensing line and a ground terminal.
  • Another object of the present invention is to provide a sensing line capacitance detection method, which can simply and accurately detect a parasitic capacitance between a sensing line and a ground terminal.
  • Another object of the present invention is to provide an OLED display device, which can simply and accurately detect a parasitic capacitance between a sensing line and a ground terminal.
  • the present invention first provides a detection circuit for detecting a capacitance of a sensing line, a parasitic capacitance is formed between the sensing line and a ground terminal, and the detection for detecting the capacitance of the sensing line is
  • the detection circuit includes a detection module electrically connected to the sensing line;
  • the detection module includes a first switch, a second switch, a third switch, an operational amplifier, a storage capacitor, and a processing unit; a control end of the first switch is connected to a first switching signal, and the first end is electrically connected to the first
  • the node is electrically connected to the sensing line, the second terminal is electrically connected to the output terminal of the operational amplifier; the control terminal of the second switch is connected to the second switching signal, and the first terminal is electrically connected to the non-inverted input terminal of the operational amplifier.
  • the second terminal is connected to the first reference voltage; the control terminal of the third switch is connected to the third switching signal, the first terminal is electrically connected to the non-inverting input terminal of the operational amplifier, and the second terminal is connected to the second reference voltage;
  • the first terminal of the storage capacitor is electrically connected to the first node, and the second terminal is electrically connected to the output terminal of the operational amplifier; the inverting input terminal of the operational amplifier is electrically connected to the first node; and the processing unit is electrically connected to the operation.
  • the output terminal of the amplifier is used to calculate the capacitance value of the parasitic capacitance between the sensing line and the ground terminal according to the voltage at the output terminal of the operational amplifier.
  • the working state of the detection circuit for detecting the capacitance of the sensing line includes: a first stage and a second stage;
  • the first switch signal controls the first switch to be turned on
  • the second switch signal controls the second switch to be turned on
  • the third switch signal controls the third switch to be turned off, so that the voltage of the first node Charging to a first reference voltage
  • the first switch signal controls the first switch to be turned off
  • the second switch signal controls the second switch to be turned off
  • the third switch signal controls the third switch to be turned on, so that the voltage of the first node
  • the first reference voltage is changed to the second reference voltage
  • the processing unit calculates the capacitance value of the parasitic capacitance between the sensing line and the ground terminal according to the voltage at the output end of the operational amplifier and a preset parasitic capacitance value calculation formula.
  • the second reference voltage is less than the first reference voltage.
  • the preset parasitic capacitance calculation formula is:
  • Cp is the capacitance value of the parasitic capacitance between the sensing line and the ground
  • Ct is the capacitance value of the storage capacitor
  • V1 is the first reference voltage
  • V2 is the second reference voltage
  • Vout is the operational amplifier in the second stage Voltage at the output.
  • the first switching signal is high potential; the second switching signal is high potential; and the third switching signal is low potential;
  • the first switching signal is a low potential; the second switching signal is a low potential; and the third switching signal is a high potential.
  • the processing unit is an analog-to-digital converter.
  • the detection module is disposed on a sensing chip.
  • the invention also provides a sensing line capacitance detection method, which is applied to the above-mentioned detection circuit for detecting the sensing line capacitance and includes the following steps:
  • Step S1 enter the first stage
  • the first switch signal controls the first switch to be turned on
  • the second switch signal controls the second switch to be turned on
  • the third switch signal controls the third switch to be turned off, so that the voltage at the first node is charged to the first reference Voltage
  • Step S2 enter the second stage
  • the first switch signal controls the first switch to be turned off
  • the second switch signal controls the second switch to be turned off
  • the third switch signal controls the third switch to be turned on, so that the voltage at the first node is controlled by the first reference voltage.
  • Change to the second reference voltage and then the processing unit calculates the capacitance value of the parasitic capacitance between the sensing line and the ground terminal according to the voltage at the output end of the operational amplifier and a preset parasitic capacitance value calculation formula.
  • the present invention also provides an OLED display device including the above-mentioned detection circuit for detecting the capacitance of a sensing line.
  • the detection circuit for detecting the capacitance of the detection line, the detection line of the present invention, and a detection module electrically connected to the detection line.
  • the detection module includes a first switch, a second switch, a third switch, an operational amplifier, Storage capacitor and processing unit. During operation, by controlling the on and off of the first switch, the second switch, and the third switch, the voltage difference between the two ends of the parasitic capacitance between the sensing line and the ground terminal is firstly the first reference voltage, and then the parasitic capacitance is made. The voltage difference between the two ends changes to the second reference voltage.
  • the processing unit calculates the capacitance value of the parasitic capacitance between the sensing line and the ground terminal according to the voltage at the output end of the operational amplifier and a preset parasitic capacitance value calculation formula.
  • the test results are accurate.
  • the sensing line capacitance detection method of the present invention can simply and effectively detect a parasitic capacitance between a sensing line and a ground terminal.
  • the OLED display device of the present invention can simply and effectively detect a parasitic capacitance between a sensing line and a ground terminal.
  • FIG. 1 is a circuit diagram of a detection circuit for detecting a capacitance of a sensing line according to the present invention
  • FIG. 2 is a timing diagram of a detection circuit for detecting a capacitance of a sensing line according to the present invention
  • FIG. 3 is a flowchart of a sensing line capacitance detection method according to the present invention.
  • FIG. 4 is a schematic structural diagram of an OLED display device according to the present invention.
  • the present invention provides a detection circuit for detecting a capacitance of a sensing line.
  • a parasitic capacitance Cp is formed between the sensing line 10 and a ground terminal.
  • the detection circuit includes a detection module 20 electrically connected to the sensing line 10.
  • the detection module 20 includes a first switch K1, a second switch K2, a third switch K3, an operational amplifier 21, a storage capacitor Ct, and a processing unit 22.
  • the control terminal of the first switch K1 is connected to the first switching signal SW1, the first terminal is electrically connected to the first node a and electrically connected to the sensing line 10, and the second terminal is electrically connected to the output terminal of the operational amplifier 21.
  • the control terminal of the second switch K2 is connected to the second switching signal SW2, the first terminal is electrically connected to the non-inverting input terminal of the operational amplifier 21, and the second terminal is connected to the first reference voltage V1.
  • the control terminal of the third switch K3 is connected to the third switching signal SW3, the first terminal is electrically connected to the non-inverting input terminal of the operational amplifier 21, and the second terminal is connected to the second reference voltage V2.
  • a first terminal of the storage capacitor Ct is electrically connected to the first node a, and a second terminal of the storage capacitor Ct is electrically connected to an output terminal of the operational amplifier 21.
  • the inverting input terminal of the operational amplifier 21 is electrically connected to the first node a.
  • the processing unit 22 is electrically connected to the output terminal of the operational amplifier 21 and is configured to calculate a capacitance value of the parasitic capacitance Cp between the sensing line 10 and a ground terminal according to the voltage of the output terminal of the operational amplifier 21.
  • the processing unit 22 is an analog-to-digital converter ADC.
  • the detection module 20 is disposed on a sensing chip 30.
  • the working state of the detection circuit for detecting the capacitance of the sensing line includes a first stage t1 and a second stage t2.
  • the first switch signal SW1 is high and controls the first switch K1 to be turned on
  • the second switch signal SW2 is high and controls the second switch K2 to be turned on
  • the third switch signal SW3 is low potential and controls the third switch K3 to be turned off.
  • the output terminal of the operational amplifier 21 is shorted to the inverting input terminal, so that the operational amplifier 21 is equivalent to a follower.
  • the voltage is the same, so that the voltage of the inverting input terminal of the operational amplifier 21, that is, the first node a is charged to the first reference voltage V1, so that the voltage difference across the parasitic capacitance Cp formed between the sensing line 10 and the ground terminal is also First reference voltage V1.
  • the first switch signal SW1 is at a low potential and controls the first switch K1 to be turned off
  • the second switch signal SW2 is at a low potential and controls the second switch K2 to be turned off
  • the third switch signal SW3 is high and controls the third switch K3 to be turned on.
  • the voltage of the first node a will change from the first reference voltage V1 to the second reference voltage V2.
  • a connection is formed between the sensing line 10 and the ground terminal.
  • the voltage difference across the parasitic capacitance Cp also changes from the first reference voltage V1 to the second reference voltage V2.
  • the processing unit 22 calculates the voltage according to the output terminal of the operational amplifier 21 and a preset parasitic capacitance value calculation formula.
  • the second reference voltage V2 is smaller than the first reference voltage V1
  • the preset parasitic capacitance calculation formula is:
  • Cp is the capacitance value of the parasitic capacitance Cp between the sensing line 10 and the ground terminal
  • Ct is the capacitance value of the storage capacitor Ct
  • V1 is the first reference voltage V1
  • V2 is the second reference voltage V1
  • Vout is the first The voltage at the output of the operational amplifier 21 in the two stages.
  • the detection circuit for detecting the capacitance of the sensing line of the present invention can simply and effectively detect the parasitic capacitance Cp between the sensing line 10 and the ground terminal, which is convenient for subsequent performing the parasitic capacitance Cp when the sensing line 10 is charged. make up.
  • the present invention also provides a sensing line capacitance detection method, which is applied to the above-mentioned detection circuit for detecting the sensing line capacitance.
  • the description of the detection circuit for detecting the capacitance of the sensing line will not be repeated.
  • the sensing line capacitance detection method includes the following steps:
  • Step S1 enter the first stage t1.
  • the first switch signal SW1 controls the first switch K1 to be turned on
  • the second switch signal SW2 controls the second switch K2 to be turned on
  • the third switch signal SW3 controls the third switch K3 to be turned off, so that the first node a Is charged to the first reference voltage V1.
  • the first switch signal SW1 is at a high potential and controls the first switch K1 to be turned on.
  • the second switch signal SW2 is at a high potential, and controls the second switch K2 to be turned on.
  • the third switch signal SW3 is at a low potential, and controls the third switch K3 to be turned off.
  • the output terminal of the operational amplifier 21 is shorted to the inverting input terminal, so that the operational amplifier 21 is equivalent to a follower.
  • the voltage at the output terminal is the same as the voltage at the non-inverting input terminal.
  • the inverting input terminal of the operational amplifier 21 is also The voltage of the first node a is charged to the first reference voltage V1, so that the voltage difference across the parasitic capacitance Cp formed between the sensing line 10 and the ground terminal is also the first reference voltage V1.
  • Step S2 enter the second stage t2.
  • the first switch signal SW1 controls the first switch K1 to be turned off
  • the second switch signal SW2 controls the second switch K2 to be turned off
  • the third switch signal SW3 controls the third switch K3 to be turned on, so that the first node a
  • the voltage of the sensor is changed from the first reference voltage V1 to the second reference voltage V2, and then the processing unit 22 calculates between the sensing line 10 and the ground terminal according to the voltage at the output terminal of the operational amplifier 21 and a preset parasitic capacitance value calculation formula.
  • the capacitance value of the parasitic capacitance Cp The capacitance value of the parasitic capacitance Cp.
  • step S2 the first switch signal SW1 is at a low potential, and the first switch K1 is controlled to be turned off.
  • the second switch signal SW2 is at a low potential, and controls the second switch K2 to be turned off.
  • the third switch signal SW3 is high, and controls the third switch K3 to be turned on.
  • the voltage of the first node a will change from the first reference voltage V1 to the second reference voltage V2. Accordingly, the voltage difference across the parasitic capacitance Cp formed between the sensing line 10 and the ground terminal is also determined by the first reference.
  • the voltage V1 changes to the second reference voltage V2.
  • the processing unit 22 calculates the parasitic between the sensing line 10 and the ground terminal according to the voltage at the output terminal of the operational amplifier 21 and a preset parasitic capacitance value calculation formula.
  • the second reference voltage V2 is smaller than the first reference voltage V1
  • the preset parasitic capacitance calculation formula is:
  • Cp is the capacitance value of the parasitic capacitance Cp between the sensing line 10 and the ground terminal
  • Ct is the capacitance value of the storage capacitor Ct
  • V1 is the first reference voltage V1
  • V2 is the second reference voltage V1
  • Vout is the first The voltage at the output of the operational amplifier 21 in the two stages.
  • the sensing line capacitance detection method of the present invention can simply and effectively detect the parasitic capacitance Cp between the sensing line 10 and the ground terminal, and is convenient for compensating the parasitic capacitance Cp when the sensing line 10 is subsequently charged.
  • the present invention further provides an OLED display device including the above-mentioned detection circuit for detecting the capacitance of the sensing line.
  • the OLED display device includes a substrate 40, a plurality of sensing lines 10 provided on the substrate 40 and being parallel to each other, and a plurality of sensing lines 10 corresponding to the plurality of sensing lines 10 respectively.
  • Detection circuit for detecting the capacitance of the sensing line Further, the OLED display device further includes a plurality of sensing chips 30, each sensing chip 30 corresponding to at least one sensing line 10, and corresponding to a sensing line 10 for detecting the capacitance of the sensing line.
  • the sensing circuit is disposed on a sensing chip 30 corresponding to the sensing line 10.
  • the OLED display device of the present invention includes the above-mentioned circuit for detecting the capacitance of the sensing line, which can simply and effectively detect the parasitic capacitance Cp between the sensing line 10 and the ground terminal, which is convenient for sensing. Corresponding voltage compensation is performed when the line 10 is being charged.
  • the OLED display device of the present invention further includes a plurality of pixels (not shown) disposed on the substrate 40. Each pixel is provided with a switching thin film transistor.
  • the detection circuit for detecting the capacitance of a sensing line of the present invention includes a detection module electrically connected to the sensing line.
  • the detection module includes a first switch, a second switch, a third switch, and a calculation.
  • Amplifier, storage capacitor and processing unit During operation, by controlling the on and off of the first switch, the second switch, and the third switch, the voltage difference between the two ends of the parasitic capacitance between the sensing line and the ground terminal is firstly the first reference voltage, and then the parasitic capacitance is made. The voltage difference between the two ends changes to the second reference voltage.
  • the processing unit calculates the capacitance value of the parasitic capacitance between the sensing line and the ground terminal according to the voltage at the output end of the operational amplifier and a preset parasitic capacitance value calculation formula.
  • the test results are accurate.
  • the sensing line capacitance detection method of the present invention can simply and effectively detect a parasitic capacitance between a sensing line and a ground terminal.
  • the OLED display device of the present invention can simply and effectively detect a parasitic capacitance between a sensing line and a ground terminal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种用于侦测感测线电容的侦测电路、侦测方法与OLED显示装置。所述侦测电路包括与感测线电性连接的侦测模块,侦测模块包括第一开关、第二开关、第三开关、运算放大器、存储电容及处理单元。工作时,通过控制第一开关、第二开关、第三开关的导通及断开,先使得感测线与接地端之间的寄生电容两端压差为第一参考电压,而后使得寄生电容两端压差变化为第二参考电压,处理单元根据运算放大器输出端的电压及预设的寄生电容值计算公式计算所述感测线与接地端之间的寄生电容的电容值。

Description

用于侦测感测线电容的侦测电路、侦测方法与OLED显示装置 技术领域
本发明涉及显示技术领域,尤其涉及一种用于侦测感测线电容的侦测电路、侦测方法与OLED显示装置。
背景技术
有机发光二极管(Organic Light Emitting Display,OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽、可实现柔性显示与大面积全色显示等诸多优点,被业界公认为是最有发展潜力的显示装置。
OLED是电流驱动器件,当有电流流过有机发光二极管时,有机发光二极管发光,且发光亮度由流过有机发光二极管自身的电流决定。大部分已有的集成电路(Integrated Circuit,IC)都只传输电压信号,故OLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。
技术问题
现有技术中,OLED显示装置的每个像素均包括一OLED器件和用于驱动所述 OLED 器件发光的像素驱动电路。该像素驱动电路中设置有与OLED器件连接的驱动薄膜晶体管(TFT),用于将电压信号转换为电流信号驱动OLED器件发光。OLED显示装置在使用过程中会出现驱动薄膜晶体管阈值电压漂移以及OLED 器件发生老化的问题,进而影响显示品质,因此一般需要使用补偿技术去补偿驱动薄膜晶体管阈值电压漂移及OLED 器件老化。补偿技术通常会使用多条感测线(sense line)获取各个像素驱动电路中关键节点的电压。每条感测线与接地端之间都存在寄生电容,且各个感测线与接地端之间的寄生电容的大小不一致,进而产生将多条感测线充电至相同电压所用的时间不一致的问题。因此,如何侦测感测线与接地端之间的电容是目前急需解决的一个技术问题。
技术解决方案
本发明的目的在于提供一种用于侦测感测线电容的侦测电路,能够简单且准确地侦测感测线与接地端之间的寄生电容。
本发明的另一目的在于提供一种感测线电容侦测方法,能够简单且准确地侦测感测线与接地端之间的寄生电容。
本发明的又一目的在于提供一种OLED显示装置,能够简单且准确地侦测感测线与接地端之间的寄生电容。
为实现上述目的,本发明首先提供一种用于侦测感测线电容的侦测电路,所述感测线与接地端之间形成寄生电容,所述用于侦测感测线电容的侦测电路包括与感测线电性连接的侦测模块;
所述侦测模块包括第一开关、第二开关、第三开关、运算放大器、存储电容及处理单元;所述第一开关的控制端接入第一开关信号,第一端电性连接第一节点并电性连接所述感测线,第二端电性连接运算放大器的输出端;所述第二开关的控制端接入第二开关信号,第一端电性连接运算放大器的同相输入端,第二端接入第一参考电压;所述第三开关的控制端接入第三开关信号,第一端电性连接运算放大器的同相输入端,第二端接入第二参考电压;所述存储电容的第一端电性连接第一节点,第二端电性连接运算放大器的输出端;所述运算放大器的反相输入端电性连接第一节点;所述处理单元电性连接运算放大器的输出端,用于根据运算放大器输出端的电压计算所述感测线与接地端之间的寄生电容的电容值。
所述用于侦测感测线电容的侦测电路的工作状态包括:第一阶段及第二阶段;
在第一阶段,所述第一开关信号控制第一开关导通,所述第二开关信号控制第二开关导通,所述第三开关信号控制第三开关断开,使第一节点的电压充电至第一参考电压;
在第二阶段,所述第一开关信号控制第一开关断开,所述第二开关信号控制第二开关断开,所述第三开关信号控制第三开关导通,使第一节点的电压由第一参考电压变化至第二参考电压,而后所述处理单元根据运算放大器输出端的电压及预设的寄生电容值计算公式计算所述感测线与接地端之间的寄生电容的电容值。
所述第二参考电压小于第一参考电压。
所述预设的寄生电容计算公式为:
Cp= (V2-Vout)×Ct /(V1-V2);
其中,Cp为感测线与接地端之间的寄生电容的电容值,Ct为存储电容的电容值,V1为第一参考电压,V2为第二参考电压,Vout为在第二阶段中运算放大器输出端的电压。
在第一阶段,所述第一开关信号为高电位;所述第二开关信号为高电位;所述第三开关信号为低电位;
在第二阶段,所述第一开关信号为低电位;所述第二开关信号为低电位;所述第三开关信号为高电位。
所述处理单元为模数转换器。
所述侦测模块设于一感测芯片上。
本发明还提供一种感测线电容侦测方法,应用于上述的用于侦测感测线电容的侦测电路,包括如下步骤:
步骤S1、进入第一阶段;
所述第一开关信号控制第一开关导通,所述第二开关信号控制第二开关导通,所述第三开关信号控制第三开关断开,使第一节点的电压充电至第一参考电压;
步骤S2、进入第二阶段;
所述第一开关信号控制第一开关断开,所述第二开关信号控制第二开关断开,所述第三开关信号控制第三开关导通,使第一节点的电压由第一参考电压变化至第二参考电压,而后所述处理单元根据运算放大器输出端的电压及预设的寄生电容值计算公式计算所述感测线与接地端之间的寄生电容的电容值。
本发明还提供一种OLED显示装置,包括上述的用于侦测感测线电容的侦测电路。
有益效果
本发明的用于侦测感测线电容的侦测电路感测线及与感测线电性连接的侦测模块,侦测模块包括第一开关、第二开关、第三开关、运算放大器、存储电容及处理单元。工作时,通过控制第一开关、第二开关、第三开关的导通及断开,先使得感测线与接地端之间的寄生电容两端压差为第一参考电压,而后使得寄生电容两端压差变化为第二参考电压,处理单元根据运算放大器输出端的电压及预设的寄生电容值计算公式计算所述感测线与接地端之间的寄生电容的电容值,操作简单,侦测结果准确。本发明的感测线电容侦测方法能够简单有效地侦测感测线与接地端之间的寄生电容。本发明的OLED显示装置能够简单有效地侦测感测线与接地端之间的寄生电容。
附图说明
图1为本发明的用于侦测感测线电容的侦测电路的电路图;
图2为本发明的用于侦测感测线电容的侦测电路的时序图;
图3为本发明的感测线电容侦测方法的流程图;
图4为本发明的OLED显示装置的结构示意图。
本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1,本发明提供一种用于侦测感测线电容的侦测电路,所述感测线10与接地端之间形成寄生电容Cp,所述用于侦测感测线电容的侦测电路包括与感测线10电性连接的侦测模块20。
所述侦测模块20包括第一开关K1、第二开关K2、第三开关K3、运算放大器21、存储电容Ct及处理单元22。所述第一开关K1的控制端接入第一开关信号SW1,第一端电性连接第一节点a并电性连接所述感测线10,第二端电性连接运算放大器21的输出端。所述第二开关K2的控制端接入第二开关信号SW2,第一端电性连接运算放大器21的同相输入端,第二端接入第一参考电压V1。所述第三开关K3的控制端接入第三开关信号SW3,第一端电性连接运算放大器21的同相输入端,第二端接入第二参考电压V2。所述存储电容Ct的第一端电性连接第一节点a,第二端电性连接运算放大器21的输出端。所述运算放大器21的反相输入端电性连接第一节点a。所述处理单元22电性连接运算放大器21的输出端,用于根据运算放大器21输出端的电压计算所述感测线10与接地端之间的寄生电容Cp的电容值。
具体地,所述处理单元22为模数转换器ADC。
具体地,所述侦测模块20设于一感测芯片30上。
具体地,请参阅图2,并结合图1,所述用于侦测感测线电容的侦测电路的工作状态包括:第一阶段t1及第二阶段t2。
在第一阶段t1,所述第一开关信号SW1为高电位,控制第一开关K1导通,所述第二开关信号SW2为高电位,控制第二开关K2导通,所述第三开关信号SW3为低电位,控制第三开关K3断开,此时,所述运算放大器21的输出端与反相输入端短接,使运算放大器21相当于一跟随器,其输出端的电压与同相输入端的电压相同,使运算放大器21的反相输入端也即第一节点a的电压充电至第一参考电压V1,从而使得感测线10与接地端之间形成的寄生电容Cp两端压差也为第一参考电压V1。
在第二阶段t2,所述第一开关信号SW1为低电位,控制第一开关K1断开,所述第二开关信号SW2为低电位,控制第二开关K2断开,所述第三开关信号SW3为高电位,控制第三开关K3导通,此时,第一节点a的电压会由第一参考电压V1变化至第二参考电压V2,相应的,感测线10与接地端之间形成的寄生电容Cp两端压差也由第一参考电压V1变化至第二参考电压V2,待电压稳定后,所述处理单元22根据运算放大器21输出端的电压及预设的寄生电容值计算公式计算所述感测线10与接地端之间的寄生电容Cp的电容值。在本发明的优选实施例中,所述第二参考电压V2小于第一参考电压V1,所述预设的寄生电容计算公式为:
Cp= (V2-Vout)×Ct /(V1-V2);
其中,Cp为感测线10与接地端之间的寄生电容Cp的电容值,Ct为存储电容Ct的电容值,V1为第一参考电压V1,V2为第二参考电压V1,Vout为在第二阶段中运算放大器21输出端的电压。本发明的用于侦测感测线电容的侦测电路能够简单有效地侦测感测线10与接地端之间的寄生电容Cp,便于后续在对感测线10充电时对寄生电容Cp进行补偿。
请参阅图3,并结合图1及图2,基于同一发明构思,本发明还提供一种感测线电容侦测方法,应用于上述用于侦测感测线电容的侦测电路,在此不再对用于侦测感测线电容的侦测电路做重复性描述。该感测线电容侦测方法包括如下步骤:
步骤S1、进入第一阶段t1。
所述第一开关信号SW1控制第一开关K1导通,所述第二开关信号SW2控制第二开关K2导通,所述第三开关信号SW3控制第三开关K3断开,使第一节点a的电压充电至第一参考电压V1。
具体地,所述步骤S1中,所述第一开关信号SW1为高电位,控制第一开关K1导通。所述第二开关信号SW2为高电位,控制第二开关K2导通。所述第三开关信号SW3为低电位,控制第三开关K3断开。此时,所述运算放大器21的输出端与反相输入端短接,使运算放大器21相当于一跟随器,其输出端的电压与同相输入端的电压相同,运算放大器21的反相输入端也即第一节点a的电压充电至第一参考电压V1,从而使得感测线10与接地端之间形成的寄生电容Cp两端压差也为第一参考电压V1。
步骤S2、进入第二阶段t2。
所述第一开关信号SW1控制第一开关K1断开,所述第二开关信号SW2控制第二开关K2断开,所述第三开关信号SW3控制第三开关K3导通,使第一节点a的电压由第一参考电压V1变化至第二参考电压V2,而后所述处理单元22根据运算放大器21输出端的电压及预设的寄生电容值计算公式计算所述感测线10与接地端之间的寄生电容Cp的电容值。
具体地,所述步骤S2中,所述第一开关信号SW1为低电位,控制第一开关K1断开。所述第二开关信号SW2为低电位,控制第二开关K2断开。所述第三开关信号SW3为高电位,控制第三开关K3导通。此时,第一节点a的电压会由第一参考电压V1变化至第二参考电压V2,相应的,感测线10与接地端之间形成的寄生电容Cp两端压差也由第一参考电压V1变化至第二参考电压V2,待电压稳定后,所述处理单元22根据运算放大器21输出端的电压及预设的寄生电容值计算公式计算所述感测线10与接地端之间的寄生电容Cp的电容值。在本发明的优选实施例中,所述第二参考电压V2小于第一参考电压V1,所述预设的寄生电容计算公式为:
Cp= (V2-Vout)×Ct /(V1-V2);
其中,Cp为感测线10与接地端之间的寄生电容Cp的电容值,Ct为存储电容Ct的电容值,V1为第一参考电压V1,V2为第二参考电压V1,Vout为在第二阶段中运算放大器21输出端的电压。本发明的感测线电容侦测方法能够简单有效地侦测感测线10与接地端之间的寄生电容Cp,便于在后续对感测线10充电时对寄生电容Cp进行补偿。
请参阅图4,并结合图1及图2,本发明还提供一种OLED显示装置,包括上述用于侦测感测线电容的侦测电路。
具体地,请参阅图4,所述OLED显示装置包括衬底40、设于衬底40上且相互平行的多条感测线10以及分别与多条感测线10对应的多个用于侦测感测线电容的侦测电路。进一步地,所述OLED显示装置还包括多个感测芯片30,每一感测芯片30至少与一条感测线10对应,与一感测线10对应的用于侦测感测线电容的侦测电路设置在该感测线10对应的感测芯片30上。
需要说明的是,本发明的OLED显示装置包括上述的用于侦测感测线电容的电路,能够简单有效地侦测感测线10与接地端之间的寄生电容Cp,便于在对感测线10进行充电时进行相应的电压补偿。另外需要注意的是,本发明的OLED显示装置还包括设置在衬底40上的多个像素(未图示),每一像素中均设有开关薄膜晶体管,在对感测线10与接地端之间的寄生电容Cp进行侦测的整个过程中,需要保持OLED显示装置各个像素的开关薄膜晶体管关闭,使得侦测阶段无画面显示,避免像素电流对寄生电容侦测结果产生影响。
综上所述,本发明的用于侦测感测线电容的侦测电路包括与感测线电性连接的侦测模块,侦测模块包括第一开关、第二开关、第三开关、运算放大器、存储电容及处理单元。工作时,通过控制第一开关、第二开关、第三开关的导通及断开,先使得感测线与接地端之间的寄生电容两端压差为第一参考电压,而后使得寄生电容两端压差变化为第二参考电压,处理单元根据运算放大器输出端的电压及预设的寄生电容值计算公式计算所述感测线与接地端之间的寄生电容的电容值,操作简单,侦测结果准确。本发明的感测线电容侦测方法能够简单有效地侦测感测线与接地端之间的寄生电容。本发明的OLED显示装置能够简单有效地侦测感测线与接地端之间的寄生电容。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (18)

  1. 一种用于侦测感测线电容的侦测电路,所述感测线(10)与接地端之间形成寄生电容(Cp);其中,所述侦测电路包括与感测线(10)电性连接的侦测模块(20);
    所述侦测模块(20)包括第一开关(K1)、第二开关(K2)、第三开关(K3)、运算放大器(21)、存储电容(Ct)及处理单元(22);所述第一开关(K1)的控制端接入第一开关信号(SW1),第一端电性连接第一节点(a)并电性连接所述感测线(10),第二端电性连接运算放大器(21)的输出端;所述第二开关(K2)的控制端接入第二开关信号(SW2),第一端电性连接运算放大器(21)的同相输入端,第二端接入第一参考电压(V1);所述第三开关(K3)的控制端接入第三开关信号(SW3),第一端电性连接运算放大器(21)的同相输入端,第二端接入第二参考电压(V2);所述存储电容(Ct)的第一端电性连接第一节点(a),第二端电性连接运算放大器(21)的输出端;所述运算放大器(21)的反相输入端电性连接第一节点(a);所述处理单元(22)电性连接运算放大器(21)的输出端,用于根据运算放大器(21)输出端的电压计算所述感测线(10)与接地端之间的寄生电容(Cp)的电容值。
  2. 如权利要求1所述的用于侦测感测线电容的侦测电路,其中,所述侦测电路的工作状态包括:第一阶段(t1)及第二阶段(t2);
    在第一阶段(t1),所述第一开关信号(SW1)控制第一开关(K1)导通,所述第二开关信号(SW2)控制第二开关(K2)导通,所述第三开关信号(SW3)控制第三开关(K3)断开,使第一节点(a)的电压充电至第一参考电压(V1);
    在第二阶段(t2),所述第一开关信号(SW1)控制第一开关(K1)断开,所述第二开关信号(SW2)控制第二开关(K2)断开,所述第三开关信号(SW3)控制第三开关(K3)导通,使第一节点(a)的电压由第一参考电压(V1)变化至第二参考电压(V2),而后所述处理单元(22)根据运算放大器(21)输出端的电压及预设的寄生电容值计算公式计算所述感测线(10)与接地端之间的寄生电容(Cp)的电容值。
  3. 如权利要求2所述的用于侦测感测线电容的侦测电路,其中,所述第二参考电压(V2)小于第一参考电压(V1)。
  4. 如权利要求3所述的用于侦测感测线电容的侦测电路,其中,所述预设的寄生电容计算公式为:
    Cp=(V2-Vout)×Ct/(V1-V2);
    其中,Cp为感测线(10)与接地端之间的寄生电容(Cp)的电容值,Ct为存储电容(Ct)的电容值,V1为第一参考电压(V1),V2为第二参考电压(V1),Vout为在第二阶段中运算放大器(21)输出端的电压。
  5. 如权利要求2所述的用于侦测感测线电容的侦测电路,其中,在第一阶段(t1),所述第一开关信号(SW1)为高电位;所述第二开关信号(SW2)为高电位;所述第三开关信号(SW3)为低电位;
    在第二阶段(t2),所述第一开关信号(SW1)为低电位;所述第二开关信号(SW2)为低电位;所述第三开关信号(SW3)为高电位。
  6. 如权利要求1所述的用于侦测感测线电容的侦测电路,其中,所述处理单元(22)为模数转换器(ADC)。
  7. 如权利要求1所述的用于侦测感测线电容的侦测电路,其中,所述侦测模块(20)设于一感测芯片(30)上。
  8. 一种感测线电容侦测方法,其中,应用于如权利要求1所述的用于侦测感测线电容的侦测电路,其中,包括如下步骤:
    步骤S1、进入第一阶段(t1);
    所述第一开关信号(SW1)控制第一开关(K1)导通,所述第二开关信号(SW2)控制第二开关(K2)导通,所述第三开关信号(SW3)控制第三开关(K3)断开,使第一节点(a)的电压充电至第一参考电压(V1);
    步骤S2、进入第二阶段(t2);
    所述第一开关信号(SW1)控制第一开关(K1)断开,所述第二开关信号(SW2)控制第二开关(K2)断开,所述第三开关信号(SW3)控制第三开关(K3)导通,使第一节点(a)的电压由第一参考电压(V1)变化至第二参考电压(V2),而后所述处理单元(22)根据运算放大器(21)输出端的电压及预设的寄生电容值计算公式计算所述感测线(10)与接地端之间的寄生电容(Cp)的电容值。
  9. 如权利要求8所述的感测线电容侦测方法,其中,所述第二参考电压(V2)小于第一参考电压(V1)。
  10. 如权利要求9所述的感测线电容侦测方法,其中,所述预设的寄生电容计算公式为:
    Cp=(V2-Vout)×Ct/(V1-V2);
    其中,Cp为感测线(10)与接地端之间的寄生电容(Cp)的电容值,Ct为存储电容(Ct)的电容值,V1为第一参考电压(V1),V2为第二参考电压(V1),Vout为在第二阶段中运算放大器(21)输出端的电压。
  11. 如权利要求10所述的感测线电容侦测方法,其中,在第一阶段(t1),所述第一开关信号(SW1)为高电位;所述第二开关信号(SW2)为高电位;所述第三开关信号(SW3)为低电位;
    在第二阶段(t2),所述第一开关信号(SW1)为低电位;所述第二开关信号(SW2)为低电位;所述第三开关信号(SW3)为高电位。
  12. 一种OLED显示装置,,包括一用于侦测感测线电容的侦测电路,所述感测线(10)与接地端之间形成寄生电容(Cp);其中,所述侦测电路包括与感测线(10)电性连接的侦测模块(20);
    所述侦测模块(20)包括第一开关(K1)、第二开关(K2)、第三开关(K3)、运算放大器(21)、存储电容(Ct)及处理单元(22);所述第一开关(K1)的控制端接入第一开关信号(SW1),第一端电性连接第一节点(a)并电性连接所述感测线(10),第二端电性连接运算放大器(21)的输出端;所述第二开关(K2)的控制端接入第二开关信号(SW2),第一端电性连接运算放大器(21)的同相输入端,第二端接入第一参考电压(V1);所述第三开关(K3)的控制端接入第三开关信号(SW3),第一端电性连接运算放大器(21)的同相输入端,第二端接入第二参考电压(V2);所述存储电容(Ct)的第一端电性连接第一节点(a),第二端电性连接运算放大器(21)的输出端;所述运算放大器(21)的反相输入端电性连接第一节点(a);所述处理单元(22)电性连接运算放大器(21)的输出端,用于根据运算放大器(21)输出端的电压计算所述感测线(10)与接地端之间的寄生电容(Cp)的电容值。
  13. 如权利要求12所述的OLED显示装置,其中,所述侦测电路的工作状态包括:第一阶段(t1)及第二阶段(t2);
    在第一阶段(t1),所述第一开关信号(SW1)控制第一开关(K1)导通,所述第二开关信号(SW2)控制第二开关(K2)导通,所述第三开关信号(SW3)控制第三开关(K3)断开,使第一节点(a)的电压充电至第一参考电压(V1);
    在第二阶段(t2),所述第一开关信号(SW1)控制第一开关(K1)断开,所述第二开关信号(SW2)控制第二开关(K2)断开,所述第三开关信号(SW3)控制第三开关(K3)导通,使第一节点(a)的电压由第一参考电压(V1)变化至第二参考电压(V2),而后所述处理单元(22)根据运算放大器(21)输出端的电压及预设的寄生电容值计算公式计算所述感测线(10)与接地端之间的寄生电容(Cp)的电容值。
  14. 如权利要求13所述的OLED显示装置,其中,所述第二参考电压(V2)小于第一参考电压(V1)。
  15. 如权利要求14所述的OLED显示装置,其中,所述预设的寄生电容计算公式为:
    Cp=(V2-Vout)×Ct/(V1-V2);
    其中,Cp为感测线(10)与接地端之间的寄生电容(Cp)的电容值,Ct为存储电容(Ct)的电容值,V1为第一参考电压(V1),V2为第二参考电压(V1),Vout为在第二阶段中运算放大器(21)输出端的电压。
  16. 如权利要求13所述的OLED显示装置,其中,在第一阶段(t1),所述第一开关信号(SW1)为高电位;所述第二开关信号(SW2)为高电位;所述第三开关信号(SW3)为低电位;
    在第二阶段(t2),所述第一开关信号(SW1)为低电位;所述第二开关信号(SW2)为低电位;所述第三开关信号(SW3)为高电位。
  17. 如权利要求12所述的OLED显示装置,其中,所述处理单元(22)为模数转换器(ADC)。
  18. 如权利要求12所述的OLED显示装置,其中,所述侦测模块(20)设于一感测芯片(30)上。
PCT/CN2018/124830 2018-07-16 2018-12-28 用于侦测感测线电容的侦测电路、侦测方法与oled显示装置 WO2020015335A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810779715.XA CN109064956A (zh) 2018-07-16 2018-07-16 用于侦测感测线电容的侦测电路及感测线电容侦测方法与oled显示装置
CN201810779715.X 2018-07-16

Publications (1)

Publication Number Publication Date
WO2020015335A1 true WO2020015335A1 (zh) 2020-01-23

Family

ID=64816796

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/124830 WO2020015335A1 (zh) 2018-07-16 2018-12-28 用于侦测感测线电容的侦测电路、侦测方法与oled显示装置

Country Status (2)

Country Link
CN (1) CN109064956A (zh)
WO (1) WO2020015335A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109064956A (zh) * 2018-07-16 2018-12-21 深圳市华星光电半导体显示技术有限公司 用于侦测感测线电容的侦测电路及感测线电容侦测方法与oled显示装置
CN110459179B (zh) * 2019-08-30 2020-12-04 云谷(固安)科技有限公司 一种显示装置
CN116543704B (zh) * 2023-07-07 2023-09-01 惠科股份有限公司 补偿电路、补偿方法和显示面板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101699380A (zh) * 2009-11-11 2010-04-28 旭曜科技股份有限公司 用于触控面板的侦测电路和触控面板
CN104898314A (zh) * 2014-03-07 2015-09-09 敦泰科技有限公司 显示装置及其驱动电路和驱动方法、电子设备
US20180005579A1 (en) * 2016-06-30 2018-01-04 Apple Inc. System and method for voltage sensing for compensation in an electronic display via analog front end
CN109064956A (zh) * 2018-07-16 2018-12-21 深圳市华星光电半导体显示技术有限公司 用于侦测感测线电容的侦测电路及感测线电容侦测方法与oled显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW526327B (en) * 1998-02-19 2003-04-01 Sumitomo Metal Ind Detection apparatus and method of physical variable
KR20130072537A (ko) * 2011-12-22 2013-07-02 주식회사 실리콘웍스 터치신호 처리회로 및 상기 터치신호 처리회로를 구비하는 터치신호 감지시스템
CN103324366B (zh) * 2012-03-20 2016-09-28 晨星软件研发(深圳)有限公司 电容检测装置及应用该电容检测装置的电容式触控系统
CN104700761B (zh) * 2015-04-03 2017-08-29 京东方科技集团股份有限公司 一种检测电路及其检测方法和驱动系统
CN105528977A (zh) * 2016-02-04 2016-04-27 京东方科技集团股份有限公司 一种检测电路、驱动集成电路及其检测方法
CN105895020B (zh) * 2016-06-02 2019-07-02 深圳市华星光电技术有限公司 Oled显示装置驱动系统及oled显示装置驱动方法
KR102609508B1 (ko) * 2016-11-11 2023-12-04 엘지디스플레이 주식회사 외부 보상용 드라이버 집적회로와 그를 포함한 표시장치

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101699380A (zh) * 2009-11-11 2010-04-28 旭曜科技股份有限公司 用于触控面板的侦测电路和触控面板
CN104898314A (zh) * 2014-03-07 2015-09-09 敦泰科技有限公司 显示装置及其驱动电路和驱动方法、电子设备
US20180005579A1 (en) * 2016-06-30 2018-01-04 Apple Inc. System and method for voltage sensing for compensation in an electronic display via analog front end
CN109064956A (zh) * 2018-07-16 2018-12-21 深圳市华星光电半导体显示技术有限公司 用于侦测感测线电容的侦测电路及感测线电容侦测方法与oled显示装置

Also Published As

Publication number Publication date
CN109064956A (zh) 2018-12-21

Similar Documents

Publication Publication Date Title
KR101581147B1 (ko) 외부 보상용 감지 회로, 이의 감지 방법 및 표시 장치
WO2018153032A1 (zh) Oled像素的补偿方法和补偿装置、显示装置
WO2017206205A1 (zh) Oled显示装置驱动系统及oled显示装置驱动方法
TWI556213B (zh) 畫素補償裝置、具有電流補償功能的顯示器
WO2017197702A1 (zh) Oled显示装置的阈值电压侦测电路
US20210201792A1 (en) Power management driver and display device having the same
KR101576405B1 (ko) 외부 보상 감지 회로와 그 감지 방법 및 디스플레이 디바이스
US11257406B2 (en) Aging detection circuit, aging compensation circuit, display panel and aging compensation method
WO2021088117A1 (zh) 像素电路及其驱动方法、显示装置
KR20180038519A (ko) Amoled 실시간 보상 시스템
WO2020015335A1 (zh) 用于侦测感测线电容的侦测电路、侦测方法与oled显示装置
WO2021120315A1 (zh) 像素混合补偿电路及像素混合补偿方法
WO2020015337A1 (zh) 像素驱动电路感测方法及像素驱动电路
WO2019227849A1 (zh) Oled像素驱动电路
US10439630B2 (en) Analog-to-digital conversion circuit, a pixel compensation circuit for display panel, and methods thereof
WO2020140236A1 (zh) 信号保护电路、其驱动方法及设备
WO2021022601A1 (zh) Amoled显示装置及其驱动方法
WO2017000407A1 (zh) 一种检测电路、检测方法和像素驱动电路
KR20150029176A (ko) 표시장치 및 그 구동 방법
US10510297B2 (en) Pixel circuit, driving method thereof, display panel and display device
US7796156B2 (en) Organic electroluminescent display panel testing apparatus and method thereof
US9922599B2 (en) Devices and methods for applying data voltage signal, display panels and display devices
US20230377494A1 (en) Display, pixel circuit, and method
US10902813B2 (en) Shift register and display device provided with same
WO2020015161A1 (zh) Oled显示面板、oled显示装置及其驱动方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18926848

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18926848

Country of ref document: EP

Kind code of ref document: A1