WO2019205847A1 - 用于传感器装置的位移测量系统和位移测量方法 - Google Patents

用于传感器装置的位移测量系统和位移测量方法 Download PDF

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Publication number
WO2019205847A1
WO2019205847A1 PCT/CN2019/079193 CN2019079193W WO2019205847A1 WO 2019205847 A1 WO2019205847 A1 WO 2019205847A1 CN 2019079193 W CN2019079193 W CN 2019079193W WO 2019205847 A1 WO2019205847 A1 WO 2019205847A1
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Prior art keywords
signal
displacement
gate
displacement sensor
sensor
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PCT/CN2019/079193
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English (en)
French (fr)
Inventor
李广金
石坚
李秉恒
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桂林市晶瑞传感技术有限公司
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Priority to GB2017337.3A priority Critical patent/GB2589730B/en
Priority to DE112019001334.3T priority patent/DE112019001334T5/de
Priority to JP2021504561A priority patent/JP7065252B2/ja
Publication of WO2019205847A1 publication Critical patent/WO2019205847A1/zh
Priority to US17/033,909 priority patent/US11940302B2/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
    • G01B7/02—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
    • G01D5/241—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes
    • G01D5/2412—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes by varying overlap
    • G01D5/2415—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance by relative movement of capacitor electrodes by varying overlap adapted for encoders
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/244—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains
    • G01D5/249—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing characteristics of pulses or pulse trains; generating pulses or pulse trains using pulse code
    • G01D5/2497—Absolute encoders

Definitions

  • the present invention relates to positioning and displacement measurement, in particular, to angular and length positioning and displacement measurement techniques, and more particularly to displacement measurement systems and displacement measurement methods for sensor devices.
  • Displacement sensors are commonly used as position measuring components in measurement systems such as length measurement, angle measurement, speed measurement, precision positioning, and follow-up tracking.
  • Displacement sensors include capacitive sensors, inductive synchronizers, and grating sensors. Among them, the most widely used is the capacitive sensor in the capacitive sensor, and the displacement measuring circuit constitutes the capacitive sensor displacement measuring system, which is divided into phase-detecting type and amplitude-detecting type.
  • FIG. 1 is a view showing an example of a conventional phase-sensing type capacitive sensor displacement measuring system, in which the gate distance is a measurement period, and the position of the gate of the capacitive sensor in one cycle is obtained by means of phase discrimination, and The discriminating count achieves displacement measurements for more than one cycle.
  • the conventional phase-sensing capacitive gate sensor displacement measuring system shown in FIG. 1 includes a capacitive gate sensor 10 and a capacitive gate sensor ASIC chip 20 (hereinafter also referred to as ASIC chip 20 or chip 20 hereinafter), wherein the capacitive gate sensor ASIC chip 20 is integrated with a crystal oscillator.
  • the signal period (512CP) outputted by the capacitive signal processing circuit 24 spatially corresponds to the length of one pitch in the capacitive sensor.
  • the phase-correcting capacitive sensor displacement measuring system can The minimum accuracy of resolution is: 5.08mm / 512 ⁇ 0.01mm ⁇ 0.0004inch.
  • the phase of the CSI signal changes 180/256 degrees for each moving gate of the capacitive sensor. It can be seen that the resolution of the conventional phase-detecting capacitive sensor displacement measurement system is not high, and the reason for adopting this lower resolution is that the phase obtained by the phase-detecting operation is based on the measurement mechanism of the active-capacitance compatible gate technology.
  • the difference between the displacement and the displacement of the gate of the capacitive gate sensor is not completely linearly proportional, but has a deviation of about 0.1%. Therefore, a lower resolution is required to ensure a certain output accuracy; in addition, the frequency of the eight driving signals is required.
  • the driving frequency of the capacitive gate sensor is usually adopted. It is set between 200Hz and 500Hz, and the operating frequency of the chip is set between 100kHz and 300kHz, which also makes the resolution of the measurement system low.
  • a displacement measuring system for a sensor device wherein the sensor device comprises a first displacement sensor, and the displacement measuring system comprises:
  • a driving signal generating circuit configured to output a driving signal to the first displacement sensor
  • a first signal processing circuit for receiving a signal from the first displacement sensor and outputting a first ADSO signal
  • a computing device comprising a first timer
  • the first timer is configured to receive a CLK512 signal and the first ADSO signal, and perform timing or counting according to the CLK512 signal and the first ADSO signal; wherein the CLK512 signal is related to the driving signal The periodic and phase-dependent square wave signals.
  • the above displacement measuring system further includes a clock frequency dividing circuit for outputting a clock signal to the driving signal generating circuit and outputting the CLK512 signal.
  • the computing device further includes a processor, configured to convert data obtained by counting or counting the first timer into an absolute displacement of a gate of the first displacement sensor within a pitch value.
  • the above displacement measuring system further includes a counting clock, wherein the first timer is configured to time or count according to the CLK512 signal and the first ADSO signal at a clock frequency provided by the counting clock.
  • the first timer is configured to time or count from zero at a clock frequency provided by the counting clock when the rising edge of the CLK512 signal is detected, and to monitor the first ADSO signal The rising edge of the current time or current count is sent to the processor.
  • the first timer further includes a first buffer; wherein the first timer is configured to use a clock frequency provided by the counting clock from a zero when a rising edge of the CLK512 signal is detected The timing or counting is started, and the current time or current count is written to the first buffer when the rising edge of the first ADSO signal is detected.
  • the processor is configured to read data in the first buffer after receiving an interrupt flag signal triggered by the first ADSO signal or the CLK512 signal.
  • the processor is configured to obtain a position of the gate of the first displacement sensor within a pitch according to the data obtained by the first timer and the clock frequency provided by the counting clock. Equivalent, and converting the position equivalent of the gate of the first displacement sensor within one pitch to an absolute displacement value of the gate of the first displacement sensor within one pitch.
  • the processor is further configured to perform digital filtering processing on a position equivalent of a gate of the first displacement sensor within a pitch, and an absolute displacement value of a gate of the first displacement sensor within a pitch Perform deviation correction.
  • the counting clock may be included in the computing device.
  • the computing device further includes a second timer for receiving the CLK512 signal and the first ADSO signal, and pairing the first according to the CLK512 signal and the first ADSO signal The number of pitches of the gate of the displacement sensor is counted.
  • the processor is further configured to obtain a total absolute displacement of a gate of the first displacement sensor according to data obtained by counting by the second timer and data obtained by counting or counting by the first timer. value.
  • the driving signal generating circuit and the first signal processing circuit are integrated in the same chip.
  • the chip further includes: a phase discrimination and counting circuit for receiving the first ADSO signal; and a serial output port for outputting a CLK signal and a DATA signal including displacement information of a gate of the first displacement sensor .
  • the computing device is further configured to receive the CLK signal and the DATA signal.
  • the processor is further configured to obtain, according to the received CLK signal and the DATA signal, a gate number of a gate movement of the first displacement sensor, and a gate according to a gate movement of the first displacement sensor The distance and the first timer determine the total absolute displacement value of the gate of the first displacement sensor by counting or counting the data.
  • the processor is configured to obtain the grid of the first displacement sensor according to the number of pitches of the gate movement of the first displacement sensor and the data obtained by counting or counting by the first timer. a total absolute displacement equivalent of the pole, and converting a total absolute displacement equivalent of the gate of the first displacement sensor to a total absolute displacement value of a gate of the first displacement sensor.
  • the sensor device further includes a second displacement sensor, wherein the first displacement sensor has a plurality of pitches within a pitch of the second displacement sensor, and the driving signal generating circuit further uses The driving signal is output to the second displacement sensor.
  • the displacement measuring system also includes a second signal processing circuit for receiving a signal from the second displacement sensor and outputting a second ADSO signal.
  • the computing device further includes a third timer for receiving the second ADSO signal and the CLK512 signal, and clocking the clock frequency provided by the count clock according to the second ADSO signal and the CLK512 signal or count.
  • the processor is further configured to determine, according to data obtained by counting or counting by the third timer, a number of pitches of gate movement of the first displacement sensor, and a gate movement according to the first displacement sensor. The number of pitches and the data obtained by the first timer by counting or counting obtain the total absolute displacement value of the gate of the first displacement sensor.
  • the third timer is configured to count or count from a clock frequency provided by the counting clock when the rising edge of the CLK512 signal is detected, and to monitor the second ADSO signal.
  • the rising edge of the current time or current count is sent to the processor or the current time or current count is recorded.
  • the first displacement sensor and the second displacement sensor are capacitive gate sensors.
  • the CLK 512 signal is a square wave signal having the same period and the same phase as the driving signal.
  • the computing device the driving signal generating circuit, and the first signal processing circuit are integrated in the same chip.
  • a displacement measuring method for a sensor device comprising:
  • the CLK512 signal is a square wave signal related to a period and a phase of the driving signal .
  • the method further comprises: converting the first data obtained by the counting or counting into an absolute displacement value of the gate of the first displacement sensor within a pitch.
  • timing or counting according to the CLK512 signal and the first ADSO signal includes: counting or counting from zero at a clock frequency when the rising edge of the CLK512 signal is detected, and monitoring the location The current time or current count is sent or recorded when the rising edge of the first ADSO signal is described.
  • converting the first data obtained by the timing into the absolute displacement values of the gate of the first displacement sensor within a pitch includes:
  • the position equivalent of the gate of the first displacement sensor within one pitch is converted into an absolute displacement value of the gate of the first displacement sensor within one pitch.
  • the above displacement measuring method further includes:
  • Deviation correction is performed on the absolute displacement value of the gate of the first displacement sensor within one pitch.
  • the above displacement measuring method further includes:
  • the total absolute displacement value of the gate of the first displacement sensor is derived from the second data obtained by counting the number of pitches of the gate movement of the first displacement sensor and the first data.
  • the sensor device further includes a second displacement sensor, wherein the first displacement sensor has a plurality of pitches in a pitch of the second displacement sensor, and the displacement measuring method further comprises:
  • the present invention has the following beneficial effects:
  • the displacement measuring system and method provided by the present invention achieve performance improvement at a lower cost. Higher measurement resolutions (such as micron and submicron) and higher measurement accuracy are obtained.
  • the present invention can also be used in combination with other types of capacitive sensors, inductive synchronizers, and grating sensors.
  • FIG. 1 is a block diagram of a conventional phase-detecting type capacitive sensor displacement measuring system
  • FIG. 2 is a schematic diagram of an equivalent pulse width modulated square wave modulated by an ADSO signal formed by a CLK512 signal and an ADSO signal, in accordance with one embodiment of the present invention
  • FIG. 3 is a block diagram showing the structure of an ASIC chip in a displacement measuring system including a capacitive gate sensor and an embodiment of the present invention
  • FIG. 4 is a block diagram of a single chip microcomputer in a displacement measuring system according to an embodiment of the present invention.
  • FIG. 5 is a flowchart showing the operation of a single chip microcomputer according to an embodiment of the present invention.
  • FIG. 6 is a block diagram of a single chip microcomputer in a displacement measuring system according to another embodiment of the present invention.
  • FIG. 7 is a flow chart showing a data processing procedure performed by a CPU in a single chip microcomputer according to another embodiment of the present invention.
  • FIG. 8 is a block diagram showing the structure of an ASIC chip in a displacement measuring system including a capacitive gate sensor and a still further embodiment according to the present invention
  • FIG. 9 is a block diagram of a single chip microcomputer in a displacement measuring system according to still another embodiment of the present invention.
  • FIG. 10 is a block diagram showing the structure of an ASIC chip in a displacement measuring system including a coarse and subdivided capacitive gate sensor and according to still another embodiment of the present invention
  • FIG. 11 is a block diagram of a single chip microcomputer in a displacement measuring system in accordance with still another embodiment of the present invention.
  • the signal and the signal output from the capacitive sensor are demodulated, amplified, filtered, and compared (referred to as the ADSO signal in this application) with a strict phase matching relationship. If the ADSO signal is phase-matched with a square wave signal as shown in FIG. 2 (the square wave signal is the same as the phase of the multi-drive signal used to drive the capacitive sensor, and the phase of one of the drive signals is the same), then The mapping results in an equivalent pulse width modulated square wave modulated by the ADSO signal as shown in FIG.
  • the modulation pulse width of the equivalent pulse width modulation square wave (A1, A2, A3, A4 as shown in FIG. 2) not only corresponds to the phase difference between the ADSO signal and the above square wave signal, but also The space also corresponds to the position value of the gate of the capacitive sensor within one pitch.
  • the inventors have also found that, compared with the prior art (as described above, the phase difference obtained after phase discrimination in the prior art is not completely linearly proportional to the displacement variation of the gate of the capacitive gate sensor), according to the above correspondence Relationship, it is possible to directly measure the modulation pulse width of the equivalent pulse width modulated square wave, obtain the positional equivalent of the gate of the capacitive sensor in a pitch, and obtain the high-resolution position equivalent, and convert the position equivalent by The position value of the gate of the capacitive gate sensor within a pitch, or absolute displacement value.
  • a displacement measuring system for a sensor device is provided, the sensor device including a capacitive sensor.
  • a displacement measuring system includes: an integrated crystal oscillator circuit 21, a clock frequency dividing circuit 22, a multi-channel driving and analog switching signal generating circuit 23 (hereinafter, eight-channel driving and analog switching)
  • the signal generation circuit is described as an example
  • the ASIC chip 30 of the capacitance signal processing circuit 24 (FIG. 3)
  • the single chip microcomputer 40 including the timer 41, the count clock 42, the CPU 43, the RAM 44, the display unit 45, and the serial port 46 ( Figure 4).
  • the timer further includes a buffer (not shown in FIG. 4).
  • the capacitor signal processing circuit 24 in the chip 30 sends the generated ADSO signal to the timer 41 of the single chip microcomputer 40.
  • the clock frequency dividing circuit 22 sends a clock signal to the eight-way driving and analog switching signal generating circuit 23, in addition to the clock signal.
  • a square wave signal (referred to as a CLK512 signal in the present invention, the period of which is the same as the period of the eight driving signals out1-out8, for example, 512T, where 1T represents the reciprocal of the operating frequency of the chip; and its phase and one of the driving signals The phase is the same) sent to the timer 41 of the microcontroller 40.
  • the workflow of the measurement system is as follows:
  • a clock signal is generated by the crystal oscillator circuit 21 and sent to the clock frequency dividing circuit 22; the clock frequency dividing circuit 22 divides the clock signal and sends the generated clock signal to the 8-way driving and simulation.
  • the switching signal generating circuit 23 also outputs a square wave signal (CLK512 signal) having the same period as that of the eight driving signals and having the same phase as that of the eight driving signals; the eight-way driving and analog switching signal generating circuit 23 A signal from the clock frequency dividing circuit is received, and eight driving signals for driving the capacitance sensor 10 are generated and output.
  • the capacitive gate sensor 10 After the 8-way driving and analog switching signal generating circuit 23 outputs eight driving signals, the capacitive gate sensor 10 performs the following processing:
  • the eight emitter chips of the capacitive sensor 10 respectively receive eight driving signals from the ASIC chip 30, and modulate a periodic signal (ie, a CSI signal) having a different amplitude of the output voltage via the gate capacitance of the capacitive sensor 10, and then, the capacitive gate
  • the sensor 10 inputs a CSI signal to the inside of the ASIC chip 30.
  • the capacitive gate signal processing circuit 24 receives the CSI signal from the capacitive gate sensor 10, and converts the CSI signal into a displacement associated with the gate of the capacitive gate sensor 10 through demodulation, amplification, filtering, and comparison operations.
  • the ADSO signal and output the ADSO signal.
  • the ADSO signal is phase shifted by 360° electrical phase angle, it corresponds spatially to a pitch in the capacitive gate sensor.
  • the ADSO signal from the capacitance gate signal processing circuit 24 and the CLK512 signal from the clock frequency dividing circuit 22 are received by the timer 41 of the single chip microcomputer 40.
  • the timer 41 in the microcontroller 40 counts the clock frequency provided by the count clock 42 as the count frequency (i.e., the number of pulses of the count clock 42), and counts based on the ADSO signal and the CL K512 signal.
  • the workflow of the microcontroller is as follows:
  • the timer 41 of the single chip microcomputer 40 receives the ADSO signal and the CLK512 signal, and when the timer 41 detects the rising edge of the CLK512 signal, the count is cleared; when the timer 41 detects the rising edge of the ADSO signal, the current count is written.
  • the buffer is input, an interrupt flag signal is generated at the same time, and an interrupt flag signal is transmitted to the CPU 43.
  • the count of the timer 41 write buffer corresponds to a modulation pulse width of the equivalent pulse width modulation square wave (A1, A2 noted as shown in FIG. 2), and the count indicates the capacitance sensor 10
  • the position of the gate in one pitch is equivalent.
  • the timer 41 counts at the clock frequency supplied from the count clock 42, by setting different clock frequencies to the count clock 42, positional equivalents having different resolutions can be obtained.
  • the clock frequency of the single chip microcomputer 40 is 6 MHz and the operating frequency of the ASIC chip 30 is 153.6 KHz
  • the CPU 43 performs the following operations after receiving the interrupt flag signal:
  • the absolute displacement value of the gate of the capacitive sensor 10 in one pitch is output to the display unit 45 and the serial port 46, and is output by the display unit 45 and the serial port 46.
  • the embodiment of the displacement measuring system described above is suitable for the case where the range of movement of the gate of the capacitive gate sensor is within one pitch.
  • the timer 41 generates an interrupt flag signal when it detects the rising edge of the ADSO signal and transmits the interrupt flag signal to the CPU 43. It will be understood by those skilled in the art that the timer 41 can also generate an interrupt flag signal and transmit it to the CPU 43 when the falling edge of the ADSO signal is detected or when the rising or falling edge of the CLK512 signal is detected. Therefore, in another embodiment, the CPU 43 reads the data in the buffer and converts it into a capacitive sensor after receiving the falling edge of the ADSO signal, the rising edge of CLK512, or the falling edge of the falling edge of CLK512. The absolute displacement of the gate of 10 within a pitch.
  • the timer 41 controls the counting according to the CLK512 signal and the rising edge of the ADSO signal, that is, when the timer 41 detects the rising edge of the CLK512 signal, the count is cleared; When the timer 41 detects the rising edge of the ADSO signal, the current count of the timer 41 is written to the buffer.
  • the timer 41 detects the rising edge of the ADSO signal, the current count of the timer 41 is written to the buffer.
  • the timer 41 can also control the count according to the falling edge of the CLK512 signal and the ADSO signal, that is, when the falling edge of the CLK512 signal is detected, the count is cleared; when timing When the falling edge of the ADSO signal is detected, the timer 41 writes the current count of the timer to the buffer, which also obtains the positional equivalent of the gate of the capacitive gate sensor 10 within a pitch.
  • the CPU 43 can read the data in the buffer and convert it into a capacitive gate based on the rising edge/falling edge of the ADSO signal or the rising edge/falling edge triggered by the rising edge/falling edge of the CLK512 signal. The absolute displacement of the gate of sensor 10 within a pitch.
  • the timer 41 in the microcontroller 40 is continuously counted at the clock frequency provided by the count clock 42.
  • a timer can be used that counts from zero at the clock frequency provided by the count clock 42 when the rising edge of the CLK512 signal is detected, and ends when the rising edge of the ADSO signal is detected.
  • the current count is written to the buffer (it is understood that the count can also be controlled based on the falling edge of the CLK512 signal and the ADSO signal).
  • the CPU 43 can read the data in the buffer and convert it into the gate of the capacitive sensor 10 within one pitch according to the rising edge/falling edge of the ADSO signal or the rising edge/falling edge triggered interrupt flag signal of the CLK512 signal. Absolute displacement value.
  • a timer can be used that clocks from zero when the rising edge of the CLK512 signal is detected and writes the current time to the buffer when the rising edge of the ADSO signal is detected (or The falling edge of the CLK512 signal is monitored from zero and the current time is written to the buffer when the falling edge of the ADSO signal is detected.
  • the CPU 43 reads the data in the buffer after receiving the interrupt flag signal, and obtains the gate of the capacitive gate sensor 10 at a pitch according to the data and the clock frequency (for example, multiplying the current time in the buffer by the clock frequency).
  • a timer can also be used that writes the current count to the buffer when the rising edge of the CLK512 signal is detected, while generating an interrupt flag signal and transmitting the interrupt flag signal to the CPU 43, CPU 43 reads the data in the buffer after receiving the interrupt flag signal triggered by the rising edge of the CLK512 signal; writes the current count to the buffer when the rising edge of the ADSO signal is detected, and also generates an interrupt flag signal and the interrupt is generated
  • the flag signal is sent to the CPU 43, the CPU 43 reads the data in the buffer after receiving the interrupt flag signal triggered by the rising edge of the ADSO signal, and subtracts the two data, thereby also obtaining the gate of the capacitive gate sensor 10.
  • the timer 41 includes a buffer for temporarily storing the count, while in another embodiment, the timer 41 may not use the buffer when the CLK512 signal is detected. At the rising edge, the timer 41 clears the count; when the rising edge of the ADSO signal is detected, the timer 41 directly sends the current count to the CPU 43, which converts the data into the gate of the capacitive gate sensor 10 by the CPU 43.
  • the absolute displacement value within a pitch is the absolute displacement value within a pitch.
  • the RAM 44 in the microcontroller 40 can be used to store data used by the CPU 43 in the calculation process.
  • the CPU 43 stores the data in the buffer into the RAM 44 after receiving the interrupt flag signal; or stores the data directly sent from the timer 41 into the RAM 44, and then processes the data stored in the RAM 44. (For example, converted to the absolute displacement value of the gate of the capacitive sensor 10 within one pitch).
  • the DMA path can directly store the data in the buffer into the RAM 44, and the CPU 43 can extract the most recently stored data from the RAM 44 for conversion processing based on the received interrupt flag signal.
  • the position obtained by timing or counting is obtained.
  • the equivalent data may be less stable and will fluctuate somewhat.
  • the CPU 43 may perform a digital filtering process on the positional equivalents prior to performing the conversion operation (for example, by employing eight sets of data averaging to perform digital filtering, for example, From the RAM 44, the positions of the gates of the 8 sets of capacitive gate sensors 10 that have been recently stored are averaged within one pitch, so that relatively stable data can be obtained at a high resolution, and then digital filtering is performed.
  • the processed data is converted to obtain an absolute displacement value of the gate of the capacitive gate sensor 10 within a pitch.
  • the CPU 43 after obtaining the absolute displacement value of the gate of the capacitive gate sensor 10 within a pitch, the CPU 43 also performs a deviation correction on the absolute displacement value.
  • segmentation or point-by-point deviation correction can be performed by using a standard metering device for position calibration to eliminate the effects of nonlinear errors and dynamic grid manufacturing errors to achieve high-precision measurement within a pitch.
  • the resolution equivalent within a pitch ie, the maximum count value of a timer within a pitch
  • the resolution is 0.000254 mm, or 254 nm, for a 5.08 mm pitch, and is equally divided into 8 segments. (0.635mm)
  • the accuracy can be estimated in the range of 1um, which is 10 times of the original. This bias correction technique is suitable for a large number of micrometer instruments.
  • the various embodiments of the displacement measuring system described above are suitable for measuring the absolute displacement value of the gate of the capacitive sensor within one pitch, and a description will be made below of how to measure the total absolute displacement value that moves more than one pitch.
  • a displacement measuring system for a sensor device, the sensor device comprising a capacitive sensor, the system adopting an increase in periodic position measurement technology and continuous monitoring pitch position change
  • the combination of volumetric displacement measurement techniques is suitable for measuring the movement of the gate of the capacitive gate sensor over a pitch (ie, measurement of a large range).
  • the displacement measuring system includes an ASIC chip 30 as shown in FIG. 3 and a single chip microcomputer 60 as shown in FIG.
  • the single chip microcomputer 60 includes: two timers 41, 61 (ie, timer 1, timer 2), a count clock 42, a CPU 43, a RAM 44, a display unit 45, and a serial port 46, wherein each timer 41, 61 also include a buffer, respectively.
  • the timer 41 receives the ADSO signal from the capacitive signal processing circuit 24 in the ASIC chip 30 and the CLK512 signal from the clock divider circuit 22 in the ASIC chip 30.
  • the timer 41 counts the clock frequency provided by the clock 42.
  • the timer 61 As the counting frequency, and counting according to the ADSO signal and the CLK512 signal, to obtain the positional equivalent of the gate of the capacitive gate sensor 10 within one pitch (this is the same as the counting method described above in connection with FIG. 4); the timer 61 The ADSO signal and the CLK512 signal are also received, and the timer 61 performs an addition or subtraction operation based on the two signals to obtain the pitch of the gate movement of the capacitive gate sensor 10. Based on this, the CPU 43 can calculate the total absolute displacement equivalent according to the positional equivalent of the gate of the capacitive sensor 10 within one pitch and the number of moving pitches, thereby obtaining the total absolute displacement value.
  • the workflow of the microcontroller 60 is as follows:
  • the timer 41 in the microcontroller 60 takes the clock frequency (for example, 6 MHz) supplied from the count clock 42 as the count frequency, and simultaneously receives the ADSO signal and the CLK512 signal. When the timer 41 detects the rising edge of the CLK512 signal, the count is cleared; when the timer 41 detects the rising edge of the ADSO signal, the current count is written to its buffer, and the timer 41 also sends an interrupt flag signal to CPU 43.
  • the clock frequency for example, 6 MHz
  • another timer 61 in the single chip microcomputer 60 also receives the ADSO signal and the CLK512 signal.
  • the timer 61 generates a rising edge of the ADSO signal and the rising edge of several ADSO signals according to the adjacent rising edges of the CLK512 signal.
  • the gate crossing of the capacitive gate sensor is indicated. mobile).
  • the timer 61 performs an add 1 operation when the rising edge of the CLK512 signal is detected; a decrement operation is performed when the rising edge of the ADSO signal is detected, and the current count is written to its buffer, the count indicating the current capacity
  • the number of pitches at which the gate of the gate sensor 10 moves (wherein the initial value of the timer 61 is 0).
  • the CPU 43 performs the following operations after receiving the interrupt flag signal (ie, the interrupt flag signal triggered by the rising edge of the ADSO signal):
  • the total absolute displacement value of the gate of the capacitive gate sensor 10 is output to the display unit 45 and the serial port 46, and is output by the display unit 45 and the serial port 46. In this way, high-resolution, high-precision, large-range displacement measurement is achieved.
  • both the timer 41 and the timer 61 write the current count to the respective buffers on the rising edge of the ADSO signal, and then the CPU 43 respectively receives the interrupt flag signals triggered by the rising edge of the ADSO signal from the two.
  • the buffers read the data for subsequent processing, thus ensuring that the data read from the buffer of the timer 41 and the buffer from the timer 61 are synchronized.
  • the timer 61 can send an interrupt to the CPU 43 in addition to performing the decrement operation and writing the current count to the buffer when the rising edge of the ADSO signal is detected.
  • the signal is marked, so that the CPU 43 can read data from the two buffers and perform subsequent processing after receiving the interrupt flag signal triggered by the rising edge of the ADSO signal from the timer 41 or the timer 61.
  • the above described flow is performed using the falling edge of the signal.
  • the timer 41 detects the falling edge of the CLK512 signal
  • the count is cleared; and when the timer 41 detects the falling edge of the ADSO signal, the timer current count is written to its buffer.
  • the timer 61 detects the falling edge of the CLK512 signal
  • the addition operation is performed; when the falling edge of the ADSO signal is detected, the decrement operation is performed, and the current count is written to its buffer.
  • the interrupt flag signal is transmitted to the CPU 43 by the timer 41 or the timer 61 or both of them.
  • the CPU 43 reads data from the two buffers for subsequent processing after receiving the interrupt flag signal triggered by the falling edge of the ADSO signal, which also ensures reading from the buffer of the timer 41 and the buffer of the timer 61.
  • the data is synchronized.
  • timers 41 and 61 may also not use buffers, and the current count is sent directly to CPU 43, and processed by CPU 43 when the rising edge of ADSO is detected.
  • the CPU 43 stores the data in the buffers of the timers 41 and 61 into the RAM 44 after receiving the interrupt flag signal, or stores the data directly sent by the timers 41 and 61 to the RAM 44. Then, the data stored in the RAM 44 is subsequently processed to calculate the total absolute displacement value of the gate of the capacitive gate sensor 10.
  • the DMA path can directly store the data in the buffers of the timers 41 and 61 into the RAM 44, and the CPU 43 can read the latest from the RAM 44 based on the received interrupt flag signal.
  • the stored data i.e., the positional equivalent of the gate of the capacitive sensor 10 from the timer 41 within one pitch, and the number of pitches of the gate of the capacitive sensor 10 from the timer 61) are performed. deal with.
  • the CPU 43 before step 230, i.e., prior to the conversion operation, the CPU 43 also performs a digital filtering process on the total absolute displacement equivalent Ln of the gate of the capacitive gate sensor 10 to obtain stable data. (See step 221). After step 230, that is, after the switching operation, the CPU 43 also performs deviation correction within the pitch for the total absolute displacement value of the gate of the capacitive sensor 10 (see step 231), and then performs deviation correction between the pitches (see Step 232).
  • the deviation correction between the pitches may be performed by using a calibration correction method in which the pitch step is a calibration equivalent, and correcting the pitch error of the periodic signal at the same pitch position, thereby realizing correction of the manufacturing error of the gate of the capacitive gate sensor.
  • the timer 61 is used to count the number of gate shifts of the gate.
  • the timer 61 can be used to monitor the CLK512 signal and the ADSO signal, respectively, wherein one counter performs a 1 count and writes to the corresponding buffer when the rising edge of the CLK512 signal is detected, and the other counter is When the rising edge of the ADSO signal is detected, an increment of 1 is performed and the corresponding buffer is written.
  • the rising edge of the ADSO signal also triggers the CPU 43 to read and compare the counts in the two buffers, if the rising edge of the CLK512 signal is counted. Comparing the count of the rising edge of the ADSO signal by one indicates that the rising edge of the ADSO signal does not appear between the adjacent two rising edges of the CLK512 signal (the CPU 43 can perform an operation on the pitch of the current gate shift plus one). If there is one less, it means that two rising edges of the ADSO signal appear between two adjacent rising edges of the CLK512 signal (the CPU 43 can perform a minus one operation on the current gate moving pitch number, wherein the gate The initial value of the pitch number of the pole shift is 0).
  • a displacement measuring system for a sensor device comprising a capacitive sensor
  • the system utilizing The function of the traditional ASIC chip is to measure the total actual displacement value of the gate of the capacitive sensor according to the output of the conventional ASIC chip and the timing (counting) function of the single chip timer, and is especially suitable for the actual displacement measurement of the capacitive sensor after stationary.
  • the ASIC chip 80 is similar to the conventional ASIC chip 20 of FIG. 1 (in addition to the crystal circuit 21 and the like, a phase discrimination and counting circuit 25, a displacement data processing circuit 26, a serial output port 27, and the like are integrated. ).
  • the capacitive gate signal processing circuit 24 in FIG. 8 delivers the ADSO signal to the phase-detecting and counting circuit 25 in the ASIC chip 80 for phase discrimination and counting processing, and also delivers the ADSO signal to FIG.
  • the single chip microcomputer 90, and the clock frequency dividing circuit 22 also outputs to the single chip microcomputer 90 a CLK512 signal having the same period as that of the eight driving signals and having the same phase as any of the driving signals.
  • the 9 also receives the output from the serial output port 27 of the ASIC chip 80, including the DATA signal and the CLK signal.
  • the DATA signal is a data signal, and includes total absolute displacement value information (referred to as displacement) of the gate of the capacitive gate sensor 10 generated by the ASIC chip 80 according to a conventional method (ie, operation of phase-detecting, counting, data processing, etc. on the ADSO signal). Information); the CLK signal is a synchronous clock signal.
  • the traditional data acquisition method is: sampling the DATA signal on the falling edge of the narrow pulse of the CLK signal.
  • the microcontroller 90 shown in FIG. 9 has an I/O port 91 in addition to those components of FIG. 4 for receiving DATA signals and CLK signals from the serial output port 27 of the ASIC chip 80.
  • the workflow of the single chip microcomputer 90 in FIG. 9 includes:
  • the microcontroller 90 receives the CLK signal and the DATA signal from the serial output port 27 through its I/O port 91.
  • the timer 41 in the single chip microcomputer 90 receives the ADSO signal and the CLK512 signal, which is the same as the position equivalent method for calculating the gate of the capacitive gate sensor 10 within one pitch, and the timer 41 uses the clock frequency provided by the count clock 42 ( For example, 6 MHz), as the count frequency, counts according to the ADSO signal and the CLK512 signal, such as restarting counting when the rising edge of the CLK512 signal is detected and the current count when the rising edge of the ADSO signal is detected (ie, the capacitive gate sensor 10)
  • the gate of the gate is written to the buffer in a position equivalent to one pitch (the timer 41 in Fig. 9 operates in the same manner as the timer 41 in Figs. 4 and 6).
  • the CPU 43 obtains the number of pitches of the gate movement of the capacitive gate sensor 10 based on the DATA signal received from the I/O port 91 and the CLK signal; and the buffer from the timer 41 according to the interrupt flag signal transmitted from the timer 41 The data is read to obtain the positional equivalent of the gate of the capacitive gate sensor 10 within a pitch. The CPU 43 then obtains the total absolute displacement value based on the number of pitches moved and the positional equivalents within one pitch. According to an embodiment of the present invention, specifically, the method includes:
  • the interrupt signal generated by the rising edge or the falling edge of the CLK signal the high and low states of the DATA signal are read, and the displacement information contained in the DATA signal is obtained (the multi-bit binary number represented by 0, 1, wherein the low bit In the first place, the 12th position is the number of moving pitches, and the number of pitches at which the gate of the capacitive gate sensor 10 is moved is separated therefrom. And, the data is read from the buffer of the timer 41 according to the interrupt flag signal sent from the timer 41, and the position equivalent of the gate of the capacitive gate sensor 10 within one pitch is obtained.
  • the total absolute displacement value of the gate of the capacitive sensor 10 is output to the display unit 45 and the serial port 46, and is output by the display unit 45 and the serial port 46. In this way, high-resolution, high-precision, large-range displacement measurement is achieved.
  • the buffer may not be used in the timer 41.
  • the RAM 44 can be used to store data in the buffer, as well as data generated by the CPU 43 during processing, and the like.
  • the CPU 43 may be on the gate of the capacitive sensor 10 before the switching operation (ie, converting the total absolute displacement equivalent of the gate of the capacitive gate sensor 10 to the total absolute displacement value)
  • the total absolute shift equivalent is subjected to digital filtering processing, and after the switching operation, the deviation correction within the pitch and the deviation correction between the pitches are performed on the total absolute displacement value of the gate of the capacitive gate sensor 10.
  • a displacement measurement system for a sensor device for a large range, high resolution, and high precision angular displacement measurement, the sensor device including two capacitive gate sensors, Description will be made with reference to FIGS. 10 and 11.
  • two capacitive gate sensors one coarse split gate sensor 11 and one subdivided capacitive gate sensor 12 are used (for the use of a combination of coarse and subdivided capacitive sensors to measure the absolute range of large angles)
  • the coarse sensor has a pitch on one circumference (ie, one pitch is equal to 360° of the full circumference of the circumference), and the subdivision sensor is on one circumference.
  • has a plurality of pitches for example, 20
  • FIG. 10 An ASIC chip 100 of the present embodiment is shown in FIG. 10, which is integrated with a crystal oscillator circuit 21, a clock frequency dividing circuit 22, an 8-way driving and analog switching signal generating circuit 23. (Note that in the present embodiment, eight paths are required.
  • the drive signal is used to drive the coarse split gate sensor 11 and the subdivided gate sensor 12), and the two capacitive gate signal processing circuits 101 and 102; the two capacitive gate signal processing circuits 101, 102 respectively receive the signals from the coarse division
  • the output signal CSI1 of 11 and the output signal CSI2 from the subdivision sensor 12, and the ADSO1 signal and the ADSO2 signal are respectively output to the single chip microcomputer 110 in FIG. 11; in addition, the clock frequency dividing circuit 22 outputs one way and eight to the single chip microcomputer 110 in FIG.
  • the CLK512 signal has the same period and the same phase as any of the drive signals.
  • the microcontroller 110 of FIG. 11 includes two identical timers 111 and 112 (i.e., timer 1 and timer 2); wherein the timer 111 receives the ADSO1 signal from the capacitive gate signal processing circuit 101 and the clock divider circuit.
  • the CLK512 signal of 22, the timer 112 receives the ADSO2 signal from the capacitive gate signal processing circuit 102 and the CLK512 signal from the clock divider circuit 22.
  • the workflow of the single chip 110 is as follows:
  • the timer 111 takes the clock frequency (for example, 6 MHz) supplied from the count clock 42 as the count frequency, and according to The ADSO1 signal and the CLK512 signal are counted to obtain a positional equivalent of the gate of the coarse-divided gate sensor 11 within a pitch; the timer 112 also uses the clock frequency provided by the count clock 42 as the count frequency, and according to the ADSO2 signal and The CLK512 signal is used to count to obtain the positional equivalent of the gate of the subdivided capacitive sensor 12 within a pitch.
  • the clock frequency for example, 6 MHz
  • the timer 111 itself includes a buffer, the timer 111 counts from zero when the rising edge of the CLK512 signal is detected, and writes the current count to its buffer when the rising edge of the ADSO1 signal is detected.
  • the count represents the positional equivalent of the gate of the coarse-divided gate sensor 11 within a pitch;
  • the timer 112 also includes a buffer, and the timer 112 counts from zero when the rising edge of the CLK512 signal is detected, and is monitored.
  • the rising edge of the ADSO2 signal writes the current count to its buffer, which represents the positional equivalence of the gate of the subdivided capacitive sensor 12 within a pitch.
  • the timer 111 or the timer 112 can transmit an interrupt flag signal to the CPU 43 upon detecting the rising edge of the CLK 512 signal to enable the CPU 43 to read the synchronized data from the buffer of the timer 111 and the timer.
  • the CPU reads data from the buffer of the timer 111 and reads data from the timer of the timer 112, which are the positional equivalents of the gate of the coarse-divided gate sensor 11 within one pitch, respectively. And the positional equivalent of the gate of the subdivided capacitive sensor 12 within one pitch.
  • the 0th pitch position of 12 (the number of moving pitches is 0), and 1000 to 1999 corresponds to the first pitch position of the subdivided capacitive sensor 12, and so on.
  • the number of pitches of the subdivision gate sensor gate movement can be determined according to the positional equivalent of the gate of the coarsely divided gate sensor 11 within one pitch.
  • the total absolute displacement value is output to the display unit 45 and the serial port 46, and is output by the display unit 45 and the serial port 46.
  • timer 111 and timer 112 described above have their own buffers, although in other embodiments, buffers may not be used. In embodiments where timers 111 and 112 have no buffers, when timer 111 monitors the rising edge of the ADSO1 signal, the current count can be sent directly to CPU 43 and stored by CPU 43 to RAM 44; when timer 112 monitors When the rising edge of the ADSO2 signal is reached, the current count can be directly sent to the CPU 43 and stored by the CPU 43 to the RAM 44. When the CPU 43 receives an interrupt flag signal triggered by the rising edge of the CLK512 signal from the timer 111 or the timer 112, the two counts are fetched from the RAM and subjected to subsequent processing.
  • the DMA path can directly store data in the buffers of the timers 111 and 112 into the RAM 44, and the CPU 43 can extract the most recent from the RAM 44 based on the received interrupt flag signal. The stored data is processed.
  • the timer 111 and the timer 112 can also clear the count according to the falling edge of the CLK512 signal, and the buffer is buffered according to the falling edge of the ADSO1 signal and the ADSO2 signal, respectively.
  • the current count is written and an interrupt flag signal can be sent to the CPU 43 when the rising edge (or falling edge) of the CLK512 signal is detected.
  • the timer 111 may send an interrupt flag signal to the CPU 43 upon detecting the rising edge of the ADSO1 signal
  • the timer 112 may send an interrupt flag signal to the CPU 43 upon detecting the rising edge of the ADSO2 signal.
  • the CPU 43 also digitally filters the total absolute positional equivalent of the gate of the subdivided capacitive sensor 12 in the circumferential range prior to the switching operation, and the total absolute displacement value after the switching operation. The deviation correction within the pitch and between the pitches is performed.
  • the displacement measuring system can achieve angular measurement over the entire circumference
  • the displacement measuring system is also suitable for the measurement of the fan angle, in which case the subdivision sensor is required to have N pitches (N is an integer and N ⁇ 2) within one pitch of the coarse component sensor.
  • N is an integer and N ⁇ 2
  • the displacement measuring system shown in Figures 10 and 11 can also be used for absolute measurement of length.
  • the displacement measuring system shown in FIG. 3 and FIG. 6 occupies less space because the conventional phase detecting and counting circuit 25, the displacement data processing circuit 26, and the like are not required, and the system is suitable for use in motion and after stationary.
  • Displacement measurement; the displacement measurement system shown in Figures 8 and 9 can be fabricated using existing ASIC chips, which is simpler to implement than other displacement measurement systems, but takes up a lot of space. This system is mainly suitable for stationary.
  • Post-displacement measurement; the displacement measurement system shown in Figures 10 and 11 is suitable for measurement of angular displacement and linear displacement, either in motion or after stationary.
  • the displacement measuring system for the sensor device provided by the invention can realize the low-cost performance improvement of the phase-detecting capacitive gate sensor measurement technology on the basis of inheriting the large-scale production technology of the traditional phase-sensing capacitive gate sensor, and Improve the resolution and accuracy of the measurement.
  • the internal count clock 42 of the microcontroller is used above to implement timing and counting of the timer, in other embodiments, the external clock of the microcontroller can also be used to provide the clock frequency.
  • the single chip microcomputer may be integrated in the ASIC chip, or the ASIC chip may be integrated in the single chip microcomputer. On, or integrate the two together, can be integrated on the same chip, or integrated on multiple chips.
  • the displacement measuring system is also applicable to other displacement sensors, for example, capacitive sensors, inductive synchronizers, grating sensors other than capacitive gate sensors. Wait.
  • the working principle of these displacement sensors is similar to that of the capacitive sensor.
  • the driving signal is a periodically varying voltage signal. After the displacement sensor is coupled and modulated, its time variation period corresponds to the spatial period of the sensor pitch change, and the output signal can pass the phase detection. The manner of obtaining a same-period square wave signal corresponding to the pitch position and having an electrical phase difference from the initial drive signal.
  • the present invention has been described above by taking a capacitive sensor that receives a multi-channel (eight-way) driving signal as an example, it should be noted that a displacement sensor that receives one driving signal is also applicable to the present invention, in which case
  • the driving signal generating circuit 23 may output only one driving signal, and the CLK512 signal output from the clock frequency dividing circuit 22 is the same as the driving signal period and has the same phase.
  • the period or phase of the CLK 512 signal and the drive signal may not be exactly the same, for example, the period may be in a multiple relationship, the phase may be reversed, or have other correspondences.
  • the above methods may be implemented by hardware, software, firmware, middleware, pseudocode, hardware description language, or any combination thereof.
  • the program code or code segments used to perform the tasks can be stored in a computer readable medium, such as a storage medium, which the processor can perform.
  • the exemplary embodiments of the software implementation are typically encoded on some form of program storage medium or implemented on some type of transmission medium.
  • the program storage medium can be any non-transitory storage medium such as a magnetic disk (eg, a floppy disk or a hard disk) or an optical disk (eg, compact disk read only memory or "CD ROM"), and can be read-only or randomly accessed.
  • the transmission medium can be twisted pair, coaxial cable, fiber optic, or some other suitable transmission medium known in the art.

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Abstract

一种用于传感器装置的位移测量系统及位移测量方法，位移测量系统包括：驱动信号生成电路（23），用于向第一位移传感器（10，12）输出驱动信号；第一信号处理电路（24，102），用于接收来自第一位移传感器（10，12）的信号并且输出第一ADSO信号；以及计算设备（40，60，90，110），包括第一定时器（41，112）；第一定时器（41，112）用于接收CLK512信号和第一ADSO信号，并且根据CLK512信号和第一ADSO信号进行计时或计数；CLK512信号是与驱动信号的周期和相位相关的方波信号。该位移测量系统及方法以较低的成本实现了性能的提升，能够获得较高的测量分辨率和测量精度。

Description

用于传感器装置的位移测量系统和位移测量方法 技术领域
本发明涉及定位及位移测量，具体来说，涉及角度和长度的定位及位移测量技术，更具体地，涉及用于传感器装置的位移测量系统以及位移测量方法。
背景技术
位移传感器通常用作测长、测角、测速、精密定位及随动跟踪等测量系统中的位置测量元件，位移传感器包括电容式传感器、感应同步器、光栅传感器等。其中，使用最广泛的是电容式传感器中的容栅传感器，其与位移测量电路构成容栅传感器位移测量系统，分为鉴相型和鉴幅型。图1示出了传统鉴相型容栅传感器位移测量系统的一个示例图，其以栅距为测量周期，通过鉴相的方式获得容栅传感器的栅极在一个周期内的位置量，并且通过辨向计数实现超过一个周期的位移测量。图1所示的传统鉴相型容栅传感器位移测量系统包括容栅传感器10和容栅传感器ASIC芯片20(下文也简称为ASIC芯片20或芯片20)，其中容栅传感器ASIC芯片20集成有晶振电路21，时钟分频电路22，多路(通常为8路)驱动及模拟开关信号生成电路23(下文也简称为驱动信号生成电路23)，容栅信号解调、放大、滤波及比较电路24(下文也简称为容栅信号处理电路24，或者信号处理电路24)，鉴相及计数电路25，位移数据处理电路26，LCD显示电路29，电压检测电路28和串行输出端口27等。
上述容栅信号处理电路24输出的信号周期(512CP)在空间上对应容栅传感器中一个栅距的长度，假设一个栅距的长度为5.08mm，则该鉴相型容栅传感器位移测量系统能分辨的最小精度为：5.08mm/512≈0.01mm≈0.0004inch。在这种情况下，容栅传感器的动栅每移动一个最小精度的单位，CSI信号的相位会发生180/256度的变化。可见，传统鉴相型容栅传感器位移测量系统的分辨率并不高，而采用这种较低分辨率的原因在于：根据有源鉴相容栅技术的测量机理，经鉴相操作得到的相位差与容栅传感器栅极的位移变化量并非完全呈线性比例关系，而是有约0.1％的偏 差，因此需要采用较低的分辨率来保证一定的输出精度；此外，8路驱动信号的频率与容栅传感器中栅极的面积有较强的电气相关性，为了适应容栅传感器与芯片的阻抗匹配要求，同时为了兼顾低功耗和具有一定的分辨率，通常将容栅传感器的驱动频率设置在200Hz～500Hz之间，而将芯片的工作频率设置在100kHz～300kHz之间，这也使得测量系统的分辨率较低。
由上文的描述可见，传统鉴相型容栅传感器位移测量系统的分辨率已与芯片的工作频率固化了，要提高分辨率，目前常见的做法是减少容栅传感器的栅距。然而，受制造、装配等技术的限制，容栅传感器栅距的减少空间是非常有限的，这使得鉴相型容栅传感器位移测量系统依然难以实现高分辨率的位移测量。
发明内容
为解决上述现有技术中存在的问题，根据本发明的一个实施例，提供一种用于传感器装置的位移测量系统，其中所述传感器装置包括第一位移传感器，所述位移测量系统包括：
驱动信号生成电路，用于向所述第一位移传感器输出驱动信号；
第一信号处理电路，用于接收来自所述第一位移传感器的信号并且输出第一ADSO信号；以及
计算设备，其包括第一定时器；
其中，所述第一定时器用于接收CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号进行计时或计数；其中，所述CLK512信号是与所述驱动信号的周期和相位相关的方波信号。
上述位移测量系统中，还包括时钟分频电路，用于向所述驱动信号生成电路输出时钟信号以及输出所述CLK512信号。
上述位移测量系统中，所述计算设备还包括处理器，用于将所述第一定时器通过计时或计数得到的数据转换为所述第一位移传感器的栅极在一个栅距内的绝对位移值。
上述位移测量系统中，还包括计数时钟，其中，所述第一定时器用于以所述计数时钟提供的时钟频率根据所述CLK512信号和所述第一ADSO信号进行计时或计数。
上述位移测量系统中，所述第一定时器用于在监测到所述CLK512信 号的上升沿时以所述计数时钟提供的时钟频率从零开始计时或计数，以及在监测到所述第一ADSO信号的上升沿时将当前时间或当前计数发送至所述处理器。
上述位移测量系统中，所述第一定时器还包括第一缓冲器；其中，所述第一定时器用于在监测到所述CLK512信号的上升沿时以所述计数时钟提供的时钟频率从零开始计时或计数，以及在监测到所述第一ADSO信号的上升沿时将当前时间或当前计数写入所述第一缓冲器。所述处理器用于在接收到由所述第一ADSO信号或所述CLK512信号触发的中断标记信号之后，读取所述第一缓冲器中的数据。
上述位移测量系统中，所述处理器用于根据所述第一定时器通过计时得到的数据以及所述计数时钟提供的时钟频率得出所述第一位移传感器的栅极在一个栅距内的位置当量，并且将所述第一位移传感器的栅极在一个栅距内的位置当量转换为所述第一位移传感器的栅极在一个栅距内的绝对位移值。所述处理器还用于对所述第一位移传感器的栅极在一个栅距内的位置当量进行数字化滤波处理，以及对所述第一位移传感器的栅极在一个栅距内的绝对位移值进行偏差修正。
上述位移测量系统中，所述计数时钟可以包含在所述计算设备。
上述位移测量系统中，所述计算设备还包括第二定时器，用于接收所述CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号对所述第一位移传感器的栅极移动的栅距数进行计数。其中，所述处理器还用于根据所述第二定时器通过计数得到的数据以及所述第一定时器通过计时或计数得到的数据得出所述第一位移传感器的栅极的总绝对位移值。
上述位移测量系统中，所述驱动信号生成电路和所述第一信号处理电路集成在同一芯片中。所述芯片还包括：鉴相及计数电路，用于接收所述第一ADSO信号；以及串行输出端口，用于输出CLK信号和包括所述第一位移传感器的栅极的位移信息的DATA信号。所述计算设备还用于接收所述CLK信号和所述DATA信号。所述处理器还用于根据所接收的所述CLK信号和所述DATA信号得到所述第一位移传感器的栅极移动的栅距数，以及根据所述第一位移传感器的栅极移动的栅距数和所述第一定时器通过计时或计数得到的数据得出所述第一位移传感器的栅极的总绝对位移值。
上述位移测量系统中，所述处理器用于根据所述第一位移传感器的栅极移动的栅距数和所述第一定时器通过计时或计数得到的数据得出所述第一位移传感器的栅极的总绝对位移当量，以及将所述第一位移传感器的栅极的总绝对位移当量转换为所述第一位移传感器的栅极的总绝对位移值。
上述位移测量系统中，所述传感器装置还包括第二位移传感器，其中所述第一位移传感器在所述第二位移传感器的一个栅距内具有多个栅距，所述驱动信号生成电路还用于向所述第二位移传感器输出所述驱动信号。所述位移测量系统还包括第二信号处理电路，用于接收来自所述第二位移传感器的信号并且输出第二ADSO信号。所述计算设备还包括第三定时器，用于接收所述第二ADSO信号和所述CLK512信号，以所述计数时钟提供的时钟频率根据所述第二ADSO信号和所述CLK512信号进行计时或计数。所述处理器还用于根据所述第三定时器通过计时或计数得到的数据来确定所述第一位移传感器的栅极移动的栅距数，以及根据所述第一位移传感器的栅极移动的栅距数和所述第一定时器通过计时或计数得到的数据得出所述第一位移传感器的栅极的总绝对位移值。
上述位移测量系统中，所述第三定时器用于在监测到所述CLK512信号的上升沿时以所述计数时钟提供的时钟频率从零开始计时或计数，以及在监测到所述第二ADSO信号的上升沿时将当前时间或当前计数发送至所述处理器或者记录该当前时间或当前计数。
上述位移测量系统中，所述第一位移传感器以及所述第二位移传感器是容栅传感器。
上述位移测量系统中，所述CLK512信号是与所述驱动信号的周期相同并且相位相同的方波信号。
上述位移测量系统中，所述计算设备、所述驱动信号生成电路以及所述第一信号处理电路集成在同一芯片中。
根据本发明的另一个实施例，还提供一种用于传感器装置的位移测量方法，所述传感器装置包括第一位移传感器，所述位移测量方法包括：
向所述第一位移传感器输出驱动信号；
接收来自所述第一位移传感器的信号，对该信号进行处理，并且输出第一ADSO信号；以及
接收CLK512信号和所述第一ADSO信号，并且根据所述CLK512信 号和所述第一ADSO信号进行计时或计数；其中，所述CLK512信号是与所述驱动信号的周期和相位相关的方波信号。
上述位移测量方法中，还包括：将通过所述计时或计数得到的第一数据转换为所述第一位移传感器的栅极在一个栅距内的绝对位移值。
上述位移测量方法中，根据所述CLK512信号和所述第一ADSO信号进行计时或计数包括：在监测到所述CLK512信号的上升沿时以时钟频率从零开始计时或计数，以及在监测到所述第一ADSO信号的上升沿时发送或记录当前时间或当前计数。
上述位移测量方法中，将通过计时得到的第一数据转换为所述第一位移传感器的栅极在一个栅距内的绝对位移值包括：
根据通过计时得到的第一数据以及所述时钟频率得出所述第一位移传感器的栅极在一个栅距内的位置当量；以及
将所述第一位移传感器的栅极在一个栅距内的位置当量转换为所述第一位移传感器的栅极在一个栅距内的绝对位移值。
上述位移测量方法中，还包括：
对所述第一位移传感器的栅极在一个栅距内的位置当量进行数字化滤波处理；以及
对所述第一位移传感器的栅极在一个栅距内的绝对位移值进行偏差修正。
上述位移测量方法中，还包括：
接收所述CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号对所述第一位移传感器的栅极移动的栅距数进行计数；以及
根据通过对所述第一位移传感器的栅极移动的栅距数进行计数得到的第二数据和所述第一数据得出所述第一位移传感器的栅极的总绝对位移值。
上述位移测量方法中，所述传感器装置还包括第二位移传感器，其中所述第一位移传感器在所述第二位移传感器的一个栅距内具有多个栅距，所述位移测量方法还包括：
向所述第二位移传感器输出所述驱动信号；
接收来自所述第二位移传感器的信号，对该信号进行处理，并且输出第二ADSO信号；
接收所述第二ADSO信号和所述CLK512信号，以所述时钟频率根据所述第二ADSO信号和所述CLK512信号进行计时或计数，其中通过根据所述第二ADSO信号和所述CLK512信号进行计时或计数得到第三数据；
根据所述第三数据来确定所述第一位移传感器的栅极移动的栅距数；以及
根据所述第一位移传感器的栅极移动的栅距数和所述第一数据得出所述第一位移传感器的栅极的总绝对位移值。
与现有技术相比，本发明具有如下的有益效果：
在继承传统鉴相型位移测量系统规模化生产技术的基础上，并且在不改变位移传感器耦合结构的尺寸的基础上，本发明提供的位移测量系统和方法以较低的成本实现了性能的提升，获得了较高(如微米级和亚微米级)的测量分辨率和较高的测量精度。
此外，本发明的适用范围较广，除了容栅传感器，本发明还可以与其他类型的电容式传感器、感应同步器以及光栅传感器等结合使用。
附图说明
以下将通过参考附图对示例性实施例进行详细描述，附图意在描绘示例性实施例而不应被解释为对权利要求的预期范围加以限制。除非明确指出，否则附图不被认为依比例绘制。
图1是传统鉴相型容栅传感器位移测量系统的框图；
图2是根据本发明一个实施例的由CLK512信号与ADSO信号映射成的受ADSO信号调制的等效脉宽调制方波的示意图；
图3是包括容栅传感器以及根据本发明一个实施例的位移测量系统中的ASIC芯片的结构的框图；
图4是根据本发明一个实施例的位移测量系统中的单片机的框图；
图5是根据本发明一个实施例的单片机工作流程图；
图6是根据本发明另一个实施例的位移测量系统中的单片机的框图；
图7是根据本发明另一个实施例由单片机中的CPU进行数据处理程序的流程图；
图8是包括容栅传感器以及根据本发明又一个实施例的位移测量系统中的ASIC芯片的结构的框图；
图9是根据本发明又一个实施例的位移测量系统中的单片机的框图；
图10是包括粗分和细分容栅传感器以及根据本发明又一个实施例的位移测量系统中的ASIC芯片的结构的框图；
图11是根据本发明又一个实施例的位移测量系统中的单片机的框图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图通过具体实施例对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
在描述本发明各个实施例之前需要说明的是，为便于理解，本发明下述实施例均围绕容栅传感器展开描述，但诸如其他电容式传感器的位移传感器也适用于此。
发明人通过对传统鉴相型容栅传感器位移测量系统的测量原理进行研究后发现，用于驱动容栅传感器的多路驱动信号是由芯片内的时钟分频电路经过组合逻辑生成的，该驱动信号与容栅传感器输出并经解调、放大、滤波及比较操作得到的信号(本申请中称为ADSO信号)有着严格的相位匹配关系。如果将ADSO信号与如图2所示的一路方波信号(该方波信号与用于驱动容栅传感器的多路驱动信号周期相同，并且与其中一路驱动信号相位相同)进行相位比较，则可以映射得到如图2所示的受ADSO信号调制的等效脉宽调制方波。同时，进一步研究发现，该等效脉宽调制方波的调制脉宽(如图2中所示的A1、A2、A3、A4)不仅对应于ADSO信号与上述方波信号的相位差，并且在空间上还对应于容栅传感器的栅极在一个栅距内的位置值。另外，发明人还发现，与现有技术(如上所述，现有技术中鉴相后得到的相位差与容栅传感器栅极的位移变化量并非完全呈线性比例关系)相比，根据上述对应关系，有可能通过直接计量等效脉宽调制方波的调制脉宽，得到容栅传感器的栅极在一个栅距内的、具有高分辨率的位置当量，以及通过将该位置当量进行转换得到容栅传感器的栅极在一个栅距内的位置值，或称绝对位移值。
有鉴于此，为了在现有容栅传感器的基础上提高测量分辨率，根据本发明的一个实施例，提供一种用于传感器装置的位移测量系统，所述传感器装置包括容栅传感器。
参见图3和图4，根据本发明一个实施例的位移测量系统包括：集成有晶振电路21、时钟分频电路22、多路驱动及模拟开关信号生成电路23 (下文以8路驱动及模拟开关信号生成电路为例展开描述)、容栅信号处理电路24的ASIC芯片30(图3)；以及包括定时器41、计数时钟42、CPU 43、RAM 44、显示单元45和串口46的单片机40(图4)。其中，定时器还包括缓冲器(图4中未示出)。其中，芯片30内的容栅信号处理电路24将产生的ADSO信号发送至单片机40的定时器41；时钟分频电路22除了向8路驱动及模拟开关信号生成电路23发送时钟信号之外，还将一路方波信号(本发明中称为CLK512信号，其周期与8路驱动信号out1-out8的周期相同，例如为512T，其中1T表示芯片工作频率的倒数；并且其相位与其中一路驱动信号的相位相同)发送至单片机40的定时器41。根据本发明的一个实施例，该测量系统的工作流程如下：
1)在ASIC芯片30中，由晶振电路21产生时钟信号并输送至时钟分频电路22；时钟分频电路22对该时钟信号进行分频处理并将产生的时钟信号发送至8路驱动及模拟开关信号生成电路23，时钟分频电路22还输出一路与8路驱动信号的周期相同并且与任一路驱动信号的相位相同的方波信号(CLK512信号)；8路驱动及模拟开关信号生成电路23接收来自时钟分频电路的信号，产生并输出用于驱动容栅传感器10的8路驱动信号。
在8路驱动及模拟开关信号生成电路23输出8路驱动信号之后，由容栅传感器10执行如下的处理：
容栅传感器10的8路发射极片分别接收来自ASIC芯片30的8路驱动信号，经由容栅传感器10的栅极电容调制输出电压幅值不同的周期信号(即CSI信号)，接着，容栅传感器10将CSI信号输入到ASIC芯片30的内部。
2)在ASIC芯片30中，容栅信号处理电路24接收来自容栅传感器10的CSI信号，经过解调、放大、滤波及比较操作将CSI信号转换为与容栅传感器10的栅极的位移相关的ADSO信号，并且输出该ADSO信号。本领域技术人员应理解，当该ADSO信号移相360°电相角时，在空间上对应容栅传感器中的一个栅距。
3)在单片机40中，由单片机40的定时器41接收来自容栅信号处理电路24的ADSO信号以及来自时钟分频电路22的CLK512信号。在该实施例中，单片机40中的定时器41以计数时钟42提供的时钟频率作为计数频率(即，数计数时钟42的脉冲个数)，并且根据ADSO信号以及CL K512信号来进行计数。根据本发明的一个实施例(参见图5)，单片机的工作流程如下：
31)单片机40的定时器41接收ADSO信号以及CLK512信号，当定时器41监测到CLK512信号的上升沿时，将计数清零；当定时器41监测到ADSO信号的上升沿时，将当前计数写入缓冲器，同时产生中断标记信号并且将中断标记信号发送至CPU 43。
参照图2可知，定时器41写入缓冲器的计数对应于等效脉宽调制方波的一个调制脉宽(如图2所示的A1，A2…..)，该计数表示容栅传感器10的栅极在一个栅距内的位置当量。另外，由于定时器41以计数时钟42提供的时钟频率进行计数，因此通过对计数时钟42设置不同的时钟频率可以得到分辨率不同的位置当量。例如，假设单片机40的时钟频率为6MHz并且ASIC芯片30的工作频率为153.6KHz，则容栅传感器10的一个栅距所对应的512T信号周期的时长为512x1/153.6x10 -3秒＝10/3x10 -3秒，在该时长内单片机40的定时器41的最大计数值为(10/3x10 -3)/(1/6x10 -6)＝20000。因此，位置当量细分较原来(即，512)提高了20000/512＝40倍左右。假设容栅传感器的一个栅距为5.08mm，则得到的位置当量细分为5.08/20000＝0.000254mm。由于单片机40中的时钟频率是可以根据需要来设定的，因而可以使得位置当量细分成为原来的几倍到上百倍，从而达到高分辨率的目的。
32)CPU 43在接收到中断标记信号后执行如下操作：
321)读取缓冲器中的数据，即容栅传感器10的栅极在一个栅距内的位置当量。
322)将该数据转换成容栅传感器10的栅极在一个栅距内的实际位移值(又称容栅传感器10的栅极在一个栅距内的绝对位移值)。
323)将容栅传感器10的栅极在一个栅距内的绝对位移值输出至显示单元45以及串口46，由显示单元45、串口46进行输出。
以上描述的位移测量系统的实施例适用于容栅传感器栅极的移动范围在一个栅距内的情况。
在上文描述的位移测量系统的实施例中，当定时器41在监测到ADSO信号的上升沿时产生中断标记信号并且将该中断标记信号发送至CPU43。本领域技术人员应理解，定时器41在监测到ADSO信号的下降沿时或者在监测到CLK512信号的上升沿或下降沿时，也可以产生中断标记信 号并发送至CPU 43。因此，在另一个实施例中，CPU 43在接收到ADSO信号的下降沿、CLK512的上升沿或CLK512的下降沿触发的中断标记信号后读取缓冲器中的数据并将其转换为容栅传感器10的栅极在一个栅距内的绝对位移值。
在上文描述的位移测量系统的实施例中，定时器41根据CLK512信号以及ADSO信号的上升沿来控制计数，即，当定时器41监测到CLK512信号的上升沿时，将计数清零；而当定时器41监测到ADSO信号的上升沿时，将定时器41的当前计数写入缓冲器。然而从图2可见，在另一个实施例中，定时器41也可以根据CLK512信号以及ADSO信号的下降沿对计数进行控制，即当监测到CLK512信号的下降沿时，将计数清零；当定时器41监测到ADSO信号的下降沿时，将定时器当前计数写入缓冲器，这种方式同样可以得到容栅传感器10的栅极在一个栅距内的位置当量。在采用这种实施方式的情况下，CPU 43可以根据ADSO信号的上升沿/下降沿或者CLK512信号的上升沿/下降沿触发的中断标记信号读取缓冲器中的数据并将其转换为容栅传感器10的栅极在一个栅距内的绝对位移值。
在上文描述的位移测量系统的实施例中，单片机40中的定时器41以计数时钟42提供的时钟频率连续计数。在另一个实施例中，可以使用这样一种定时器：其在监测到CLK512信号的上升沿时以计数时钟42提供的时钟频率从零开始计数，而在监测到ADSO信号的上升沿时结束计数并且将当前计数写入缓冲器(应理解，也可以根据CLK512信号和ADSO信号的下降沿来控制计数)。CPU 43可以根据ADSO信号的上升沿/下降沿或者CLK512信号的上升沿/下降沿触发的中断标记信号读取缓冲器中的数据并将其转换为容栅传感器10的栅极在一个栅距内的绝对位移值。在又一个实施例中，可以使用这样一种定时器：其在监测到CLK512信号的上升沿时从零开始计时并且在监测到ADSO信号的上升沿时将当前时间写入缓冲器(或者，在监测到CLK512信号的下降沿时从零开始计时并且在监测到ADSO信号的下降沿时将当前时间写入缓冲器)。CPU 43接收到中断标记信号后读取缓冲器中的数据，根据该数据和时钟频率(例如，将缓冲器中的当前时间与时钟频率相乘)得到容栅传感器10的栅极在一个栅距内的位置当量，并且将容栅传感器10的栅极在一个栅距内的位置当量转换为容栅传感器10的栅极在一个栅距内的绝对位移值。在又一个 实施例中，还可以使用这样一种定时器：其在监测到CLK512信号的上升沿时将当前计数写入缓冲器，同时产生中断标记信号并将中断标记信号发送至CPU 43，CPU 43在接收到CLK512信号的上升沿触发的中断标记信号后读取缓冲器中的数据；在监测到ADSO信号的上升沿时将当前计数写入缓冲器，同时也产生中断标记信号并将该中断标记信号发送至CPU 43，CPU 43在接收到ADSO信号的上升沿触发的中断标记信号后读取缓冲器中的数据，并且将这两个数据相减，从而也能得到容栅传感器10的栅极在一个栅距内的位置当量。
在上文描述的位移测量系统的实施例中，定时器41包括缓冲器以用于暂时地存储计数，而在另一个实施例中，定时器41可以不使用缓冲器，当监测到CLK512信号的上升沿时，定时器41将计数清零；当监测到ADSO信号的上升沿时，定时器41直接将当前计数发送至CPU 43，由CPU 43将该数据转换为容栅传感器10的栅极在一个栅距内的绝对位移值。
尽管在上文中没有详细说明，但本领域技术人员应理解，单片机40中的RAM 44可以用来存储CPU 43在计算过程中所用到的数据。例如，CPU 43在接收到中断标记信号后，将缓冲器中的数据存储到RAM 44中；或者将定时器41直接发送过来的数据存储到RAM 44中，随后对RAM 44中存储的数据进行处理(例如，转换为容栅传感器10的栅极在一个栅距内的绝对位移值)。在采用ARM单片机的情况下，DMA通路可以直接将缓冲器中的数据存储到RAM 44中，CPU 43可以根据接收到的中断标记信号，从RAM 44中提取最近存入的数据进行转换处理。
在计数时钟42提供的时钟频率较高的情况下(也就是说，所得到的容栅传感器10的栅极在一个栅距内的位置当量的分辨率较高)，通过计时或计数得到的位置当量数据有可能不太稳定，会有些波动。为了减小这种波动的影响，在进一步的实施例中，CPU 43可以在执行转换操作前对位置当量进行数字化滤波处理(举例而言，通过采用8组数据取平均来执行数字化滤波，例如，从RAM 44中提取最近存入的8组容栅传感器10的栅极在一个栅距内的位置当量取平均)，从而可以在高分辨率的情况下得到较为稳定的数据，接着对执行数字化滤波处理后的数据进行转换，得到容栅传感器10的栅极在一个栅距内的绝对位移值。
在进一步的实施例中，在得到容栅传感器10的栅极在一个栅距内的绝对位移值之后，CPU 43还对该绝对位移值进行偏差补正。例如，可以 通过采用标准计量装置进行位置标定的方式，进行分段或逐点偏差修正来消除非线性误差和动栅制造误差的影响，以实现一个栅距内的高精度测量。例如，当一个栅距内的分辨当量(即，一个栅距内定时器的最大计数值)为20000时，则对于5.08mm栅距，分辨率达到0.000254mm，即254nm，在按均分8段(0.635mm)进行线性系数插补修正后，按4倍的不确定误差估算，精度可在1um范围，为原先的10倍。这种偏差补正技术适用于大量的测微仪器。
以上描述的位移测量系统的各个实施例适用于测量容栅传感器的栅极在一个栅距内的绝对位移值，下文将对如何测量移动超过一个栅距的总的绝对位移值展开描述。
根据本发明的另一个实施例，还提供一种用于传感器装置的位移测量系统，所述传感器装置包括容栅传感器，该系统采用了将周期型位置测量技术与连续监测栅距位置变化的增量型位移测量技术相结合的方式，适用于测量容栅传感器栅极的移动超过一个栅距的情况(即，大量程的测量)。该位移测量系统包括如图3所示的ASIC芯片30以及如图6所示的单片机60。
由于在上文中已对图3中的容栅传感器10和ASIC芯片30以及它们的工作流程进行了描述，因此此处不再赘述。以下将参照图6详细描述该实施例。如图6所示，单片机60包括：两个定时器41，61(即定时器1，定时器2)，计数时钟42、CPU 43、RAM 44、显示单元45以及串口46，其中每个定时器41，61还分别包括缓冲器。简要而言，定时器41接收来自ASIC芯片30内的容栅信号处理电路24的ADSO信号以及来自ASIC芯片30内的时钟分频电路22的CLK512信号，定时器41以计数时钟42提供的时钟频率作为计数频率，并且根据ADSO信号和CLK512信号来进行计数，以得到容栅传感器10的栅极在一个栅距内的位置当量(这与上文中结合图4描述的计数方式相同)；定时器61也接收ADSO信号和CLK512信号，定时器61根据这两个信号执行加1或减1操作，以得到容栅传感器10的栅极移动的栅距数。在此基础上，CPU 43可以根据容栅传感器10的栅极在一个栅距内的位置当量以及移动的栅距数来计算总的绝对位移当量，进而得到总的绝对位移值。根据本发明的一个实施例，该单片 机60的工作流程如下：
1)单片机60中的定时器41以计数时钟42提供的时钟频率(例如，6MHz)作为计数频率，并且同时接收ADSO信号以及CLK512信号。当定时器41监测到CLK512信号的上升沿时，将计数清零；当定时器41监测到ADSO信号的上升沿时，将当前计数写入其缓冲器，并且定时器41还发送中断标记信号到CPU 43。
同时，单片机60中的另一定时器61也接收ADSO信号以及CLK512信号，定时器61根据CLK512信号的相邻两个上升沿之间是否出现ADSO信号的上升沿以及出现几个ADSO信号的上升沿来进行加减计数操作(其中，如果在CLK512信号的相邻两个上升沿之间没有出现ADSO信号的上升沿或者ADSO信号的上升沿出现两次，则表示容栅传感器的栅极跨栅距移动)。具体而言，定时器61在监测到CLK512信号的上升沿时执行加1操作；在监测到ADSO信号的上升沿时执行减1操作，并将当前计数写入其缓冲器，该计数表示当前容栅传感器10的栅极移动的栅距数(其中，定时器61的初始值为0)。
2)CPU 43在接收到中断标记信号(即，由ADSO信号的上升沿触发的中断标记信号)后执行如下操作：
210)读取定时器41的缓冲器中的数据，即容栅传感器10的栅极在一个栅距内的位置当量A n；同时，读取定时器61的缓冲器中的数据，即容栅传感器10的栅极移动的栅距数N n。
220)执行以下计算，以获得超过一个栅距的总绝对位移当量L n：
L n＝A n+N n×M       (1)
其中，M表示每个栅距对应的分辨当量(如上文所述，当计数时钟42提供的时钟频率为6MHz时，M＝20000)。
230)将容栅传感器10的栅极的总绝对位移当量L n转换成总实际位移值(或称总绝对位移值)。
240)将容栅传感器10的栅极的总绝对位移值输出至显示单元45以及串口46，由显示单元45、串口46输出。这样，实现了高分辨率、高精度的大量程位移测量。
从上述方案可见，定时器41和定时器61均在ADSO信号的上升沿向各自的缓冲器写入当前计数，随后CPU 43在接收到由ADSO信号的上升沿触发的中断标记信号之后分别从两个缓冲器读取数据进行后续处理，这 样保证了从定时器41的缓冲器和从定时器61的缓冲器所读取的数据是同步的。本领域技术人员应理解，尽管在上文中没有提到，但定时器61在监测到ADSO信号的上升沿时，除了执行减1操作和将当前计数写入缓冲器，也可以向CPU 43发送中断标记信号，因此，CPU 43可以在接收到来自定时器41或定时器61的、由ADSO信号的上升沿触发的中断标记信号后，从两个缓冲器中读取数据并进行后续的处理。
在另一个实施例中，利用信号的下降沿执行上述流程。当定时器41监测到CLK512信号的下降沿时，将计数清零；并且当定时器41监测到ADSO信号的下降沿时，将定时器当前计数写入其缓冲器。同时，当定时器61监测到CLK512信号的下降沿时，执行加1操作；当监测到ADSO信号的下降沿时执行减1操作，并将当前计数写入其缓冲器。其中，当监测到ADSO信号的下降沿时，由定时器41或定时器61或者由它们两个将中断标记信号发送至CPU 43。CPU 43在接收到由ADSO信号的下降沿触发的中断标记信号之后从两个缓冲器读取数据进行后续处理，这样也保证了从定时器41的缓冲器和从定时器61的缓冲器读取的数据是同步的。
在另一个实施例中，定时器41和61也可以不使用缓冲器，在监测到ADSO上升沿时分别将当前计数直接发送到CPU 43，并由CPU 43进行处理。在又一个实施例中，CPU 43在接收到中断标记信号之后将定时器41和61的缓冲器中的数据存储到RAM 44中，或者将定时器41和61直接发送来的数据存储到RAM 44中，随后再对RAM 44中存储的数据进行处理，计算出容栅传感器10的栅极的总绝对位移值。此外，在采用ARM单片机的情况下，DMA通路可以直接将定时器41和61的缓冲器中的数据存储到RAM 44中，CPU 43可以根据接收到的中断标记信号，从RAM 44中读取最近存入的数据(即，来自定时器41的、容栅传感器10的栅极在一个栅距内的位置当量，以及来自定时器61的、容栅传感器10的栅极移动的栅距数)进行处理。
在进一步的实施例中，参见图7，在步骤230之前，即在转换操作之前，CPU 43还对容栅传感器10的栅极的总绝对位移当量L n进行数字化滤波处理，以得到稳定的数据(参见步骤221)。在步骤230之后，即在转换操作之后，CPU 43还对容栅传感器10的栅极的总绝对位移值执行栅距内的偏差修正(参见步骤231)，接着执行栅距间的偏差修正(参见步骤232)。其中，栅距间的偏差修正可以采用以栅距步长为校准当量的标定修 正方式，对相同栅距位置的周期信号进行栅距误差修正，从而实现对容栅传感器栅极的制造误差的修正。
在上述位移测量系统的实施例(用于测量栅极移动超过一个栅距的总绝对位移值)中，使用定时器61对栅极移动的栅距数进行计数。然而，本领域技术人员应理解，其他一些计数方法也是适用的。例如，在另一个实施例中，可以使用两个计数器分别监测CLK512信号和ADSO信号，其中一个计数器在监测到CLK512信号的上升沿时执行加1计数并写入相应的缓冲器，另一个计数器在监测到ADSO信号的上升沿时执行加1计数并写入相应缓冲器，此外，ADSO信号的上升沿还触发CPU 43读取并比较两个缓冲器中的计数，如果对CLK512信号上升沿的计数比对ADSO信号上升沿的计数多1，则说明CLK512信号的相邻两个上升沿之间没有出现ADSO信号的上升沿(则CPU 43可以对当前的栅极移动的栅距数执行加1操作)，如果少1，则说明CLK512信号的相邻两个上升沿之间出现了两次ADSO信号的上升沿(则CPU 43可以对当前的栅极移动的栅距数执行减1操作，其中栅极移动的栅距数的初始值为0)。
为实现大量程、高分辨率以及高精度的测量，根据本发明的又一个实施例，还提供一种用于传感器装置的位移测量系统，所述传感器装置包括容栅传感器，所述系统利用了传统ASIC芯片的功能，根据传统的ASIC芯片的输出以及单片机定时器的计时(计数)功能来测量容栅传感器栅极的总的实际位移值，尤其适用于容栅传感器在静止后的实际位移测量。
如图8所示，其中的ASIC芯片80与图1中的传统ASIC芯片20类似(除了晶振电路21等，还集成有鉴相及计数电路25，位移数据处理电路26以及串行输出端口27等)。不同在于，图8中的容栅信号处理电路24除了将ADSO信号输送至ASIC芯片80内的鉴相及计数电路25进行鉴相、计数处理之外，还将该ADSO信号输送到图9所示的单片机90，并且时钟分频电路22还向单片机90输出一路与8路驱动信号的周期相同并且与任一路驱动信号的相位相同的CLK512信号。除此之外，图9中的单片机90还接收来自ASIC芯片80的串行输出端口27的输出，包括DATA信号和CLK信号。其中，DATA信号是数据信号，包含由ASIC芯片80根据传统方法(即对ADSO信号通过鉴相、计数、数据处理等操作)生成的容栅传感器10的栅极的总绝对位移值信息(简称位移信息)；CLK信号 为同步时钟信号。传统的数据采集方式为：在CLK信号窄脉冲的下降沿对DATA信号进行采样。
图9所示的单片机90除了包括图4中的那些部件还具有I/O端口91，用于从ASIC芯片80的串行输出端口27接收DATA信号和CLK信号。具体地，根据该实施例，图9中的单片机90的工作流程包括：
1)单片机90通过其I/O端口91接收来自串行输出端口27的CLK信号和DATA信号。同时，单片机90中的定时器41接收ADSO信号以及CLK512信号，与上文中计算容栅传感器10的栅极在一个栅距内的位置当量方法相同，定时器41以计数时钟42提供的时钟频率(例如，6MHz)作为计数频率，根据ADSO信号以及CLK512信号进行计数，如在监测到CLK512信号的上升沿时重新开始计数并且在监测到ADSO信号的上升沿时将当前计数(即，容栅传感器10的栅极在一个栅距内的位置当量)写入缓冲器(图9中的定时器41的工作原理与图4和图6中的定时器41相同)。
2)CPU 43根据从I/O端口91接收的DATA信号以及CLK信号，得到容栅传感器10的栅极移动的栅距数；并且根据定时器41发送的中断标记信号从定时器41的缓冲器中读取数据，得到容栅传感器10的栅极在一个栅距内的位置当量。CPU 43再根据移动的栅距数和一个栅距内的位置当量得到总绝对位移值。根据本发明的一个实施例，具体来说包括：
21)根据CLK信号的上升沿或下降沿产生的中断信号，读取DATA信号的高、低电平状态，得到DATA信号中包含的位移信息(以0、1表示的多位二进制数，其中低位在前，第12位起即为移动的栅距数)，从中分离出容栅传感器10的栅极移动的栅距数。以及，根据定时器41发送的中断标记信号从定时器41的缓冲器中读取数据，得到容栅传感器10的栅极在一个栅距内的位置当量。
22)根据公式(1)得到容栅传感器10的栅极的总绝对位移当量，即，将从DATA信号中得到的栅距数乘以每个栅距对应的分辨当量(例如，20000)，再与根据定时器41的计数得到的容栅传感器10的栅极在一个栅距内的位置当量相加，从而得到容栅传感器10的栅极的总绝对位移当量。
23)将容栅传感器栅极的总绝对位移当量转换成总绝对位移值。
24)将容栅传感器10的栅极的总绝对位移值输出至显示单元45以及串口46，由显示单元45以及串口46进行输出。这样，实现了高分辨率、 高精度的大量程位移测量。
与上文给出的一些方案类似，在定时器41中也可以不使用缓冲器。另外，与上文给出的一些方案类似，RAM 44可以用来存储缓冲器中的数据，以及CPU 43在处理过程中产生的数据等。
与上文给出的一些方案类似，在转换操作(即，将容栅传感器10的栅极的总绝对位移当量转换成总绝对位移值)之前，CPU 43可以对容栅传感器10的栅极的总绝对位移当量进行数字化滤波处理，并且在转换操作之后，对容栅传感器10的栅极的总绝对位移值执行栅距内的偏差修正和栅距间的偏差修正。
针对大量程、高分辨率以及高精度的角位移测量，根据本发明的又一个实施例，还提供一种用于传感器装置的位移测量系统，所述传感器装置包括两个容栅传感器，下面将参照图10和图11进行描述。
在本实施例中，要用到两个容栅传感器，一个粗分容栅传感器11和一个细分容栅传感器12(关于利用粗分、细分容栅传感器的组合来测量大角度范围的绝对位置的描述可以参见申请号为CN200710050658.3的中国专利申请)，其中，粗分传感器在一个圆周上具有一个栅距(即，一个栅距等于圆周全量程360°)，细分传感器在一个圆周上具有多个栅距(例如，20个)；
图10中示出本实施例的ASIC芯片100，其集成有晶振电路21，时钟分频电路22，8路驱动及模拟开关信号生成电路23(需要注意的是，在本实施例中，8路驱动信号用于驱动粗分容栅传感器11和细分容栅传感器12)，以及两个容栅信号处理电路101和102；所述两个容栅信号处理电路101，102分别接收来自粗分传感器11的输出信号CSI1和来自细分传感器12的输出信号CSI2，并且分别向图11中的单片机110输出ADSO1信号和ADSO2信号；另外，时钟分频电路22向图11中的单片机110输出一路与8路驱动信号的周期相同并且与任一路驱动信号的相位相同的CLK512信号。
图11中的单片机110包括两个相同的定时器111和112(即，定时器1和定时器2)；其中，定时器111接收来自容栅信号处理电路101的ADSO1信号和来自时钟分频电路22的CLK512信号，定时器112接收来自容栅信号处理电路102的ADSO2信号和来自时钟分频电路22的CLK512信 号。根据本发明的一个实施例，单片机110的工作流程如下：
1)与上文描述的用于获得容栅传感器的栅极在一个栅距内的位置当量的方法相同，定时器111以计数时钟42提供的时钟频率(例如，6MHz)作为计数频率，并且根据ADSO1信号和CLK512信号来进行计数，以得到粗分容栅传感器11的栅极在一个栅距内的位置当量；定时器112同样以计数时钟42提供的时钟频率作为计数频率，并且根据ADSO2信号和CLK512信号来进行计数，以得到细分容栅传感器12的栅极在一个栅距内的位置当量。根据本发明的一个实施例，定时器111本身包括缓冲器，定时器111在监测到CLK512信号的上升沿时从零开始计数，在监测到ADSO1信号的上升沿时将当前计数写入其缓冲器，该计数表示粗分容栅传感器11的栅极在一个栅距内的位置当量；定时器112也包括缓冲器，定时器112在监测到CLK512信号的上升沿时从零开始计数，在监测到ADSO2信号的上升沿时将当前计数写入其缓冲器，该计数表示细分容栅传感器12的栅极在一个栅距内的位置当量。定时器111或定时器112可以在监测到CLK512信号的上升沿时向CPU 43发送中断标记信号，以使CPU 43能够从定时器111和定时器的缓冲器读取同步的数据。
2)CPU 43接收到来自定时器111或定时器112的、由CLK 512信号的上升沿触发的中断标记信号之后，执行以下操作：
21)CPU从定时器111的缓冲器中读取数据并且从定时器112的定时器中读取数据，这两个数据分别是粗分容栅传感器11的栅极在一个栅距内的位置当量和细分容栅传感器12的栅极在一个栅距内的位置当量。
22)根据粗分容栅传感器11的栅极在一个栅距内的位置当量，确定细分容栅传感器12的栅极移动的栅距数。
例如，假设每个栅距对应的分辨当量为20000，则在一个圆周上，对粗分容栅传感器11相应的测量数据而言，20000/20＝1000；即0～999对应细分容栅传感器12的第0个栅距位置(移动的栅距数为0)，且1000～1999对应细分容栅传感器12的第1个栅距位置，以此类推。由此，可以根据粗分容栅传感器11的栅极在一个栅距内的位置当量来确定细分容栅传感器栅极移动的栅距数。
23)参见公式(1)，将该栅距数乘以每栅距对应的分辨当量(如20000)再与细分容栅传感器12的栅极在一个栅距内的位置当量相加，得到细分容栅传感器12的栅极在圆周范围内的总绝对位置当量。
24)对细分容栅传感器12的栅极在圆周范围内的总绝对位置当量做转换(即乘以当量系数18/20000)，得到细分容栅传感器12的栅极的总绝对位移值(即实际位置角度值)。
25)将总绝对位移值输出至显示单元45以及串口46，由显示单元45以及串口46输出。
上述的定时器111和定时器112具有其自己的缓冲器，然而在其他实施例中，也可以不使用缓冲器。在定时器111和112没有缓冲器的实施例中，当定时器111监测到ADSO1信号的上升沿时，可以将当前计数直接发送至CPU 43并由CPU 43存储到RAM 44；当定时器112监测到ADSO2信号的上升沿时，可以将当前计数直接发送至CPU 43并由CPU 43存储到RAM 44。当CPU 43接收到来自定时器111或者定时器112的、由CLK512信号的上升沿触发的中断标记信号时，从RAM中取出这两个计数，并进行后续处理。此外，在采用ARM单片机的实施例中，DMA通路可以直接将定时器111和112的缓冲器中的数据存储到RAM 44中，CPU 43可以根据接收到的中断标记信号，从RAM 44中提取最近存入的数据进行处理。
本领域技术人员应理解，在另一个实施例中，定时器111和定时器112也可以根据CLK512信号的下降沿来将计数清零，并且分别根据ADSO1信号、ADSO2信号的下降沿来向缓冲器写入当前计数，并且可以在监测到CLK512信号的上升沿(或下降沿)时向CPU 43发送中断标记信号。在其他实施例中，定时器111可以在监测到ADSO1信号的上升沿时向CPU 43发送中断标记信号，定时器112可以在监测到ADSO2信号的上升沿时向CPU 43发送中断标记信号。
另外，在进一步的实施例中，CPU 43在转换操作前还对细分容栅传感器12的栅极在圆周范围内的总绝对位置当量进行数字化滤波处理，并且在转换操作后对总绝对位移值进行栅距内以及栅距间的偏差修正。
尽管在上文中将粗分传感器描述为在一个圆周上具有一个栅距并且将细分传感器描述为在一个圆周上具有多个栅距，即位移测量系统能够实现整个圆周上的角度测量，但应理解，该位移测量系统也适用于扇形角度的测量，在这种情况下，要求细分传感器在粗分传感器的一个栅距内具有N个栅距(N为整数且N≥2)。此外，除了角度，图10和图11所示的位移测量系统也能用于长度的绝对测量。
以上给出了三种针对大量程、高分辨率以及高精度的位移测量系统。其中，图3和图6所示的位移测量系统由于无需用到传统的鉴相及计数电路25、位移数据处理电路26等，因此占用的空间较小，并且该系统适用于运动中和静止后的位移测量；图8和图9所示的位移测量系统可以利用现有的ASIC芯片进行制造，与其他位移测量系统相比实现起来较为简单，但占用空间较大，这种系统主要适用于静止后的位移测量；图10和图11所示的位移测量系统适用于角位移和线位移的测量，既可以在运动中进行测量也可以在静止后测量。采用本发明提供的这些用于传感器装置的位移测量系统，在继承了传统鉴相型容栅传感器规模化生产技术的基础上，可以将鉴相型容栅传感器测量技术实现低成本性能提升，并且提高了测量的分辨率和精度。
本领域技术人员应理解，尽管在上文中使用单片机的内部计数时钟42来实现定时器的计时和计数，但在其他实施例中，也可以使用单片机的外部时钟来提供时钟频率。另外，尽管上文以ASIC芯片和单片机为例进行描述，即将其作为两个部件分开来进行描述，然而在其他实施例中，单片机也可以集成在ASIC芯片中，或者可以将ASIC芯片集成在单片机上，或者将两者集成在一起，可以集成在同一个芯片上，也可以集成在多个芯片上。
本领域技术人员还应理解，除了单片机，还可以采用具有计算功能的其他数字处理装置来实现本发明。
本领域技术人员还应理解，除了容栅传感器之外，本发明提供的位移测量系统也适用于其他的位移传感器，例如，除容栅传感器之外的其他电容式传感器、感应同步器、光栅传感器等。这些位移传感器的工作原理与容栅传感器类似——驱动信号为周期性变化的电压信号，经位移传感器耦合调制后其时间变化周期对应传感器栅距变化的空间周期，并且输出的信号能够通过鉴相的方式获得与栅距位置对应的并且与初始驱动信号有电相位差的同周期方波信号。
此外，尽管上文以接收多路(8路)驱动信号的容栅传感器为例描述了本发明，但需要注意的是，接收1路驱动信号的位移传感器也适用于本发明，在这种情况下，驱动信号生成电路23可以仅输出一路驱动信号，时钟分频电路22输出的CLK512信号与该驱动信号周期相同并且相位相 同。在进一步的实施例中，CLK512信号与驱动信号的周期或相位可能不完全相同，例如，周期可以呈倍数关系，相位可以相反或者具有其他对应关系。
应注意到一些示例性方法被描绘为流程图。虽然流程图将操作表述为顺序执行，但可以理解的是，许多操作可以并行、同时或同步地执行。另外，可以重新排列操作的顺序。处理可以在操作完成时终止，但是也可以具有并未包括在图中或实施例中的另外的步骤。
上述方法可以通过硬件、软件、固件、中间件、伪代码、硬件描述语言或者它们的任意组合来实现。当以软件、固件、中间件或伪代码实施时，用来执行任务的程序代码或代码分段可以被存储在计算机可读介质中，诸如存储介质，处理器可以执行该任务。
应理解，软件实现的示例性实施例通常在一些形式的程序存储介质上进行编码或者在一些类型的传输介质上实现。程序存储介质可以是任意的非瞬态存储介质，诸如磁盘(例如，软盘或硬盘)或光盘(例如，紧凑盘只读存储器或“CD ROM”)，并且可以是只读的或者随机访问的。类似地，传输介质可以是双绞线、同轴线缆、光纤，或者本领域已知的一些其它适用的传输介质。
虽然本发明已经通过优选实施例进行了描述，然而本发明并非局限于这里所描述的实施例，在不脱离本发明范围的情况下还包括所做出的各种改变以及变化。

Claims (26)

  1. 一种用于传感器装置的位移测量系统，所述传感器装置包括第一位移传感器(10，12)，所述位移测量系统包括：
    驱动信号生成电路(23)，用于向所述第一位移传感器(10，12)输出驱动信号；
    第一信号处理电路(24，102)，用于接收来自所述第一位移传感器(10，12)的信号并且输出第一ADSO信号；以及
    计算设备(40，60，90，110)，包括第一定时器(41，112)；
    其中，所述第一定时器(41，112)用于接收CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号进行计时或计数；其中，所述CLK512信号是与所述驱动信号的周期和相位相关的方波信号。
  2. 根据权利要求1所述的位移测量系统，还包括：
    时钟分频电路(22)，用于向所述驱动信号生成电路(23)输出时钟信号以及输出所述CLK512信号。
  3. 根据权利要求1或2所述的位移测量系统，所述计算设备(40，60，90，110)还包括：
    处理器(43)，用于将所述第一定时器(41，112)通过计时或计数得到的数据转换为所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值。
  4. 根据权利要求3所述的位移测量系统，还包括：
    计数时钟(42)；
    其中，所述第一定时器(41，112)用于以所述计数时钟(42)提供的时钟频率根据所述CLK512信号和所述第一ADSO信号进行计时或计数。
  5. 根据权利要求4所述的位移测量系统，其中，所述第一定时器(41，112)用于在监测到所述CLK512信号的上升沿时以所述计数时钟(42) 提供的时钟频率从零开始计时或计数，以及在监测到所述第一ADSO信号的上升沿时将当前时间或当前计数发送至所述处理器(43)。
  6. 根据权利要求4所述的位移测量系统，所述第一定时器(41，112)还包括：
    第一缓冲器；
    其中，所述第一定时器(41，112)用于在监测到所述CLK512信号的上升沿时以所述计数时钟(42)提供的时钟频率从零开始计时或计数，以及在监测到所述第一ADSO信号的上升沿时将当前时间或当前计数写入所述第一缓冲器；
    所述处理器(43)用于在接收到由所述第一ADSO信号或所述CLK512信号触发的中断标记信号之后，读取所述第一缓冲器中的数据。
  7. 根据权利要求4所述的位移测量系统，其中，所述处理器(43)用于根据所述第一定时器(41，112)通过计时得到的数据以及所述计数时钟(42)提供的时钟频率得出所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量，并且将所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量转换为所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值。
  8. 根据权利要求7所述的位移测量系统，其中，所述处理器(43)还用于对所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量进行数字化滤波处理，以及对所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值进行偏差修正。
  9. 根据权利要求4所述的位移测量系统，其中，所述计数时钟(42)包含在所述计算设备(40，60，90，110)中。
  10. 根据权利要求3所述的位移测量系统，所述计算设备(60)还包括：
    第二定时器(61)，用于接收所述CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号对所述第一位移传 感器(10)的栅极移动的栅距数进行计数；
    其中，所述处理器(43)还用于根据所述第二定时器(61)通过计数得到的数据以及所述第一定时器(41)通过计时或计数得到的数据得出所述第一位移传感器(10)的栅极的总绝对位移值。
  11. 根据权利要求10所述的位移测量系统，其中，所述处理器(43)用于计算下式以得到所述第一位移传感器(10)的栅极的总绝对位移当量L n：
    L n＝A n+N n×M
    其中，A n表示所述第一定时器(41)通过计数得到的数据，N n表示所述第二定时器(61)通过计数得到的数据，M表示所述第一位移传感器(10)的每个栅距对应的分辨当量；以及
    将所述第一位移传感器(10)的栅极的总绝对位移当量L n转换为所述第一位移传感器(10)的栅极的总绝对位移值。
  12. 根据权利要求3所述的位移测量系统，其中，所述驱动信号生成电路(23)和所述第一信号处理电路(24，102)集成在同一芯片中，所述芯片还包括：
    鉴相及计数电路(25)，用于接收所述第一ADSO信号；以及
    串行输出端口(27)，用于输出CLK信号和包括所述第一位移传感器(10)的栅极的位移信息的DATA信号；
    所述计算设备(90)还用于接收所述CLK信号和所述DATA信号；
    其中，所述处理器(43)还用于根据所接收的所述CLK信号和所述DATA信号得到所述第一位移传感器(10)的栅极移动的栅距数，以及根据所述第一位移传感器(10)的栅极移动的栅距数和所述第一定时器(41)通过计时或计数得到的数据得出所述第一位移传感器(10)的栅极的总绝对位移值。
  13. 根据权利要求12所述的位移测量系统，其中，所述处理器(43)用于根据所述第一位移传感器(10)的栅极移动的栅距数和所述第一定时器(41)通过计时或计数得到的数据得出所述第一位移传感器(10)的栅极的总绝对位移当量，以及将所述第一位移传感器(10)的栅极的总绝对 位移当量转换为所述第一位移传感器(10)的栅极的总绝对位移值。
  14. 根据权利要求4所述的位移测量系统，所述传感器装置还包括第二位移传感器(11)，其中所述第一位移传感器(12)在所述第二位移传感器(11)的一个栅距内具有多个栅距，所述驱动信号生成电路(23)还用于向所述第二位移传感器(11)输出所述驱动信号，所述位移测量系统还包括：
    第二信号处理电路(101)，用于接收来自所述第二位移传感器(11)的信号并且输出第二ADSO信号；
    所述计算设备(110)还包括：
    第三定时器(111)，用于接收所述第二ADSO信号和所述CLK512信号，以所述计数时钟(42)提供的时钟频率根据所述第二ADSO信号和所述CLK512信号进行计时或计数；
    其中，所述处理器(43)还用于根据所述第三定时器(111)通过计时或计数得到的数据来确定所述第一位移传感器(12)的栅极移动的栅距数，以及根据所述第一位移传感器(12)的栅极移动的栅距数和所述第一定时器(41)通过计时或计数得到的数据得出所述第一位移传感器(12)的栅极的总绝对位移值。
  15. 根据权利要求14所述的位移测量系统，其中，所述第三定时器(111)用于在监测到所述CLK512信号的上升沿时以所述计数时钟(42)提供的时钟频率从零开始计时或计数，以及在监测到所述第二ADSO信号的上升沿时将当前时间或当前计数发送至所述处理器(43)或者记录该当前时间或当前计数。
  16. 根据权利要求1或14所述的位移测量系统，其中，所述第一位移传感器(10，12)以及所述第二位移传感器(11)是容栅传感器。
  17. 根据权利要求1所述的位移测量系统，其中，所述CLK512信号是与所述驱动信号的周期相同并且相位相同的方波信号。
  18. 根据权利要求1所述的位移测量系统，其中，所述计算设备(40， 60，90，110)，所述驱动信号生成电路(23)以及所述第一信号处理电路(24，102)集成在同一芯片中。
  19. 一种用于传感器装置的位移测量方法，所述传感器装置包括第一位移传感器(10，12)，所述位移测量方法包括：
    向所述第一位移传感器(10，12)输出驱动信号；
    接收来自所述第一位移传感器(10，12)的信号，对该信号进行处理，并且输出第一ADSO信号；以及
    接收CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号进行计时或计数；其中，所述CLK512信号是与所述驱动信号的周期和相位相关的方波信号。
  20. 根据权利要求19所述的位移测量方法，还包括：
    将通过所述计时或计数得到的第一数据转换为所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值。
  21. 根据权利要求19或20所述的位移测量方法，其中，根据所述CLK512信号和所述第一ADSO信号进行计时或计数包括：
    在监测到所述CLK512信号的上升沿时以时钟频率从零开始计时或计数，以及
    在监测到所述第一ADSO信号的上升沿时发送或记录当前时间或当前计数。
  22. 根据权利要求21所述的位移测量方法，其中，将通过所述计时得到的第一数据转换为所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值包括：
    根据通过所述计时得到的第一数据以及所述时钟频率得出所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量；
    将所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量转换为所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值。
  23. 根据权利要求22所述的位移测量方法，还包括：
    对所述第一位移传感器(10，12)的栅极在一个栅距内的位置当量进行数字化滤波处理；以及
    对所述第一位移传感器(10，12)的栅极在一个栅距内的绝对位移值进行偏差修正。
  24. 根据权利要求20所述的位移测量方法，还包括：
    接收所述CLK512信号和所述第一ADSO信号，并且根据所述CLK512信号和所述第一ADSO信号对所述第一位移传感器(10)的栅极移动的栅距数进行计数；以及
    根据通过对所述第一位移传感器(10)的栅极移动的栅距数进行计数得到的第二数据和所述第一数据得出所述第一位移传感器(10)的栅极的总绝对位移值。
  25. 根据权利要求24所述的位移测量方法，包括：
    通过下式计算得到所述第一位移传感器(10)的栅极的总绝对位移当量Ln：
    L n＝A n+N n×M
    其中，A n表示所述第一数据，N n表示所述第二数据，M表示所述第一位移传感器(10)的每个栅距对应的分辨当量；以及
    将所述第一位移传感器(10)的栅极的总绝对位移当量L n转换为所述第一位移传感器(10)的栅极的总绝对位移值。
  26. 根据权利要求21所述的位移测量方法，所述传感器装置还包括第二位移传感器(11)，其中所述第一位移传感器(12)在所述第二位移传感器(11)的一个栅距内具有多个栅距，所述位移测量方法还包括：
    向所述第二位移传感器(11)输出所述驱动信号；
    接收来自所述第二位移传感器(11)的信号，对该信号进行处理，并且输出第二ADSO信号；
    接收所述第二ADSO信号和所述CLK512信号，以所述时钟频率根据所述第二ADSO信号和所述CLK512信号进行计时或计数，其中通过根据所述第二ADSO信号和所述CLK512信号进行计时或计数得到第三数据；
    根据所述第三数据来确定所述第一位移传感器(12)的栅极移动的栅 距数；以及
    根据所述第一位移传感器(12)的栅极移动的栅距数和所述第一数据得出所述第一位移传感器(12)的栅极的总绝对位移值。
PCT/CN2019/079193 2018-04-23 2019-03-22 用于传感器装置的位移测量系统和位移测量方法 WO2019205847A1 (zh)

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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4420754A (en) * 1977-12-09 1983-12-13 Stiftelsen Institutet For Mikrovagsteknik Vid Tekniska Hogskolan Measuring device for capacitive determination of the relative position of two with respect to one another moveable parts
CN1036261A (zh) * 1988-03-31 1989-10-11 重庆大学 微机对脉冲信号细分和辨向的新方法
CN1086309A (zh) * 1992-09-14 1994-05-04 株式会社三丰 用于绝对位置测量的测量装置
CN1415934A (zh) * 2002-06-20 2003-05-07 赵飙 滚动电容性位移测量传感器及其在电子数显量具上的应用
CN2645032Y (zh) * 2003-08-26 2004-09-29 吴子铭 采用相位插补和数字化电路的容栅测量装置
CN101206126A (zh) * 2007-11-26 2008-06-25 桂林市晶瑞传感技术有限公司 用于绝对位置测量的绝对型圆容栅传感器测量装置
CN201754082U (zh) * 2010-03-18 2011-03-02 杭州工具量具有限公司 一种数显发声卡尺及接口结构
CN102928677A (zh) * 2012-11-09 2013-02-13 湖南航天远望测控技术有限公司 一种纳米级脉冲信号采集方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55112512A (en) * 1979-02-21 1980-08-30 Kiyapakon Instr Kk Capacitive displacement gauge
JPS6093312A (ja) * 1983-10-27 1985-05-25 Mitsutoyo Mfg Co Ltd 容量式変位測定機
JPS6093312U (ja) * 1983-11-30 1985-06-26 松下電工株式会社 パラボラアンテナの仰角調整装置
JPS60242317A (ja) * 1984-03-17 1985-12-02 ザルトリウス・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング 差動コンデンサ形測定センサのための回路装置
JPS62239019A (ja) * 1986-04-11 1987-10-19 Mitsutoyo Corp 容量型位置測定トランスデユ−サ
US4845496A (en) * 1987-09-24 1989-07-04 Dower Roger G Electro-optical displacement sensor
DE4308462A1 (de) * 1993-03-17 1994-09-22 Vdo Schindling Anordnung zur Signalverarbeitung für Absolutwertsensoren mit periodischen Strukturen, insbesondere für Positions- und Winkelsensoren
EP0836076B1 (fr) * 1996-10-11 2002-05-22 Brown & Sharpe Tesa S.A. Dispositif de mesure de dimension capacitif
JP4233679B2 (ja) * 1999-04-26 2009-03-04 株式会社ミツトヨ 変位測定装置
US6619470B2 (en) * 2002-01-17 2003-09-16 Fmc Technologies, Inc. Method and system for vibratory conveyor control
CN101949682B (zh) * 2010-08-14 2012-10-24 桂林广陆数字测控股份有限公司 绝对位置测量容栅位移测量方法、传感器及其运行方法
CN208171165U (zh) * 2018-04-23 2018-11-30 桂林市晶瑞传感技术有限公司 用于传感器装置的位移测量系统

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4420754A (en) * 1977-12-09 1983-12-13 Stiftelsen Institutet For Mikrovagsteknik Vid Tekniska Hogskolan Measuring device for capacitive determination of the relative position of two with respect to one another moveable parts
CN1036261A (zh) * 1988-03-31 1989-10-11 重庆大学 微机对脉冲信号细分和辨向的新方法
CN1086309A (zh) * 1992-09-14 1994-05-04 株式会社三丰 用于绝对位置测量的测量装置
CN1415934A (zh) * 2002-06-20 2003-05-07 赵飙 滚动电容性位移测量传感器及其在电子数显量具上的应用
CN2645032Y (zh) * 2003-08-26 2004-09-29 吴子铭 采用相位插补和数字化电路的容栅测量装置
CN101206126A (zh) * 2007-11-26 2008-06-25 桂林市晶瑞传感技术有限公司 用于绝对位置测量的绝对型圆容栅传感器测量装置
CN201754082U (zh) * 2010-03-18 2011-03-02 杭州工具量具有限公司 一种数显发声卡尺及接口结构
CN102928677A (zh) * 2012-11-09 2013-02-13 湖南航天远望测控技术有限公司 一种纳米级脉冲信号采集方法

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