WO2019178916A1 - 一种二维AlN材料及其制备方法与应用 - Google Patents

一种二维AlN材料及其制备方法与应用 Download PDF

Info

Publication number
WO2019178916A1
WO2019178916A1 PCT/CN2018/084543 CN2018084543W WO2019178916A1 WO 2019178916 A1 WO2019178916 A1 WO 2019178916A1 CN 2018084543 W CN2018084543 W CN 2018084543W WO 2019178916 A1 WO2019178916 A1 WO 2019178916A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
layer
dimensional
aln
graphene
Prior art date
Application number
PCT/CN2018/084543
Other languages
English (en)
French (fr)
Inventor
王文樑
李国强
郑昱林
Original Assignee
华南理工大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华南理工大学 filed Critical 华南理工大学
Priority to US16/980,059 priority Critical patent/US11417522B2/en
Publication of WO2019178916A1 publication Critical patent/WO2019178916A1/zh

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0209—Pretreatment of the material to be coated by heating
    • C23C16/0218—Pretreatment of the material to be coated by heating in a reactive atmosphere
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/301—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C23C16/303—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/04—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings of inorganic non-metallic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/04—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings of inorganic non-metallic material
    • C23C28/046—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings of inorganic non-metallic material with at least one amorphous inorganic material layer, e.g. DLC, a-C:H, a-C:Me, the layer being doped or not
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02444—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02609—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/09—Devices sensitive to infrared, visible or ultraviolet radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1852—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising a growth substrate not being an AIIIBV compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1856—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising nitride compounds, e.g. GaN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • H01L31/1896—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates for thin-film semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1606—Graphene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET

Definitions

  • the invention relates to an AlN material, in particular to a two-dimensional AlN material and a preparation method and application thereof.
  • Two-dimensional layered materials typically have unique mechanical, thermal, optical, electrical, and magnetic properties relative to bulk materials.
  • the bulk AlN material is a direct bandgap semiconductor with a band gap width of 6.2eV, stable physicochemical properties, high thermal conductivity and high electron saturation speed. It is an ultraviolet light emitting diode and an ultraviolet detector tube.
  • the ideal material for optoelectronic devices due to the excellent properties of AlN materials, AlN nanomaterials are particularly prominent. AlN nanowires (one-dimensional semiconductors) have been successfully prepared in experiments and due to their wide bandgap and hexagonal geometry at the nanoscale. Widely used in electronic and optical electronics. Although 3D/1D AlN materials have been extensively studied, there is still a lack of research on 2D AlN materials and their preparation.
  • the object of the present invention is to provide a two-dimensional AlN material and a preparation method and application thereof, which are successfully prepared by using a van der Wafer epitaxy method between graphene and a substrate layer.
  • a two-dimensional AlN material of the atomic layer is provided.
  • a method for preparing a two-dimensional AlN material comprising a graphene layer bonded to a substrate layer by van der Waals force, a two-dimensional AlN structure grown between the substrate layer and the graphene layer, and an AlN layer grown on the graphene layer Specifically, the following steps are included:
  • Substrate annealing treatment the substrate obtained in the step (3) is placed in an annealing chamber, and the substrate is annealed at 950 to 1050 ° C to obtain an atomized level flat substrate surface;
  • the MOCVD process is used to grow a two-dimensional AlN layer.
  • the specific process is as follows: at a substrate temperature of 900-1000 ° C, a solution of (trimethyl aluminum) TMAl and NH 3 acts on the surface of the substrate to allow Al&N atoms to enter the graphite.
  • AlN is formed between the olefin layer and the substrate layer, and the flow rate of TMAl is 200-300 sccm, the flow rate of NH 3 is 10-30 sccm, and the time of introducing TMAl and NH 3 is 40-60 s to obtain a two-dimensional AlN material.
  • the substrate is a Si substrate, a sapphire substrate or a MgAl 2 O 4 oxide substrate.
  • the crystal orientation of the step (1) is specifically selected as follows: if the substrate is a Si substrate, the epitaxial plane is 0.2 to 1° in the (111) plane (110) direction, and the crystal epitaxial orientation relationship is: The (0002) plane of AlN is parallel to the (111) plane of Si.
  • the substrate is subjected to a surface cleaning treatment according to the step (2), specifically: the substrate is placed in water at room temperature for ultrasonic cleaning for 5 to 10 minutes, the surface of the substrate is removed, and the surface is removed by ethanol to remove the surface. Organic matter; the cleaned substrate was blown dry with high purity dry nitrogen.
  • the process of transferring the graphene layer to the substrate layer in the step (3) is specifically: releasing the graphene layer into water, removing the bubbles on the surface of the graphene by using the defoaming film, and removing the bubble-shaped graphene film.
  • the layer is transferred to the target substrate.
  • the annealing treatment in step (4) has a time of 0.5 to 1 h.
  • a two-dimensional AlN material produced by the above-described preparation method is A two-dimensional AlN material produced by the above-described preparation method.
  • the two-dimensional AlN material is a substrate layer (1), a two-dimensional AlN structure layer (2), a graphene layer (3), and an AlN layer (4) in order from bottom to top, and the two-dimensional AlN structure layer (2) ) is grown between the substrate layer (1) and the graphene layer (3), and the AlN layer (4) is grown on the graphene layer (3).
  • the substrate layer has a thickness of 420 to 550 ⁇ m;
  • the two-dimensional AlN structure layer has a thickness of 2 to 5 nm;
  • the graphene layer has a thickness of 2 to 5 nm;
  • the AlN layer has a thickness of 300 to 400 nm;
  • the two-dimensional AlN material described above is used in the preparation of HEMT devices, deep ultraviolet detectors or deep ultraviolet LEDs.
  • the present invention has the following advantages and benefits:
  • the present invention successfully prepares a two-dimensional AlN material of 1-3 atomic layers between graphene and a substrate layer by means of van der Wafer epitaxy, and the obtained two-dimensional AlN material can be widely applied to HEMT devices, deep ultraviolet detectors or Deep ultraviolet LED and other fields.
  • the present invention performs a transfer process of a graphene layer on a substrate layer, which shortens the time required for directly growing the graphene layer, and is low in cost.
  • Example 1 is a schematic cross-sectional view of a two-dimensional AlN prepared in Example 1.
  • Example 2 is a Raman spectrum in a two-dimensional AlN prepared in Example 1.
  • Example 3 is a scanning electron microscope characterization image of the two-dimensional AlN prepared in Example 1.
  • Example 4 is an energy spectrum of two-dimensional AlN prepared in Example 1.
  • a method for preparing a two-dimensional AlN material grown on a Si substrate comprising the steps of:
  • Substrate and its crystal orientation The Si substrate is used, and the (111) plane (110) direction is 0.2° as the epitaxial plane.
  • the crystal epitaxial orientation relationship is: the (0002) plane of AlN is parallel to Si ( 111) face;
  • Substrate annealing treatment the Si substrate obtained in the step (3) is placed in an annealing chamber, and the Si substrate is annealed at 950 ° C for 0.5 h to obtain an atomized level Si substrate surface;
  • a two-dimensional AlN layer is grown by a MOCVD process.
  • the specific process is as follows: after H 2 is introduced , at a substrate temperature of 900 ° C, TMAl and NH 3 are applied to the surface of the substrate, so that Al&N atoms enter between the graphene layer and the substrate layer and react to form AlN, and TMAl is maintained.
  • the flow rate is 200sccm
  • the NH 3 flow rate is 10sccm
  • the time for introducing TMAl and NH 3 is 40s, and a two-dimensional AlN material is obtained;
  • the two-dimensional AlN material grown on the Si substrate prepared in this embodiment includes a Si substrate 1, a graphene layer 3 bonded to the Si substrate layer by van der Waals force, and grown on the Si substrate layer.
  • the thicknesses of the Si substrate layer, the two-dimensional AlN structure layer, the graphene layer, and the AlN layer were 420 ⁇ m, 2 nm, 4 nm, and 300 nm, respectively.
  • FIG Raman spectra seen from the drawing, in 1354cm -1, 1588cm -1 and 2697cm -1, respectively, corresponding to peak D graphene (about 1350cm -1), G peak (about 1587 cm -1) and 2D peak (about 2700cm -1), confirmed the presence of graphene.
  • FIG 3 is a scanning electron microscope characterization image of the two-dimensional AlN prepared in the present embodiment. It can be seen that a layered two-dimensional AlN is epitaxially grown on the Si substrate/graphene layer, and the surface wrinkle region may be due to graphene. Defects and unevenness.
  • Fig. 4 is an energy spectrum diagram of the two-dimensional AlN prepared in the present embodiment. It can be seen that the presence of C, N, Al and Si elements in the epitaxial film confirms the existence of two-dimensional AlN and graphene.
  • a method for preparing a two-dimensional AlN material grown on a sapphire substrate comprising the steps of:
  • a c-plane sapphire substrate is used with an epitaxial plane with a (0001) plane offset (1-100) direction of 0.6°.
  • the crystal epitaxial orientation relationship is: (0002) plane parallel of AlN On the (0001) side of sapphire;
  • the specific process is: the sapphire substrate is ultrasonically cleaned at room temperature for 8 minutes in deionized water to remove the smear particles on the surface of the sapphire substrate, and then washed by ethanol to remove surface organic matter.
  • the cleaned sapphire substrate is blown dry with high purity dry nitrogen;
  • Substrate annealing treatment the sapphire substrate obtained in the step (3) is placed in an annealing chamber, and the sapphire substrate is annealed at 1000 ° C for 1 h to obtain an atomically level sapphire substrate surface;
  • a two-dimensional AlN layer is grown by a MOCVD process.
  • the specific process is as follows: after H 2 is introduced , at a substrate temperature of 950 ° C, TMAl and NH 3 are applied to the surface of the substrate, so that Al&N atoms enter between the graphene layer and the substrate layer and react to form AlN, and TMAl is maintained.
  • the flow rate is 300sccm
  • the NH 3 flow rate is 30sccm
  • the time for introducing TMAl and NH 3 is 60s, and a two-dimensional AlN material is obtained;
  • the two-dimensional AlN material grown on the c-plane sapphire substrate prepared in this embodiment comprises a c-plane sapphire substrate, a graphene layer bonded to the c-plane sapphire substrate layer by Van der Waals force, and grown on the c-plane sapphire substrate layer.
  • the thicknesses of the c-plane sapphire substrate layer, the two-dimensional AlN structure layer, the graphene layer, and the AlN layer were 480 ⁇ m, 5 nm, 2 nm, and 400 nm, respectively.
  • test data of the two-dimensional AlN material grown on the sapphire substrate prepared in this embodiment is similar to that of the embodiment 1, and will not be described herein.
  • a method for preparing a two-dimensional AlN material grown on a MgAl 2 O 4 substrate comprising the steps of:
  • the MgAl 2 O 4 substrate is used with the (111) plane (110) direction of 1.0° as the epitaxial plane, and the crystal epitaxial orientation relationship is: the (0002) plane of AlN is parallel to (111) plane of MgAl 2 O 4 ;
  • Substrate annealing treatment The MgAl 2 O 4 substrate obtained in the step (3) is placed in an annealing chamber, and the MgAl 2 O 4 substrate is annealed at 1050 ° C for 0.8 h to obtain atomically leveled MgAl 2 O. 4 substrate surface;
  • a two-dimensional AlN layer is grown by a MOCVD process.
  • the specific process is as follows: after H 2 is introduced , at a substrate temperature of 1000 ° C, TMAl and NH 3 are applied to the surface of the substrate, so that Al&N atoms enter between the graphene layer and the substrate layer and react to form AlN, and TMAl is maintained.
  • the flow rate is 250sccm
  • the NH 3 flow rate is 25sccm
  • the time for introducing TMAl and NH 3 is 50s, and the two-dimensional AlN material is obtained;
  • the thicknesses of the MgAl 2 O 4 substrate, the two-dimensional AlN structural layer, the graphene layer, and the AlN layer were 550 ⁇ m, 4 nm, 5 nm, and 350 nm, respectively.
  • test data of the two-dimensional AlN material grown on the sapphire substrate prepared in this embodiment is similar to that of the embodiment 1, and will not be described herein.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Ceramic Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

本发明公开了一种二维AlN材料及其制备方法与应用，包括以下步骤：(1)衬底以及其晶向的选取；(2)对衬底进行表面清洁处理；(3)石墨烯层转移至衬底层上；(4)衬底退火处理；(5)采用MOCVD工艺通入H 2打开石墨烯层并钝化衬底表面；(6)采用MOCVD工艺生长二维AlN层。本发明的制备方法具有工艺简单、省时高效的优点。同时本发明制备的二维AlN材料可广泛应用于HEMT器件、深紫外探测器或深紫外LED等领域。

Description

一种二维AlN材料及其制备方法与应用 技术领域
本发明涉及AlN材料，具体涉及一种二维AlN材料及其制备方法与应用。
背景技术
2004年，Geim和Novoselov利用机械剥离法成功制备石墨烯并于2010年获得诺贝尔物理学奖。自此，对石墨烯的研究成为物理、化学和材料科学各大领域的热点问题。由于石墨烯二维层状材料展现的新奇性质和巨大的应用前景，其它二维材料也逐渐成为科研人员的研究对象。二维层状材料相对于块体材料而言通常具有独特的力学、热学、光学、电学和磁学性质。
块体AlN材料是直接带隙半导体，带隙宽度达6.2eV，具有稳定的物理化学性质、高的热导率和高的电子饱和速度等优点，是紫外光发光二极和紫外探测器管等光电子器件的理想材料。近几年，由于AlN材料的优良特性而受到广泛关注，其中AlN纳米材料尤为突出，如AlN纳米线(一维半导体)已经在实验中成功制备并由于其宽带隙和六角的几何结构在纳米级电子和光学电子器件中有广泛应用。尽管3D/1D的AlN材料被广泛的研究，目前却仍然缺乏对2D AlN材料及其制备的研究。当钎锌矿结构AlN只有几个原子层厚度时会形成一种2D石墨烯结构，由于量子限域效应，二维AlN材料的带隙会因其厚度变薄而增大，因此可广泛应用于高电子迁移率晶体管(HEMT)器件、深紫外探测器或深紫外LED等领域。因此迫切需要一种有效的方法来制备石墨烯结构的二维AlN材料。
发明内容
为了克服现有技术的上述缺点与不足，本发明的目的在于提供一种二维AlN材料及其制备方法与应用，采用了范德华外延的手段在石墨烯与衬底层间成功制备得到了1～3原子层的二维AlN材料。
本发明的目的通过以下技术方案实现。
一种二维AlN材料的制备方法，包括以范德华力结合在衬底层上的石墨烯层，生长在衬底层和石墨烯层之间的二维AlN结构，生长在石墨烯层之上的AlN层，具体包括以下步骤：
(1)衬底以及衬底晶向的选取；
(2)对衬底进行表面清洁处理；
(3)将石墨烯层转移至衬底层上实现范德华力结合；
(4)衬底退火处理：将步骤(3)所得衬底放入退火室内，在950～1050℃下对衬底进行退火处理，获得原子级平整的衬底表面；
(5)将步骤(4)中所得到的衬底/石墨烯转移至MOCVD生长室内，通入H2打开石墨烯层并钝化衬底表面，具体工艺为：加热衬底温度为900～1000℃，H 2流量保持为80～100sccm，通入H 2的时间为5～10min；
(6)采用MOCVD工艺生长二维AlN层，具体工艺为：在衬底温度为900～1000℃下，通入(三甲基铝)TMAl与NH 3在衬底表面作用，使Al&N原子进入石墨烯层与衬底层之间并反应形成AlN，保持TMAl流量为200～300sccm，NH 3流量为10～30sccm，通入TMAl、NH 3的时间均为40～60s，得二维AlN材料。
优选的，所述衬底为Si衬底、蓝宝石衬底或MgAl 2O 4氧化物衬底。
优选的，步骤(1)所述晶向的选取，具体为：若衬底为Si衬底时，以(111)面偏(110)方向0.2～1°为外延面，晶体外延取向关系为：AlN的(0002)面平行于Si的(111)面。
优选的，步骤(2)所述对衬底进行表面清洁处理，具体为：将衬底放入水中室温下超声清洗5～10分钟，去除衬底表面粘污颗粒，再经过乙醇洗涤，去除表面有机物；清洗后的衬底用高纯干燥氮气吹干。
优选的，步骤(3)所述石墨烯层转移至衬底层上的工艺，具体为：将石墨烯层释放到水中，利用除泡膜去除石墨烯表面的气泡，将除完气泡的石墨烯膜 层转移至目标衬底上。
优选的，步骤(4)所述退火处理的时间为0.5～1h。
由以上所述的制备方法制得的二维AlN材料。
优选的，该二维AlN材料由下至上依次为衬底层(1)、二维AlN结构层(2)、石墨烯层(3)和AlN层(4)，所述二维AlN结构层(2)生长在衬底层(1)和石墨烯层(3)之间，所述AlN层(4)生长在石墨烯层(3)上。
优选的，所述衬底层厚度为420～550μm；
优选的，所述二维AlN结构层厚度为2～5nm；
优选的，所述石墨烯层厚度为2～5nm；
优选的，所述AlN层厚度为300～400nm；
以上所述的二维AlN材料应用于制备HEMT器件、深紫外探测器或深紫外LED中。
与现有技术相比，本发明具有以下优点和有益效果：
(1)本发明利用范德华外延的手段在石墨烯与衬底层间成功制备得到了1～3原子层的二维AlN材料，得到的二维AlN材料可广泛应用于HEMT器件、深紫外探测器或深紫外LED等领域。
(2)本发明在衬底层上进行石墨烯层的转移工艺，缩短了直接生长石墨烯层所耗时间，成本低廉。
(3)本发明提出的制备方法工艺简单、省时高效。
附图说明
图1为实施例1制备的二维AlN的截面示意图。
图2为实施例1制备的二维AlN中的拉曼图谱。
图3为实施例1制备的二维AlN的扫描电镜表征图像。
图4是实施例1制备的二维AlN的能谱图。
具体实施方式
下面结合实施例，对本发明作进一步地详细说明，但本发明的实施方式不 限于此。
实施例1
生长在Si衬底上的二维AlN材料的制备方法，包括以下步骤：
(1)衬底以及其晶向的选取：采用Si衬底，以(111)面偏(110)方向0.2°为外延面，晶体外延取向关系为：AlN的(0002)面平行于Si的(111)面；
(2)对衬底进行表面清洁处理，具体工艺为：将Si衬底放入去离子水中室温下超声清洗5分钟，去除Si衬底表面粘污颗粒，再经过乙醇洗涤，去除表面有机物，清洗后的Si衬底用高纯干燥氮气吹干；
(3)将石墨烯层转移至衬底层上实现范德华力结合，具体为：将石墨烯层释放到去离子水中，利用除泡膜去除石墨烯表面的气泡，将除完气泡的石墨烯膜层转移至Si衬底上；
(4)衬底退火处理：将步骤(3)所得Si衬底放入退火室内，在950℃下对Si衬底进行退火处理0.5h，获得原子级平整的Si衬底表面；
(5)将步骤(4)中所得到的Si衬底/石墨烯转移至MOCVD生长室内，然后通入H2打开石墨烯层并钝化Si衬底表面。具体工艺为：衬底温度为900℃，H 2流量保持为80sccm，通入H 2的时间为5min；
(6)采用MOCVD工艺生长二维AlN层。具体工艺为：通入H 2后，在衬底温度为900℃下，通入TMAl与NH 3在衬底表面作用，使Al&N原子进入石墨烯层与衬底层之间并反应形成AlN，保持TMAl流量为200sccm，NH 3流量为10sccm，通入TMAl、NH 3的时间均为40s，得二维AlN材料；
如图1所示，本实施例制备的生长在Si衬底上的二维AlN材料，它包括Si衬底1，以范德华力结合在Si衬底层上的石墨烯层3，生长在Si衬底层和石墨烯层之间的二维AlN结构2，生长在石墨烯层之上的AlN层4。Si衬底层、二维AlN结构层、石墨烯层和AlN层的厚度分别是420μm，2nm，4nm，300nm。
图2为本实施例制备的二维AlN中的拉曼图谱，由图可见，在1354cm -1，1588cm -1和2697cm -1分别对应着石墨烯的D峰(1350cm -1左右)、G峰(1587 cm -1左右)和2D峰(2700cm -1左右)，证实了石墨烯的存在。
图3是本实施例制备的二维AlN的扫描电镜表征图像，可见，在Si衬底/石墨烯层上外延生长出了层状的二维AlN，表面的皱褶区域可能是由于石墨烯的缺陷和不均匀造成的。
图4是本实施例制备的二维AlN的能谱图。可见，对外延薄膜存在C、N、Al和Si元素，证实了二维AlN和石墨烯的存在。
实施例2
生长在蓝宝石衬底上的二维AlN材料的制备方法，包括以下步骤：
(1)衬底以及其晶向的选取：采用c面蓝宝石衬底，以(0001)面偏(1-100)方向0.6°为外延面，晶体外延取向关系为：AlN的(0002)面平行于蓝宝石的(0001)面；
(2)对衬底进行表面清洁处理，具体工艺为：将蓝宝石衬底放入去离子水中室温下超声清洗8分钟，去除蓝宝石衬底表面粘污颗粒，再依次经过乙醇洗涤，去除表面有机物，清洗后的蓝宝石衬底用高纯干燥氮气吹干；
(3)将石墨烯层转移至衬底层上实现范德华力结合，具体为：将石墨烯层释放到去离子水中，利用除泡膜去除石墨烯表面的气泡，将除完气泡的石墨烯膜层转移至蓝宝石衬底上；
(4)衬底退火处理：将步骤(3)所得蓝宝石衬底放入退火室内，在1000℃下对蓝宝石衬底进行退火处理1h，获得原子级平整的蓝宝石衬底表面；
(5)将步骤(4)中所得到的蓝宝石衬底/石墨烯转移至MOCVD生长室内，然后通入H2打开石墨烯层并钝化蓝宝石衬底表面。具体工艺为：衬底温度为1000℃，H 2流量保持为100sccm，通入H 2的时间为8min；
(6)采用MOCVD工艺生长二维AlN层。具体工艺为：通入H 2后，在衬底温度为950℃下，通入TMAl与NH 3在衬底表面作用，使Al&N原子进入石墨烯层与衬底层之间并反应形成AlN，保持TMAl流量为300sccm，NH 3流量为30sccm，通入TMAl、NH 3的时间均为60s，得二维AlN材料；
本实施例制备的生长在c面蓝宝石衬底上的二维AlN材料，它包括c面蓝宝石衬底，以范德华力结合在c面蓝宝石衬底层上的石墨烯层，生长在c面蓝宝石衬底层和石墨烯层之间的二维AlN结构，生长在石墨烯层之上的AlN层。c面蓝宝石衬底层、二维AlN结构层、石墨烯层和AlN层的厚度分别是480μm，5nm，2nm，400nm。
本实施例制备的生长在蓝宝石衬底上的二维AlN材料测试数据与实施例1相近，在此不再赘述。
实施例3
生长在MgAl 2O 4衬底上的二维AlN材料的制备方法，包括以下步骤：
(1)衬底以及其晶向的选取：采用MgAl 2O 4衬底，以(111)面偏(110)方向1.0°为外延面，晶体外延取向关系为：AlN的(0002)面平行于MgAl 2O 4的(111)面；
(2)对衬底进行表面清洁处理，具体工艺为：将MgAl 2O 4衬底放入去离子水中室温下超声清洗10分钟，去除MgAl 2O 4衬底表面粘污颗粒，再依次经过乙醇洗涤，去除表面有机物，清洗后的MgAl 2O 4衬底用高纯干燥氮气吹干；
(3)将石墨烯层转移至衬底层上实现范德华力结合，具体为：将石墨烯层释放到去离子水中，利用除泡膜去除石墨烯表面的气泡，将除完气泡的石墨烯膜层转移至MgAl 2O 4衬底上；
(4)衬底退火处理：将步骤(3)所得MgAl 2O 4衬底放入退火室内，在1050℃下对MgAl 2O 4衬底进行退火处理0.8h，获得原子级平整的MgAl 2O 4衬底表面；
(5)将步骤(4)中所得到的MgAl 2O 4衬底/石墨烯转移至MOCVD生长室内，然后通入H 2打开石墨烯层并钝化MgAl 2O 4衬底表面。具体工艺为：衬底温度为950℃，H 2流量为保持为90sccm，通入H 2的时间为10min；
(6)采用MOCVD工艺生长二维AlN层。具体工艺为：通入H 2后，在衬底温度为1000℃下，通入TMAl与NH 3在衬底表面作用，使Al&N原子进入 石墨烯层与衬底层之间并反应形成AlN，保持TMAl流量为250sccm，NH 3流量为25sccm，通入TMAl、NH 3的时间均为50s，得二维AlN材料；
本实施例制备的生长在MgAl 2O 4衬底上的二维AlN材料，它包括MgAl 2O 4衬底，以范德华力结合在MgAl 2O 4衬底层上的石墨烯层，生长在MgAl 2O 4衬底层和石墨烯层之间的二维AlN结构，生长在石墨烯层之上的AlN层。MgAl 2O 4衬底、二维AlN结构层、石墨烯层和AlN层的厚度分别是550μm，4nm，5nm，350nm。
本实施例制备的生长在蓝宝石衬底上的二维AlN材料测试数据与实施例1相近，在此不再赘述。
上述实施例为本发明较佳的实施方式，但本发明的实施方式并不受所述实施例的限制，其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化，均应为等效的置换方式，都包含在本发明的保护范围之内。

Claims (10)

  1. 一种二维AlN材料的制备方法，其特征在于，包括以下步骤：
    (1)衬底以及衬底晶向的选取；
    (2)对衬底进行表面清洁处理；
    (3)将石墨烯层转移至衬底层上实现范德华力结合；
    (4)衬底退火处理：将步骤(3)所得衬底放入退火室内，在950～1050℃下对衬底进行退火处理，获得原子级平整的衬底表面；
    (5)将步骤(4)中所得到的衬底/石墨烯转移至MOCVD生长室内，通入H 2打开石墨烯层并钝化衬底表面，具体工艺为：加热衬底温度为900～1000℃，H 2流量保持为80～100sccm，通入H 2的时间为5～10min；
    (6)采用MOCVD工艺生长二维AlN层，具体工艺为：在衬底温度为900～1000℃下，通入TMAl与NH 3在衬底表面作用，使Al&N原子进入石墨烯层与衬底层之间并反应形成AlN，保持TMAl流量为200～300sccm，NH 3流量为10～30sccm，通入TMAl、NH 3的时间均为40～60s，得二维AlN材料。
  2. 根据权利要求1所述的二维AlN材料的制备方法，其特征在于，所述衬底为Si衬底、蓝宝石衬底或MgAl 2O 4氧化物衬底。
  3. 根据权利要求1所述的二维AlN材料的制备方法，其特征在于，步骤(1)所述晶向的选取，具体为：若衬底为Si衬底时，以(111)面偏(110)方向0.2～1°为外延面，晶体外延取向关系为：AlN的(0002)面平行于Si的(111)面。
  4. 根据权利要求1所述的二维AlN材料的制备方法，其特征在于，步骤(2)所述对衬底进行表面清洁处理，具体为：将衬底放入水中室温下超声清洗5～10分钟，去除衬底表面粘污颗粒，再经过乙醇洗涤，去除表面有机物；清洗后的衬底用高纯干燥氮气吹干。
  5. 根据权利要求1所述的二维AlN材料的制备方法，其特征在于，步骤(3)所述石墨烯层转移至衬底层上的工艺，具体为：将石墨烯层释放到水中，利用除泡膜去除石墨烯表面的气泡，将除完气泡的石墨烯膜层转移至目标衬底上。
  6. 根据权利要求1所述的二维AlN材料的制备方法，其特征在于，步骤(4) 所述退火处理的时间为0.5～1h。
  7. 由权利要求1～6任一项所述的制备方法制得的一种二维AlN材料。
  8. 根据权利要求7所述的一种二维AlN材料，其特征在于，由下至上依次为衬底层(1)、二维AlN结构层(2)、石墨烯层(3)和AlN层(4)。
  9. 根据权利要求8所述的一种二维AlN材料，其特征在于:
    所述衬底层的厚度为420～550μm；
    所述二维AlN结构层的厚度为2～5nm；
    所述石墨烯层的厚度为2～5nm；
    所述AlN层的厚度为300～400nm。
  10. 权利要求7～9任一项所述的二维AlN材料应用于制备HEMT器件、深紫外探测器或深紫外LED中。
PCT/CN2018/084543 2018-03-21 2018-04-26 一种二维AlN材料及其制备方法与应用 WO2019178916A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/980,059 US11417522B2 (en) 2018-03-21 2018-04-26 Two-dimensional AIN material and its preparation method and application

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810233105.XA CN108321076A (zh) 2018-03-21 2018-03-21 一种二维AlN材料及其制备方法与应用
CN201810233105.X 2018-03-21

Publications (1)

Publication Number Publication Date
WO2019178916A1 true WO2019178916A1 (zh) 2019-09-26

Family

ID=62899515

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/084543 WO2019178916A1 (zh) 2018-03-21 2018-04-26 一种二维AlN材料及其制备方法与应用

Country Status (3)

Country Link
US (1) US11417522B2 (zh)
CN (1) CN108321076A (zh)
WO (1) WO2019178916A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4141951A4 (en) * 2020-05-18 2023-09-27 Huawei Technologies Co., Ltd. EPITAXIAL NITRIDE WAFER, ASSOCIATED MANUFACTURING METHOD AND SEMICONDUCTOR COMPONENT

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111733456B (zh) * 2019-03-25 2021-06-15 中国科学院物理研究所 用于AlN单晶生长的复合籽晶及其制备方法
CN110010729A (zh) * 2019-03-28 2019-07-12 王晓靁 RGB全彩InGaN基LED及其制备方法
CN110265504B (zh) * 2019-07-01 2021-04-02 哈尔滨工业大学 一种紫外光电探测器及其制备方法
CN112599646B (zh) * 2020-12-25 2022-12-16 惠州学院 一种全光谱光电双通道器件及其制备方法和应用
CN114381806B (zh) * 2021-12-23 2023-07-21 中国科学院苏州纳米技术与纳米仿生研究所 二维氮化铝晶体的制备方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101343733A (zh) * 2008-08-28 2009-01-14 上海蓝光科技有限公司 Movcd生长氮化物外延层的方法
US20110037052A1 (en) * 2006-12-11 2011-02-17 The Regents Of The University Of California Metalorganic chemical vapor deposition (mocvd) growth of high performance non-polar iii-nitride optical devices
CN103779193A (zh) * 2014-01-27 2014-05-07 苏州能讯高能半导体有限公司 基于金刚石衬底的氮化物半导体器件及其制备方法
CN105734530A (zh) * 2016-03-08 2016-07-06 西安电子科技大学 在石墨烯上基于磁控溅射氮化铝的氮化镓生长方法
CN105731825A (zh) * 2016-03-04 2016-07-06 北京大学 一种利用石墨烯玻璃低成本大面积制备氮化铝薄膜的方法
CN105914139A (zh) * 2016-06-28 2016-08-31 中国电子科技集团公司第十三研究所 一种石墨烯上自组织成核外延GaN材料的方法
CN106835268A (zh) * 2017-01-17 2017-06-13 苏州瑞而美光电科技有限公司 一种iii族氮化物衬底的制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10266963B2 (en) * 2013-03-08 2019-04-23 The United States Of America, As Represented By The Secretary Of The Navy Growth of crystalline materials on two-dimensional inert materials
US20150349064A1 (en) * 2014-05-06 2015-12-03 Cambridge Electronics, Inc. Nucleation and buffer layers for group iii-nitride based semiconductor devices
US20160137507A1 (en) * 2014-11-19 2016-05-19 Institute For Basic Science Large-area graphene transfer method
US10340416B2 (en) * 2016-02-26 2019-07-02 Riken Crystal substrate, ultraviolet light-emitting device, and manufacturing methods therefor

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110037052A1 (en) * 2006-12-11 2011-02-17 The Regents Of The University Of California Metalorganic chemical vapor deposition (mocvd) growth of high performance non-polar iii-nitride optical devices
CN101343733A (zh) * 2008-08-28 2009-01-14 上海蓝光科技有限公司 Movcd生长氮化物外延层的方法
CN103779193A (zh) * 2014-01-27 2014-05-07 苏州能讯高能半导体有限公司 基于金刚石衬底的氮化物半导体器件及其制备方法
CN105731825A (zh) * 2016-03-04 2016-07-06 北京大学 一种利用石墨烯玻璃低成本大面积制备氮化铝薄膜的方法
CN105734530A (zh) * 2016-03-08 2016-07-06 西安电子科技大学 在石墨烯上基于磁控溅射氮化铝的氮化镓生长方法
CN105914139A (zh) * 2016-06-28 2016-08-31 中国电子科技集团公司第十三研究所 一种石墨烯上自组织成核外延GaN材料的方法
CN106835268A (zh) * 2017-01-17 2017-06-13 苏州瑞而美光电科技有限公司 一种iii族氮化物衬底的制备方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JOO JIN: "Significant reduction of AIN wafer bowing grown on sapphire substrate with patterned graphene oxide", MATERIALS LETTERS, vol. 160, 30 July 2015 (2015-07-30) *
QING ZENG: "Graphene-assisted growth of high-quality A1N by metalorganic chemical vapor deposition", JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 55, no. 8, 7 July 2016 (2016-07-07), XP055640612 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4141951A4 (en) * 2020-05-18 2023-09-27 Huawei Technologies Co., Ltd. EPITAXIAL NITRIDE WAFER, ASSOCIATED MANUFACTURING METHOD AND SEMICONDUCTOR COMPONENT

Also Published As

Publication number Publication date
US11417522B2 (en) 2022-08-16
CN108321076A (zh) 2018-07-24
US20210020428A1 (en) 2021-01-21

Similar Documents

Publication Publication Date Title
WO2019178916A1 (zh) 一种二维AlN材料及其制备方法与应用
Kim et al. Remote epitaxy
TW464953B (en) Method of manufacturing III nitride base compound semiconductor substrate
US9627199B2 (en) Methods of fabricating micro- and nanostructure arrays and structures formed therefrom
US20150083036A1 (en) Gallium nitride material and device deposition on graphene terminated wafer and method of forming the same
TW201921423A (zh) 具有第三族氮化物及金剛石層之晶圓
JP6479198B2 (ja) 単結晶ｉｉｉａ族窒化物層を備える半導体ウェハ
Zhao et al. Hydride vapor phase epitaxy of GaN on self-organized patterned graphene masks
Seredin et al. HVPE fabrication of GaN sub-micro pillars on preliminarily treated Si (001) substrate
Zhao et al. AlGaN-based ultraviolet light-emitting diodes on sputter-deposited AlN templates with epitaxial AlN/AlGaN superlattices
Long et al. Modulating lateral strain in GaN-based epitaxial layers by patterning sapphire substrates with aligned carbon nanotube films
US10109482B2 (en) Method for treating surface of semiconductor layer, semiconductor substrate, method for making epitaxial substrate
TWI557066B (zh) 外延結構的製備方法
EP4187576A1 (en) Heteroepitaxial structure with a diamond heat sink
Reznik et al. Growth and optical properties of filamentary GaN nanocrystals grown on a hybrid SiC/Si (111) substrate by molecular beam epitaxy
CN108321077A (zh) 一种二维GaN材料及其制备方法与应用
US9218965B2 (en) GaN epitaxial growth method
Seo et al. Boron nitride nanotubes as a heat sinking and stress-relaxation layer for high performance light-emitting diodes
Zhang et al. Subnanometer-thick 2D GaN film with a large bandgap synthesized by plasma enhanced chemical vapor deposition
CN113990738A (zh) 一种二维材料横向马赛克异质结阵列及其制备和应用
KR20180070781A (ko) 질화물 반도체 기판의 형성 방법 및 반도체 소자의 제조 방법
Krylyuk et al. Faceting control in core-shell GaN micropillars using selective epitaxy
RU2802796C1 (ru) Гетероэпитаксиальная структура с алмазным теплоотводом для полупроводниковых приборов и способ ее изготовления
Wei et al. Hydride vapor phase epitaxy of strain-reduced GaN film on nano-island template produced using self-assembled CsCl nanospheres
TWI621741B (zh) Epitaxial heat dissipation substrate and manufacturing method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18911118

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 21/01/21)

122 Ep: pct application non-entry in european phase

Ref document number: 18911118

Country of ref document: EP

Kind code of ref document: A1