WO2019161709A1 - 一种超低输入电压的启动电路 - Google Patents

一种超低输入电压的启动电路 Download PDF

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Publication number
WO2019161709A1
WO2019161709A1 PCT/CN2018/125382 CN2018125382W WO2019161709A1 WO 2019161709 A1 WO2019161709 A1 WO 2019161709A1 CN 2018125382 W CN2018125382 W CN 2018125382W WO 2019161709 A1 WO2019161709 A1 WO 2019161709A1
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Prior art keywords
voltage
circuit
input voltage
pnp transistor
resistor
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PCT/CN2018/125382
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English (en)
French (fr)
Inventor
李树佳
冯刚
郑典清
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广州金升阳科技有限公司
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Publication of WO2019161709A1 publication Critical patent/WO2019161709A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0006—Arrangements for supplying an adequate voltage to the control circuit of converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33561—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having more than one ouput with independent control

Definitions

  • the invention relates to a switching power supply starting circuit, in particular to a starting circuit for supplying power to a control circuit or a control IC of a power stage circuit or for supplying a power supply circuit of a startup stage.
  • the startup circuit is widely used in the field of switching power supplies.
  • switching power supply products whether it is a primary power supply (AC-DC converter) or a secondary power supply (DC-DC converter)
  • AC-DC converter primary power supply
  • DC-DC converter secondary power supply
  • Power is supplied to drive the switch on and off by controlling the operation of the circuit to control the inductive device to periodically transfer energy.
  • the control circuit or the control IC In the general switching power supply, in order to solve the problem that the input voltage is lower than the minimum starting voltage of the control circuit or the control IC, the control circuit or the control IC enters an undervoltage state due to the inability to obtain a sufficiently high supply voltage, causing the corresponding switching power supply to fail to be turned on.
  • a two-stage power supply circuit (such as the branch circuit structure of Figure 11) can be used. The first stage circuit clamps the wide input voltage limit to a lower voltage value, and the second stage circuit passes the boost circuit (generally the BOOST circuit). The voltage of the stage is raised to the normal working voltage of the control circuit or the control IC, so that the switching power supply system starts working; or the single-stage power supply circuit (such as the branch circuit structure of FIG.
  • the voltage value reduces the voltage difference between the output voltages Vo and Vin at a low voltage, and expands the normal operating voltage range in which the Vo meets the control circuit or the control IC at a low voltage, so that the switching power supply system starts working.
  • the voltage difference between the voltage clamping circuit Vin and Vo is too large, the starting voltage of the second stage boosting circuit is limited.
  • the traditional voltage clamp circuit scheme is shown in Figure 2 (the load is the post-stage boost circuit). The circuit works as follows: when the product is energized, the transistor Q1 is turned on, and the emitter current of the transistor Q1 is quickly charged to the capacitor C2.
  • the voltage (that is, the voltage at the positive terminal of the startup circuit supplied to the power supply terminal Vcc of the control IC) climbs to the regulated value of the Zener diode D1 minus the base and emitter conduction voltage drop of the transistor Q1, and the Vcc voltage will The stability no longer increases.
  • the Vcc voltage reaches the operating voltage of the booster circuit, the booster circuit starts to work, and the power supply voltage of the latter control circuit or the control IC is established.
  • the current limited voltage switching power supply startup circuit in the industry is limited to: using a two-stage power supply circuit scheme or a single-stage power supply circuit scheme, the first-stage voltage clamp circuit will have a low-voltage input and output voltage difference.
  • the problem that the boost circuit or the latter control circuit cannot be started cannot meet the starting voltage range from extremely low voltage to high voltage.
  • the present invention proposes an ultra-low input voltage starting circuit capable of real-time detection of an input voltage.
  • the PNP transistor When an input voltage is detected to be low, the PNP transistor is turned on, so that the output voltage of the starting circuit and the input voltage are pressed.
  • the difference is extremely low, ensuring that the starting voltage of the booster circuit of the latter stage basically follows the input voltage, or the operating voltage of the latter stage control circuit or the control IC basically follows the input voltage; when the input voltage is detected to be high, the voltage stabilizing circuit or the voltage clamping circuit
  • the constructed voltage limiting circuit operates to limit the startup circuit output voltage to the operating input voltage range of the subsequent stage boosting circuit, or to the operating voltage range of the subsequent stage control circuit or control IC.
  • the invention itself has extremely low loss.
  • the control circuit itself has low loss, and because the PNP transistor is used, the PNP transistor is saturated and turned on during low voltage operation, and the on-resistance and on-resistance of the startup circuit are extremely low.
  • the voltage limiting circuit can adopt a voltage clamping circuit that satisfies the low loss, which not only ensures the normal operation of the starting circuit under high input voltage, but also reduces the loss of the starting circuit operation.
  • An ultra-low input voltage starting circuit includes a first PNP transistor, a control circuit and a voltage limiting circuit;
  • the input end of the control circuit is connected to the input voltage Vin, and the input voltage Vin is subjected to voltage sampling to generate a control voltage Vg, and the control voltage Vg is output to the base of the first PNP transistor, and the emitter of the first PNP transistor Connecting the input voltage Vin, the collector of the first PNP transistor is connected as an output end of the start-up circuit to the subsequent stage circuit to supply power to the subsequent stage circuit; the input end and the output end of the voltage limiting circuit are respectively connected to the emitter of the first PNP transistor and collector;
  • the voltage limiting circuit is a voltage stabilizing circuit that outputs a fixed voltage value, or a voltage limiting circuit that outputs a fixed voltage range; when the clock is stable, the output voltage of the voltage limiting circuit is a fixed voltage or a fixed voltage that meets the normal operation of the latter circuit. range;
  • the control circuit is provided with a determination voltage interval.
  • the control voltage Vg outputted by the control circuit and the input voltage Vin are greater than the first voltage difference.
  • a saturation turn-on voltage of the PNP transistor the first PNP transistor is turned into a saturation region, and the voltage limiting circuit is short-circuited, and the collector of the first PNP transistor is used to supply power to the subsequent circuit;
  • the voltage difference between the control voltage Vg outputted by the control circuit and the input voltage Vin is gradually decreased, and the first PNP transistor enters the amplification region while The voltage limiting circuit is gradually turned on, and the collector of the first PNP transistor and the output of the voltage limiting circuit jointly supply power to the subsequent circuit;
  • the control voltage Vg outputted by the control circuit has no voltage difference from the input voltage Vin, and the first PNP transistor enters the cut-off region.
  • the output of the voltage limiting circuit supplies power to the subsequent stage circuit.
  • the input voltage of the first PNP transistor that is, the voltage difference between the control voltage Vg and the input voltage Vin is gradually decreased; and the input voltage of the PNP transistor circuit is also allowed. That is, the control voltage Vg and the startup circuit input voltage Vin have a voltage difference that is abruptly changed from a saturation conduction voltage greater than the first PNP transistor to an approximately no voltage difference;
  • the first PNP transistor When the control voltage Vg is excessive from a low potential to a high potential, the first PNP transistor is allowed to enter the amplification region from the saturation conduction region and then gradually enter the cut-off region; the first PNP transistor is also allowed to jump directly from the saturated conduction state. Becomes an off state;
  • the interval in which the voltage limiting circuit and the PNP three-stage tube are simultaneously turned on is allowed, and only the PNP transistor or the voltage limiting circuit is independently turned on.
  • the voltage limiting circuit is a voltage clamping circuit that converts the input voltage Vin into a stable output voltage range, or a voltage stabilization circuit that converts the input voltage Vin into a fixed output voltage value.
  • the voltage limiting circuit includes a fourth resistor, a fifth resistor, a first capacitor, a first NPN transistor, and a second diode; and the fourth resistor is connected to the collector of the first NPN transistor, The other end of the fourth resistor is connected to the input voltage Vin; one end of the fifth resistor is connected to the input voltage Vin, and the other end of the fifth resistor is connected to the base of the first NPN transistor; one end of the first capacitor is connected to the base of the first NPN transistor, and the first capacitor The other end is connected to the ground; the cathode of the second diode is connected to the base of the first NPN transistor, and the anode of the second diode is connected; the emitter of the first NPN transistor is used as the output end of the voltage limiting circuit, and is connected The collector of the first PNP transistor.
  • the second diode is a Zener diode.
  • the voltage limiting circuit comprises a first chip IC1, the first chip IC1 has a function of converting an input voltage Vin into a stable voltage range output; the input end of the first chip IC1 is connected to an input voltage Vin, the ground terminal of the first chip IC1 is grounded, and the output end of the first chip IC1 is connected to the collector of the first PNP transistor Q1.
  • the voltage limiting circuit includes a second chip, the second chip has a function of converting an input voltage Vin into a fixed output voltage; an input end of the second chip is connected to an input voltage Vin, and the second chip The ground terminal is grounded, and the output end of the second chip is connected to the collector of the first PNP transistor as the output voltage Vo of the starting circuit.
  • the ground of the ultra-low input voltage starting circuit is shared with the external power supply device and the rear stage circuit.
  • the control circuit includes a first resistor, a second resistor, a third resistor, a first diode, and a second PNP transistor; the third resistor is connected to the input voltage Vin and the first diode Between the cathodes; the anode of the first diode is grounded; one end of the second resistor is connected to the junction of the third resistor and the cathode of the first diode, and the other end of the second resistor is connected to the base of the second PNP transistor The emitter of the second PNP transistor is connected to the input voltage Vin, and the collector of the second PNP transistor is connected to one end of the first resistor and outputs a control voltage Vg as an output of the control circuit; the other end of the first resistor is grounded.
  • the first diode is a Zener diode.
  • the present invention has the following remarkable effects:
  • the invention adopts a PNP triode to control the output voltage of the starting circuit at low voltage, thereby ensuring that the output voltage of the starting circuit is substantially consistent with the input voltage at low voltage, and satisfies the power supply requirement of the low voltage stepping circuit of the latter stage.
  • the circuit structure of the invention adopts a voltage limiting circuit composed of a voltage regulator circuit or a clamp circuit with a wide input voltage range, thereby ensuring that the output voltage of the starting circuit is not too high when the high voltage input is high, and satisfies the high voltage of the boosting circuit of the latter stage.
  • the input voltage range is not too high when the high voltage input is high, and satisfies the high voltage of the boosting circuit of the latter stage.
  • the invention itself has extremely low loss, and a voltage limiting circuit composed of a low-loss constant current limiting chip has a small voltage sampling loss of the control circuit, and the circuit loss is not increased due to the circuit characteristics of the overcurrent device itself.
  • Figure 1 is a block diagram of the application of a conventional wide input range startup circuit that satisfies the low voltage input;
  • Figure 2 is a schematic diagram of a conventional voltage clamping circuit
  • FIG. 3 is a schematic block diagram of the present invention.
  • FIG. 4 is a schematic diagram of an application of a first embodiment of the present invention.
  • Figure 5 is a schematic circuit diagram of a first embodiment of the present invention.
  • Figure 6 is a circuit diagram of a second embodiment of the present invention.
  • FIG. 3 shows a block diagram of the connection following the initial technical solution described above.
  • Figure 3 shows a block diagram of the connection following the initial technical solution described above.
  • the external power supply device works normally. When the input voltage is within the voltage interval of the control circuit, the voltage difference between the output voltage of the startup circuit and the input voltage increases slowly with the increase of the input voltage.
  • the external power supply device works normally.
  • the output voltage of the startup circuit is stabilized at a voltage value or stabilized in an output voltage range, regardless of the change of the input voltage.
  • An ultra-low input voltage starting circuit of the present invention comprises a first PNP transistor Q1, a control circuit and a voltage limiting circuit.
  • the following specific circuits are used to specifically implement the above three working states in conjunction with FIG. 5. described as follows:
  • the control circuit of the present invention comprises a first resistor R1, a second resistor R2, a third resistor R3, a first diode Z1, and a second PNP transistor Q2.
  • the first diode Z1 can be used with a 5.1V Zener.
  • the third resistor R3 is connected between the input voltage Vin and the cathode of the first diode Z1; the anode of the first diode Z1 is connected to the ground; one end of the second resistor R2 is connected to the third resistor R3 and the first The junction of the cathode of the diode Z1, the other end of the R2 is connected to the base of the second PNP transistor Q2; the emitter of the second PNP transistor Q2 is connected to the input voltage Vin, and the collector of the second PNP transistor Q2 is connected to the first resistor
  • One end of R1 outputs the control voltage Vg as an output terminal of the control circuit; the other end of the first resistor R1 is grounded.
  • the base of the first PNP transistor Q1 is connected to the output of the control circuit.
  • the emitter of the first PNP transistor Q1 is connected to the input voltage Vin, and the collector of the first PNP transistor Q1 is used as the output voltage Vo of the startup circuit.
  • the voltage limiting circuit of the present invention is a voltage clamping circuit that converts the input voltage Vin into a stable voltage range output, including the first chip IC1, and the first chip IC1 can select any chip having the above functions, which is adopted in this embodiment.
  • SCM9603A The input end of the first chip IC1 is connected to the input voltage Vin, the ground of the first chip IC1 is connected to the input ground, and the output end of the first chip IC1 is connected to the collector of the first PNP transistor Q1 as the output voltage of the starting circuit Vo .
  • the current flowing through the resistor R3 is small, and the cathode voltage of the Zener diode Z1 basically follows the input.
  • Voltage the voltage difference between the base and the emitter of the PNP transistor Q2 is very small, the transistor Q2 is cut off, the collector of Q2 is pulled down by the resistor R1; the output signal Vg of the control circuit is low, so that the base of the PNP transistor Q1 is The reverse voltage between the emitters is large, the PNP transistor Q1 is saturated and turned on, and the voltage limiting circuit is short-circuited.
  • the starting circuit output voltage Vo follows the input Vin, and the voltage difference is the saturation conduction voltage difference of the PNP transistor Q1, and there is almost no pressure difference. .
  • the Zener diode begins to Zener breakdown; the current flowing through the resistor R3 gradually increases, and the cathode voltage of the Zener diode Z1 is substantially stable, and the base of the PNP transistor Q2 The voltage difference between the pole and the emitter gradually increases, and the transistor Q2 enters the amplification region.
  • the current flowing through the collector of Q2 follows the increase of the input voltage, and the voltage of the collector collector of Q2 gradually increases with the voltage of the resistor R1.
  • the output signal of the control circuit Vg Gradually increasing, the reverse voltage between the base and the emitter of the PNP transistor Q1 is gradually reduced, the PNP transistor Q1 enters the amplification region, and the current between Vin and Vo is provided by the PNP transistor Q1 and the voltage limiting circuit IC1 SCM9603A; During the slow rise of Vin, the voltage difference between the output voltage Vo of the ultra-low input voltage and the input voltage Vin gradually increases as the PNP transistor Q1 enters the amplification region.
  • the Zener diode Z1 When the input voltage exceeds the maximum value of the voltage interval determined by the control circuit, the Zener diode Z1 maintains a Zener breakdown and continues to operate a stable voltage; the current flowing through the resistor R3 gradually increases, and the cathode voltage of the Zener diode Z1 is substantially constant.
  • the voltage difference between the base and the emitter of the PNP transistor Q2 enters the saturation conduction interval (PN junction voltage difference), the transistor Q2 is saturated and turned on, the collector follows the input voltage Vin and the voltage difference is small; the output signal Vg of the control circuit is approximated.
  • the second embodiment of the present invention can be obtained by modifying the voltage limiting circuit.
  • the following specific working circuit of the second embodiment will specifically describe the above three working states as follows:
  • control circuit and the first PNP transistor Q1 of the present invention are identical to the first embodiment.
  • the voltage limiting circuit of the present invention is a voltage stabilizing circuit that stabilizes the input voltage to a fixed voltage value output.
  • the voltage limiting circuit includes a fourth resistor R4, a fifth resistor R5, a first capacitor C1, a first NPN transistor Q3, and a second diode Z2.
  • the second diode Z2 can be used with a 10V voltage regulator.
  • One end of the fourth resistor R4 is connected to the collector of the first NPN transistor Q3, and the other end is connected to Vin; the other end of the fifth resistor R5 is connected to Vin, and the other end is connected to the base of the first NPN transistor Q3; the first capacitor C1 One end is connected to the base of the first NPN transistor Q3, and the other end is connected to the input ground; the cathode of the second diode Z2 is connected to the base of the first NPN transistor Q3, the anode is connected to the input ground; and the emitter of the first NPN transistor Q3 is connected.
  • the collector of a PNP transistor Q1 serves as the output voltage Vo of the startup circuit.
  • the voltage of the Zener diode Z1 When the input voltage is low, the voltage of the Zener diode Z1 is not reached, which is equivalent to the off state; the current flowing through the resistor R3 is small, the cathode voltage of the Zener diode Z1 basically follows the input voltage, and the base and emission of the PNP transistor Q2 The voltage difference between the poles is very small, the transistor Q2 is cut off, the collector of Q2 is pulled down by the resistor R1; the output signal Vg of the control circuit is low level, so that the reverse voltage between the base and the emitter of the PNP transistor Q1 is large. The PNP transistor Q1 is saturated and turned on, and the voltage limiting circuit is short-circuited. The starting circuit output voltage Vo follows the input Vin, and the voltage difference is the saturation conduction voltage difference of the PNP transistor Q1, and there is almost no pressure difference.
  • the Zener diode begins to Zener breakdown; the current flowing through the resistor R3 gradually increases, and the cathode voltage of the Zener diode Z1 is substantially stable, and the base of the PNP transistor Q2 The voltage difference between the pole and the emitter gradually increases, and the transistor Q2 enters the amplification region.
  • the current flowing through the collector of Q2 follows the increase of the input voltage, and the voltage of the collector collector of Q2 gradually increases with the voltage of the resistor R1.
  • the output signal of the control circuit Vg Gradually increasing, the reverse voltage between the base and emitter of PNP transistor Q1 is gradually reduced, PNP transistor Q1 enters the amplification region, and the current between Vin and Vo is provided by PNP transistor Q1 and voltage limiting circuit; Vin is slow During the rising process, when the input voltage does not reach the voltage value of the Zener diode Z2, the cathode of the Zener diode Z2 follows the input voltage, and the output voltage Vo is determined by the voltage limiting circuit and the PNP transistor Q1, and the voltage difference between Vo and Vin follow the PNP transistor Q1 into the amplification region and slowly increase.
  • the collector voltage of the NPN transistor Q3 continues to increase, the current flowing through the resistor R3 continues to increase, and the voltage difference between the base and the emitter of the PNP transistor Q2 enters the saturation conduction interval ( PN junction voltage difference), transistor Q2 saturates on, the collector of Q2 follows the input voltage Vin and the voltage difference is small; the output signal Vg of the control circuit is approximately equal to the input voltage Vin, so that the base and emitter of the PNP transistor Q1 The voltage difference is approximately 0, and the PNP transistor Q1 is turned off; the current between Vin and Vo is directly provided by the voltage limiting circuit; when the input voltage exceeds the voltage of the Zener diode Z2, the Zener diode begins to pass through and flows through The current of the resistor R5 gradually increases, the cathode voltage of the Zener Z2 is basically stabilized at its voltage value, and the output voltage Vo of the starting circuit is directly determined by the voltage stabilizing characteristic of the voltage limiting circuit, and the output
  • the voltage limiting circuit may be a second chip having an input voltage clamped to a fixed voltage value output, and the second chip may be a three-terminal voltage regulator IC 7805.
  • the third embodiment does not provide a separate figure.
  • the connection relationship of the second chip can be referred to the replacement voltage limiting circuit in FIG. 6.
  • the input end of the second chip is connected to the input voltage Vin, and the ground end of the second chip is grounded.
  • the output terminal of the second chip is connected to the collector of the first PNP transistor Q1 as the output voltage Vo of the startup circuit.
  • the control circuit and the voltage limiting circuit including the first resistor R1, the second resistor R2, the third resistor R3, the first diode Z1, the second PNP transistor Q2, and the IC1 described in the first embodiment are capable of implementing sampling input
  • the voltage difference between Vg and the input voltage Vin is greater than the saturation conduction voltage of the first PNP transistor, and when the input voltage is high voltage, the voltage difference between Vg and the input voltage Vin is 0, and can be replaced by other forms of judging circuit.
  • the partial circuit; the first chip IC1 SCM9603A described in the first embodiment, the voltage limiting circuit described in the second embodiment, and the second chip 7805 in the third embodiment are capable of realizing a voltage limiting clamp having a wide input range It can be used in a voltage value or a voltage range that satisfies the working range of the booster circuit of the latter stage. It can be directly replaced by a wide input voltage regulator module, or other types of regulator ICs and voltage regulator circuits, and can achieve the same function.

Abstract

一种超低输入电压的启动电路，PNP三极管（Q1），电压限制电路来控制输出电压范围，保证输出电压满足后级超宽输入电压范围电源模块启动电路后级升压电路的工作电压范围。通过控制电路对输入电压的采样，保证启动电路在低压工作时不会由于本身压差影响后级供电；在高压工作时输出电压能够控制在一个电压范围内，保证启动电路在工作电压区间内输出电压满足后级升压电路工作电压范围，同时电路工作状态的损耗极低。

Description

一种超低输入电压的启动电路 技术领域
本发明涉及一种开关电源启动电路，特别涉及一种开关电源中为功率级电路的控制电路或者控制IC供电、或为启动电路后级升压电路供电的启动电路。
背景技术
启动电路广泛应用于开关电源领域。开关电源产品中，无论一次电源(AC-DC变换器)或者二次电源(DC-DC变换器)，都需要从输入端获取能量，并提供一个稳定的供电电压为后级控制电路或者控制IC供电，从而通过控制电路工作来驱动开关通断，控制感性器件周期性地传递能量。
一般开关电源中，为解决输入电压低于控制电路或者控制IC最小启动电压时，控制电路或者控制IC因无法获得足够高的供电电压而进入欠压状态，造成对应的开关电源无法开机的问题，可使用两级供电电路(如图1①支路结构)，第一级电路将宽输入电压限制钳位到一个较低的电压值，第二级电路通过升压电路(一般为BOOST电路)将前级电压抬升到符合控制电路或控制IC工作的正常工作电压，使得开关电源系统启动工作；或使用单级供电电路(如图1②支路结构)，将宽输入电压限制钳位到一个较低的电压值，减小低压下输出电压Vo与Vin之间的压差，扩大Vo在低压下符合控制电路或控制IC工作的正常工作电压区间，使得开关电源系统启动工作。但是由于电压钳位电路Vin到Vo之间压差太大，限制了第二级升压电路的启动电压。传统电压钳位电路方案如图2所示(负载为后级升压电路)，电路工作原理为：产品通电瞬间，晶体管Q1导通，晶体管Q1的发射极电流迅速向电容C2充电，当电容C2电压(也即启动电路的输出正端提供给控制IC的供电端Vcc的电压)爬升至稳压二极管D1的稳压值减去晶体管Q1的基极与发射极导通压降时，Vcc电压将稳定不再增加，在Vcc电压达到升压电路工作电压时，升压电路开始工作，建立起后级控制电路或者控制IC的供电电压，但是电路在低压工作时，晶体管Q1处于放大区，Q1及电阻R2上压降较大，限制了低压下Vcc的电压值，限制了升压电路的启动电压，导致开关电源系统在Vin较低的时候难以启动。用其他类型的稳压电路或者电压钳位电路，也会出现低压下压差过大的问题。
综上所述，目前行业内宽电压范围开关电源启动电路的局限在：使用两级供电电路方案或单级供电电路方案的产品，第一级电压钳位电路会出现低压下输入输出压差过大，使得升压电路或后级控制电路无法启动的问题，无法满足从极低电压到高电压的启动电压范围。
发明内容
有鉴如此，本发明提出一种超低输入电压的启动电路，能够对输入电压进行实时检测，当检测到输入电压低的时候，PNP三极管导通，使得启动电路的输出电压与输入电压的压差极低，保障后级升压电路启动电压基本跟随输入电压，或者后级控制电路或控制IC工作电压基本跟随输入电压；当检测到输入电压较高的时候，稳压电路或电压钳位电路构成的电压限制电路工作，将启动电路输出电压限制在后级升压电路的工作输入电压范围内，或限制在后级控制电路或控制IC工作电压范围内。
本发明本身损耗极低，当输入电压为低电压时，控制电路本身损耗较低，同时因为采用PNP三极管，在低压工作时PNP三极管饱和导通，启动电路的导通阻抗跟导通电阻极低；在高压工作时，电压限制电路可采用满足损耗较低的电压钳位电路，既保障了高输入电压下启动电路的正常工作，又减小了启动电路工作的损耗。
本发明所述的一种超低输入电压的启动电路，包括第一PNP三极管、控制电路和电压限制电路；
所述的控制电路的输入端连接输入电压Vin，对输入电压Vin进行电压采样后产生控制电压Vg，所述控制电压Vg输出给所述第一PNP三极管的基极，第一PNP三极管的发射极连接输入电压Vin，第一PNP三极管的集电极作为启动电路的输出端连接到后级电路，为后级电路供电；电压限制电路的输入端和输出端分别连接在第一PNP三极管的发射极和集电极；
所述的电压限制电路为输出固定电压值的稳压电路，或输出固定电压范围的电压限制电路；稳定工作时，电压限制电路输出电压为一个固定电压或一个符合后级电路正常工作的固定电压范围；
所述的控制电路设有判断电压区间，当所述的输入电压Vin小于控制电路判断电压区间的最小值时，所述的控制电路输出的控制电压Vg与所述输入电压Vin 压差大于第一PNP三极管的饱和导通电压，所述的第一PNP三极管进入饱和区导通，将所述的电压限制电路短路，由第一PNP三极管的集电极为后级电路供电；
当所述的输入电压Vin在控制电路判断电压区间内时，所述的控制电路输出的控制电压Vg与所述输入电压Vin压差逐渐减小，所述的第一PNP三极管进入放大区，同时所述的电压限制电路逐渐导通，由第一PNP三极管的集电极和电压限制电路的输出端共同为后级电路供电；
当所述的输入电压Vin大于控制电路判断电压区间的最大值时，所述的控制电路输出的控制电压Vg与所述输入电压Vin无压差，所述的第一PNP三极管进入截至区关断，由所述的电压限制电路的输出端为后级电路供电。
优选的，当所述的输入电压Vin电压从小往大过度的过程，允许第一PNP三极管的输入电压即控制电压Vg与所述输入电压Vin压差逐渐减小；也允许PNP三极管电路的输入电压即控制电压Vg与所述启动电路输入电压Vin压差从大于第一PNP三极管的饱和导通电压突变为近似无压差；
当所述的控制电压Vg从低电位向高电位过度的过程，允许第一PNP三极管从饱和导通区进入放大区，再逐渐进入截止区；也允许第一PNP三极管从饱和导通状态直接跳变为截止状态；
当所述的第一PNP三极管工作状态变化的过程，允许存在所述电压限制电路与PNP三级管同时导通的区间，也允许只存在PNP三极管或者电压限制电路独立导通的情况。
优选的，所述的电压限制电路是将输入电压Vin转换为稳定的输出电压范围的电压钳位电路，或者是将输入电压Vin转换为固定的输出电压值的稳压电路。
优选的，所述的电压限制电路包括第四电阻、第五电阻、第一电容、第一NPN三极管、第二二极管；所述的第四电阻一端接第一NPN三极管的集电极，第四电阻另一端连接输入电压Vin；第五电阻的一端连接输入电压Vin，第五电阻另一端连接第一NPN三极管的基极；第一电容的一端连接第一NPN三极管的基极，第一电容的另一端连接地；第二二极管的阴极连接第一NPN三极管的基极，第二二极管的阳极连接地；第一NPN三极管的发射极作为所述电压限制电路的输出端，连接第一PNP三极管的集电极。
优选的，第二二极管为稳压管。
优选的，所述的电压限制电路包括第一芯片IC1，所述的第一芯片IC1具有将输入电压Vin转换为稳定的电压范围输出的功能；所述的第一芯片IC1的输入端连接输入电压Vin，第一芯片IC1的接地端接地，第一芯片IC1的输出端连接第一PNP三极管Q1的集电极。
优选的，所述的电压限制电路包括第二芯片，所述的第二芯片具有将输入电压Vin转换为固定输出电压的功能；所述第二芯片的输入端连接输入电压Vin，第二芯片的接地端接地，第二芯片的输出端连接第一PNP三极管的集电极作为所述启动电路的输出电压Vo。
优选的，所述超低输入电压的启动电路的地与外部供电装置、后级电路共地。
优选的，所述的控制电路包括第一电阻、第二电阻、第三电阻、第一二极管、第二PNP三极管；所述的第三电阻连接于输入电压Vin与第一二极管的阴极之间；第一二极管的阳极接地；第二电阻的一端连接到第三电阻与第一二极管的阴极的连接点，第二电阻的另一端与第二PNP三极管的基极连接；第二PNP三极管的发射极连接输入电压Vin，第二PNP三极管的集电极连接第一电阻的一端并作为控制电路的输出端输出控制电压Vg；第一电阻的另一端接地。
优选的，第一二极管为稳压管。
与现有技术相比，本发明具有如下的显著效果：
1、本发明采用PNP三极管来控制低压时启动电路的输出电压，从而保障了低压时启动电路输出电压与输入电压基本一致，满足了后级升压电路低压下的供电需求。
2、本发明电路结构采用了宽输入电压范围的稳压电路或者钳位电路组成的电压限制电路，从而保障了高压输入时启动电路输出电压不会过高，满足了后级升压电路高压下的输入电压范围。
3、本发明本身损耗极低，采用低损耗的恒流限压芯片组成的电压限制电路，控制电路的电压采样损耗也较小，不会由于过流装置本身电路特性增大电路损耗。
附图说明
图1为传统的满足低压输入的宽输入范围启动电路的应用框图；
图2为传统的电压钳位电路原理图；
图3为本发明的原理框图；
图4为本发明第一实施例的应用原理图；
图5为本发明第一实施例的电路原理图；
图6为本发明第二实施例的电路原理图。
具体实施方式
图3示出了原理框图，遵循上述初始的技术方案的连接关系。先分点阐述一下本发明具有的3个工作状态：
1、外部供电装置正常工作，输入电压小于控制电路判断电压区间的最小值时，启动电路的输出电压与输入电压几乎无压差。
2、外部供电装置正常工作，输入电压在控制电路判断电压区间内时，启动电路的输出电压与输入电压的压差随输入电压的增大缓慢增大。
3、外部供电装置正常工作，输入电压超过控制电路判断电压区间的最大值时，启动电路的输出电压稳定在一个电压值或稳定在一个输出电压范围，与输入电压的变化无关。
第一实施例
本发明的一种超低输入电压的启动电路，包括第一PNP三极管Q1、控制电路和电压限制电路，针对每个电路模块，结合附图5采用以下具体的电路对以上3个工作状态进行具体说明如下：
本发明所述的控制电路包括第一电阻R1，第二电阻R2，第三电阻R3，第一二极管Z1，第二PNP三极管Q2。第一二极管Z1可用5.1V稳压管。所述的第三电阻R3连接于输入电压Vin与第一二极管Z1的阴极之间；第一二极管Z1的阳极接输入地；第二电阻R2的一端连接第三电阻R3与第一二极管Z1的阴极的连接点，R2的另一端与第二PNP三极管Q2的基极连接；第二PNP三极管Q2的发射极连接输入电压Vin，第二PNP三极管Q2的集电极连接第一电阻R1的一端并作为控制电路的输出端输出控制电压Vg；第一电阻R1的另一端接地。
所述的第一PNP三极管Q1的基极连接控制电路的输出端，第一PNP三极管Q1的发射极连接输入电压Vin，第一PNP三极管Q1的集电极作为所述启动电路的输出电压Vo。
本发明所述的电压限制电路是电压钳位电路，将输入电压Vin转换为稳定的电压范围输出，包括第一芯片IC1，第一芯片IC1可选用具有上述功能的任何芯 片，本实施例中采用SCM9603A。所述的第一芯片IC1的输入端连接输入电压Vin，第一芯片IC1的地连接输入地，第一芯片IC1的输出端连接第一PNP三极管Q1的集电极作为所述启动电路的输出电压Vo。
下面结合图5对本发明的工作过程说明如下：
工作状态1供电装置正常工作，输入电压小于控制电路判断电压区间的最小值时，启动电路的输出电压Vo与输入电压Vin几乎无压差：
当输入电压小于控制电路判断电压区间的最小值时，由于未达到稳压二极管Z1的电压值，相当于截止状态；流过电阻R3的电流很小，稳压二级管Z1阴极电压基本跟随输入电压，PNP三极管Q2的基极与发射极之间压差很小，三极管Q2截止，Q2的集电极由电阻R1下拉；控制电路的输出信号Vg为低电平，使得PNP三极管Q1的基极与发射极之间的反向电压较大，PNP三极管Q1饱和导通，将电压限制电路短接，启动电路输出电压Vo跟随输入Vin，压差为PNP三极管Q1饱和导通压差，几乎无压差。
工作状态2供电装置正常工作，输入电压在控制电路判断电压区间内时，启动电路的输出电压Vo与输入电压Vin的压差随输入电压的增大缓慢增大：
当输入电压逐渐升高，逐渐超过稳压二极管Z1的电压值，稳压二极管开始齐纳击穿；流过电阻R3的电流逐渐增大，稳压管Z1阴极电压基本稳定，PNP三极管Q2的基极与发射极之间压差逐渐增大，三极管Q2进入放大区，流过Q2集电极电流跟随输入电压上升逐渐增大，Q2集电极电压跟随电阻R1电压逐渐增大；控制电路的输出信号Vg逐渐增大，使得PNP三极管Q1的基极与发射极之间的反向电压逐渐减小，PNP三极管Q1进入放大区，Vin与Vo之间电流由PNP三极管Q1与电压限制电路IC1 SCM9603A共同提供；Vin缓慢上升的过程中，超低输入电压的启动电路输出电压Vo与输入电压Vin之间的压差跟随PNP三极管Q1进入放大区而缓慢增大。
工作状态3供电装置正常工作，输入电压超过控制电路判断电压区间的最大值时，启动电路的输出电压Vo稳定在一个输出电压范围，与输入电压Vin的变化无关：
当输入电压超过控制电路判断电压区间的最大值时，稳压二极管Z1保持齐纳击穿并持续工作稳定电压；流过电阻R3的电流逐渐增大，稳压二极管Z1阴极电压基本稳定不变，PNP三极管Q2的基极与发射极之间压差进入饱和导通区间(PN结压差)，三极管Q2饱和导通，集电极跟随输入电压Vin且压差很小；控制电路的输出信号Vg近似等于输入电压Vin，使得PNP三极管Q1的基极与发射极之间的压差近似为0，PNP三极管Q1截止关断；Vin与Vo之间电流直接由IC1 SCM9603A提供，启动电路输出电压Vo直接由IC1 SCM9603A的稳压特性决定，并将输出电压稳定在一个输出电压范围。
第二实施例
在第一实施例的基础上，将电压限制电路进行改进可得到本发明的第二实施例，下面附图6对第二实施例的具体的电路对以上3个工作状态进行具体说明如下：
本发明所述的控制电路及第一PNP三极管Q1与第一实施例一致。
与实施例一不同的是，本发明所述的电压限制电路是一个稳压电路，将输入电压稳定到固定的电压值输出。电压限制电路包括第四电阻R4，第五电阻R5，第一电容C1，第一NPN三极管Q3，第二二极管Z2。第二二极管Z2可用10V稳压管。所述的第四电阻R4的一端接第一NPN三极管Q3的集电极，另一端连接Vin；第五电阻R5的一端连接Vin，另一端连接第一NPN三极管Q3的基极；第一电容C1的一端连接第一NPN三极管Q3的基极，另一端连接输入地；第二二极管Z2的阴极连接第一NPN三极管Q3的基极，阳极连接输入地；第一NPN三极管Q3的发射极连接第一PNP三极管Q1的集电极作为所述启动电路的输出电压Vo。
下面结合图6对本发明的工作过程说明如下：
工作状态1供电装置正常工作，输入电压小于控制电路判断电压区间的最小值时，启动电路的输出电压与输入电压几乎无压差：
当输入电压较低时由于未达到稳压二极管Z1的电压值，相当于截止状态；流过电阻R3的电流很小，稳压二极管Z1阴极电压基本跟随输入电压，PNP三极管Q2的基极与发射极之间压差很小，三极管Q2截止，Q2的集电极由电阻R1下拉；控制电路的输出信号Vg为低电平，使得PNP三极管Q1的基极与发射极之间 的反向电压较大，PNP三极管Q1饱和导通，将电压限制电路短接，启动电路输出电压Vo跟随输入Vin，压差为PNP三极管Q1饱和导通压差，几乎无压差。
工作状态2供电装置正常工作，输入电压在控制电路判断电压区间内时，启动电路的输出电压与输入电压的压差随输入电压的增大缓慢增大：
当输入电压逐渐升高，逐渐超过稳压二极管Z1的电压值，稳压二极管开始齐纳击穿；流过电阻R3的电流逐渐增大，稳压管Z1阴极电压基本稳定，PNP三极管Q2的基极与发射极之间压差逐渐增大，三极管Q2进入放大区，流过Q2集电极电流跟随输入电压上升逐渐增大，Q2集电极电压跟随电阻R1电压逐渐增大；控制电路的输出信号Vg逐渐增大，使得PNP三极管Q1的基极与发射极之间的反向电压逐渐减小，PNP三极管Q1进入放大区，Vin与Vo之间电流由PNP三极管Q1与电压限制电路共同提供；Vin缓慢上升的过程中，当输入电压未达到稳压二极管Z2的电压值，稳压二极管Z2的阴极跟随输入电压，输出电压Vo由电压限制电路与PNP三极管Q1共同决定，Vo与Vin之间的压差跟随PNP三极管Q1进入放大区而缓慢增大。
工作状态3供电装置正常工作，输入电压超过控制电路判断电压区间的最大值时，启动电路的输出电压稳定在一个电压值，与输入电压的变化无关：
当输入电压超过控制电路判断电压区间时，NPN三极管Q3集电极电压继续增大，流过电阻R3的电流继续增大，PNP三极管Q2的基极与发射极之间压差进入饱和导通区间(PN结压差)，三极管Q2饱和导通，Q2的集电极跟随输入电压Vin且压差很小；控制电路的输出信号Vg近似等于输入电压Vin，使得PNP三极管Q1的基极与发射极之间的压差近似为0，PNP三极管Q1截止关断；Vin与Vo之间电流直接由电压限制电路提供；当输入电压超过稳压二极管Z2的电压值，稳压二极管开始齐纳击穿，流过电阻R5的电流逐渐增大，稳压管Z2阴极电压基本稳定在其电压值，启动电路输出电压Vo直接由电压限制电路的稳压特性决定，并将输出电压基本稳定在稳压二极管Z2的稳压值。
第三实施例
与第二实施例不同的是，所述的电压限制电路可以是一个具有将输入电压钳位到固定的电压值输出的第二芯片，第二芯片可选用三端稳压IC 7805。该第三 实施例未提供单独附图，所述的第二芯片的连接关系可以参见图6中替换电压限制电路后，第二芯片的输入端连接输入电压Vin，第二芯片的接地端接地，第二芯片的输出端连接第一PNP三极管Q1的集电极作为所述启动电路的输出电压Vo。
第一实施例所述的包括第一电阻R1、第二电阻R2、第三电阻R3、第一二极管Z1、第二PNP三极管Q2、IC1的控制电路和电压限制电路，只要能实现采样输入电压为低压时，Vg与所述输入电压Vin压差大于第一PNP三极管的饱和导通电压，输入电压为高压时，Vg与所述输入电压Vin压差为0，可用其他形式的判断电路替代该部分电路；第一实施例所述的第一芯片IC1 SCM9603A，第二实施例所述的电压限制电路，及第三实施例中的第二芯片7805只要能实现将宽输入范围的电压限制钳位在一个电压值、或者一个满足后级升压电路工作范围的电压范围，可直接用宽输入电压稳压模块、或者其他类型的稳压IC跟稳压电路替代，也可以实现相同的功能。
以上仅是本发明的优选实施方式，应当指出的是，上述优选实施方式不应视为本发明的限制，在本发明图3原理框图及图1应用框图的基础上，对于本技术领域的普通技术人员来说，在不脱离本发明的精神和范围内，还可以做出另外的改进及润饰，这些改进及润饰也在本发明的保护范围，这里不再用实施例赘述，本发明的保护范围应当以权利要求所限定的范围为准。

Claims (9)

  1. 一种超低输入电压的启动电路，其特征在于：包括第一PNP三极管、控制电路和电压限制电路；
    所述的控制电路的输入端连接输入电压Vin，对输入电压Vin进行电压采样后产生控制电压Vg，所述控制电压Vg输出给所述第一PNP三极管的基极，第一PNP三极管的发射极连接输入电压Vin，第一PNP三极管的集电极作为启动电路的输出端连接到后级电路，为后级电路供电；电压限制电路的输入端和输出端分别连接在第一PNP三极管的发射极和集电极；
    所述的电压限制电路为输出固定电压值的稳压电路，或输出固定电压范围的电压限制电路；稳定工作时，电压限制电路输出电压为一个固定电压或一个符合后级电路正常工作的固定电压范围；
    所述的控制电路设有判断电压区间，当所述的输入电压Vin小于控制电路判断电压区间的最小值时，所述的控制电路输出的控制电压Vg与所述输入电压Vin压差大于第一PNP三极管的饱和导通电压，所述的第一PNP三极管进入饱和区导通，将所述的电压限制电路短路，由第一PNP三极管的集电极为后级电路供电；
    当所述的输入电压Vin在控制电路判断电压区间内时，所述的控制电路输出的控制电压Vg与所述输入电压Vin压差逐渐减小，所述的第一PNP三极管进入放大区，同时所述的电压限制电路逐渐导通，由第一PNP三极管的集电极和电压限制电路的输出端共同为后级电路供电；
    当所述的输入电压Vin大于控制电路判断电压区间的最大值时，所述的控制电路输出的控制电压Vg与所述输入电压Vin无压差，所述的第一PNP三极管进入截至区关断，由所述的电压限制电路的输出端为后级电路供电。
  2. 根据权利要求1所述的一种超低输入电压的启动电路，其特征在于：当所述的输入电压Vin电压从小往大过度的过程，允许第一PNP三极管的输入电压即控制电压Vg与所述启动电路的输入电压Vin压差逐渐减小；也允许第一PNP三极管的输入电压与所述启动电路输入电压Vin压差从大于第一PNP三极管的饱和导通电压突变为无压差；
    当所述的控制电压Vg从低电位向高电位过度的过程，允许第一PNP三极管从饱和导通区进入放大区，再逐渐进入截止区；也允许第一PNP三极管从饱和导 通状态直接跳变为截止状态；
    当所述的第一PNP三极管工作状态变化的过程，允许存在所述电压限制电路与第一PNP三级管同时导通的区间，也允许只存在第一PNP三极管或者电压限制电路独立导通的情况。
  3. 根据权利要求2所述的一种超低输入电压的启动电路，其特征在于：所述的电压限制电路包括第四电阻、第五电阻、第一电容、第一NPN三极管、第二二极管；所述的第四电阻一端接第一NPN三极管的集电极，第四电阻另一端连接输入电压Vin；第五电阻的一端连接输入电压Vin，第五电阻另一端连接第一NPN三极管的基极；第一电容的一端连接第一NPN三极管的基极，第一电容的另一端连接地；第二二极管的阴极连接第一NPN三极管的基极，第二二极管的阳极连接地；第一NPN三极管的发射极作为所述电压限制电路的输出端，连接第一PNP三极管的集电极。
  4. 根据权利要求3所述的一种超低输入电压的启动电路，其特征在于：第二二极管为稳压管。
  5. 根据权利要求2所述的一种超低输入电压的启动电路，其特征在于：所述的电压限制电路包括第一芯片，所述的第一芯片具有将输入电压Vin转换为稳定的电压范围输出的功能；所述的第一芯片的输入端连接输入电压Vin，第一芯片的接地端接地，第一芯片的输出端连接第一PNP三极管的集电极。
  6. 根据权利要求2所述的一种超低输入电压的启动电路，其特征在于：所述的电压限制电路包括第二芯片，所述的第二芯片具有将输入电压Vin转换为固定输出电压的功能；所述第二芯片的输入端连接输入电压Vin，第二芯片的接地端接地，第二芯片的输出端连接第一PNP三极管的集电极作为所述启动电路的输出端。
  7. 根据权利要求1至6任意一项所述的一种超低输入电压的启动电路，其特征在于：所述超低输入电压的启动电路的地与外部供电装置、后级电路共地。
  8. 根据权利要求7所述的一种超低输入电压的启动电路，其特征在于：所述的控制电路包括第一电阻、第二电阻、第三电阻、第一二极管、第二PNP三极管；所述的第三电阻连接于输入电压Vin与第一二极管的阴极之间；第一二极管的阳极接地；第二电阻的一端连接到第三电阻与第一二极管的阴极的连接点，第 二电阻的另一端与第二PNP三极管的基极连接；第二PNP三极管的发射极连接输入电压Vin，第二PNP三极管的集电极连接第一电阻的一端并作为控制电路的输出端输出控制电压Vg；第一电阻的另一端接地。
  9. 根据权利要求8所述的一种超低输入电压的启动电路，其特征在于：第一二极管为稳压管。
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