WO2019140625A1 - 发光二极管及其制作方法 - Google Patents

发光二极管及其制作方法 Download PDF

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Publication number
WO2019140625A1
WO2019140625A1 PCT/CN2018/073362 CN2018073362W WO2019140625A1 WO 2019140625 A1 WO2019140625 A1 WO 2019140625A1 CN 2018073362 W CN2018073362 W CN 2018073362W WO 2019140625 A1 WO2019140625 A1 WO 2019140625A1
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Prior art keywords
layer
electrode
light emitting
emitting diode
region
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PCT/CN2018/073362
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English (en)
French (fr)
Inventor
林素慧
王�锋
洪灵愿
许圣贤
陈思河
陈大钟
彭康伟
张家宏
Original Assignee
厦门市三安光电科技有限公司
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Application filed by 厦门市三安光电科技有限公司 filed Critical 厦门市三安光电科技有限公司
Priority to PCT/CN2018/073362 priority Critical patent/WO2019140625A1/zh
Priority to CN202111094317.2A priority patent/CN113851564B/zh
Priority to CN201880003521.9A priority patent/CN109844968B/zh
Priority to KR1020207018398A priority patent/KR102377198B1/ko
Publication of WO2019140625A1 publication Critical patent/WO2019140625A1/zh
Priority to US16/931,056 priority patent/US11532769B2/en
Priority to US17/987,001 priority patent/US20230076695A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body

Definitions

  • the present invention relates to semiconductor devices, and more particularly to a light emitting diode and a method of fabricating the same.
  • light-emitting diodes have advantages such as long life, small size, high shock resistance, low heat generation, and low power consumption, light-emitting diodes have been widely used in home appliances and indicators or light sources of various instruments.
  • the chip fabrication process is generally composed of mesa etching (MESA), fabrication of a transparent conductive layer (for example), fabrication of electrodes, and fabrication of a protective layer.
  • the LED chip formed is as shown in FIG. 1 and generally includes a substrate 101.
  • gallium nitride 1 ⁇ p-GaN usually has a lower mobility due to its carrier mobility. The bottom causes a certain amount of current congestion.
  • the chip fabrication process typically includes at least mesa etching (MESA), fabrication of a current blocking layer, fabrication of a current spreading layer (eg, 111), fabrication of electrodes, and fabrication of a protective layer.
  • MEA mesa etching
  • the present invention provides a light emitting diode and a method for fabricating the same, which form a protective layer, a transparent conductive layer and an insulating layer in sequence under the expanded portion of the electrode, thereby effectively improving the light extraction efficiency and reliability of the light emitting diode.
  • a light emitting diode includes: a light emitting epitaxial layer comprising, in order from top to bottom, a first semiconductor layer, a light emitting layer, and a second semiconductor layer, wherein a first electrode region is disposed on an upper surface thereof a pad layer and an extension region; an insulating layer formed over the extension region of the first semiconductor layer; a transparent conductive layer formed over the surface of the first semiconductor layer and covering the insulating layer; a protective layer formed on a surface of the transparent conductive layer, forming a first opening in the extended region to expose the extended region ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • a portion of the surface of the transparent conductive layer a first electrode formed on the protective layer, including a pad portion and an extension portion, the expansion portion forming an electrical property with the transparent conductive layer of the extension region through the first opening connection.
  • a light emitting diode includes: a light emitting epitaxial layer, which is sequentially packaged from top to bottom
  • An electrode region wherein the second electrode region includes a pad region and an extension region, the extension region having a series of through holes penetrating the first semiconductor layer and the light emitting layer, wherein the through hole exposes a portion of the second semiconductor layer
  • An insulating layer formed on a surface of the extension region of the second electrode region of the first semiconductor layer; a transparent conductive layer formed on a surface of the first semiconductor layer covering the insulating layer Forming an opening at the through hole; a protective layer formed on a surface of the transparent conductive layer covering a sidewall of the through hole to expose a bottom surface of the through hole; a first electrode formed on the first electrode Forming an ohmic contact with the transparent conductive layer on the protective layer of the region; forming a second electrode on the protective layer of the second electrode region, filling the via hole, and forming an electrical property with the second semiconductor layer connection.
  • a method for fabricating a light emitting diode includes the steps of: (1) forming a light emitting epitaxial layer comprising a first semiconductor layer, a light emitting layer and a second semiconductor layer in order from top to bottom; (2) defining, on the upper surface of the light-emitting epitaxial layer, a first electrode region including a pad region and an extension region; (3) forming an insulating layer in an extended region of the light-emitting epitaxial layer; (4) performing the light-emitting epitaxy Forming a transparent conductive layer on the surface of the layer and on the surface of the insulating layer; (5) forming a protective layer on the transparent conductive layer, respectively forming a first opening in the extended region to expose the extended region a transparent conductive layer surface; (6) forming a first electrode on the protective protective layer, and forming an electrical connection with the transparent conductive layer through the first opening.
  • a light emitting diode includes: a light emitting epitaxial layer including a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from top to bottom; a first electrode, including the a semiconductor layer is electrically connected to the first semiconductor layer; a second electrode is formed on the second semiconductor layer and electrically connected to the second semiconductor layer; An electrode has a pad portion and an extension portion, wherein a protective layer, a transparent conductive layer, and an insulating layer are sequentially disposed between the extension portion and the first semiconductor layer.
  • the thickness of the insulating layer and the thickness of the protective layer are both Where X is the emission wavelength of the luminescent layer, and 1 ⁇ is a natural number of 1 or more, ! 1 is the refractive index of the insulating layer or the protective layer. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the insulating layer is composed of a series of block structures.
  • the protective layer covers an upper surface of the light emitting epitaxial layer, and some openings are formed as conductive paths only under the first electrode and the second electrode.
  • the protective layer has an opening area under the pad portion of the first electrode that is smaller than an area of the pad portion of the first electrode.
  • the pad portion of the first electrode directly contacts the surface of the first semiconductor layer.
  • the protective layer and the transparent conductive layer are disposed between the pad portion of the first electrode and the first semiconductor layer, and the pad portion of the first electrode simultaneously and the protective layer Direct contact with the surface of the first semiconductor layer.
  • the upper surface of the pad portion of the first electrode forms a stepped structure.
  • the second electrode includes a pad portion and an extension portion, and the insulating layer and the protective layer are disposed under the pad portion of the second electrode.
  • the second electrode includes a pad portion and an extension portion, and an extension portion of the second electrode is disposed on the first semiconductor layer, and is sequentially disposed between the first semiconductor layer and the first semiconductor layer A protective layer and a transparent conductive layer are electrically connected to the second semiconductor layer through a series of through holes penetrating the protective layer, the transparent conductive layer, the first semiconductor layer and the light emitting layer.
  • the protective layer, the transparent conductive layer and the insulating layer are sequentially disposed between the expanded portion of the second electrode and the first semiconductor layer.
  • a light emitting diode includes: a light emitting epitaxial layer, including a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from top to bottom; a first electrode formed on the first a second electrode, formed on the second semiconductor layer, and electrically connected to the second semiconductor layer; the second The electrode has a pad portion and an extension portion, and the extension portion is disposed on the first semiconductor layer, and an insulating layer, a transparent conductive layer and a protective layer are sequentially disposed between the electrode and the first semiconductor layer, and pass through A series of through holes penetrating the protective layer, the transparent conductive layer, the insulating layer, the first semiconductor layer, and the light emitting layer are electrically connected to the second semiconductor layer.
  • the thickness of the insulating layer and the thickness of the protective layer are both ⁇ /411 ⁇ (;2] ⁇ 1), wherein X is the wavelength of light emitted by the light emitting layer, and 1 ⁇ is 1 or more. Natural number, ! 1 is the refractive index of the insulating layer or the protective layer. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the insulating layer is composed of a series of block structures.
  • the protective layer covers an upper surface of the light emitting epitaxial layer, and some openings are formed as conductive paths only under the first electrode and the second electrode.
  • the first electrode includes a pad portion and an extension portion, and the pad portion of the first electrode directly contacts the first semiconductor layer.
  • the first electrode includes a pad portion and an extension portion, and a protective layer and a transparent conductive layer are sequentially disposed between the expanded portion of the first electrode and the first semiconductor layer.
  • the protective layer and the insulating layer are disposed between the pad portion of the second electrode and the second semiconductor layer.
  • a light emitting diode includes: a light emitting epitaxial layer including a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from top to bottom; and a protective layer formed on the light emitting layer a plurality of openings are formed as conductive paths on the epitaxial layer; a first electrode is formed on the protective layer and electrically connected to the first semiconductor layer; and a second electrode is formed on the protective layer And electrically connected to the second semiconductor layer; the first electrode has a pad portion and an extension portion, wherein an upper surface of the expansion portion has a high and low undulation shape.
  • the upper surface of the expanded portion of the first electrode has three or more different heights.
  • the intermediate portion of the upper surface of the pad portion of the first electrode forms a groove structure, and the groove structure has at least two steps.
  • a light emitting diode includes: a light emitting epitaxial layer, including a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from top to bottom; a first electrode formed in the a first semiconductor layer is electrically connected to the first semiconductor layer; a second electrode is formed on the second semiconductor layer and electrically connected to the second semiconductor layer; The second electrode has a pad portion and an extension portion, wherein a protective layer and an insulating layer are sequentially disposed between the pad portion and the second semiconductor layer, and the protective layer covers the upper surface of the light emitting epitaxial layer, Some openings are formed under the first electrode and the second electrode as conductive paths.
  • the thickness of the insulating layer and the thickness of the protective layer are both Where X is the emission wavelength of the luminescent layer, and 1 ⁇ is a natural number of 1 or more, ! 1 is the refractive index of the insulating layer or the protective layer.
  • the total thickness of the insulating layer and the protective layer is 30011111 or more. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • a light emitting diode includes: a light emitting epitaxial layer including a first semiconductor layer, a light emitting layer, and a second semiconductor layer in order from top to bottom; and a first electrode, including Above the first semiconductor layer, and electrically connected to the first semiconductor layer; a second electrode formed on the second semiconductor layer and electrically connected to the second semiconductor layer;
  • the first electrode has a pad portion and an expanded portion, and an insulating layer is disposed under the pad portion, the insulating layer has at least two block structures distributed around a central region of the pad region, the block The structures are separated from each other.
  • the block structure has a gap therebetween, and a connection portion between the land portion of the first electrode and the expansion portion is located in the gap.
  • the light emitting diode further includes a protective layer covering an upper surface of the light emitting epitaxial layer, and forming some openings as conductive paths only under the first electrode and the second electrode.
  • the protective layer is located between the first semiconductor layer and the first electrode.
  • the protective layer forms an opening under the pad portion of the first electrode, the area of which is smaller than the area of the pad portion of the first electrode.
  • the block structures of the insulating layer enclose an inner region, and the openings are located in the region.
  • the light-emitting diode first forms a protective layer on the transparent conductive layer, and then forms an electrode, which protects the light-emitting diode from damage on the one hand, and acts as a composite current block together with the current blocking layer on the other hand. a layer for suppressing current over-injection under the electrode and increasing current spreading of the transparent conductive layer;
  • the first electrode of the light-emitting diode directly contacts the semiconductor layer in the pad region, thereby effectively increasing the adhesion between the electrode and the epitaxial layer, thereby reducing the risk of the electrode and the adhesion interface falling off during wire bonding;
  • Insulation layer / transparent conductive layer / protective layer / electrode extension strip design to form a full-angle mirror, which can improve the reflection ability of the electrode and its extension area, and reduce the light absorption efficiency;
  • the light-emitting diode first forms a protective layer on the transparent conductive layer, and then forms an electrode, which can reduce the probability that the active metal in the electrode structure is oxidized during the manufacturing process of the protective layer; ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the insulating layer under the first electrode extension portion can suppress current injection under the expansion portion near the first electrode, increasing the length and uniformity of current injection;
  • the low undulation distribution can reduce the damage of the extended strip during the late filming, transporting and transferring; [0045] (8) An insulating layer is disposed under the second electrode expansion portion to increase the lateral expansion and uniformity of the current.
  • FIG. 1 is a schematic structural view of a conventional light emitting diode.
  • FIG. 2 is a schematic structural view of another conventional light emitting diode.
  • 3-5 are schematic structural views of a light emitting diode according to Embodiment 1 of the present invention.
  • Chip reflectance comparison chart [0052] Chip reflectance comparison chart.
  • FIG. 7 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 4.
  • FIG. 8 is a reticle diagram for fabricating the light emitting diode shown in FIG. 3.
  • FIGS. 9 and 10 are schematic structural views of a light emitting diode according to Embodiment 2 of the present invention.
  • 11 to 12 are schematic views showing the structure of a light emitting diode according to Embodiment 3 of the present invention.
  • FIG. 13 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 12.
  • FIGS. 14-15 are schematic diagrams showing the structure of a light emitting diode according to Embodiment 4 of the present invention.
  • FIG. 16 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 15. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • 17-18 is a schematic structural view of a light emitting diode according to Embodiment 5 of the present invention.
  • FIG. 19 is a schematic structural view of a light emitting diode according to Embodiment 6 of the present invention.
  • 20-21 is a schematic structural view of a light emitting diode according to Embodiment 7 of the present invention.
  • FIG. 22 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 21.
  • FIG. 23 is a reticle diagram of the light emitting diode shown in FIG. 21.
  • FIG. 24 is a schematic structural view of a light emitting diode according to Embodiment 8 of the present invention.
  • FIG. 25 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 24.
  • 26 is a schematic structural view of a light emitting diode according to Embodiment 9 of the present invention.
  • FIG. 27 is a partial enlarged view of a first electrode of the light emitting diode shown in FIG. 26.
  • 28-29 is a schematic structural view of a light emitting diode according to Embodiment 10 of the present invention.
  • FIG. 30 is a reticle diagram of the light emitting diode shown in FIG. 29.
  • FIG. 31 is a schematic structural view of a light emitting diode according to Embodiment 11 of the present invention.
  • FIG. 32 is a schematic structural view of a light emitting diode according to Embodiment 12 of the present invention.
  • FIG. 33 is a reticle view of an insulating layer of the light emitting diode shown in FIG. 32.
  • 34-35 are schematic diagrams showing the structure of a light emitting diode according to Embodiment 10 of the present invention.
  • FIG. 36 is a partial enlarged view of a second electrode of the light emitting diode shown in FIG. 35.
  • Chip reflectance comparison chart [0076] Chip reflectance comparison chart.
  • FIG. 3 is a plan view showing a light emitting diode according to a first preferred embodiment of the present invention
  • FIG. 4 is a side cross-sectional view taken along line VIII of FIG. Line 3 of Figure 3: side cross-sectional view taken at 8-:8.
  • the light emitting diode comprises: a substrate 201, an X-type layer 211, a light-emitting layer 212, ?
  • the first electrode 241 includes a pad 243 and an extension 244, and the second electrode 242 includes a pad 245 and an extension 246.
  • the substrate 201 is selected to include, but is not limited to, sapphire, aluminum nitride, gallium nitride, silicon, silicon carbide, and the surface structure thereof may be a planar structure or a patterned structure;
  • the X-type layer 211 is formed on the sapphire On the substrate 201;
  • the light-emitting layer 212 is formed on the X-type layer 211;
  • the pattern layer 213 is formed on the light-emitting layer 212; a mesa surface of the second electrode is formed on the pattern layer 213, and a series of through holes 254 are formed through the pattern layer 213 and the light-emitting layer 212, and a part of the surface of the 11-type layer 211 is exposed, and the surface is insulated.
  • the layer 221 is formed on the pattern layer 213 and distributed under the position of the first electrode 241.
  • the transparent conductive layer 230 is formed on the pattern layer 213 and covers the insulating layer 221.
  • the protective layer 222 is formed on the transparent conductive layer 230. At the same time covering the upper surface of the countertop and connecting the countertop with?
  • the sidewall between the upper surfaces of the layer 213, that is, the surface substantially covering the entire device, and the openings 251, 252, 254, and 255 are formed at corresponding positions of the electrodes; the first electrode 241 and the second electrode 242 form the semiconductor protective layer 222
  • the pad portion 243 and the extension portion 244 of the first electrode are in contact with the transparent conductive layer through the openings 252 and 251, respectively, and the pad portion 245 of the second electrode is located above the mesa through the annular opening 255 and the N-type layer.
  • the extension portion 246 of the second electrode is formed on the protective layer above the ?-type layer, and is in contact with the N-type layer 211 through the through hole 254
  • the insulating layer 221 is distributed in a block shape and is composed of a series of discrete block structures.
  • the expanded portion 244 of the first electrode has a protective layer 222, a transparent conductive layer 230, and an insulating layer 221 in this order. ? Type layer 2 13 .
  • the materials of the insulating layer 221 and the protective layer 223 are preferably low refractive index insulating materials, preferably refracting. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the rate of 9 is less than 1.5, and the materials may be the same or different.
  • the protective layer 222 forms an opening 251 under the expanded portion 244 of the first electrode.
  • the opening 251 is offset from the insulating layer 221, and the upper surface of the corresponding expanded portion 244 of the first electrode is stepped, and has a first step surface 244, a second step surface 2446, and a third step surface 244 (
  • the light-emitting diode of the embodiment forms an insulating layer 221 as a current blocking layer under the expanded portion 244 of the first electrode, which can suppress current over-injection under the first electrode expansion portion, increase the length and uniformity of current injection.
  • the protective layer 22 2 is formed on the transparent conductive layer 220, and the electrode 244 is formed, which can reduce the probability of the active metal in the electrode structure being oxidized during the manufacturing process of the protective layer; the design of the insulating layer 221 and the protective layer 222 can utilize the refractive effect. Reduce the metal light blocking area of the electrode and its extension area, and improve Further, the four layers of the insulating layer 221, the transparent conductive layer 220, the protective layer 222, and the electrode extension portion 244 can form a full-angle mirror, thereby improving the reflection capability of the electrode and its extended region, and reducing the light absorption efficiency.
  • Chip reflectance comparison chart in which Comparative Example 1 Chip, comparison example 2 Chip, as can be seen from the figure The overall reflectivity of the structure is significantly better than the reflectivity of the other two structures.
  • the protective layer 222 material can be selected 310 110 2
  • the protective layer 222 protects the surface of the light-emitting diode, and on the other hand, acts as a current blocking layer for suppressing current over-injection under the electrode and increasing current spreading of the transparent conductive layer, taking into consideration both
  • the thickness of the film (1 is preferably /4 (21 ⁇ 1), where ⁇ is the wavelength of the light emitted by the light-emitting layer 212, which is the refractive index of the protective layer, and the preferred value of 1 ⁇ is 1 or more. 2 ⁇ 3, the corresponding thickness is preferably 150 ⁇ 50 ⁇ 11111. When the thickness of the protective layer is too small, it is not conducive to the current blocking layer and protection. When the thickness is too large, the absorption of the material itself will additionally increase the light loss.
  • the transparent conductive layer 230 forms an opening 253 at a position corresponding to the pad 243 of the first electrode, and an insulating layer 221 is formed in the opening 253, and the diameter thereof is preferably smaller than the opening.
  • the diameter of 2 53 , the protective layer 222 forms an opening 252 at a position corresponding to the pad 243 of the first electrode, and an opening 251 is formed at a position corresponding to the expanded portion 244 of the first electrode to expose the transparent conductive layer 230.
  • the opening 252 has an annular structure, and the inner diameter of the opening 252 is defined as 01, the diameter of the outer ring is 02, the diameter of the opening 253 is ⁇ 4, and the diameter of the insulating layer 221 below the pad portion 244 is 03.
  • the relationship between the four is preferably: 02>04> ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the exposed surface of the pad region of the first electrode is the protective layer 222 and the transparent electrode layer 230 from the outside to the inside.
  • the pattern layer 213 and the protective layer 222, the pad portion 243 of the first electrode formed thereon can be simultaneously?
  • the pattern layer 213, the transparent conductive layer 230, and the protective layer 222 are in contact with each other, and the upper surface of the pad portion 243 of the first electrode has a stepped shape.
  • the protective layer 222 under the pad portion 243 of the first electrode serves as a current blocking layer.
  • the insulating layer 221 is not formed in the opening 253, and the protective layer 222 directly fills the opening 253.
  • the insulating layer 221 is not formed in the opening 253, and the opening 252 is a hole-like structure, the first electrode There is no insulating layer 221 and protective layer 222 under the center of the pad portion 243, which is directly related to?
  • the type layer 213 is in contact, so that the pad portion 2 43 of the first electrode can be increased.
  • the contact area of the layer 213 and the adhesion between the electrode and the nitride interface are good, and the risk of the first electrode and the adhesion interface falling off during wire bonding can be reduced.
  • the opening 252 of the protective layer 222 under the pad portion 243 of the first electrode may have at least one antenna 252 ⁇ extending in a direction away from the pad portion 243, the number of antennas It ranges from 1 to 20.
  • the pad portion 243 of the first electrode is in contact with the transparent conductive layer 230 through the antenna 252 , and the contact area between the pad portion of the first electrode and the transparent conductive layer can be increased, which facilitates the diffusion of current, thereby alleviating the soldering of the first electrode. Current crowding on the disk and extension strips reduces the risk of metal precipitation and electrode burnout.
  • the protective layer of the LED protects the LED from damage on the one hand, and directly acts as a current blocking layer on the other hand, for suppressing current over-injection under the electrode and increasing the current of the transparent conductive layer. Diffusion; the first electrode directly contacts the semiconductor layer in the pad region, effectively increasing the adhesion between the electrode and the epitaxial layer, and reducing the risk of the electrode and the adhesion interface falling off during the wire bonding;
  • the step design can effectively buffer the wire impact force and reduce the impact and damage of the wire bonding process on the first electrode pad;
  • the extension of the first electrode is located on the protective layer, and through the opening of the protective layer and the transparent conductive layer Contacting, the extension strip of the first electrode is formed into a stepped shape of up-and-down shape, increasing the angle of light emission at the extension strip, improving the light extraction efficiency, and at the same time, reducing the height of the electrode and the low step undulation of the extension portion of the electrode
  • the manufacturing method of the foregoing light-emitting diode mainly includes mesa etching (MESA), forming an insulating layer 221, ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • FIG. 8 shows that the five processes involve corresponding mask patterns, which are briefly described below.
  • a light-emitting epitaxial layer structure which generally includes a substrate 201, an X-type layer 211, a light-emitting layer 212, and a pattern layer 213.
  • the first electrode region and the second electrode region are defined on the surface of the light-emitting epitaxial layer, the air-open region is removed, the mesa 210 of the second electrode is formed, and a series of via holes 254 are formed. ;
  • an insulating layer 221 is formed on the ?-type layer 213 of the light-emitting epitaxial layer, which is distributed in a block shape;
  • a transparent conductive layer 2 30 is formed on the pattern layer 213 of the light-emitting epitaxial layer, etching removes the mesa region, and is formed in the pad region of the first electrode region. Opening 253, forming an opening at a position corresponding to the through hole 254;
  • a protective layer 222 is formed on the transparent conductive layer 230, and the protective layer 222 simultaneously covers the sidewall of the via 254, between the transparent conductive layer 230 and the mesa 210.
  • the surface of the sidewall and the mesa 210, the opening 252 is formed in the pad region of the first electrode region, the opening 25 is formed in the extension region of the first electrode region, the opening 255 is formed on the mesa 210, and the opening is formed in the extension region of the second electrode. 254.
  • the opening 252 is an annular structure, the annular inner ring diameter is smaller than the diameter 04 of the opening 253, and the outer ring diameter 02 is larger than the diameter 04 of the opening 253, and the pad area of the first electrode region is exposed at this time.
  • the surface from the outside to the inside is a protective layer 222, a transparent conductive layer 230, a ? layer 213 and a protective layer 222;
  • the first electrode 241 and the second electrode 2 42 are formed on the protective layer 222 with reference to the pattern shown in (6) of FIG.
  • the pad portion 243 of the first electrode 241 is in contact with the pattern layer 213, the transparent conductive layer 230, and the protective layer 22 2 at the same time.
  • the shape and size of the opening 252 are not limited to the above description, and may also directly form an acyclic structure.
  • the opening 252 can also be designed as a series of antenna structures distributed around the pad region, exposing the transparent conductive layer, and the pad region does not form an opening structure. The portion is completely formed on the protective layer 222 and can be connected to the antennae by metal wires.
  • FIG. 9 and 10 are schematic views showing the structure of another light emitting diode, wherein FIG. 9 is a plan view, and FIG. 10 is a cross-sectional view taken along line VIII of FIG.
  • the insulating layer 221 under the first electrode 241 is connected together, so that the current injection under the electrode can be completely avoided, and the height of the first electrode extension 244 is high. All raised, using the refractive effect can effectively reduce the metal light blocking area of the electrode extension, thereby improving The light extraction efficiency.
  • FIG. 11 to 12 are schematic views showing the structure of another light emitting diode, wherein FIG. 11 is a plan view, and FIG. 12 is a cross-sectional view taken along the line of FIG.
  • the insulating layer 221 is overlapped with the opening 251 of the protective layer 222, wherein the area of the insulating layer 221 is smaller than the opening.
  • Figure 13 shows a partial enlarged view of the expanded portion 244 of the first electrode.
  • the transparent conductive layer 230 forms a gap between the opening 251 and the protective layer 222.
  • the expanded portion 244 of the first electrode fills the gap.
  • the first electrode is The position of the insulating layer 221 forms a nail-forming structure, which increases the adhesion between the electrode extending portion 244 and the protective layer 222 to prevent it from falling, and on the other hand increases the contact area between the expanded portion 244 of the first electrode and the transparent conductive layer 230. Conducive to the diffusion of current, thereby alleviating the current congestion effect on the pad portion and the extension strip of the first electrode, and reducing the risk of metal precipitation and electrode burnout.
  • FIG. 14 to 15 are schematic views showing the structure of another light emitting diode, wherein FIG. 14 is a plan view, and FIG. 15 is a cross-sectional view taken along the line of FIG.
  • the area of the insulating layer 221 is larger than the area of the opening 251 under the expanded portion of the first electrode.
  • 16 shows a partial enlarged view of the expanded portion 244 of the first electrode. At the position of the insulating layer 221, the side of the expanded portion 244 of the first electrode that is in contact with the protective layer 222 has a nail-like structure, and the electrode extension portion and the protection are added.
  • the adhesion of the layer prevents it from falling; at the same time, the upper surface of the expanded portion of the first electrode has a high step 2446 and a low step 244 eight undulations, and the area of the high step 2446 is much smaller than the area of the low step 244 , greatly reduce the contact area of the electrode with other objects, effectively reduce the damage of the extended strip during the subsequent filming, transport and transfer, and reduce the dirt of the expansion.
  • 17-18 shows a schematic structural view of another light emitting diode. Different from Embodiment 3, this implementation ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the insulating layer 221 under the expanded portion 244 of the first electrode is non-uniformly distributed for the purpose of further optimizing the current distribution. Specifically, at a position close to the pad portion 243 of the first electrode, the insulating layer 221 has the largest distribution density, and as it moves away from the pad portion, its density becomes smaller and smaller, showing a dense and dense distribution.
  • FIG. 19 shows a schematic structural view of another light emitting diode.
  • the insulating layer under the expanded portion 244 of the first electrode is also non-uniformly distributed to achieve further optimization of current distribution.
  • the insulating layer 221 under the first electrode extension portion is composed of a series of block structures 221 & 221 (1) having different areas, and is located near the pad portion 2 43 of the first electrode, and the block structure 221 & area The largest, and as the distance from the land portion is smaller, the area of the block structure 221 (1 having the farthest from the land portion 243) is the smallest.
  • FIG. 20 to 21 are schematic views showing the structure of another light emitting diode, wherein FIG. 20 is a plan view, and FIG. 21 is a cross-sectional view taken along the line of FIG.
  • the insulating layer 221 under the pad portion 243 of the first electrode has an annular structure, and has an opening 256 therein, corresponding to the transparent conductive layer 230.
  • An opening 253 having a size greater than or equal to the size of the opening 256 is formed, and the protective layer 222 forms openings 252 and 257, wherein the opening 251 is an annular structure for exposing a portion of the surface of the transparent conducting layer 230 such that the pad of the first electrode
  • the portion 243 can contact the surface of the partially transparent conductive layer 230, and the opening 257 is used for bareness?
  • the surface of the pattern layer is such that the pad portion 243 of the first electrode can contact a portion of the surface of the pattern layer 213 with an annular structure 222 between the two openings.
  • the pad portion 243 of the first electrode shows a partial enlarged view of the pad portion 243 of the first electrode, in which the diameter of the opening 253 of the transparent conductive layer 230 at the pad portion is defined as 04, and the diameter of the inner ring of the annular insulating layer 221 is 05. 06, the diameter of the opening 257 is 07, and the relationship of the four is: 06>04>05>07, such that the central portion of the pad portion 243 of the first electrode contacts the pattern layer 213, and the upper surface forms the first position at the center position.
  • a groove structure 243 and forming an annular second groove structure 2436 around the first groove 243, wherein the depth of the first groove structure 243 is greater than the depth of the second groove 2436, which is favorable for subsequent wire bonding , can form a nail-like structure.
  • FIG. 23 shows a mask pattern of the mesa 210, the insulating layer 221, the transparent conductive layer 230, the protective layer 222, and the electrodes of the light-emitting diode shown in FIG. 21, respectively, which is different from the mask pattern shown in FIG.
  • the insulating layer 221 ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • the insulating layer located in the pad region of the first electrode has an annular shape and has an opening 256, and in the mask pattern of the protective layer 222, an opening 257 is formed in the center of the first electrode pad portion.
  • the openings 252 and 257 of the protective layer 222 at the pad portion 243 of the first electrode may be combined into one opening, that is, the annular structure 222 between the two openings is removed, at this time.
  • the pad portion 243 can be in contact with the protective layer 222, the transparent conductive layer 230, the insulating layer 221 and the ?-type layer 213 at the same time, and a groove structure can be formed in the middle of the upper surface thereof, and the groove structure can form two steps, or even three The step is also very beneficial for the later package wiring.
  • FIG. 24 shows a schematic structural view of another light emitting diode, and a corresponding top view thereof can be referred to FIG.
  • the thickness of the insulating layer 221 is significantly larger than the thickness of the protective layer 222, and even greater than the total thickness of the transparent conductive layer 230 and the protective layer 222.
  • the difference between the thickness of the insulating layer 221 and the thickness of the protective layer 222 is ⁇ /411 ⁇ (2, where ⁇ is the light-emitting wavelength of the light-emitting layer 212, and 11 is the refractive index of the insulating layer. 1 ⁇ is a natural number of 0 or more.
  • the thickness of the insulating layer is 300 ⁇ 100011111
  • the thickness of the protective layer is 100 ⁇ 25 ⁇ 11111.
  • FIG. 25 shows a partial enlarged view of the expanded portion 244 of the first electrode.
  • the area of the transparent conductive layer 230 can be increased, thereby increasing the contact area between the expanded portion 244 of the first electrode and the transparent conductive layer 230, which is advantageous for current. Diffusion, thereby alleviating the current congestion effect on the pad portion and the extension strip of the first electrode, reducing the risk of metal precipitation and electrode burning; on the other hand, a groove can be formed between the adjacent two insulating layer block structures The structure increases the adhesion of the expanded portion 244 of the first electrode and reduces the risk of falling off from the attached interface.
  • FIG. 26 shows a schematic structural view of another light emitting diode, and a corresponding top view thereof can be referred to FIG.
  • the thickness of the protective layer 222 is significantly thicker than the thickness of the insulating layer 221.
  • the difference between the thickness of the insulating layer 221 and the thickness of the protective layer 222 is ⁇ /4! ⁇ (;2, where ⁇ is the wavelength of the light emitted by the light-emitting layer,
  • is the wavelength of the light emitted by the light-emitting layer
  • 1 ⁇ is a natural number of 0 or more.
  • the thickness of the insulating layer is 50 ⁇ 30 ⁇ 11111
  • the thickness of the protective layer is 200 ⁇ 200011111. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362
  • FIG. 27 shows a partial enlarged view of the expanded portion 244 of the first electrode.
  • the position of the insulating layer overlaps with the position of the opening 251 of the protective layer, thereby being in the insulating layer 221
  • the corresponding position forms a series of groove structures, and the expansion portion 244 of the first electrode fills the groove structure, thereby forming a nail makeup structure at the adhesion interface with the protection layer, which greatly increases the attachment of the expansion portion 244 of the first electrode. Focusing on it reduces the risk of shedding from the attachment interface.
  • FIG. 28 to 29 are schematic views showing the structure of another light emitting diode, wherein FIG. 28 is a plan view, and FIG. 29 is a cross-sectional view taken along the line of FIG.
  • the first insulating portion 221 is formed directly under the pad portion 243 of the first electrode while surrounding the center directly below the pad portion 243.
  • the second insulating portion 22 is formed in a wraparound manner.
  • the number of the second insulating portions 22 may be 2 to 50, which are separated from each other, and the outer diameter thereof may be larger than the diameter of the pad portion 243 of the first electrode, or may be less than or equal to the first portion.
  • the diameter of the pad portion 243 of one electrode may be 2 to 50, which are separated from each other, and the outer diameter thereof may be larger than the diameter of the pad portion 243 of the first electrode, or may be less than or equal to the first portion.
  • the diameter of the pad portion 243 of one electrode may be 2 to 50, which are separated from each other, and the outer diameter thereof may
  • the opening 222 of the protective layer 222 under the pad portion of the first electrode is also The outwardly extending antenna 252 (:, in the present embodiment, the antenna is located in a gap between the circumferentially separated second insulating portions 2216.
  • the circumferentially separated second insulating portion 2216 can increase the undulation of the surface of the pad portion 243 of the first electrode, enhance the reliability of the bonding wire, and the solder ball is not easily peeled off or external force. It is not easy to be pushed off under the action.
  • FIG. 31 is a schematic structural view of another light emitting diode, which is different from the embodiment 10 in the light emitting diode structure of the first embodiment, between the pad portion 243 of the first electrode and the expanded portion 244.
  • the connection portion 243 (which does not intersect the second insulating portion 22) can ensure that the position of the pad portion 243 of the first electrode is higher than the connection portion 243 between the pad portion and the extension portion, in the subsequent bonding process In the middle, the solder ball does not easily damage the connection portion 243 (:, the stability of the core particle can be improved.
  • the opening 222 of the same protective layer 222 under the pad portion of the first electrode can also extend outwardly from the antenna 252 (:, in this embodiment, the antenna is separated from the wraparound second The insulating portions 2216 intersect.
  • FIG. 32 is a schematic structural diagram of another light emitting diode, which is different from the embodiment 10 in that, in the light emitting diode structure of the embodiment, under the pad portion 243 of the first electrode, the pad is surrounded.
  • the center of the portion 243 is formed with a wraparound insulating portion 22, and the central portion of the pad portion 243 of the first electrode directly contacts the surface of the ?-type layer 213.
  • Figure 33 shows the pattern of the insulating layer 221 .
  • the pad portion 243 of the first electrode is directly connected to?
  • the pattern layer 213 is in contact to increase the adhesion of the pad portion to the epitaxial layer.
  • the intermediate portion of the upper surface of the pad portion 243 of the formed first electrode forms a groove 2436 having a step, which is very advantageous for subsequent Make a line.
  • FIG. 34 to 35 are schematic views showing the structure of another light emitting diode, wherein FIG. 34 is a plan view, and FIG. 35 is a cross-sectional view taken along the line of FIG.
  • the insulating layer 221 is simultaneously formed under the first electrode 241 and the second electrode 242, and the insulating layer 221 also exhibits a discrete block distribution.
  • the expanded portion 246 of the second electrode is formed on the protective layer 222, and the transparent conductive layer 230, the insulating layer 221 and the ?
  • the layer 213 is electrically connected to the N-type layer 211 through a series of vias 254, and the pad portion 245 of the second electrode also has a protective layer 222 and an insulating layer 221.
  • the uniformity of current crowding and current injection can be improved by changing the pitch of the via holes 254 or changing the size of the via holes 254. stability.
  • the light emitting diode structure of the embodiment forms an insulating layer and a protective layer under the second electrode, wherein the insulating layer and the protective layer are made of a low refractive index material, and the refractive index thereof is preferably 1.5 or less, and the low refractive index material is added.
  • the thickness of the layer is such that the total reflection effect is more pronounced and the total reflectance is increased.
  • FIG. 37 shows a comparative graph of reflectance of three different electrode structures, wherein Comparative Example 1 employs an insulating layer and a protective layer under the second electrode. Chip, Comparative Example 2 uses only protection under the second electrode
  • the overall reflectivity is better than the reflectivity of the other two structures. ⁇ 0 2019/140625 ⁇ (:17(: ⁇ 2018/073362

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Abstract

本发明公开了一种发光二极管及其制作方法,在一些实施例中,所述发光二极管,包括:发光外延层,自上而下依次包括第一半导体层、发光层和第二半导体层,其上表面设有第一电极区,其包含焊盘区和扩展区;绝缘层,形成于所述第一半导体层的扩展区之上;透明导电层,形成于所述第一半导体层的表面之上,并覆盖所述绝缘层;保护层,形成于所述透明导电层的表面上,在所述扩展区形成第一开口,露出所述扩展区的透明导电层之部分表面;第一电极,形成于所述保护层上,包括焊盘部和扩展部,所述扩展部通过所述第一开口与所述扩展区的透明导电层形成电性连接。

Description

\¥0 2019/140625 卩(:17(:\2018/073362
1
发明名称:发光二极管及其制作方法 技术领域
[0001] 本发明涉及半导体元件, 尤其是涉及一种发光二极管及其制作方法。
背景技术
[0002] 由于发光二极管具有寿命长、 体积小、 高耐震性、 发热度小以及耗电量低等优 点, 发光二极管已被广泛地应用于家电产品以及各式仪器之指示灯或光源。
[0003] 早期的氮化镓
Figure imgf000003_0001
芯片制作工艺通常由台面蚀刻(MESA)、 制作透明导电层 ( 例如 。) 、 制作电极和制作保护层四道工艺组成, 其形成的发光二极管芯片如 图 1所示, 其一般包括衬底 101、 X型层 111、 发光层 112、 ?型层 113、 透明导电层 120、 电极 141(焊盘 143和扩展条 144)、 X电极 142和保护层 130。 在氮化镓 1^)中 , p-GaN由于其载流子迁移率较低, 通常会在
Figure imgf000003_0002
底部造成一定的电流拥堵。 因 此, 现在通常会在 ?型电极的底部增加电流阻挡层 150, 用于抑制电流的过注入 , 增加透明导电层的电流扩散, 如图 2所示。 该芯片制作工艺通常至少包括台面 蚀刻(MESA)、 制作电流阻挡层、 制作电流扩展层 (例如 111)) 、 制作电极和制 作保护层五道工艺。
发明概述
技术问题
问题的解决方案
技术解决方案
[0004] 本发明提供了一种发光二极管及其制作方法, 其在电极的扩展部下方依次形成 保护层、 透明导电层和绝缘层, 有效提高发光二极管的出光效率及可靠性。
[0005] 根据本发明的第一个方面, 发光二极管, 包括: 发光外延层, 自上而下依次包 括第一半导体层、 发光层和第二半导体层, 其上表面设有第一电极区, 其包含 焊盘区和扩展区; 绝缘层, 形成于所述第一半导体层的扩展区之上; 透明导电 层, 形成于所述第一半导体层的表面之上, 并覆盖所述绝缘层; 保护层, 形成 于所述透明导电层的表面上, 在所述扩展区形成第一开口, 露出所述扩展区的 \¥0 2019/140625 卩(:17(:\2018/073362
2 透明导电层之部分表面; 第一电极, 形成于所述保护层上, 包括焊盘部和扩展 部, 所述扩展部通过所述第一开口与所述扩展区的透明导电层形成电性连接。
[0006] 根据本发明的第二个方面, 发光二极管, 包括: 发光外延层, 自上而下依次包
Figure imgf000004_0001
电极区, 其中第二电极区包含焊盘区和扩展区, 所述扩展区具有一系列贯穿所 述第一半导体层、 发光层的通孔, 所述通孔露出所述第二半导体层的部分表面 ; 绝缘层, 形成于所述第一半导体层的第二电极区之扩展区表面之上; 透明导 电层, 形成于所述第一半导体层的表面之上, 覆盖所述绝缘层, 在所述通孔处 形成开口; 保护层, 形成于所述透明导电层的表面上, 覆盖所述通孔的侧壁, 露出所述通孔的底表面; 第一电极, 形成于所述第一电极区的保护层上, 与所 述透明导电层形成欧姆接触; 第二电极, 形成于所述第二电极区的保护层上, 并填充所述通孔, 与所述第二半导体层形成电性连接。
[0007] 根据本发明的第三个方面, 发光二极管的制作方法, 包括步骤: (1) 形成一 发光外延层, 其自上而下依次包括第一半导体层、 发光层和第二半导体层; (2 ) 在所述发光外延层上表面定义第一电极区, 其包含焊盘区和扩展区; (3) 在 所述发光外延层的扩展区形成绝缘层; (4) 在所述发光外延层的表面上及所述 绝缘层的表面上形成透明导电层; (5) 在所述透明导电层上形成保护层, 其在 所述扩展区分别形成第一开口, 露出位于所述扩展区的透明导电层表面; (6) 在所述保护保护层上制作第一电极, 并通过所述第一开口与所述透明导电层形 成电性连接。
[0008] 根据本发明的第四个方面, 发光二极管, 包括: 发光外延层, 自上而下依次包 括第一半导体层、 发光层和第二半导体层; 第一电极, 包括形成于所述第一半 导体层之上, 并与所述第一半导体层形成电性连接; 第二电极, 形成于所述第 二半导体层之上, 并与所述第二半导体层形成电性连接; 所述第一电极具有焊 盘部和扩展部, 其中所述扩展部与所述第一半导体层之间依次设置有保护层、 透明导电层和绝缘层。
[0009] 优选地, 所述绝缘层的厚度与所述保护层的厚度均为
Figure imgf000004_0002
其中 X为所 述发光层的发光波长, 1^为1以上的自然数, !1为绝缘层或保护层的折射率。 \¥0 2019/140625 卩(:17(:\2018/073362
3
[0010] 优选地, 所述绝缘层由一系列块状结构组成。
[0011] 优选地, 所述保护层覆盖所述发光外延层的上表面, 仅在所述第一电极和第二 电极的下方形成一些开口作为导电通道。
[0012] 优选地, 所述保护层在第一电极的焊盘部下方的开口面积小于所述第一电极的 焊盘部的面积。
[0013] 优选地, 所述第一电极的焊盘部直接接触所述第一半导体层的表面。
[0014] 优选地, 所述第一电极的焊盘部与所述第一半导体层之间设有所述保护层和透 明导电层, 所述第一电极的焊盘部同时与所述保护层和第一半导体层的表面直 接接触。
[0015] 优选地, 所述第一电极的焊盘部上表面形成台阶结构。
[0016] 优选地, 所述第二电极包括焊盘部和扩展部, 所述第二电极的焊盘部下方设有 所述绝缘层和保护层。
[0017] 优选地, 所述第二电极包括焊盘部和扩展部, 所述第二电极的扩展部设于所述 第一半导体层之上, 其与所述第一半导体层之间依次设置有保护层和透明导电 层, 并通过一系列贯穿所述保护层、 透明导电层、 第一半导体层和发光层的通 孔与所述第二半导体层形成电性连接。
[0018] 优选地, 所述第二电极的扩展部与所述第一半导体层之间依次设置有所述保护 层、 透明导电层和绝缘层。
[0019] 根据本发明的第五个方面, 发光二极管, 包括: 发光外延层, 自上而下依次包 括第一半导体层、 发光层和第二半导体层; 第一电极, 形成于所述第一半导体 层之上, 并与所述第一半导体层形成电性连接; 第二电极, 形成于所述第二半 导体层之上, 并与所述第二半导体层形成电性连接; 所述第二电极具有焊盘部 和扩展部, 所述扩展部设置于所述第一半导体层之上, 其与所述第一半导体层 之间依次设置有绝缘层、 透明导电层和保护层, 并通过一系列贯穿所述保护层 、 透明导电层、 绝缘层、 第一半导体层和发光层的通孔与所述第二半导体层形 成电性连接。
[0020] 优选地, 所述绝缘层的厚度与所述保护层的厚度均为\/411\(;2]^1), 其中 X为所 述发光层的发光波长, 1^为1以上的自然数, !1为绝缘层或保护层的折射率。 \¥0 2019/140625 卩(:17(:\2018/073362
4
[0021] 优选地, 所述绝缘层由一系列块状结构组成。
[0022] 优选地, 所述保护层覆盖所述发光外延层的上表面, 仅在所述第一电极和第二 电极的下方形成一些开口作为导电通道。
[0023] 优选地, 所述第一电极包含焊盘部和扩展部, 所述第一电极的焊盘部直接与所 述第一半导体层接触。
[0024] 优选地, 所述第一电极包含焊盘部和扩展部, 所述第一电极的扩展部与所述第 一半导体层之间依次设置有保护层和透明导电层。
[0025] 优选地, 所述第二电极的焊盘部与所述第二半导体层之间设置有所述保护层和 绝缘层。
[0026] 根据本发明的第六个方面, 一种发光二极管, 包括: 发光外延层, 自上而下依 次包括第一半导体层、 发光层和第二半导体层; 保护层, 形成于所述发光外延 层之上, 设有一系列开口作为导电通道; 第一电极, 包括形成于所述保护层之 上, 并与所述第一半导体层形成电性连接; 第二电极, 形成于所述保护层之上 , 并与所述第二半导体层形成电性连接; 所述第一电极具有焊盘部和扩展部, 其中所述扩展部的上表面呈高、 低起伏状。
[0027] 优选地, 所述第一电极的扩展部上表面具有三个以上不同的高度。
[0028] 优选地, 所述第一电极的焊盘部上表面中间区域形成凹槽结构, 该凹槽结构具 有至少两级台阶。
[0029] 根据本发明的第七个方面, 一种发光二极管, 包括: 发光外延层, 自上而下依 次包括第一半导体层、 发光层和第二半导体层; 第一电极, 形成于所述第一半 导体层之上, 并与所述第一半导体层形成电性连接; 第二电极, 形成于所述第 二半导体层之上, 并与所述第二半导体层形成电性连接; 所述第二电极具有焊 盘部和扩展部, 其中所述焊盘部与所述第二半导体层之间依次设置有保护层和 绝缘层, 所述保护层覆盖所述发光外延层的上表面, 仅在所述第一电极和第二 电极的下方形成一些开口作为导电通道。
[0030] 优选地, 所述绝缘层的厚度与所述保护层的厚度均为
Figure imgf000006_0001
其中 X为所 述发光层的发光波长, 1^为1以上的自然数, !1为绝缘层或保护层的折射率。
[0031] 优选地, 所述绝缘层和保护层的总厚度为 30011111以上。 \¥0 2019/140625 卩(:17(:\2018/073362
5
[0032] 根据本发明的第八个方面, 一种发光二极管, 包括: 发光外延层, 自上而下依 次包括第一半导体层、 发光层和第二半导体层; 第一电极, 包括形成于所述第 一半导体层之上, 并与所述第一半导体层形成电性连接; 第二电极, 形成于所 述第二半导体层之上, 并与所述第二半导体层形成电性连接; 所述第一电极具 有焊盘部和扩展部, 所述焊盘部的下方设有绝缘层, 所述绝缘层具有至少两个 块状结构, 围绕所述焊盘区的中心区域分布, 所述块状结构之间彼此分离。
[0033] 优选地, 所述块状结构之间具有间隙, 所述第一电极的焊盘部与所述扩展部之 间的连接部位于所述间隙。
[0034] 优选地, 所述发光二极管还包括保护层, 其覆盖所述发光外延层的上表面, 仅 在所述第一电极和第二电极的下方形成一些开口作为导电通道。
[0035] 优选地, 所述保护层位于所述第一半导体层与所述第一电极之间。
[0036] 优选地, 所述保护层在第一电极的焊盘部下方形成开口, 其面积小于所述第一 电极的焊盘部的面积。
[0037] 优选地, 所述绝缘层的块状结构之间围成一个内部区域, 所述开口位于所述区 域内。
发明的有益效果
有益效果
[0038] ( 1) 上述发光二极管在透明导电层上先形成保护层, 再形成电极, 该保护层 一方面保护发光二极管不受破坏, 另一方面又可与电流阻挡层一起作为复合式 电流阻挡层, 用于抑制电极下方的电流过注入, 增加透明导电层的电流扩散;
[0039] (2) 上述发光二极管的第一电极在焊盘区直接与半导体层接触, 有效增加电 极与外延层之间的粘附性, 可降低打线时电极与附着界面脱落的风险;
[0040] (3) 绝缘层与保护层的设计, 利用折光效果可减少电极及其扩展区的金属挡 光面积,
Figure imgf000007_0001
的取光效率;
[0041] (4) 绝缘层 /透明导电层 /保护层 /电极扩展条的设计形成全角反射镜, 可提高 电极及其扩展区的反射能力, 降低吸光效率;
[0042] (5) 上述发光二极管在透明导电层上先形成保护层, 再形成电极, 可以降低 保护层制作过程中电极结构中活泼金属被氧化的几率; \¥0 2019/140625 卩(:17(:\2018/073362
6
[0043] (6) 第一电极扩展部下方的绝缘层可以抑制靠近第一电极处扩展部下方的电 流过注入, 增加电流注入的长度以及均匀性;
[0044] (7) 第一电极扩展部下方设置绝缘层和保护层, 使得电极扩展部上表面呈高
、 低起伏分布, 可以降低后期倒膜、 输运以及转移等过程中扩展条的损伤; [0045] (8) 第二电极扩展部下方设置绝缘层, 增加电流横向扩展及均匀性。
[0046] 本发明的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从说明书中 变得显而易见, 或者通过实施本发明而了解。 本发明的目的和其他优点可通过 在说明书、 权利要求书以及附图中所特别指出的结构来实现和获得。
[0047] 虽然在下文中将结合一些示例性实施及使用方法来描述本发明, 但本领域技术 人员应当理解, 并不旨在将本发明限制于这些实施例。 反之, 旨在覆盖包含在 所附的权利要求书所定义的本发明的精神与范围内的所有替代品、 修正及等效 物。
对附图的简要说明
附图说明
[0048] 附图用来提供对本发明的进一步理解, 并且构成说明书的一部分, 与本发明实 施例一起用于解释本发明, 并不构成对本发明的限制。 此外, 附图数据是描述 概要, 不是按比例绘制。
[0049] 图 1是已有的发光二极管的结构示意图。
[0050] 图 2是另一种已有的发光二极管的结构示意图。
[0051] 图 3-5是本发明实施例 1之发光二极管的结构示意图。
[0052]
Figure imgf000008_0001
芯片反射率对比图。
[0053] 图 7是图 4所示发光二极管的第一电极之局部放大图。
[0054] 图 8是制作图 3所示发光二极管的光罩图。
[0055] 图 9和 10本发明实施例 2之发光二极管的结构示意图。
[0056] 图 11-12是本发明实施例 3之发光二极管的结构示意图。
[0057] 图 13是图 12所示发光二极管的第一电极之局部放大图。
[0058] 图 14-15是本发明实施例 4之发光二极管的结构示意图。
[0059] 图 16是图 15所示发光二极管的第一电极之局部放大图。 \¥0 2019/140625 卩(:17(:\2018/073362
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[0060] 图 17-18是本发明实施例 5之发光二极管的结构示意图。
[0061] 图 19是本发明实施例 6之发光二极管的结构示意图。
[0062] 图 20-21是本发明实施例 7之发光二极管的结构示意图。
[0063] 图 22是图 21所示发光二极管的第一电极之局部放大图。
[0064] 图 23是图 21所示发光二极管的光罩图。
[0065] 图 24是本发明实施例 8之发光二极管的结构示意图。
[0066] 图 25是图 24所示发光二极管的第一电极之局部放大图。
[0067] 图 26是本发明实施例 9之发光二极管的结构示意图。
[0068] 图 27是图 26所示发光二极管的第一电极之局部放大图。
[0069] 图 28-29是本发明实施例 10之发光二极管的结构示意图。
[0070] 图 30是图 29所示发光二极管的光罩图。
[0071] 图 31是本发明实施例 11之发光二极管的结构示意图。
[0072] 图 32是本发明实施例 12之发光二极管的结构示意图。
[0073] 图 33是图 32所示发光二极管的绝缘层之光罩图。
[0074] 图 34-35是本发明实施例 10之发光二极管的结构示意图。
[0075] 图 36是图 35所示发光二极管的第二电极之局部放大图。
[0076]
Figure imgf000009_0001
芯片反射率对比图。
发明实施例
本发明的实施方式
[0077] 以下将结合附图及实施例来详细说明本发明的实施方式, 借此对本发明如何应 用技术手段来解决技术问题, 并达成技术效果的实现过程能充分理解并据以实 施。 需要说明的是, 只要不构成冲突, 本发明中的各个实施例以及各实施例中 的各个特征可以相互结合, 所形成的技术方案均在本发明的保护范围之内。
[0078] 应当理解, 本发明所使用的术语仅出于描述具体实施方式的目的, 而不是旨在 限制本发明。 如本发明所使用的, 单数形式“一”、 “一种”和“所述”也旨在包括复 数形式, 除上下文清楚地表明之外。 应进一步理解, 当在本发明中使用术语“包 含”、 "包括”、 “含有”时, 用于表明陈述的特征、 整体、 步骤、 操作、 元件、 和 / 或封装件的存在, 而不排除一个或多个其他特征、 整体、 步骤、 操作、 元件、 \¥0 2019/140625 卩(:17(:\2018/073362
8 封装件、 和/或它们的组合的存在或增加。
[0079] 除另有定义之外, 本发明所使用的所有术语 (包括技术术语和科学术语) 具有 与本发明所属领域的普通技术人员通常所理解的含义相同的含义。 应进一步理 解, 本发明所使用的术语应被理解为具有与这些术语在本说明书的上下文和相 关领域中的含义一致的含义, 并且不应以理想化或过于正式的意义来理解, 除 本发明中明确如此定义之外。
[0080] 实施例 1
[0081] 参看图 3-5 , 其中图 3显示了本发明第一个较佳实施例之发光二极管的俯视图, 图 4是沿图 3的线八-八剖开的侧面剖视图, 图 5是沿图 3的线:8-:8剖开的侧面剖视图 。 该发光二极管包括: 衬底 201、 X型层 211、 发光层 212、 ?型层 213、 绝缘层 221 、 透明导电层 230、 保护层 222、 第一电极 241、 第二电极 242。 其中第一电极 241 包括焊盘 243和扩展部 244, 第二电极 242包括焊盘 245和扩展部 246。
[0082] 具体来说, 衬底 201选取包括但不限于蓝宝石、 氮化铝、 氮化镓、 硅、 碳化硅 , 其表面结构可为平面结构或图案化图结构; X型层 211形成于蓝宝石衬底 201上 ; 发光层 212形成于 X型层 211上; ?型层 213形成于发光层 212上; 在?型层 213上 形成第二电极的台面和一系列贯穿 ?型层 213、 发光层 212的通孔 254, 裸露出 11型 层 211的部分表面, 绝缘层 221形成在 ?型层 213上, 分布于第一电极 241所在位置 的下方, 透明导电层 230形成在 ?型层 213上, 并覆盖绝缘层 221, 保护层 222形成 在透明导电层 230上, 同时覆盖该台面的上表面及连接该台面与?型层 213上表面 之间的侧壁, 即基本上覆盖整个器件的表面, 并在电极的对应位置形成开口 251 、 252、 254和 255 ; 第一电极 241和第二电极 242形成半导体保护层 222上, 其中 第一电极的焊盘部 243和扩展部 244分别通过开口 252、 251与透明导电层接触, 第二电极的焊盘部 245位于台面之上, 通过环状的开口 255与N型层接触, 第二电 极的扩展部 246形成在位于 ?型层之上的保护层上, 通过通孔 254与N型层 211接触
[0083] 在本实施例中, 绝缘层 221呈块状分布, 由一系列离散的块状结构构成, 第一 电极的扩展部 244下方依次具有保护层 222、 透明导电层 230、 绝缘层 221、 ?型层 213。 其中绝缘层 221和保护层 223的材料优选均为低折射率绝缘材料, 优选折射 \¥0 2019/140625 卩(:17(:\2018/073362
9 率为 1.5以下, 其材料可以是一样的, 也可以是不一样的。 保护层 222在第一电极 的扩展部 244下方形成开口 251。 在本实施例中, 该开口 251与绝缘层 221错开, 对应的第一电极的扩展部 244上表面呈台阶状, 具有第一台阶面 244八、 第二台阶 面 2446和第三台阶面 244(:。 本实施例所述的发光二极管在第一电极的扩展部 244 下方形成绝缘层 221作为电流阻挡层, 可以抑制靠近第一电极扩展部下方的电流 过注入, 增加电流注入的长度以及均匀性; 在透明导电层 220上先形成保护层 22 2, 再形成电极 244, 可以降低保护层制作过程中电极结构中活泼金属被氧化的 几率; 绝缘层 221与保护层 222的设计, 利用折光效果可减少电极及其扩展区的 金属挡光面积, 提升
Figure imgf000011_0001
的取光效率; 进一步的, 绝缘层 221、 透明导电层 220、 保护层 222、 电极扩展部 244四层结构可以形成全角反射镜, 从而提高电极及其 扩展区的反射能力, 降低吸光效率。
Figure imgf000011_0002
芯片反 射率对比图, 其中比较例 1
Figure imgf000011_0003
芯片, 比较例 2
Figure imgf000011_0004
芯片, 从 图中可看出本实施例所述的
Figure imgf000011_0005
结构的整体反射能力明显优于另外两种结构的反 射能力。
[0084] 保护层 222材料可以选用 310
Figure imgf000011_0006
110 2
等, 在本实施例中选用 310 2。 本实施例所述发光二极管结构中, 保护层 222—方 面保护发光二极管表面, 另一方面作为电流阻挡层, 用于抑制电极下方的电流 过注入, 增加透明导电层的电流扩散, 考虑兼顾两者的要求, 其厚度 (1优选为入 /4 (21^1), 其中\为所发光层 212的发光波长, 为保护层的折射率, 1^为1以上的 自然数, 的较佳取值为 2~3, 对应的厚度为 150 ~50〇11111为佳。 当保护层的厚 度过小时比较不利于起到电流阻挡层和保护作用, 当厚度过大时材料本身吸收 会额外增加光损失。
[0085] 图 7显示了第一电极 242的局部放大图, 透明导电层 230在第一电极的焊盘 243对 应的位置形成开口 253, 在该开口 253内形成绝缘层 221 , 其直径优选小于开口 2 53的直径, 保护层 222在第一电极的焊盘 243对应的位置形成开口 252, 在第一电 极的扩展部 244对应的位置形成开口 251, 裸露出透明导电层 230。 具体的, 开口 252为环状结构, 定义开口 252的内圈直径为 01、 夕卜圈直径为 02、 开口 253的直径 为〇4、 焊盘部 244下方的绝缘层 221八的直径为03, 四者的关系优选为: 02>04> \¥0 2019/140625 卩(:17(:\2018/073362
10
Dl>D3a 从图中可看出, 此时第一电极的焊盘区露出的表面由外到内依次为保 护层 222、 透明电极层 230、 ?型层 213和保护层 222, 在其上方形成的第一电极的 焊盘部 243可同时与?型层 213、 透明导电层 230、 保护层 222接触, 该第一电极的 焊盘部 243上表面呈台阶状。 第一电极的焊盘部 243下方的保护层 222作为电流阻 挡层, 当通电时, 大部分电流由扩展部 244通过开口 251注入透明导电层 230, 小 部分电流由焊盘部 244之接触透明导电层的部位 230八注入透明导电层 230, 并在 透明导电层 230进行扩展后注入发光外延层。 在一个变形中, 开口 253中不形成 绝缘层 221 , 此时保护层 222直接填充该开口 253 ; 在另一个变形中, 开口 253中 不形成绝缘层 221, 开口 252为孔状结构, 第一电极的焊盘部 243正中心下方无绝 缘层 221和保护层 222, 其直接与?型层 213接触, 如此可增加第一电极的焊盘部 2 43与?型层 213的接触面积, 而电极与氮化物界面之间附着性良好, 可降低打线 时第一电极与附着界面脱落的风险。
[0086] 更优的, 请参看图 3, 保护层 222位于第一电极的焊盘部 243下方的开口 252可以 具有至少一个向远离该焊盘部 243的方向延伸的触角 252〇, 触角的数目为 1~20个 不等。 第一电极的焊盘部 243通过该触角 252〇与透明导电层 230接触, 可以增加第 一电极的焊盘部与透明导电层的接触面积, 有利于电流的扩散, 从而缓解第一 电极的焊盘部及扩展条上的电流拥堵效应, 降低金属析出及电极烧毁的风险。
[0087] 在本实施例中, 发光二极管的保护层一方面保护发光二极管不受破坏, 另一方 面又可直接作为电流阻挡层, 用于抑制电极下方的电流过注入, 增加透明导电 层的电流扩散; 第一电极在焊盘区直接与半导体层接触, 有效增加电极与外延 层之间的粘附性, 可降低打线时电极与附着界面脱落的风险; 第一电极的焊盘 部采用多处台阶的设计可有效缓冲焊线冲击力, 降低焊线过程对第一电极焊盘 的冲击与损伤; 第一电极的扩展部位于保护层的上, 并且通过在保护层开孔与 透明导电层接触, 使得第一电极的扩展条形成上、 下起状的台阶形, 增加扩展 条处光出射的角度, 提升光抽取效率, 同时由于电极的扩展部具有高台阶和低 台阶起伏分布, 可以减少电极与其他物体的接触面积, 有效降低后期倒膜、 输 运以及转移等过程中电极扩展部的损伤, 同时减少电极扩展部的脏污。
[0088] 前述发光二极管的制作方法主要包括台面蚀刻 (MESA) 、 制作绝缘层 221、 \¥0 2019/140625 卩(:17(:\2018/073362
11 制作透明导电层 230、 制作保护层 222、 制作电极五道工艺, 图 8显示了此五道工 艺涉及分别对应的光罩图案, 下面进行简单说明。
[0089] 首先, 提供发光外延层结构, 其一般包括衬底 201、 X型层 211、 发光层 212、 型层 213。
[0090] 接着, 参照图 8的⑻所示的图案, 在发光外延层的表面上定义第一电极区和第 二电极区, 去除空口区域, 形成第二电极的台面 210及一系列通孔 254;
[0091] 接着, 参照图 8的(¾)所示的图案, 在发光外延层的?型层 213上制作绝缘层 221, 其呈块状分布;
[0092] 接着, 参照图 8的(〇)所示的图案, 在发光外延层的?型层 213上制作透明导电层 2 30, 蚀刻去除台面区域, 并在第一电极区的焊盘区形成开口 253、 在通孔 254对 应的位置形成开口;
[0093] 接着, 参照图 8的(¾所示的图案, 在透明导电层 230上制作保护层 222, 该保护 层 222同时覆盖了通孔 254的侧壁、 透明导电层 230与台面 210之间侧壁和台面 210 表面, 在第一电极区的焊盘区形成开口 252、 在第一电极区的扩展区形成开口 25 1, 在台面 210上形成开口 255, 在第二电极的扩展区形成开口 254。 较佳的, 开 口 252为环状结构, 该环状的内圈直径 小于开口 253的直径 04, 外圈直径02大 于开口 253的直径 04, 此时第一电极区的焊盘区露出的表面由外到内依次为保护 层 222、 透明导电层 230、 ?型层 213和保护层 222;
[0094] 接着, 参照图 8的⑹所示的图案, 在保护层 222上制作第一电极 241和第二电极 2 42。 其中第一电极 241的焊盘部 243同时与 型层 213、 透明导电层 230、 保护层 22 2接触。
[0095] 需要特别说明的是, 对于开口 252的形状及尺寸并不限制于上述说明, 其也可 直接形成非环状结构, 例如在一些实施中第一电极的焊盘部中心部下方无保护 层 231结构, 直接与?型层 213接触。 在另一些实施例中, 也可将开口 252设计为 一系列分布在焊盘区的周围的触角结构, 裸露出透明导电层, 焊盘区并未形成 开口结构, 此时第一电极的焊盘部完全形成在保护层 222上, 可通过金属引线连 接至该触角。
[0096] 实施例 2 \¥0 2019/140625 卩(:17(:\2018/073362
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[0097] 图 9和 10显示另一种发光二极管的结构示意图, 其中图 9为俯视图, 图 10为沿图 9的线八-八切开的剖面图。 区别于实施例 1的是, 本实施例所述的发光二极管结构 中, 第一电极 241下方的绝缘层 221连接在一起, 如此可完全避免电极下方的电 流注入, 将第一电极扩展部 244高度全部抬高, 利用折光效果可有效减少电极扩 展部的金属挡光面积, 从而提升
Figure imgf000014_0001
的取光效率。
[0098] 实施例 3
[0099] 图 11-12显示了另一种发光二极管的结构示意图, 其中图 11为俯视图, 图 12为 沿图 11的线八-八切开的剖面图。 区别于实施例 1的是, 本实施例所述的发光二极 管结构中, 在第一电极的扩展部 244下方, 绝缘层 221与保护层 222的开口 251重 叠分布, 其中绝缘层 221的面积小于开口 251的面积。 图 13显示了第一电极的扩 展部 244的局部放大图, 透明导电层 230在开口 251处与保护层 222之间形成间隙 , 第一电极的扩展部 244填充该间隙, 一方面第一电极在绝缘层 221的位置形成 钉粧结构, 增加了电极扩展部 244与保护层 222的粘附力, 防止其掉落, 另一方 面增加了第一电极的扩展部 244与透明导电层 230的接触面积, 有利于电流的扩 散, 从而缓解第一电极的焊盘部及扩展条上的电流拥堵效应, 降低金属析出及 电极烧毁的风险。
[0100] 实施例 4
[0101] 图 14-15显示了另一种发光二极管的结构示意图, 其中图 14为俯视图, 图 15为 沿图 14的线八-八切开的剖面图。 区别于实施例 3的是, 本实施例所述的发光二极 管结构中, 在第一电极的扩展部下方, 绝缘层 221的面积大于开口 251的面积。 图 16显示了第一电极的扩展部 244的局部放大图, 在绝缘层 221的位置, 第一电 极的扩展部 244与保护层 222接触的一侧呈钉粧结构, 增加了电极扩展部与保护 层的粘附力, 防止其掉落; 同时通过如此设计使得第一电极的扩展部上表面呈 高台阶 2446、 低台阶 244八起伏分布, 且高台阶 2446的面积远小于低台阶 244八的 面积, 很大程度上减少电极与其他物体的接触面积, 有效降低后期倒膜、 输运 以及转移等过程中扩展条的损伤, 同时减少扩展部的脏污。
[0102] 实施例 5
[0103] 图 17-18显示了另一种发光二极管的结构示意图。 区别于实施例 3的是, 本实施 \¥0 2019/140625 卩(:17(:\2018/073362
13 例所述的发光二极管结构中, 第一电极的扩展部 244下方的绝缘层 221呈非均匀 分布, 以达到进一步优化电流分布的目的。 具体的, 在靠近第一电极的焊盘部 2 43的位置, 绝缘层 221的分布密度最大, 并随着远离焊盘部, 其密度越来越小, 呈现先密后疏的分布。
[0104] 实施例 6
[0105] 图 19显示了另一种发光二极管的结构示意图。 区别于实施例 3的是, 本实施例 所述的发光二极管结构中, 第一电极的扩展部 244下方的绝缘层同样呈非均匀分 布, 以达到进一步优化电流分布的目的。 具体的, 第一电极扩展部下方的绝缘 层 221由一系列面积不等的块状结构 221&~221(1构成, 在靠近第一电极的焊盘部 2 43的位置, 块状结构 221&面积最大, 并随着远离焊盘部, 面积越来越小, 其中离 焊盘部 243最远的块状结构 221(1的面积最小。
[0106] 实施例 7
[0107] 图 20~21显示了另一种发光二极管的结构示意图, 其中图 20为俯视图, 图 21为 沿图 20的线八-八切开的剖面图。 区别于实施例 1的是, 本实施例所述的发光二极 管结构中, 第一电极的焊盘部 243下方的绝缘层 221呈环状结构, 其内部具有开 口 256, 对应的, 透明导电层 230形成开口 253, 其尺寸大于或等于开口 256的尺 寸, 保护层 222形成开口 252和 257, 其中开口 251为环状结构, 用于裸露出透明 电导层 230的部分表面, 使得第一电极的焊盘部 243可以接触部分透明导电层 230 的表面, 开口 257用于裸露出?型层的表面, 使得第一电极的焊盘部 243可以接触 ?型层 213的部分表面, 两个开口之间具有环状结构 222八。 图 22显示了第一电极 的焊盘部 243的局部放大图, 定义透明导电层 230在焊盘部的开口 253的直径为04 , 环状绝缘层 221的内圈直径为 05, 夕卜圈直径为 06, 开口 257的直径为07, 此四 者的关系为: 06>04>05>07 , 如此使得第一电极的焊盘部 243的中心部位接触 型层 213 , 上表面在中心位置形成第一凹槽结构 243 , 并围绕第一凹槽 243八形成 环状的第二凹槽结构 2436, 其中第一凹槽结构 243八的深度大于第二凹槽 2436的 深度, 有利于后续的打线, 可以形成一个类似钉粧结构。
[0108] 图 23分别显示了图 21所示的发光二极管之台面 210、 绝缘层 221、 透明导电层 23 0、 保护层 222和电极的光罩图案, 区别于图 8所示的光罩图案, 在绝缘层 221的 \¥0 2019/140625 卩(:17(:\2018/073362
14 光罩图案中, 位于第一电极的焊盘区的绝缘层呈环状, 具有开口 256 , 同时保护 层 222的光罩图案中, 在第一电极焊盘部的正中心形成开口 257。
[0109] 作为本实施例的一个变形, 保护层 222在第一电极的焊盘部 243的开口 252和 257 可以合为一个开口, 即去除两个开口之间的环状结构 222八, 此时焊盘部 243可同 时和保护层 222、 透明导电层 230、 绝缘层 221和?型层 213接触, 其上表面的中间 可以形成一个凹槽结构, 该凹槽结构可以形成两级台阶, 甚至三级台阶, 同样 是很有利于后期的封装打线。
[0110] 实施例 8
[0111] 图 24显示了另一种发光二极管的结构示意图, 其对应的俯视图可参照附图 11。
区别于实施例 3的是, 本实施例所述的发光二极管结构中, 绝缘层 221的厚度明 显大于保护层 222的厚度, 甚至大于透明导电层 230和保护层 222的总厚度, 较佳 的, 当绝缘层和保护层为同一种材料时, 绝缘层 221的厚度与保护层 222的厚度 差值为 \/411\(2 , 其中 \为发光层 212的发光波长, 11为绝缘层的折射率, 1^为0以 上的自然数。 例如在一个具体的实施例中, 绝缘层的厚度取 300~ 100011111, 保护 层的厚度取 100~25〇11111。
[0112] 图 25显示了第一电极的扩展部 244的局部放大图。 从图中可以看出, 通过加厚 绝缘层 221的厚度, 一方面可以增加了透明导电层 230的面积, 从而增加了第一 电极的扩展部 244与透明导电层 230的接触面积, 有利于电流的扩散, 从而缓解 第一电极的焊盘部及扩展条上的电流拥堵效应, 降低金属析出及电极烧毁的风 险; 另一方面在相邻的两个绝缘层块状结构之间可以形成凹槽结构, 增加了第 一电极的扩展部 244的附着力, 降低了其与附着界面脱落的风险。
[0113] 实施例 9
[0114] 图 26显示了另一种发光二极管的结构示意图, 其对应的俯视图可参照附图 11。
区别于实施例 8的是, 本实施例所述的发光二极管结构中, 保护层 222的厚度明 显厚于绝缘层 221的厚度。 较佳的, 当绝缘层和保护层为同一种材料时, 绝缘层 221的厚度与保护层 222的厚度差值为 \/4!^(;2 , 其中\为所述发光层的发光波长 , 为保护层的折射率, 1^为0以上的自然数。 例如在一个具体的实施例中, 绝缘 层的厚度取 50~30〇11111, 保护层的厚度取 200~200011111。 \¥0 2019/140625 卩(:17(:\2018/073362
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[0115] 图 27显示了第一电极的扩展部 244的局部放大图。 从图中可以看出, 由于绝缘 层 221的厚度明显小于保护层 222的厚度, 在第一电极的扩展部 244下方, 绝缘层 的位置与保护层的开口 251的位置重叠, 从而在绝缘层 221对应的位置形成一系 列凹槽结构, 第一电极的扩展部 244填充该凹槽结构, 从而在与保护层的附着界 面形成钉粧结构, 极大的增加了第一电极的扩展部 244的附着力, 降低了其与附 着界面脱落的风险。
[0116] 实施例 10
[0117] 图 28~29显示了另一种发光二极管的结构示意图, 其中图 28为俯视图, 图 29为 沿图 28的线八-八切开的剖面图。 区别于实施例 1的是, 本实施例所述的发光二极 管结构中, 在第一电极的焊盘部 243的正下方, 形成第一绝缘部 221八, 同时围绕 焊盘部 243的正下方中心形成环绕式分离的第二绝缘部 22 , 第二绝缘部 22 的 数量可以是 2~50个, 相互分离, 其外径可以大于第一电极的焊盘部 243的直径, 也可以小于或者等于第一电极的焊盘部 243的直径。 图 30分别显示了台面 210、 绝缘层 221、 透明导电层 230、 保护层 222和电极的光罩图案, 在本实施例中, 保 护层 222在第一电极的焊盘部下方的开口 222同样可以向外延伸的触角 252(:, 在 本实施例中该触角位于环绕式分离的第二绝缘部 2216之间的间隙。
[0118] 本实施例所述的发光二极管结构中, 环绕式分离的第二绝缘部 2216可以增加第 一电极的焊盘部 243表面的起伏, 增强焊线的可靠性, 焊球不易脱落或外力作用 下不易被推掉。
[0119] 实施例 11
[0120] 图 31显示了另一种发光二极管的结构示意图, 区别于实施例 10的是, 本实施例 所述的发光二极管结构中, 第一电极的焊盘部 243与扩展部 244之间的连接部 243 (:不与第二绝缘部 22 相交, 如此可以保证第一电极的焊盘部 243的位置比焊盘 部与扩展部之间的连接处 243八的高, 在后续的焊线过程中, 焊球不易损伤连接 部 243(:, 可以提高芯粒的稳定性。
[0121] 在本实施例中, 同保护层 222在第一电极的焊盘部下方的开口 222同样可以向外 延伸的触角 252(:, 在本实施例中该触角与环绕式分离的第二绝缘部 2216相交。
[0122] 实施例 12 \¥0 2019/140625 卩(:17(:\2018/073362
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[0123] 图 32显示了另一种发光二极管的结构示意图, 区别于实施例 10的是, 本实施例 所述的发光二极管结构中, 在第一电极的焊盘部 243的下方, 围绕焊盘部 243的 正下方中心形成环绕式分离的绝缘部 22 , 第一电极的焊盘部 243中心部位直接 接触 ?型层 213的表面。 图 33显示了绝缘层 221的图案。
[0124] 本实施例所述的发光二极管结构中, 一方面第一电极的焊盘部 243直接与?型层 213接触, 增加焊盘部与外延层的粘附性, 另一方面, 形成的第一电极的焊盘部 243上表面中间区域形成一个具有台阶的凹槽 2436, 此结构非常有利于后续进行 打线。
[0125] 实施例 13
[0126] 图 34~35显示了另一种发光二极管的结构示意图, 其中图 34为俯视图, 图 35为 沿图 34的线八-八切开的剖面图。 区别于实施例 1的是, 本实施例所述的发光二极 管结构中, 绝缘层 221同时形成于第一电极 241和第二电极 242的下方, 该绝缘层 221同样呈现离散的块状分布。
[0127] 图 36显示了第二电极的扩展部 256的局部放大图, 第二电极的扩展部 246形成在 保护层 222上, 保护层 222下方依次具有透明导电层 230、 绝缘层 221和?型层 213 , 并通过一系列通孔 254与N型层 211导通, 第二电极的焊盘部 245下方同样具有 保护层 222和绝缘层 221。
[0128] 在本实施例中, 可以通过改变通孔 254的间距或改变通孔 254的尺寸, 从而改善 电流拥挤及电流注入的均匀性,
Figure imgf000018_0001
稳定性。
[0129] 本实施例所述发光二极管结构通过中第二电极的下方形成绝缘层和保护层, 其 中绝缘层和保护层选用低折射率材料, 其折射率优选为 1.5以下, 增加低折射率 材料层的厚度, 使得其全反射效应越明显, 总的反射率增加。
[0130] 图 37显示了三种不同电极结构的 1^)芯片反射率对比图, 其中比较例 1采用第 二电极下方无绝缘层和保护层的
Figure imgf000018_0002
芯片, 比较例 2采用第二电极下方只有保护
Figure imgf000018_0003
的整体反射能力优于另外两种结构的反射能力。 \¥0 2019/140625 卩(:17(:\2018/073362
17
[0131] 需要说明的是, 以上实施方式仅用于说明本发明, 而并非用于限定本发明, 本 领域的技术人员, 在不脱离本发明的精神和范围的情况下, 可以对本发明做出 各种修饰和变动, 因此所有等同的技术方案也属于本发明的范畴, 本发明的专 利保护范围应视权利要求书范围限定。

Claims

\¥0 2019/140625 卩(:17(:\2018/073362 18 权利要求书
[权利要求 1] 发光二极管, 包括:
发光外延层, 自上而下依次包括第一半导体层、 发光层和第二半导体 层, 其上表面设有第一电极区, 其包含焊盘区和扩展区;
绝缘层, 形成于所述第一半导体层的扩展区之上; 透明导电层, 形成于所述第一半导体层的表面之上, 并覆盖所述绝缘 层;
保护层, 形成于所述透明导电层的表面上, 在所述扩展区形成第一开 口, 露出所述扩展区的透明导电层之部分表面; 第一电极, 形成于所述保护层上, 包括焊盘部和扩展部, 所述扩展部 通过所述第一开口与所述扩展区的透明导电层形成电性连接。
[权利要求 2] 根据权利要求 1所述的发光二极管, 其特征在于: 所述绝缘层的厚度 与所述保护层的厚度均为 ^/4!^(;2]^1), 其中\为所述发光层的发光波 长, 1^为1以上的自然数, !1为绝缘层或保护层的折射率。
[权利要求 3] 根据权利要求 1所述的发光二极管, 其特征在于: 所述绝缘层由一系 列块状结构组成。
[权利要求 4] 根据权利要求 3所述的发光二极管, 其特征在于: 所述绝缘层与所述 第一开口对应, 其面积小于所述第一开口的面积。
[权利要求 5] 根据权利要求 4所述的发光二极管, 其特征在于: 所述透明导电层覆 盖所述绝缘层的上表面和侧壁, 并在所述第一开口与所述保护层之间 形成一定的间隙, 所述第一电极填充该间隙。
[权利要求 6] 根据权利要求 3所述的发光二极管, 其特征在于: 所述绝缘层位于所 述第一开口的下方, 其面积大于所述第一开口的面积。
[权利要求 7] 根据权利要求 3所述的发光二极管, 其特征在于: 所述绝缘层在靠近 焊盘区的面积大于远离其在所述焊盘区的面积。
[权利要求 8] 根据权利要求 3所述的发光二极管, 其特征在于: 所述绝缘层在靠近 焊盘区的密度大于远离其在所述焊盘区的密度。
[权利要求 9] 根据权利要求 1所述的发光二极管, 其特征在于: 所述第一电极直接 \¥0 2019/140625 卩(:17(:\2018/073362
19 接触第一半导体的焊盘区之部分表面。
[权利要求 10] 根据权利要求 9所述的发光二极管, 其特征在于: 所述第一电极直接 接触所述第一半导体层的焊盘区之中间区域。
[权利要求 11] 根据权利要求 10所述的发光二极管, 其特征在于: 所述绝缘层同时位 于所述第一电极区的焊盘区。
[权利要求 12] 根据权利要求 1所述的发光二极管, 其特征在于: 所述保护层在所述 焊盘区具有第二开口。
[权利要求 13] 根据权利要求 12所述的发光二极管, 其特征在于: 所述第二开口呈环 状。
[权利要求 14] 根据权利要求 12所述的发光二极管, 其特征在于: 所述透明导电层具 有第三开口, 其位于所述焊盘区, 所述第一电极通过所述第二、 第三 开口直接接触所述第一半导体层的焊盘区之部分表面。
[权利要求 15] 根据权利要求 12所述的发光二极管, 其特征在于: 所述第二开口具有 至少一个远离所述焊盘区方向延伸的触角。
[权利要求 16] 根据权利要求 1所述的发光二极管, 其特征在于: 所述绝缘层同时位 于所述焊盘区, 呈块状结构, 围绕所述焊盘区的中心区域分布。
[权利要求 17] 根据权利要求 16所述的发光二极管, 其特征在于: 所述绝缘层具有至 少两个块状结构围绕所述焊盘区的中心区域分布, 所述块状结构之间 具有间隙, 所述焊盘部与所述扩展部的连接部位于所述间隙。
[权利要求 18] 根据权利要求 16所述的发光二极管, 其特征在于: 所述第二开口具有 至少一个向远离所述焊盘区方向延伸的触角。
[权利要求 19] 根据权利要求 18所述的发光二极管, 其特征在于: 所述触角与围绕所 述焊盘区的中心区域分布的绝缘层重叠分布。
[权利要求 20] 根据权利要求 18所述的发光二极管, 其特征在于: 所述触角与围绕所 述焊盘区的中心区域分布的绝缘层交错分布。
[权利要求 21] 根据权利要求 1所述的发光二极管, 其特征在于: 所述发光外延层的
Figure imgf000021_0001
半导体层的部分表面, 所述保护层同时覆盖所述台面的表面并形成第 \¥0 2019/140625 卩(:17(:\2018/073362
20 四开口结构。
[权利要求 22] 根据权利要求 21所述的发光二极管, 其特征在于: 在所述第二电极区 还设有绝缘层, 其位于所述保护层与所述第二半导体层之间。
[权利要求 23] 根据权利要求 1所述的发光二极管, 其特征在于: 所述发光外延层的 上表面还设有第二电极区, 所述第二电极区形成台面, 第二电极设置 于所述台面上, 所述第二电极具有扩展部, 其位于所述第一半导体层 之上, 并通过一系列贯穿所述第一半导体层、 发光层的通孔与所述第 二半导体层形成欧姆接触。
[权利要求 24] 根据权利要求 23所述的发光二极管, 其特征在于: 所述第二电极的扩 展部与所述第一半导体层之间依次设有绝缘层、 透明导电层和保护层
[权利要求 25] 根据权利要求 23所述的发光二极管, 其特征在于: 所述第二电极的扩 展部与所述第一半导体层之间依次设有透明导电区和保护层。
Figure imgf000022_0001
根据权利要求 1所述的发光二极管, 其特征在于: 所述第一电极在所 述扩展区的上表面呈高、 低起伏状。
[权利要求 27] 根据权利要求 1所述的发光二极管, 其特征在于: 所述第一电极在所 述焊盘区的上表面呈台阶状。
Figure imgf000022_0002
根据权利要求 1所述的发光二极管, 其特征在于: 所述第一电极的焊 盘部上表面中间区域具有第一凹槽结构。
[权利要求 29] 根据权利要求 28所述的发光二极管, 其特征在于: 所述第一凹槽具有 至少两级台阶。
[权利要求 30] 根据权利要求 28所述的发光二极管, 其特征在于: 所述第一电极的焊 盘部上表面具有第二凹槽结构, 其围绕所述第一凹槽分布。
[权利要求 31] 根据权利要求 30所述的发光二极管, 其特征在于: 所述第一凹槽的深 度大于第二凹槽的深度。
[权利要求 32] 发光二极管, 包括:
发光外延层, 自上而下依次包括第一半导体层、 发光层和第二半导体 层, 其上表面定义有第一电极区和第二电极区, 其中第二电极区包含 \¥0 2019/140625 卩(:17(:\2018/073362
21 焊盘区和扩展区, 所述扩展区具有一系列贯穿所述第一半导体层、 发 光层的通孔, 所述通孔露出所述第二半导体层的部分表面; 绝缘层, 形成于所述第一半导体层的第二电极区之扩展区表面之上; 透明导电层, 形成于所述第一半导体层的表面之上, 覆盖所述绝缘层 , 在所述通孔处形成开口;
保护层, 形成于所述透明导电层的表面上, 覆盖所述通孔的侧壁, 露 出所述通孔的底表面;
第一电极, 形成于所述第一电极区的保护层上, 与所述透明导电层形 成电性连接;
第二电极, 形成于所述第二电极区的保护层上, 并填充所述通孔, 与 所述第二半导体层形成电性连接。
[权利要求 33] 根据权利要求 32所述的发光二极管, 其特征在于: 所述第一电极包括 焊盘部和扩展部, 所述第一电极的扩展部与所述第一半导体层之间依 次设置有所述绝缘层、 透明导电层和保护层。
[权利要求 34] 根据权利要求 32所述的发光二极管, 其特征在于: 所述第一电极包含 焊盘部和扩展部, 所述第一电极的焊盘部直接接触所述第一半导体层 的部分表面。
[权利要求 35] 根据权利要求 32所述的发光二极管, 其特征在于: 所述第一电极包括 焊盘部和扩展部, 所述第一电极的焊盘部的上表面呈台阶状。
[权利要求 36] 根据要利要求 32所述的发光二极管, 其特征在于: 所述第一电极包括 焊盘部和扩展部, 所述第一电极的扩展部上表面呈高、 低台阶状。
[权利要求 37] 根据权利要求 32所述的发光二极管, 其特征在于: 所述第二电极包括 焊盘部和扩展部, 所述第二电极的焊盘部下方依次设有所述保护层和 绝缘层。
[权利要求 38] 发光二极管的制作方法, 包括步骤:
( 1) 形成一发光外延层, 其自上而下依次包括第一半导体层、 发光 层和第二半导体层;
(2) 在所述发光外延层上表面定义第一电极区, 其包含焊盘区和扩 \¥0 2019/140625 卩(:17(:\2018/073362
22 展区;
(3) 在所述发光外延层的扩展区形成绝缘层;
(4) 在所述发光外延层的表面上及所述绝缘层的表面上形成透明导 电层;
(5) 在所述透明导电层上形成保护层, 其在所述扩展区分别形成第 一开口, 露出位于所述扩展区的透明导电层表面;
(6) 在所述保护保护层上制作第一电极, 并通过所述第一开口与所 述透明导电层形成电性连接。
[权利要求 39] 根据权利要求 38所述的一种发光二极管的制作方法, 其特征在于: 所 述步骤 (2) 中还包括在所述发光外延层的上表面定义第二电极区, 在所述第二电极区形成台面, 露出所述第二半导体层的部分表面, 所 述步骤 (5) 中形成的保护层同时覆盖所述台面的表面并形成开口结 构, 所述步骤 (6) 还包括制作第二电极, 其形成于所述保护层上, 并通过所述开口结构与所述第二半导体层的表面接触。
[权利要求 40] 根据权利要求 38所述的一种发光二极管的制作方法, 其特征在于: 所 述步骤 (6) 中形成的第一电极直接接触所述第一半导体层的焊盘区 的部分表面。
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