WO2019136971A1 - Flash data protection method using false data - Google Patents

Flash data protection method using false data Download PDF

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Publication number
WO2019136971A1
WO2019136971A1 PCT/CN2018/099748 CN2018099748W WO2019136971A1 WO 2019136971 A1 WO2019136971 A1 WO 2019136971A1 CN 2018099748 W CN2018099748 W CN 2018099748W WO 2019136971 A1 WO2019136971 A1 WO 2019136971A1
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data
flash
flash memory
protection
control device
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PCT/CN2018/099748
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French (fr)
Chinese (zh)
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许豪江
李庭育
庄健民
魏智汎
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江苏华存电子科技有限公司
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Publication of WO2019136971A1 publication Critical patent/WO2019136971A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk

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  • the invention relates to the technical field of data protection, in particular to a flash data protection method using fake data.
  • Flash memory is a long-lived non-volatile memory that retains stored data information in the event of a power outage. Data deletion is not in a single byte but in a fixed block. The block size is typically 256KB to 20MB. Flash memory is a variant of electronically erasable read-only memory (EEPROM). Unlike flash memory, EEPROM can be erased and rewritten at the byte level instead of the entire chip eraser, while most chips in flash require a block erase. except. Since it can still save data when it is powered off, flash memory is usually used to save setup information, such as saving data in the computer's BIOS (basic program), PDA (personal digital assistant), digital camera, etc.; flash memory is moving toward large capacity and low The development of power consumption and low cost.
  • BIOS basic program
  • PDA personal digital assistant
  • the flash memory has high read/write speed and low power consumption.
  • the flash hard disk that is, the SSD hard disk, has appeared on the market, and the cost performance of the hard disk is further improved. As manufacturing processes increase and costs decrease, flash memory will appear more in everyday life.
  • Flash memory is a non-disappearing memory device, and the manufacturing process is improved. The more advanced the process flash memory generates high temperature, so the error bit of the flash data will rise, resulting in data errors. Therefore, it is an important issue to increase the correctness of data.
  • Error checking and correction techniques are most often used as a method of error correction. Error checking and correction techniques can protect N bit errors in a certain area. To protect this particular area, it is necessary to generate protection data calculated by error checking and correction techniques. Both protection data and data can be constructed as one codeword. When protecting more bits of error checking and correction techniques, larger codewords need to be generated. Taking the binary linear cyclic code 60 and 70-bit error checking and correction techniques as an example, 72 and 92 bytes of protection data are generated every 1024 bytes. The more bits that can be corrected, the more protection data is needed. . Even more unfortunately, it is necessary to fix more error bits for error checking and correcting technology hardware that requires more manufacturing costs. The present invention therefore proposes a new concept that is applicable to a variety of error checking and correction techniques and improves the ability to detect and correct errors.
  • a flash data protection method using fake data including a flash memory control device and a plurality of flash memory chips, wherein the flash memory control device is provided with a data buffer, a flash instruction control device, and A flash error and correction device that connects a plurality of flash chips through a bus.
  • the plurality of flash memory chips comprise a first flash chip, a second flash chip, a third flash chip and an Nth flash chip, N being an integer greater than 3; the flash chip has 1024 blocks, each block having 256 Pages, each with 32 fan shapes.
  • the data writing comprises the following steps:
  • the data buffer is cut into a plurality of code words, and each code word can be divided into data and protection data generated by the error checking and correcting device;
  • the error checking and correcting device correction method comprises the following steps:
  • the data to be stored in the memory from the external device or the device memory is placed in the data buffer;
  • the error correction and correction device generates the policyholder data according to the data content
  • a read command is issued from the flash instruction device in the flash memory control device, and data is transferred from the flash memory to the data buffer via the bus, and the dummy data portion is ignored during reading, and valid data is taken.
  • the present invention has the beneficial effects that the present invention utilizes the ability to fill false data in a data buffer and is applicable to various error checking and correcting technical devices to improve the ability of error checking and error correction.
  • Figure 1 is a schematic view of the overall structure of the present invention
  • Figure 3 is a flow chart showing the correction of the error checking and correcting device of the present invention.
  • the present invention provides a technical solution: a flash data protection method using fake data, including a flash memory control device 1 and a plurality of flash memory chips, wherein the flash memory control device 1 is provided with a data buffer 2 a flash instruction control device 3 and a flash error and correction device 4, the flash control device 1 connecting a plurality of flash chips through a bus; the plurality of flash chips including the first flash chip 5, the second flash chip 6, and the third flash chip 7 And the Nth flash chip, N is an integer greater than 3; the flash chip has 1024 blocks, each block has 256 pages, and each page has 32 sectors combined.
  • data writing includes the following steps:
  • the data buffer is cut into a plurality of code words, and each code word can be divided into data and protection data generated by the error checking and correcting device;
  • the invention also provides an improved error checking and correcting device correcting capability, and is applicable to various error checking and correcting devices;
  • the error checking and correcting device correcting method comprises the following steps:
  • the data to be stored in the memory from the external device or the device memory is placed in the data buffer;
  • the error correction and correction device generates the policyholder data according to the data content
  • a read command is issued from the flash instruction device in the flash memory control device, and data is transferred from the flash memory to the data buffer via the bus, and the dummy data portion is ignored during reading, and valid data is taken.
  • the binary linear cyclic code 70-bit error checking and correction technique Assume that the binary linear cyclic code 70-bit error checking and correction technique is used.
  • the valid data per 1024 bytes is 512 bytes, and the rest is fake data, which produces 92 bytes of protected data. Up to 70 words can be corrected by protecting data. In the section, only 70 bytes can be corrected compared to 1024 bytes, and the present invention can make effective data tolerate more error bits.
  • the error checking and correcting device increases the strength by 2 times.
  • the present invention utilizes the ability to fill false data in a data buffer and is suitable for various error checking and correcting techniques to improve error checking and error correction.

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
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Abstract

A flash data protection method using false data. A flash control device (1) and multiple flash chips are comprised. A data buffer region (2), a flash instruction control device (3), and a flash error check and correction device (4) are provided in the flash control device (1). The flash control device (1) is connected to the multiple flash chips by means of a bus. Data to be stored in a memory is placed in the data buffer region (2); false data is generated, only part of each codeword in the data buffer region (2) is filled with data, and the remaining data is replaced with false data; the error check and correction device generates protection data according to data content, and writes the data, the false data, and the protection data together into a flash. The method is applicable to different error check and correction technology devices, and can improve the capability of error check and correction.

Description

一种利用假数据的闪存数据保护方法Flash data protection method using fake data 技术领域Technical field
本发明涉及数据保护技术领域，具体为一种利用假数据的闪存数据保护方法。The invention relates to the technical field of data protection, in particular to a flash data protection method using fake data.
背景技术Background technique
闪存是一种长寿命的非易失性(在断电情况下仍能保持所存储的数据信息)的存储器，数据删除不是以单个的字节为单位而是以固定的区块为单位，区块大小一般为256KB到20MB。闪存是电子可擦除只读存储器(EEPROM)的变种，闪存与EEPROM不同的是，EEPROM能在字节水平上进行删除和重写而不是整个芯片擦写，而闪存的大部分芯片需要块擦除。由于其断电时仍能保存数据，闪存通常被用来保存设置信息，如在电脑的BIOS(基本程序)、PDA(个人数字助理)、数码相机中保存资料等；闪存正朝大容量、低功耗、低成本的方向发展。与传统硬盘相比，闪存的读写速度高、功耗较低，市场上已经出现了闪存硬盘，也就是SSD硬盘，该硬盘的性价比进一步提升。随着制造工艺的提高、成本的降低，闪存将更多地出现在日常生活之中。Flash memory is a long-lived non-volatile memory that retains stored data information in the event of a power outage. Data deletion is not in a single byte but in a fixed block. The block size is typically 256KB to 20MB. Flash memory is a variant of electronically erasable read-only memory (EEPROM). Unlike flash memory, EEPROM can be erased and rewritten at the byte level instead of the entire chip eraser, while most chips in flash require a block erase. except. Since it can still save data when it is powered off, flash memory is usually used to save setup information, such as saving data in the computer's BIOS (basic program), PDA (personal digital assistant), digital camera, etc.; flash memory is moving toward large capacity and low The development of power consumption and low cost. Compared with the traditional hard disk, the flash memory has high read/write speed and low power consumption. The flash hard disk, that is, the SSD hard disk, has appeared on the market, and the cost performance of the hard disk is further improved. As manufacturing processes increase and costs decrease, flash memory will appear more in everyday life.
闪存为非消失性的存储器装置，随者制造工艺提升，越先进的工艺闪存执行动作时会产生高温，因此闪存数据的错误比特会上升，导致数据错误。因此能增加数据正确性，成为一个重要的议题。Flash memory is a non-disappearing memory device, and the manufacturing process is improved. The more advanced the process flash memory generates high temperature, so the error bit of the flash data will rise, resulting in data errors. Therefore, it is an important issue to increase the correctness of data.
最常利用错误检查和纠正技术(例如：二元线性循环码或低密度奇偶校验码)作为错误修正的方法。错误检查和纠正技术可以在一定的区域内保护N个比特错误，要保护这特定区域，需要产生由错误检查和纠正技术运算出的保护数据。由保护数据和数据两者可以建构成为一个码字。当保护越多比特的错误检查和纠正技术，需要产生更大的码字。以二元线性循环码60和70比特错误检查和纠正技术为例子，每1024字节都要产生72和92字节的保护数据，当能修正的比特数越多，需要的保护数据就越多。更不幸的是要修正越 多错误比特的错误检查和纠正技术硬件需要花费更多的制造成本。因此本发明提出一个新构想，适用于各种错误检查和纠正技术装置，并且提升错误检查和纠错的能力。Error checking and correction techniques (such as binary linear cyclic codes or low density parity check codes) are most often used as a method of error correction. Error checking and correction techniques can protect N bit errors in a certain area. To protect this particular area, it is necessary to generate protection data calculated by error checking and correction techniques. Both protection data and data can be constructed as one codeword. When protecting more bits of error checking and correction techniques, larger codewords need to be generated. Taking the binary linear cyclic code 60 and 70-bit error checking and correction techniques as an example, 72 and 92 bytes of protection data are generated every 1024 bytes. The more bits that can be corrected, the more protection data is needed. . Even more unfortunately, it is necessary to fix more error bits for error checking and correcting technology hardware that requires more manufacturing costs. The present invention therefore proposes a new concept that is applicable to a variety of error checking and correction techniques and improves the ability to detect and correct errors.
发明内容Summary of the invention
本发明的目的在于提供一种利用假数据的闪存数据保护方法，以解决上述背景技术中提出的问题。It is an object of the present invention to provide a flash data protection method using fake data to solve the problems set forth in the above background art.
为实现上述目的，本发明提供如下技术方案：一种利用假数据的闪存数据保护方法，包括闪存控制装置和多个闪存芯片，所述闪存控制装置内设有数据缓冲区、闪存指令控制装置和闪存错误和纠正装置，所述闪存控制装置通过总线连接多个闪存芯片。In order to achieve the above object, the present invention provides the following technical solution: a flash data protection method using fake data, including a flash memory control device and a plurality of flash memory chips, wherein the flash memory control device is provided with a data buffer, a flash instruction control device, and A flash error and correction device that connects a plurality of flash chips through a bus.
优选的，多个闪存芯片包括第一闪存芯片、第二闪存芯片、第三闪存芯片和第N闪存芯片，N为大于3的整数；所述闪存芯片内有1024个块，每个块有256个页，每个页有32个扇形组合而成。Preferably, the plurality of flash memory chips comprise a first flash chip, a second flash chip, a third flash chip and an Nth flash chip, N being an integer greater than 3; the flash chip has 1024 blocks, each block having 256 Pages, each with 32 fan shapes.
优选的，数据写入包括以下步骤：Preferably, the data writing comprises the following steps:
A、数据缓冲区切割成多个码字，每个码字可分为数据和错误检查和纠正装置产生的保护数据；A. The data buffer is cut into a plurality of code words, and each code word can be divided into data and protection data generated by the error checking and correcting device;
B、通过闪存指令控制装置发出写入指令到闪存，接者将数据缓冲区的数据传输到闪存错误和纠正装置产生一组对应的保护数据；B. issuing a write command to the flash memory through the flash instruction control device, and transmitting the data buffer data to the flash memory error and correcting device to generate a corresponding set of protection data;
C、最后将数据和保护数据一起写入闪存；C. Finally, the data and the protection data are written together to the flash memory;
D、读取时从闪存读出数据，透过保护数据修正数据中错误的比特，产生正确的数据。D. Read data from the flash memory during reading, correct the wrong bits in the data through the protection data, and generate correct data.
优选的，错误检查和纠正装置修正方法包括如下步骤：Preferably, the error checking and correcting device correction method comprises the following steps:
A、从外部装置或装置内存将要储存到内存的数据放置在数据缓冲区；A. The data to be stored in the memory from the external device or the device memory is placed in the data buffer;
B、产生假数据，在数据缓冲区内的每个码字，只填入部分的数据；B. Generate false data, and fill in only part of the data in each codeword in the data buffer;
C、剩下的数据使用假数据代替到数据缓冲区；C. The remaining data is replaced with dummy data instead of the data buffer;
D、错误纠错和纠正装置依照数据内容产生保户数据；D. The error correction and correction device generates the policyholder data according to the data content;
E、通过闪存指令装置发出写入指令，将数据、假数据和保护数据一起写入闪存内；E. issuing a write command by the flash instruction device, and writing data, dummy data and protection data into the flash memory together;
F、当读取时会从闪存控制装置内的闪存指令装置对闪存发出读取指令，数据从闪存内经由总线传输到数据缓冲区，读取时忽略假数据部分，取用有效数据。F. When reading, a read command is issued from the flash instruction device in the flash memory control device, and data is transferred from the flash memory to the data buffer via the bus, and the dummy data portion is ignored during reading, and valid data is taken.
与现有技术相比，本发明的有益效果是：本发明利用在数据缓冲区填入假数据且适用于各种错误检查和纠正技术装置，提升错误检查和纠错的能力。Compared with the prior art, the present invention has the beneficial effects that the present invention utilizes the ability to fill false data in a data buffer and is applicable to various error checking and correcting technical devices to improve the ability of error checking and error correction.
附图说明DRAWINGS
图1为本发明整体结构示意图；Figure 1 is a schematic view of the overall structure of the present invention;
图2为本发明数据写入流程图；2 is a flow chart of data writing according to the present invention;
图3为本发明错误检查和纠正装置修正流程图。Figure 3 is a flow chart showing the correction of the error checking and correcting device of the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.
请参阅图1-3，本发明提供一种技术方案：一种利用假数据的闪存数据保护方法，包括闪存控制装置1和多个闪存芯片，所述闪存控制装置1内设有数据缓冲区2、闪存指令控制装置3和闪存错误和纠正装置4，所述闪存控制装置1通过总线连接多个闪存芯片；多个闪存芯片包括第一闪存芯片5、第二闪存芯片6、第三闪存芯片7和第N闪存芯片，N为大于3的整数；所述闪存芯片内有1024个块，每个块有256个页，每个页有32个扇形组合而成。Referring to FIG. 1-3, the present invention provides a technical solution: a flash data protection method using fake data, including a flash memory control device 1 and a plurality of flash memory chips, wherein the flash memory control device 1 is provided with a data buffer 2 a flash instruction control device 3 and a flash error and correction device 4, the flash control device 1 connecting a plurality of flash chips through a bus; the plurality of flash chips including the first flash chip 5, the second flash chip 6, and the third flash chip 7 And the Nth flash chip, N is an integer greater than 3; the flash chip has 1024 blocks, each block has 256 pages, and each page has 32 sectors combined.
本发明中，数据写入包括以下步骤：In the present invention, data writing includes the following steps:
A、数据缓冲区切割成多个码字，每个码字可分为数据和错误检查和纠正 装置产生的保护数据；A. The data buffer is cut into a plurality of code words, and each code word can be divided into data and protection data generated by the error checking and correcting device;
B、通过闪存指令控制装置发出写入指令到闪存，接者将数据缓冲区的数据传输到闪存错误和纠正装置产生一组对应的保护数据；B. issuing a write command to the flash memory through the flash instruction control device, and transmitting the data buffer data to the flash memory error and correcting device to generate a corresponding set of protection data;
C、最后将数据和保护数据一起写入闪存；C. Finally, the data and the protection data are written together to the flash memory;
D、读取时从闪存读出数据，透过保护数据修正数据中错误的比特，产生正确的数据。D. Read data from the flash memory during reading, correct the wrong bits in the data through the protection data, and generate correct data.
以二元线性循环码70比特错误检查和纠正技术为例子，每1024字节都有92字节的保护数据，依靠保护数据最多可以修正70字节，这种方式完全依靠错误检查和纠正技术。Taking the binary linear cyclic code 70-bit error checking and correction technique as an example, 92 bytes of protected data per 1024 bytes, and up to 70 bytes can be corrected by protecting data. This method relies entirely on error checking and correction techniques.
本发明还提供一个提升错误检查和纠正装置修正能力，并且适用于各种错误检查和纠正装置；错误检查和纠正装置修正方法包括如下步骤：The invention also provides an improved error checking and correcting device correcting capability, and is applicable to various error checking and correcting devices; the error checking and correcting device correcting method comprises the following steps:
A、从外部装置或装置内存将要储存到内存的数据放置在数据缓冲区；A. The data to be stored in the memory from the external device or the device memory is placed in the data buffer;
B、产生假数据，在数据缓冲区内的每个码字，只填入部分的数据；B. Generate false data, and fill in only part of the data in each codeword in the data buffer;
C、剩下的数据使用假数据代替到数据缓冲区；C. The remaining data is replaced with dummy data instead of the data buffer;
D、错误纠错和纠正装置依照数据内容产生保户数据；D. The error correction and correction device generates the policyholder data according to the data content;
E、通过闪存指令装置发出写入指令，将数据、假数据和保护数据一起写入闪存内；E. issuing a write command by the flash instruction device, and writing data, dummy data and protection data into the flash memory together;
F、当读取时会从闪存控制装置内的闪存指令装置对闪存发出读取指令，数据从闪存内经由总线传输到数据缓冲区，读取时忽略假数据部分，取用有效数据。F. When reading, a read command is issued from the flash instruction device in the flash memory control device, and data is transferred from the flash memory to the data buffer via the bus, and the dummy data portion is ignored during reading, and valid data is taken.
假设使用二元线性循环码70比特错误检查和纠正技术，每1024字节有效数据为512字节，剩下的为假数据，一样产生92字节的保护数据，依靠保护数据最多可以修正70字节，相较于1024字节只能修正70字节，本发明可以使有效数据能容忍更多的错误比特。错误检查和纠正装置提升2倍强度。Assume that the binary linear cyclic code 70-bit error checking and correction technique is used. The valid data per 1024 bytes is 512 bytes, and the rest is fake data, which produces 92 bytes of protected data. Up to 70 words can be corrected by protecting data. In the section, only 70 bytes can be corrected compared to 1024 bytes, and the present invention can make effective data tolerate more error bits. The error checking and correcting device increases the strength by 2 times.
综上所述，本发明利用在数据缓冲区填入假数据且适用于各种错误检查 和纠正技术装置，提升错误检查和纠错的能力。In summary, the present invention utilizes the ability to fill false data in a data buffer and is suitable for various error checking and correcting techniques to improve error checking and error correction.
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。While the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art The scope of the invention is defined by the appended claims and their equivalents.

Claims (4)

  1. 一种利用假数据的闪存数据保护方法，包括闪存控制装置(1)和多个闪存芯片，其特征在于：所述闪存控制装置(1)内设有数据缓冲区(2)、闪存指令控制装置(3)和闪存错误和纠正装置(4)，所述闪存控制装置(1)通过总线连接多个闪存芯片。A flash data protection method using fake data, comprising a flash memory control device (1) and a plurality of flash memory chips, characterized in that: the flash memory control device (1) is provided with a data buffer (2), a flash command control device (3) and a flash error and correction device (4) that connects a plurality of flash chips through a bus.
  2. 根据权利要求1所述的一种利用假数据的闪存数据保护方法，其特征在于：多个闪存芯片包括第一闪存芯片(5)、第二闪存芯片(6)、第三闪存芯片(7)和第N闪存芯片，N为大于3的整数；所述闪存芯片内有1024个块，每个块有256个页，每个页有32个扇形组合而成。The flash data protection method using fake data according to claim 1, wherein the plurality of flash memory chips comprise a first flash chip (5), a second flash chip (6), and a third flash chip (7) And the Nth flash chip, N is an integer greater than 3; the flash chip has 1024 blocks, each block has 256 pages, and each page has 32 sectors combined.
  3. 根据权利要求1所述的一种利用假数据的闪存数据保护方法，其特征在于：数据写入包括以下步骤：A flash data protection method using fake data according to claim 1, wherein the data writing comprises the following steps:
    A、数据缓冲区切割成多个码字，每个码字可分为数据和错误检查和纠正装置产生的保护数据；A. The data buffer is cut into a plurality of code words, and each code word can be divided into data and protection data generated by the error checking and correcting device;
    B、通过闪存指令控制装置发出写入指令到闪存，接者将数据缓冲区的数据传输到闪存错误和纠正装置产生一组对应的保护数据；B. issuing a write command to the flash memory through the flash instruction control device, and transmitting the data buffer data to the flash memory error and correcting device to generate a corresponding set of protection data;
    C、最后将数据和保护数据一起写入闪存；C. Finally, the data and the protection data are written together to the flash memory;
    D、读取时从闪存读出数据，透过保护数据修正数据中错误的比特，产生正确的数据。D. Read data from the flash memory during reading, correct the wrong bits in the data through the protection data, and generate correct data.
  4. 根据权利要求1所述的一种利用假数据的闪存数据保护方法，其特征在于：错误检查和纠正装置修正方法包括如下步骤：A flash data protection method using fake data according to claim 1, wherein the error checking and correcting means correcting method comprises the following steps:
    A、从外部装置或装置内存将要储存到内存的数据放置在数据缓冲区；A. The data to be stored in the memory from the external device or the device memory is placed in the data buffer;
    B、产生假数据，在数据缓冲区内的每个码字，只填入部分的数据；B. Generate false data, and fill in only part of the data in each codeword in the data buffer;
    C、剩下的数据使用假数据代替到数据缓冲区；C. The remaining data is replaced with dummy data instead of the data buffer;
    D、错误纠错和纠正装置依照数据内容产生保户数据；D. The error correction and correction device generates the policyholder data according to the data content;
    E、通过闪存指令装置发出写入指令，将数据、假数据和保护数据一起写入闪存内；E. issuing a write command by the flash instruction device, and writing data, dummy data and protection data into the flash memory together;
    F、当读取时会从闪存控制装置内的闪存指令装置对闪存发出读取指令，数据从闪存内经由总线传输到数据缓冲区，读取时忽略假数据部分，取用有效数据。F. When reading, a read command is issued from the flash instruction device in the flash memory control device, and data is transferred from the flash memory to the data buffer via the bus, and the dummy data portion is ignored during reading, and valid data is taken.
PCT/CN2018/099748 2018-01-12 2018-08-09 Flash data protection method using false data WO2019136971A1 (en)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108062260A (en) * 2018-01-12 2018-05-22 江苏华存电子科技有限公司 A kind of flash data guard method using false data
CN109144769A (en) * 2018-07-20 2019-01-04 江苏华存电子科技有限公司 A kind of method that random memory removes redundant storage unit from using error correction code check
CN109189325A (en) * 2018-07-20 2019-01-11 江苏华存电子科技有限公司 A kind of RAID protection is lower to promote flash memory read performance method
CN109144410A (en) * 2018-07-20 2019-01-04 江苏华存电子科技有限公司 A kind of multichannel promotes the flash memory potency method under RAID protection

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010028523A1 (en) * 2000-04-11 2001-10-11 Kabushiki Kaisha Toshiba Data storage device and method for controlling the device
CN201780798U (en) * 2009-12-24 2011-03-30 苏州亮智科技有限公司 NAND flash memory with high error correcting capability
TW201145292A (en) * 2010-06-10 2011-12-16 Global Unichip Corp A hardware module as XOR parity control
CN105183382A (en) * 2015-09-09 2015-12-23 浪潮(北京)电子信息产业有限公司 Data block protection method and device
CN108062260A (en) * 2018-01-12 2018-05-22 江苏华存电子科技有限公司 A kind of flash data guard method using false data

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102148054A (en) * 2010-02-05 2011-08-10 群联电子股份有限公司 Flash memory storage system, controller of flash memory storage system and data falsification preventing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010028523A1 (en) * 2000-04-11 2001-10-11 Kabushiki Kaisha Toshiba Data storage device and method for controlling the device
CN201780798U (en) * 2009-12-24 2011-03-30 苏州亮智科技有限公司 NAND flash memory with high error correcting capability
TW201145292A (en) * 2010-06-10 2011-12-16 Global Unichip Corp A hardware module as XOR parity control
CN105183382A (en) * 2015-09-09 2015-12-23 浪潮(北京)电子信息产业有限公司 Data block protection method and device
CN108062260A (en) * 2018-01-12 2018-05-22 江苏华存电子科技有限公司 A kind of flash data guard method using false data

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