WO2019127679A1 - 阵列基板、显示设备及阵列基板的制作方法 - Google Patents

阵列基板、显示设备及阵列基板的制作方法 Download PDF

Info

Publication number
WO2019127679A1
WO2019127679A1 PCT/CN2018/072700 CN2018072700W WO2019127679A1 WO 2019127679 A1 WO2019127679 A1 WO 2019127679A1 CN 2018072700 W CN2018072700 W CN 2018072700W WO 2019127679 A1 WO2019127679 A1 WO 2019127679A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
black matrix
matrix layer
gate
layer
Prior art date
Application number
PCT/CN2018/072700
Other languages
English (en)
French (fr)
Inventor
邵源
陈孝贤
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Publication of WO2019127679A1 publication Critical patent/WO2019127679A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods

Definitions

  • the present application relates to the field of display technologies, and in particular, to an array substrate, a display device, and a method for fabricating an array substrate.
  • an anti-reflection layer is added between the substrate of the array substrate and the metal signal line to absorb ambient light.
  • the commonly used anti-reflection layer includes indium tin oxide and black.
  • a resin material or the like, or a black electrode such as a titanium metal, a titanium metal alloy, a chromium metal, a chromium metal alloy, graphite or the like, and other less reflective metal, alloy, non-metal or mixture electrodes.
  • the anti-reflection layer or the black electrode increases the manufacturing process of the display panel, weakens the adhesion between the substrate and the first metal layer (metal signal line), and even affects the function of the metal signal line, and reduces the product yield and production of the display panel. effectiveness.
  • the technical problem to be solved by the present application is to provide an array substrate, a display device, and a method for fabricating an array substrate, which are used to solve the problem of reducing the product yield and production efficiency of the display panel by reducing the reflection of the array substrate in the prior art.
  • an array substrate including:
  • a thin film transistor located on a side of the black matrix layer facing away from the first substrate, and a vertical projection of a gate of the thin film transistor on the first substrate falls within a range of the black matrix layer;
  • a fastening structure is coupled between the black matrix layer and the gate, the fastening structure for enhancing adhesion between the gate and the black matrix layer.
  • the fastening structure includes a metal post, one end of the metal post is fixed inside the black matrix layer, and the other end of the metal post is fixed inside the gate.
  • one end of the metal post contacts and fixedly connects the surface of the first substrate, and the metal post is used to improve the adhesion between the first substrate and the gate.
  • the fastening structure includes a passivation layer stacked between the black matrix layer and the gate.
  • the vertical projection of the passivation layer on the first substrate coincides with the gate.
  • the present application further provides a display device including a color filter substrate, a liquid crystal layer, and an array substrate, the array substrate including a first substrate, a black matrix layer on a surface of the first substrate, a thin film transistor, and a fastening structure.
  • the thin film transistor is located on a side of the black matrix layer facing away from the first substrate, and a vertical projection of a gate of the thin film transistor on the first substrate falls within a range of the black matrix layer, the tight a solid structure connected between the black matrix layer and the gate, the fastening structure for improving adhesion between the gate and the black matrix layer, the color filter substrate and the array
  • the substrate is oppositely disposed, the liquid crystal layer is located between the color film substrate and the array substrate, and the display device displays an image from one side of the array substrate.
  • the fastening structure comprises a metal post, one end of the metal post is fixed inside the black matrix layer, and the other end of the metal post is fixed inside the gate.
  • one end of the metal post contacts and fixedly connects the surface of the first substrate, and the metal post is used to improve the adhesion between the first substrate and the gate.
  • the fastening structure includes a passivation layer stacked between the black matrix layer and the gate.
  • the vertical projection of the passivation layer on the first substrate coincides with the gate.
  • the application also provides a method for fabricating an array substrate, comprising:
  • the black matrix layer Forming a black matrix layer on a surface of the first substrate, the black matrix layer having a thickness smaller than a height of the metal pillar;
  • the metal pillar protrudes from one end of the black matrix layer and is fixed in the gate.
  • the metal pillar is formed by a yellow light process.
  • the application also provides a method for fabricating an array substrate, comprising:
  • the vertical projection of the passivation layer on the first substrate coincides with the gate.
  • the black matrix layer is used for blocking external ambient light to illuminate the gate of the thin film transistor, avoiding reflection of the gate to ambient light, improving the contrast of the display image of the display device, and making black on the array substrate.
  • the matrix layer saves the process of fabricating the black matrix layer on the color film substrate, simplifies the process of the display device; the fastening structure improves the adhesion between the black matrix layer and the gate electrode, and indirectly enhances the first substrate and the thin film transistor.
  • the bonding strength does not affect the function of the thin film transistor, and the product yield and production efficiency are high.
  • FIG. 1 is a schematic structural diagram of an array substrate according to Embodiment 1 of the present application.
  • FIG. 2 is a schematic diagram of step S101 of the method for fabricating an array substrate according to Embodiment 1 of the present application.
  • FIG. 3 is a schematic diagram of step S102 of the method for fabricating an array substrate according to Embodiment 1 of the present application.
  • step S103 is a schematic diagram of step S103 of the method for fabricating an array substrate according to the first embodiment of the present application.
  • FIG. 5 is a schematic diagram of step S104 of the method for fabricating the array substrate according to the first embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an array substrate according to Embodiment 2 of the present application.
  • FIG. 7 is a schematic diagram of step S101 of the method for fabricating the array substrate according to the second embodiment of the present application.
  • FIG. 8 is a schematic diagram of step S102 of the method for fabricating an array substrate according to Embodiment 2 of the present application.
  • FIG. 9 is a schematic diagram of step S103 of the method for fabricating the array substrate according to the second embodiment of the present application.
  • FIG. 10 is a schematic diagram of step S104 of the method for fabricating an array substrate according to Embodiment 2 of the present application.
  • FIG. 11 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.
  • the array substrate provided by the embodiment of the present application is used for a liquid crystal display device, specifically, a device such as a mobile phone, a notebook computer, a tablet computer, or the like.
  • the liquid crystal display device provided by the embodiment of the present application displays an image on the array substrate side.
  • the display surface of the display device is located on a side of the array substrate facing away from the color filter substrate, in other words, inside the display device, the backlight The image is displayed after sequentially passing through the color filter substrate, the liquid crystal layer, and the array substrate.
  • an array substrate 100 includes a first substrate 10 , a black matrix layer 20 , a thin film transistor 30 , and a fastening structure.
  • the first substrate 10 is a transparent substrate.
  • the first substrate 10 is a glass substrate.
  • the first substrate 10 may be a substrate made of other transparent materials such as plastic.
  • the surface of the first substrate 10 is flat to facilitate stacking various layer structures on the surface of the first substrate 10 to form a functional device.
  • the black matrix layer 20 is located on the surface of the first substrate 10, and the black matrix layer 20 is an exposed color resist material. Specifically, the black matrix layer 20 is formed on the surface of the first substrate 10 after being patterned. . The black matrix layer 20 has the function of absorbing light, thereby blocking the propagation of light.
  • the thin film transistor 30 is located on the side of the black matrix layer 20 facing away from the first substrate 10, and the vertical projection of the gate electrode 32 of the thin film transistor 30 on the first substrate 10 falls within the range of the black matrix layer 20.
  • the thin film transistor 30 is stacked on the black matrix layer 20, and specifically, the gate electrode 32, the gate insulating layer 34, the active layer 36, the source electrode 382, the drain electrode 384, and the like are sequentially stacked, and in one embodiment, the gate electrode 32 is formed after the metal layer is patterned, so that the gate electrode 32 has a certain reflectance.
  • the black matrix layer 20 is located on the color filter substrate 200 to avoid light leakage of the display panel.
  • the black matrix layer 20 on the array substrate 100 in this embodiment can not only avoid light leakage of the display panel, but also avoid the thin film transistor 30.
  • the gate 32 reflects ambient light.
  • the black matrix layer 20 between the pixel units is used to prevent light leakage through the backlight of the display panel, and a portion of the black matrix layer 20 corresponding to the gate 32 of the thin film transistor 30 is used to isolate the gate 32 from the first
  • the substrate 10 is configured such that the ambient light passes through the first substrate 10 and cannot be irradiated to the gate 32, thereby preventing the gate 32 from reflecting ambient light and improving the contrast of the display image displayed by the display device.
  • the width of the black matrix layer 20 corresponding to the gate 32 is 10-60 um to cover the gate 32, so that the gate 32 cannot be illuminated by ambient light.
  • the thickness of the black matrix layer 20 is 0.5. -3um to provide sufficient absorption of ambient light.
  • the fastening structure is connected between the black matrix layer 20 and the gate 32, and the fastening structure is used to improve the adhesion between the gate 32 and the black matrix layer 20.
  • the fastening structure includes a metal post 40 having one end fixed to the inside of the black matrix layer 20 and the other end of the metal post 40 being fixed inside the gate 32.
  • the metal post 40 is formed of a cylindrical metal material.
  • the metal post 40 is a structure formed by etching a metal layer by a yellow light process.
  • the metal post 40 includes a first end 42 and a second end 44 disposed opposite each other.
  • the first end 42 is recessed inside the black matrix layer 20, and the second end 44 is trapped inside the gate 32, and the black matrix layer 20 is intimately coupled to the gate 32 by a metal post 40 which enhances the adhesion between the black matrix layer 20 and the gate 32.
  • the black matrix layer 20 is formed on the surface of the first substrate 10, and the metal pillar 40 indirectly improves the bonding force between the first substrate 10 and the gate electrode 32 and the thin film transistor 30, and the devices on the first substrate 10 are not easily peeled off.
  • the function of the transistor 30 is not affected, and the product yield and production efficiency are high.
  • the height of the metal posts 40 is 1-4 um.
  • one end of the metal post 40 is fixedly connected to the surface of the first substrate 10, and the metal post 40 is used to improve the adhesion between the first substrate 10 and the gate 32.
  • the metal pillar 40 is formed on the surface of the first substrate 10, in other words, the first end 42 of the metal pillar 40 contacts and fixes the surface of the first substrate 10, thereby fixing the first substrate 10 fixed to the metal pillar 40,
  • the black matrix layer 20 and the gate electrode 32 are fastened together, and the devices on the first substrate 10 are not easily peeled off, the function of the thin film transistor 30 is not affected, and the product yield and production efficiency are high.
  • the black matrix layer 20 is used to block external ambient light from illuminating the gate 32 of the thin film transistor 30, to avoid reflection of the ambient light by the gate 32, to improve the contrast of the display image of the display device, and to form a black matrix layer on the array substrate 100.
  • 20 saves the process of fabricating the black matrix layer 20 in the color filter substrate 200, which simplifies the manufacturing process of the display device;
  • the metal pillar 40 improves the adhesion between the black matrix layer 20 and the gate electrode 32, and also enhances the first substrate 10
  • the bonding strength with the thin film transistor 30 does not affect the function of the thin film transistor 30, and the product yield and production efficiency are high.
  • the method for fabricating the array substrate 100 provided in the first embodiment of the present invention is used to fabricate the array substrate 100 provided in the first embodiment of the present application.
  • the manufacturing steps include the following.
  • the first substrate 10 is provided, and a metal pillar 40 is formed on the surface of the first substrate 10.
  • the first substrate 10 is a transparent substrate.
  • the first substrate 10 is a film substrate.
  • the first substrate 10 may also be made of other transparent materials such as plastic.
  • the surface of the first substrate 10 is flat to facilitate stacking various layer structures on the surface of the first substrate 10 to form a functional device.
  • the metal post 40 is formed of a cylindrical metal material. Specifically, the metal post 40 is a structure formed by etching a metal layer by a yellow light process. In one embodiment, the height of the metal posts 40 is 1-4 um.
  • a black matrix layer 20 is formed on the surface of the first substrate 10, and the thickness of the black matrix layer 20 is smaller than the height of the metal pillars 40.
  • the black matrix layer 20 is an exposed color resist material. Specifically, the black matrix layer 20 is patterned on the surface of the first substrate 10 .
  • the black matrix layer 20 has the function of absorbing light to block the propagation of light.
  • the metal post 40 includes a first end 42 and a second end 44 .
  • the first end 42 is recessed inside the black matrix layer 20 . Specifically, the first end 42 contacts and is fixed to the first substrate 10 .
  • the surface of the second end 44 protrudes from the black matrix layer 20 for subsequent connection of the thin film transistor 30.
  • the first end 42 of the metal post 40 is trapped inside the black matrix layer 20, the second end 44 is trapped inside the gate 32, and the black matrix layer 20 and the gate 32 pass through the metal post.
  • the 40 is closely connected and the metal post 40 increases the adhesion between the black matrix layer 20 and the gate 32.
  • the metal pillar 40 is formed on the surface of the first substrate 10, in other words, the first end 42 of the metal pillar 40 contacts and fixes the surface of the first substrate 10, thereby fixing the first substrate 10 fixed to the metal pillar 40,
  • the black matrix layer 20 and the gate electrode 32 are fastened together, and the devices on the first substrate 10 are not easily peeled off, the function of the thin film transistor 30 is not affected, and the product yield and production efficiency are high.
  • S104 a gate insulating layer 34, an active layer 36, a source 382, and a drain 384 are sequentially formed on the gate electrode 32.
  • the thin film transistor 30 is located on a side of the black matrix layer 20 facing away from the first substrate 10 , and the vertical projection of the gate 32 of the thin film transistor 30 on the first substrate 10 falls on the black matrix layer 20 .
  • the thin film transistor 30 is stacked on the black matrix layer 20, and specifically, the gate electrode 32, the gate insulating layer 34, the active layer 36, the source electrode 382, the drain electrode 384, and the like are sequentially stacked, and in one embodiment, the gate electrode 32 is formed after the metal layer is patterned, so that the gate electrode 32 has a certain reflectance.
  • the black matrix layer 20 is located on the color filter substrate 200 to avoid light leakage of the display panel.
  • the black matrix layer 20 on the array substrate 100 in this embodiment can not only avoid light leakage of the display panel, but also avoid the thin film transistor 30.
  • the gate 32 reflects ambient light. Specifically, a portion of the black matrix layer 20 between the pixel units is used to prevent light leakage through the backlight of the display panel, and a portion of the black matrix layer 20 corresponding to the gate 32 of the thin film transistor 30 is used to isolate the gate 32 from the first
  • the substrate 10 is configured such that the ambient light passes through the first substrate 10 and cannot be irradiated to the gate 32, thereby preventing the gate 32 from reflecting ambient light and improving the contrast of the display image displayed by the display device.
  • the width of the black matrix layer 20 corresponding to the gate 32 is 10-60 um to cover the gate 32, so that the gate 32 cannot be illuminated by ambient light. Further, the thickness of the black matrix layer 20 is 0.5. -3um to provide sufficient absorption of ambient light.
  • the black matrix layer 20 is used to block external ambient light from illuminating the gate 32 of the thin film transistor 30, to avoid reflection of the ambient light by the gate 32, to improve the contrast of the display image of the display device, and to form a black matrix layer on the array substrate 100.
  • 20 saves the process of fabricating the black matrix layer 20 in the color filter substrate 200, which simplifies the manufacturing process of the display device;
  • the metal pillar 40 improves the adhesion between the black matrix layer 20 and the gate electrode 32, and also enhances the first substrate 10
  • the bonding strength with the thin film transistor 30 does not affect the function of the thin film transistor 30, and the product yield and production efficiency are high.
  • the array substrate 100 provided in the second embodiment of the present application includes a first substrate 10 , a black matrix layer 20 , a thin film transistor 30 , and a fastening structure.
  • the first substrate 10 is a transparent substrate.
  • the first substrate 10 is a thin film substrate.
  • the first substrate 10 may be a substrate made of other transparent materials such as plastic.
  • the surface of the first substrate 10 is flat to facilitate stacking various layer structures on the surface of the first substrate 10 to form a functional device.
  • the black matrix layer 20 is located on the surface of the first substrate 10, and the black matrix layer 20 is an exposed color resist material. Specifically, the black matrix layer 20 is formed on the surface of the first substrate 10 after being patterned. . The black matrix layer 20 has the function of absorbing light, thereby blocking the propagation of light.
  • the thin film transistor 30 is located on the side of the black matrix layer 20 facing away from the first substrate 10, and the vertical projection of the gate electrode 32 of the thin film transistor 30 on the first substrate 10 falls within the range of the black matrix layer 20.
  • the thin film transistor 30 is stacked on the black matrix layer 20, and specifically, the gate electrode 32, the gate insulating layer 34, the active layer 36, the source electrode 382, the drain electrode 384, and the like are sequentially stacked, and in one embodiment, the gate electrode 32 is formed after the metal layer is patterned, so that the gate electrode 32 has a certain reflectance.
  • the black matrix layer 20 is located on the color filter substrate 200 to avoid light leakage of the display panel.
  • the black matrix layer 20 on the array substrate 100 in this embodiment can not only avoid light leakage of the display panel, but also avoid the thin film transistor 30.
  • the gate 32 reflects ambient light.
  • the black matrix layer 20 between the pixel units is used to prevent light leakage through the backlight of the display panel, and a portion of the black matrix layer 20 corresponding to the gate 32 of the thin film transistor 30 is used to isolate the gate 32 from the first
  • the substrate 10 is configured such that the ambient light passes through the first substrate 10 and cannot be irradiated to the gate 32, thereby preventing the gate 32 from reflecting ambient light and improving the contrast of the display image displayed by the display device.
  • the width of the black matrix layer 20 corresponding to the gate 32 is 10-60 um to cover the gate 32, so that the gate 32 cannot be illuminated by ambient light.
  • the thickness of the black matrix layer 20 is 0.5. -3um to provide sufficient absorption of ambient light.
  • the fastening structure is connected between the black matrix layer 20 and the gate 32, and the fastening structure is used to improve the adhesion between the gate 32 and the black matrix layer 20.
  • the fastening structure includes a passivation layer 50 stacked between the black matrix layer 20 and the gate 32.
  • the passivation layer 50 is patterned SiNx, and the black matrix layer 20 and the gate electrode 32 are closely connected by the passivation layer 50.
  • the passivation layer 50 improves the adhesion between the black matrix layer 20 and the gate electrode 32.
  • the black matrix layer 20 is formed on the surface of the first substrate 10, and the passivation layer 50 indirectly increases the bonding force between the first substrate 10 and the gate electrode 32 and the thin film transistor 30, and the devices on the first substrate 10 are not easily peeled off. The function of the thin film transistor 30 is not affected, and the product yield and production efficiency are high.
  • the vertical projection of the passivation layer 50 on the first substrate 10 coincides with the black matrix layer 20, or the vertical projection of the passivation layer 50 on the first substrate 10 coincides with the gate 32 to ensure the passivation layer 50 and The gate 32, passivation layer 50 and the black matrix layer 20 have sufficient contact area to provide sufficient adhesion.
  • the passivation layer 50 is good to avoid contamination of the device by the black matrix layer 20 by sputtering bombardment during metal deposition.
  • the black matrix layer 20 is used to block external ambient light from illuminating the gate 32 of the thin film transistor 30, to avoid reflection of the ambient light by the gate 32, to improve the contrast of the display image of the display device, and to form a black matrix layer on the array substrate 100.
  • 20 saves the process of fabricating the black matrix layer 20 in the color filter substrate 200, which simplifies the process of the display device;
  • the passivation layer 50 improves the adhesion between the black matrix layer 20 and the gate electrode 32, and also enhances the first substrate.
  • the bonding strength of 10 to the thin film transistor 30 does not affect the function of the thin film transistor 30, and the product yield and production efficiency are high.
  • the method for fabricating the array substrate 100 provided in the second embodiment of the present application is used to fabricate the array substrate 100 provided in the second embodiment of the present application.
  • the manufacturing steps include the following.
  • the first substrate 10 is provided, and a black matrix layer 20 is formed on the surface of the first substrate 10.
  • the black matrix layer 20 is an exposed color resist material. Specifically, the black matrix layer 20 is patterned on the surface of the first substrate 10 .
  • the black matrix layer 20 has the function of absorbing light, thereby blocking the propagation of light.
  • the passivation layer 50 is stacked between the black matrix layer 20 and the gate 32 .
  • the passivation layer 50 is patterned SiNx, and the black matrix layer 20 and the gate electrode 32 are closely connected by the passivation layer 50.
  • the passivation layer 50 improves the adhesion between the black matrix layer 20 and the gate electrode 32.
  • the black matrix layer 20 is formed on the surface of the first substrate 10, and the passivation layer 50 indirectly increases the bonding force between the first substrate 10 and the gate electrode 32 and the thin film transistor 30, and the devices on the first substrate 10 are not easily peeled off.
  • the function of the thin film transistor 30 is not affected, and the product yield and production efficiency are high.
  • the vertical projection of the passivation layer 50 on the first substrate 10 coincides with the black matrix layer 20 , or the vertical projection of the passivation layer 50 on the first substrate 10 coincides with the gate 32 to ensure
  • the passivation layer 50 has a sufficient contact area with the gate 32, the passivation layer 50, and the black matrix layer 20 to provide sufficient adhesion.
  • the passivation layer 50 is good to avoid contamination of the device by the black matrix layer 20 by sputtering bombardment during metal deposition.
  • S104 a gate insulating layer 34, an active layer 36, a source 382, and a drain 384 are sequentially formed on the gate electrode 32.
  • the thin film transistor 30 is located on a side of the black matrix layer 20 facing away from the first substrate 10 , and the vertical projection of the gate 32 of the thin film transistor 30 on the first substrate 10 falls on the black matrix layer 20 .
  • the thin film transistor 30 is stacked on the black matrix layer 20, and specifically, the gate electrode 32, the gate insulating layer 34, the active layer 36, the source electrode 382, the drain electrode 384, and the like are sequentially stacked, and in one embodiment, the gate electrode 32 is formed after the metal layer is patterned, so that the gate electrode 32 has a certain reflectance.
  • the black matrix layer 20 is located on the color filter substrate 200 to avoid light leakage of the display panel.
  • the black matrix layer 20 on the array substrate 100 in this embodiment can not only avoid light leakage of the display panel, but also avoid the thin film transistor 30.
  • the gate 32 reflects ambient light. Specifically, a portion of the black matrix layer 20 between the pixel units is used to prevent light leakage through the backlight of the display panel, and a portion of the black matrix layer 20 corresponding to the gate 32 of the thin film transistor 30 is used to isolate the gate 32 from the first
  • the substrate 10 is configured such that the ambient light passes through the first substrate 10 and cannot be irradiated to the gate 32, thereby preventing the gate 32 from reflecting ambient light and improving the contrast of the display image displayed by the display device.
  • the width of the black matrix layer 20 corresponding to the gate 32 is 10-60 um to cover the gate 32, so that the gate 32 cannot be illuminated by ambient light. Further, the thickness of the black matrix layer 20 is 0.5. -3um to provide sufficient absorption of ambient light.
  • the black matrix layer 20 is used to block external ambient light from illuminating the gate 32 of the thin film transistor 30, to avoid reflection of the ambient light by the gate 32, to improve the contrast of the display image of the display device, and to form a black matrix layer on the array substrate 100.
  • 20 saves the process of fabricating the black matrix layer 20 in the color filter substrate 200, which simplifies the process of the display device;
  • the passivation layer 50 improves the adhesion between the black matrix layer 20 and the gate electrode 32, and also enhances the first substrate.
  • the bonding strength of 10 to the thin film transistor 30 does not affect the function of the thin film transistor 30, and the product yield and production efficiency are high.
  • an embodiment of the present application further provides a display device 500 including a color filter substrate 200 , a liquid crystal layer 300 , and an array substrate 100 according to an embodiment of the present application.
  • the color filter substrate 200 is disposed opposite to the array substrate 100 , and the liquid crystal layer is disposed.
  • 300 is located between the color filter substrate 200 and the array substrate 100, and the display device displays an image from one side of the array substrate 100.
  • the display device 500 further includes a backlight module 400.
  • the backlight module 400 emits a backlight through the color filter substrate 200 to enter the liquid crystal layer 300 and is emitted from the array substrate 100.
  • the black matrix layer 20 is used to block external ambient light from illuminating the gate 32 of the thin film transistor 30, to avoid reflection of the ambient light by the gate 32, to improve the contrast of the display image of the display device, and to form a black matrix layer on the array substrate 100.
  • 20 saves the process of fabricating the black matrix layer 20 in the color filter substrate 200, which simplifies the manufacturing process of the display device; the fastening structure improves the adhesion between the black matrix layer 20 and the gate electrode 32, and indirectly enhances the first substrate 10
  • the bonding strength with the thin film transistor 30 does not affect the function of the thin film transistor 30, and the product yield and production efficiency are high.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种阵列基板(100)，包括：第一基板(10)；黑色矩阵层(20)，位于第一基板(10)的表面；薄膜晶体管(30)，位于黑色矩阵层(20)背离第一基板(10)的一侧，薄膜晶体管(30)的栅极(32)在第一基板(10)上的垂直投影落在黑色矩阵层(20)的范围内；紧固结构，连接于黑色矩阵层(20)与栅极(32)之间，紧固结构用于提高栅极(32)与黑色矩阵层(20)之间的附着力。一种阵列基板(100)的制作方法和显示设备(500)。黑色矩阵层(20)用于阻隔外界环境光线向薄膜晶体管(30)的栅极(32)照射，避免栅极(32)对外界环境光线的反射，紧固结构提高了黑色矩阵层(20)与栅极(32)之间的附着力，产品良率及生产效率高。

Description

阵列基板、显示设备及阵列基板的制作方法
本申请要求于2017年12月27日提交中国专利局、申请号为201711446004.2、申请名称为“阵列基板、显示设备及阵列基板的制作方法”的中国专利申请的优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本申请涉及显示技术领域，尤其是涉及一种阵列基板、显示设备及阵列基板的制作方法。
背景技术
随着近年来显示器需求量的不断提高，一些新技术应运而生，而显示面板的亮度和对比度不高仍然是制约显示器进一步发展的重要因素。当对比度较佳时，显示面板的整体色彩与显示效果都较为理想，因此，如何提高显示面板的对比度已经成为当前研究的重点。在提高对比度的方式上，除了提高发光单元的亮度外，降低显示面板对外界环境光的反射也是提高对比度的一个重要方式。事实上，外界环境光不可避免的会照射向显示面板，而阵列基板上的金属信号线(例如数据线、扫描线、薄膜晶体管的栅极等)会反射外界环境光，容易出现镜面的效果，从而会对显示面板的对比度产生影响，导致最终的显示效果不佳。
现有技术中，为了避免阵列基板的反射效果，人们采用在阵列基板的基板和金属信号线之间增加一层减反层来吸收外界环境光，常用的减反层包括铟锡氧化物、黑色树脂材料等，或者制作黑色电极，如钛金属、钛金属合金、铬金属、铬金属合金、石墨等其他反射性较弱的金属、合金、非金属或混合物电极。减反层或黑色电极增加了显示面板的制程，减弱了基板与第一金属层(金属信号线)之间的附着力，甚至影响金属信号线的功能，降低了显示面板的产品良率及生产效率。
申请内容
本申请要解决的技术问题是提供一种阵列基板、显示设备及阵列基板的制作方法，用以解决现有技术中降低阵列基板反射的方法影响显示面板的产品良率及生产效率的问题。
为解决上述技术问题，本申请提供一种阵列基板，包括：
第一基板；
黑色矩阵层，位于所述第一基板的表面；
薄膜晶体管，位于所述黑色矩阵层背离所述第一基板的一侧，所述薄膜晶体管的栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内；
紧固结构，连接于所述黑色矩阵层与所述栅极之间，所述紧固结构用于提高所述栅极与所述黑色矩阵层之间的附着力。
其中，所述紧固结构包括金属柱，所述金属柱的一端固定于所述黑色矩阵层的内部，所述金属柱的另一端固定于所述栅极的内部。
其中，所述金属柱的一端接触并固定连接所述第一基板的表面，所述金属柱用于提高所述第一基板与所述栅极之间的附着力。
其中，所述紧固结构包括钝化层，所述钝化层层叠设置于所述黑色矩阵层与所述栅极之间。
其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
所述钝化层在所述第一基板的垂直投影与所述栅极重合。
本申请还提供一种显示设备，包括彩膜基板、液晶层及阵列基板，所述阵列基板包括第一基板、位于所述第一基板的表面的黑色矩阵层、薄膜晶体管及紧固结构，所述薄膜晶体管位于所述黑色矩阵层背离所述第一基板的一侧，所述薄膜晶体管的栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内，所述紧固结构连接于所述黑色矩阵层与所述栅极之间，所述紧固结构用于提高所述栅极与所述黑色矩阵层之间的附着力，所述彩膜基板与所述阵列基板相对设置，所述液晶层位于所述彩膜基板与所述阵列基板之间，所述显示设备从所述阵列基板的一侧显示图像。
其中，所述紧固结构包括金属柱，所述金属柱的一端固定于所述黑色矩阵 层的内部，所述金属柱的另一端固定于所述栅极的内部。
其中，所述金属柱的一端接触并固定连接所述第一基板的表面，所述金属柱用于提高所述第一基板与所述栅极之间的附着力。
其中，所述紧固结构包括钝化层，所述钝化层层叠设置于所述黑色矩阵层与所述栅极之间。
其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
所述钝化层在所述第一基板的垂直投影与所述栅极重合。
本申请还提供一种阵列基板的制作方法，包括：
提供第一基板，在所述第一基板的表面形成金属柱；
在所述第一基板的表面形成黑色矩阵层，所述黑色矩阵层的厚度小于金属柱的高度；
在所述黑色矩阵层上沉积第一金属层，图案化所述第一金属层形成栅极，所述栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内，所述金属柱凸出于所述黑色矩阵层的一端固定于所述栅极内。
其中，所述金属柱通过黄光制程形成。
本申请还提供一种阵列基板的制作方法，包括：
提供第一基板，在所述第一基板的表面形成黑色矩阵层；
在所述黑色矩阵层表面形成钝化层；
在所述钝化层上沉积第一金属层，图案化所述第一金属层形成栅极，所述栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内。
其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
所述钝化层在所述第一基板的垂直投影与所述栅极重合。
本申请的有益效果如下：黑色矩阵层用于阻隔外界环境光线向薄膜晶体管的栅极照射，避免栅极对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板上制作黑色矩阵层节省了在彩膜基板制作黑色矩阵层的制程，简化了显示设备的制程；紧固结构提高了黑色矩阵层与栅极的之间的附着力，间接增强了第一基板与薄膜晶体管的结合强度，且不影响薄膜晶体管功能， 产品良率及生产效率高。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的明显变形方式。
图1为本申请实施例一提供的阵列基板的结构示意图。
图2为本申请实施例一提供的阵列基板的制作方法的步骤S101的示意图。
图3为本申请实施例一提供的阵列基板的制作方法的步骤S102的示意图。
图4为本申请实施例一提供的阵列基板的制作方法的步骤S103的示意图。
图5为本申请实施例一提供的阵列基板的制作方法的步骤S104的示意图。
图6为本申请实施例二提供的阵列基板的结构示意图。
图7为本申请实施例二提供的阵列基板的制作方法的步骤S101的示意图。
图8为本申请实施例二提供的阵列基板的制作方法的步骤S102的示意图。
图9为本申请实施例二提供的阵列基板的制作方法的步骤S103的示意图。
图10为本申请实施例二提供的阵列基板的制作方法的步骤S104的示意图。
图11为本申请实施例提供的显示设备的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请实施例提供的阵列基板用于液晶显示设备，具体的，例如手机、笔记本电脑、平板电脑等设备。本实施例中，应用本申请实施例提供的液晶显示设备为阵列基板侧显示图像，具体的，显示设备的显示面位于阵列基板背离彩膜基板的一侧，换言之，在显示设备内部，背光源依次穿过彩膜基板、液晶层及阵列基板后显示图像。
请参阅图1，本申请实施例一提供的阵列基板100包括第一基板10、黑色矩阵层20、薄膜晶体管30及紧固结构。具体的，第一基板10为透明基板，一种实施方式中，第一基板10为玻璃基板，其他实施方式中，第一基板10也可以为塑料等其他透明材料制成的基板。本实施例中，第一基板10表面平整，以有利于在第一基板10的表面层叠各种层结构以形成功能器件。
本实施例中，黑色矩阵层20位于第一基板10的表面，黑色矩阵层20为曝光后的色阻材料，具体的，黑色矩阵层20为经过图案化后形成于第一基板10的表面上。黑色矩阵层20具有吸收光线，从而阻挡光线传播的作用。本实施例中，薄膜晶体管30位于黑色矩阵层20背离第一基板10的一侧，薄膜晶体管30的栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内。薄膜晶体管30层叠设置于黑色矩阵层20上，具体的，栅极32、栅极绝缘层34、有源层36、源极382和漏极384等依次层叠设置，一种实施方式中，栅极32为金属层图案化后形成，故栅极32具有一定的反射率。相较于现有技术中黑色矩阵层20位于彩膜基板200上以避免显示面板漏光，本实施例中位于阵列基板100上的黑色矩阵层20不仅可以避免显示面板漏光，还可以避免薄膜晶体管30的栅极32反射环境光线。具体的，黑色矩阵层20位于像素单元之间的部分用于防止穿过显示面板的背光源发生漏光，黑色矩阵层20对应薄膜晶体管30的栅极32的部分用于隔绝栅极32与第一基板10，从而使外界环境光穿过第一基板10后无法照射至栅极32，杜绝栅极32反射环境光线，提高显示设备显示图像的对比度。一种实施方式中，对应栅极32的黑色矩阵层20的宽度为10-60um，以覆盖栅极32，使栅极32无法被外界环境光照射，进一步的，黑色矩阵层20的厚度为0.5-3um，以提供足够的吸收外界环境光的效果。
本实施例中，紧固结构连接于黑色矩阵层20与栅极32之间，紧固结构用于提高栅极32与黑色矩阵层20之间的附着力。具体的，紧固结构包括金属柱40，金属柱40的一端固定于黑色矩阵层20的内部，金属柱40的另一端固定于栅极32的内部。本实施例中，金属柱40为圆柱状的金属材料形成，具体的，金属柱40为通过黄光工艺蚀刻金属层形成的结构。本实施例中，金属柱40包括相对设置的第一端42和第二端44，第一端42内陷于黑色矩阵层20的内部，第二端44内陷于栅极32的内部，黑色矩阵层20与栅极32通过金属柱40紧密相连，金属柱40 提高了黑色矩阵层20与栅极32之间的附着力。进一步的，黑色矩阵层20形成于第一基板10的表面，金属柱40间接提高了第一基板10与栅极32及薄膜晶体管30的结合力，第一基板10上的各器件不易脱落，薄膜晶体管30的功能不受影响，产品良率及生产效率高。一种实施方式中，金属柱40的高度为1-4um。
本实施例中，金属柱40的一端固定连接于第一基板10的表面，金属柱40用于提高第一基板10与栅极32之间的附着力。具体的，金属柱40形成于第一基板10的表面，换言之，金属柱40的第一端42接触并固定连接第一基板10的表面，从而将与金属柱40固连的第一基板10、黑色矩阵层20及栅极32紧固的连接在一起，第一基板10上的各器件不易脱落，薄膜晶体管30的功能不受影响，产品良率及生产效率高。
黑色矩阵层20用于阻隔外界环境光线向薄膜晶体管30的栅极32照射，避免栅极32对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板100上制作黑色矩阵层20节省了在彩膜基板200制作黑色矩阵层20的制程，简化了显示设备的制程；金属柱40提高了黑色矩阵层20与栅极32的之间的附着力，也增强了第一基板10与薄膜晶体管30的结合强度，且不影响薄膜晶体管30功能，产品良率及生产效率高。
请参阅图2至图5，本申请实施例一提供的阵列基板100的制作方法用于制作本申请实施例一提供的阵列基板100，具体的，制作步骤包括如下。
S101、提供第一基板10，在第一基板10的表面形成金属柱40。
请参阅图2，具体的，第一基板10为透明基板，一种实施方式中，第一基板10为薄膜基板，其他实施方式中，第一基板10也可以为塑料等其他透明材料制成的基板。本实施例中，第一基板10表面平整，以有利于在第一基板10的表面层叠各种层结构以形成功能器件。
本实施例中，金属柱40为圆柱状的金属材料形成，具体的，金属柱40为通过黄光工艺蚀刻金属层形成的结构。一种实施方式中，金属柱40的高度为1-4um。
S102、在第一基板10的表面形成黑色矩阵层20，黑色矩阵层20的厚度小于金属柱40的高度。
请参阅图3，黑色矩阵层20为曝光后的色阻材料，具体的，黑色矩阵层20为经过图案化后形成于第一基板10的表面上。黑色矩阵层20具有吸收光线，从 而阻挡光线传播的作用。本实施例中，金属柱40包括相对设置的第一端42和第二端44，第一端42内陷于黑色矩阵层20的内部，具体的，第一端42接触并固定于第一基板10的表面，第二端44突出于黑色矩阵层20，用于后续连接薄膜晶体管30。
S103、在黑色矩阵层20上沉积第一金属层，图案化第一金属层形成栅极32，栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内，金属柱40凸出于黑色矩阵层20的一端固定于栅极32内。
请参阅图4，本实施例中，金属柱40的第一端42内陷于黑色矩阵层20的内部，第二端44内陷于栅极32的内部，黑色矩阵层20与栅极32通过金属柱40紧密相连，金属柱40提高了黑色矩阵层20与栅极32之间的附着力。进一步的，金属柱40形成于第一基板10的表面，换言之，金属柱40的第一端42接触并固定连接第一基板10的表面，从而将与金属柱40固连的第一基板10、黑色矩阵层20及栅极32紧固的连接在一起，第一基板10上的各器件不易脱落，薄膜晶体管30的功能不受影响，产品良率及生产效率高。
S104、在栅极32上依次形成栅极绝缘层34、有源层36、源极382和漏极384。
请参阅图5，本实施例中，薄膜晶体管30位于黑色矩阵层20背离第一基板10的一侧，薄膜晶体管30的栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内。薄膜晶体管30层叠设置于黑色矩阵层20上，具体的，栅极32、栅极绝缘层34、有源层36、源极382和漏极384等依次层叠设置，一种实施方式中，栅极32为金属层图案化后形成，故栅极32具有一定的反射率。相较于现有技术中黑色矩阵层20位于彩膜基板200上以避免显示面板漏光，本实施例中位于阵列基板100上的黑色矩阵层20不仅可以避免显示面板漏光，还可以避免薄膜晶体管30的栅极32反射环境光线。具体的，黑色矩阵层20位于像素单元之间的部分用于防止穿过显示面板的背光源发生漏光，黑色矩阵层20对应薄膜晶体管30的栅极32的部分用于隔绝栅极32与第一基板10，从而使外界环境光穿过第一基板10后无法照射至栅极32，杜绝栅极32反射环境光线，提高显示设备显示图像的对比度。一种实施方式中，对应栅极32的黑色矩阵层20的宽度为10-60um，以覆盖栅极32，使栅极32无法被外界环境光照射，进一步的，黑色矩阵层20的厚度为0.5-3um，以提供足够的吸收外界环境光的效果。
黑色矩阵层20用于阻隔外界环境光线向薄膜晶体管30的栅极32照射，避免栅极32对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板100上制作黑色矩阵层20节省了在彩膜基板200制作黑色矩阵层20的制程，简化了显示设备的制程；金属柱40提高了黑色矩阵层20与栅极32的之间的附着力，也增强了第一基板10与薄膜晶体管30的结合强度，且不影响薄膜晶体管30功能，产品良率及生产效率高。
请参阅图6，本申请实施例二提供的阵列基板100包括第一基板10、黑色矩阵层20、薄膜晶体管30及紧固结构。具体的，第一基板10为透明基板，一种实施方式中，第一基板10为薄膜基板，其他实施方式中，第一基板10也可以为塑料等其他透明材料制成的基板。本实施例中，第一基板10表面平整，以有利于在第一基板10的表面层叠各种层结构以形成功能器件。
本实施例中，黑色矩阵层20位于第一基板10的表面，黑色矩阵层20为曝光后的色阻材料，具体的，黑色矩阵层20为经过图案化后形成于第一基板10的表面上。黑色矩阵层20具有吸收光线，从而阻挡光线传播的作用。本实施例中，薄膜晶体管30位于黑色矩阵层20背离第一基板10的一侧，薄膜晶体管30的栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内。薄膜晶体管30层叠设置于黑色矩阵层20上，具体的，栅极32、栅极绝缘层34、有源层36、源极382和漏极384等依次层叠设置，一种实施方式中，栅极32为金属层图案化后形成，故栅极32具有一定的反射率。相较于现有技术中黑色矩阵层20位于彩膜基板200上以避免显示面板漏光，本实施例中位于阵列基板100上的黑色矩阵层20不仅可以避免显示面板漏光，还可以避免薄膜晶体管30的栅极32反射环境光线。具体的，黑色矩阵层20位于像素单元之间的部分用于防止穿过显示面板的背光源发生漏光，黑色矩阵层20对应薄膜晶体管30的栅极32的部分用于隔绝栅极32与第一基板10，从而使外界环境光穿过第一基板10后无法照射至栅极32，杜绝栅极32反射环境光线，提高显示设备显示图像的对比度。一种实施方式中，对应栅极32的黑色矩阵层20的宽度为10-60um，以覆盖栅极32，使栅极32无法被外界环境光照射，进一步的，黑色矩阵层20的厚度为0.5-3um，以提供足够的吸收外界环境光的效果。
本实施例中，紧固结构连接于黑色矩阵层20与栅极32之间，紧固结构用于 提高栅极32与黑色矩阵层20之间的附着力。具体的，紧固结构包括钝化层50，钝化层50层叠设置于黑色矩阵层20与栅极32之间。具体的，钝化层50为图案化SiNx，黑色矩阵层20与栅极32通过钝化层50紧密相连，钝化层50提高了黑色矩阵层20与栅极32之间的附着力。进一步的，黑色矩阵层20形成于第一基板10的表面，钝化层50间接提高了第一基板10与栅极32及薄膜晶体管30的结合力，第一基板10上的各器件不易脱落，薄膜晶体管30的功能不受影响，产品良率及生产效率高。
本实施例中，钝化层50在第一基板10的垂直投影与黑色矩阵层20重合，或者钝化层50在第一基板10的垂直投影与栅极32重合，以保证钝化层50与栅极32、钝化层50与黑色矩阵层20有足够的接触面积，从而提供足够的附着力。
一种实施方式中，钝化层50好可以避免金属沉积时溅射轰击使黑色矩阵层20对设备产生的污染。
黑色矩阵层20用于阻隔外界环境光线向薄膜晶体管30的栅极32照射，避免栅极32对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板100上制作黑色矩阵层20节省了在彩膜基板200制作黑色矩阵层20的制程，简化了显示设备的制程；钝化层50提高了黑色矩阵层20与栅极32的之间的附着力，也增强了第一基板10与薄膜晶体管30的结合强度，且不影响薄膜晶体管30功能，产品良率及生产效率高。
请参阅图7至图10，本申请实施例二提供的阵列基板100的制作方法用于制作本申请实施例二提供的阵列基板100，具体的，制作步骤包括如下。
S101、提供第一基板10，在第一基板10的表面形成黑色矩阵层20。
请参阅图7，黑色矩阵层20为曝光后的色阻材料，具体的，黑色矩阵层20为经过图案化后形成于第一基板10的表面上。黑色矩阵层20具有吸收光线，从而阻挡光线传播的作用。
S102、在黑色矩阵层20表面形成钝化层50。
请参阅图8，钝化层50层叠设置于黑色矩阵层20与栅极32之间。具体的，钝化层50为图案化SiNx，黑色矩阵层20与栅极32通过钝化层50紧密相连，钝化层50提高了黑色矩阵层20与栅极32之间的附着力。进一步的，黑色矩阵层20形成于第一基板10的表面，钝化层50间接提高了第一基板10与栅极32及薄膜晶 体管30的结合力，第一基板10上的各器件不易脱落，薄膜晶体管30的功能不受影响，产品良率及生产效率高。
S103、在钝化层50上沉积第一金属层，图案化第一金属层形成栅极32，栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内。
请参阅图9，本实施例中，钝化层50在第一基板10的垂直投影与黑色矩阵层20重合，或者钝化层50在第一基板10的垂直投影与栅极32重合，以保证钝化层50与栅极32、钝化层50与黑色矩阵层20有足够的接触面积，从而提供足够的附着力。
一种实施方式中，钝化层50好可以避免金属沉积时溅射轰击使黑色矩阵层20对设备产生的污染。
S104、在栅极32上依次形成栅极绝缘层34、有源层36、源极382和漏极384。
请参阅图10，本实施例中，薄膜晶体管30位于黑色矩阵层20背离第一基板10的一侧，薄膜晶体管30的栅极32在第一基板10上的垂直投影落在黑色矩阵层20的范围内。薄膜晶体管30层叠设置于黑色矩阵层20上，具体的，栅极32、栅极绝缘层34、有源层36、源极382和漏极384等依次层叠设置，一种实施方式中，栅极32为金属层图案化后形成，故栅极32具有一定的反射率。相较于现有技术中黑色矩阵层20位于彩膜基板200上以避免显示面板漏光，本实施例中位于阵列基板100上的黑色矩阵层20不仅可以避免显示面板漏光，还可以避免薄膜晶体管30的栅极32反射环境光线。具体的，黑色矩阵层20位于像素单元之间的部分用于防止穿过显示面板的背光源发生漏光，黑色矩阵层20对应薄膜晶体管30的栅极32的部分用于隔绝栅极32与第一基板10，从而使外界环境光穿过第一基板10后无法照射至栅极32，杜绝栅极32反射环境光线，提高显示设备显示图像的对比度。一种实施方式中，对应栅极32的黑色矩阵层20的宽度为10-60um，以覆盖栅极32，使栅极32无法被外界环境光照射，进一步的，黑色矩阵层20的厚度为0.5-3um，以提供足够的吸收外界环境光的效果。
黑色矩阵层20用于阻隔外界环境光线向薄膜晶体管30的栅极32照射，避免栅极32对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板100上制作黑色矩阵层20节省了在彩膜基板200制作黑色矩阵层20的制程，简化了显示设备的制程；钝化层50提高了黑色矩阵层20与栅极32的之间的附着 力，也增强了第一基板10与薄膜晶体管30的结合强度，且不影响薄膜晶体管30功能，产品良率及生产效率高。
请参阅图11，本申请实施例还提供一种显示设备500，包括彩膜基板200、液晶层300及本申请实施例提供的阵列基板100，彩膜基板200与阵列基板100相对设置，液晶层300位于彩膜基板200与阵列基板100之间，显示设备从阵列基板100的一侧显示图像。具体的，显示设备500还包括背光模组400，背光模组400发出背光源穿过彩膜基板200进入液晶层300，并从阵列基板100射出。
黑色矩阵层20用于阻隔外界环境光线向薄膜晶体管30的栅极32照射，避免栅极32对外界环境光线的反射，提高了显示设备的显示图像的对比度，在阵列基板100上制作黑色矩阵层20节省了在彩膜基板200制作黑色矩阵层20的制程，简化了显示设备的制程；紧固结构提高了黑色矩阵层20与栅极32的之间的附着力，间接增强了第一基板10与薄膜晶体管30的结合强度，且不影响薄膜晶体管30功能，产品良率及生产效率高。
以上所揭露的仅为本申请几种较佳实施例而已，当然不能以此来限定本申请之权利范围，本领域普通技术人员可以理解实现上述实施例的全部或部分流程，并依本申请权利要求所作的等同变化，仍属于申请所涵盖的范围。

Claims (14)

  1. 一种阵列基板，其中，包括：
    第一基板；
    黑色矩阵层，位于所述第一基板的表面；
    薄膜晶体管，位于所述黑色矩阵层背离所述第一基板的一侧，所述薄膜晶体管的栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内；
    紧固结构，连接于所述黑色矩阵层与所述栅极之间，所述紧固结构用于提高所述栅极与所述黑色矩阵层之间的附着力。
  2. 根据权利要求1所述的阵列基板，其中，所述紧固结构包括金属柱，所述金属柱的一端固定于所述黑色矩阵层的内部，所述金属柱的另一端固定于所述栅极的内部。
  3. 根据权利要求2所述的阵列基板，其中，所述金属柱的一端接触并固定连接所述第一基板的表面，所述金属柱用于提高所述第一基板与所述栅极之间的附着力。
  4. 根据权利要求1所述的阵列基板，其中，所述紧固结构包括钝化层，所述钝化层层叠设置于所述黑色矩阵层与所述栅极之间。
  5. 根据权利要求4所述的阵列基板，其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
    所述钝化层在所述第一基板的垂直投影与所述栅极重合。
  6. 一种显示设备，其中，包括彩膜基板、液晶层及阵列基板，所述阵列基板包括第一基板、位于所述第一基板的表面的黑色矩阵层、薄膜晶体管及紧固结构，所述薄膜晶体管位于所述黑色矩阵层背离所述第一基板的一侧，所述薄膜晶体管的栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内，所述紧固结构连接于所述黑色矩阵层与所述栅极之间，所述紧固结构用于提高所述栅极与所述黑色矩阵层之间的附着力，所述彩膜基板与所述阵列基板相对设置，所述液晶层位于所述彩膜基板与所述阵列基板之间，所述显示设备从所述阵列基板的一侧显示图像。
  7. 根据权利要求6所述的显示设备，其中，所述紧固结构包括金属柱，所 述金属柱的一端固定于所述黑色矩阵层的内部，所述金属柱的另一端固定于所述栅极的内部。
  8. 根据权利要求7所述的显示设备，其中，所述金属柱的一端接触并固定连接所述第一基板的表面，所述金属柱用于提高所述第一基板与所述栅极之间的附着力。
  9. 根据权利要求6所述的显示设备，其中，所述紧固结构包括钝化层，所述钝化层层叠设置于所述黑色矩阵层与所述栅极之间。
  10. 根据权利要求9所述的显示设备，其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
    所述钝化层在所述第一基板的垂直投影与所述栅极重合。
  11. 一种阵列基板的制作方法，其中，包括：
    提供第一基板，在所述第一基板的表面形成金属柱；
    在所述第一基板的表面形成黑色矩阵层，所述黑色矩阵层的厚度小于金属柱的高度；
    在所述黑色矩阵层上沉积第一金属层，图案化所述第一金属层形成栅极，所述栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内，所述金属柱凸出于所述黑色矩阵层的一端固定于所述栅极内。
  12. 根据权利要求11所述的阵列基板的制作方法，其中，所述金属柱通过黄光制程形成。
  13. 一种阵列基板的制作方法，其中，包括：
    提供第一基板，在所述第一基板的表面形成黑色矩阵层；
    在所述黑色矩阵层表面形成钝化层；
    在所述钝化层上沉积第一金属层，图案化所述第一金属层形成栅极，所述栅极在所述第一基板上的垂直投影落在所述黑色矩阵层的范围内。
  14. 根据权利要求13所述的阵列基板的制作方法，其中，所述钝化层在所述第一基板的垂直投影与所述黑色矩阵层重合，或者
    所述钝化层在所述第一基板的垂直投影与所述栅极重合。
PCT/CN2018/072700 2017-12-27 2018-01-15 阵列基板、显示设备及阵列基板的制作方法 WO2019127679A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201711446004.2A CN107894683B (zh) 2017-12-27 2017-12-27 阵列基板、显示设备及阵列基板的制作方法
CN201711446004.2 2017-12-27

Publications (1)

Publication Number Publication Date
WO2019127679A1 true WO2019127679A1 (zh) 2019-07-04

Family

ID=61808808

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/072700 WO2019127679A1 (zh) 2017-12-27 2018-01-15 阵列基板、显示设备及阵列基板的制作方法

Country Status (2)

Country Link
CN (1) CN107894683B (zh)
WO (1) WO2019127679A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114171570A (zh) * 2021-12-07 2022-03-11 Tcl华星光电技术有限公司 阵列基板及阵列基板的制作方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040009860A (ko) * 2002-07-26 2004-01-31 비오이 하이디스 테크놀로지 주식회사 고개구율 액정표시장치
CN104765186A (zh) * 2015-03-24 2015-07-08 深圳市华星光电技术有限公司 显示面板及显示装置
CN105404048A (zh) * 2015-12-17 2016-03-16 武汉华星光电技术有限公司 液晶显示装置
CN105572998A (zh) * 2016-03-04 2016-05-11 京东方科技集团股份有限公司 一种阵列基板及其制造方法、显示装置
CN106292102A (zh) * 2016-08-12 2017-01-04 京东方科技集团股份有限公司 一种显示面板及显示器
CN107479288A (zh) * 2017-09-06 2017-12-15 深圳市华星光电半导体显示技术有限公司 液晶面板及其制作方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040005040A (ko) * 2002-07-08 2004-01-16 엘지.필립스 엘시디 주식회사 콜레스테릭 액정 컬러필터를 포함하는 반사 및 투과형액정표시장치
CN105093735B (zh) * 2015-07-10 2018-04-20 深圳市华星光电技术有限公司 一种阵列基板及其制作方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040009860A (ko) * 2002-07-26 2004-01-31 비오이 하이디스 테크놀로지 주식회사 고개구율 액정표시장치
CN104765186A (zh) * 2015-03-24 2015-07-08 深圳市华星光电技术有限公司 显示面板及显示装置
CN105404048A (zh) * 2015-12-17 2016-03-16 武汉华星光电技术有限公司 液晶显示装置
CN105572998A (zh) * 2016-03-04 2016-05-11 京东方科技集团股份有限公司 一种阵列基板及其制造方法、显示装置
CN106292102A (zh) * 2016-08-12 2017-01-04 京东方科技集团股份有限公司 一种显示面板及显示器
CN107479288A (zh) * 2017-09-06 2017-12-15 深圳市华星光电半导体显示技术有限公司 液晶面板及其制作方法

Also Published As

Publication number Publication date
CN107894683B (zh) 2019-05-03
CN107894683A (zh) 2018-04-10

Similar Documents

Publication Publication Date Title
US7580092B2 (en) Liquid crystal display device and method for fabricating the same
US9285631B2 (en) Display device, transflective thin film transistor array substrate and manufacturing method thereof
US7667800B2 (en) Liquid crystal display device and method of fabricating the same
CN110082977B (zh) 一种tft阵列基板及显示面板
US11086163B2 (en) Reflective liquid crystal display and method for manufacturing the same
US9070599B2 (en) Array substrate, manufacturing method thereof and display device
JP2007017798A (ja) 液晶表示装置
WO2020168594A1 (zh) 一种 amoled 显示装置及其制备方法
US7907244B2 (en) Manufacturing process of transflective pixel structure
US20210080777A1 (en) Liquid crystal panel and manufacturing for the same
JP2000122094A (ja) 反射型液晶表示装置
TWM591242U (zh) 顯示面板及其主動元件陣列基板
KR20070002197A (ko) 반사투과형 액정 표시 장치 및 그 제조 방법
US10503034B2 (en) Manufacturing method of a TFT substrate and structure
WO2019127679A1 (zh) 阵列基板、显示设备及阵列基板的制作方法
TWI375839B (en) Liquid crystal panel and method of making the same
JP2009069443A (ja) 液晶表示装置
CN114924436B (zh) 阵列基板及液晶显示面板
WO2018157744A1 (zh) 反射式显示面板及其制造方法、显示装置
US7164456B2 (en) Liquid crystal display device and method of fabricating the same wherein having particular reflective electrode
JP2006215062A (ja) 液晶表示パネル、液晶表示装置、および液晶表示パネルの製造方法
WO2019037286A1 (zh) 透反式液晶显示装置
JP2007065405A (ja) 液晶表示装置
CN101551535B (zh) 液晶显示面板及其制造方法
WO2020224094A1 (zh) 半透半反式液晶显示面板及半透半反式液晶显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18894489

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18894489

Country of ref document: EP

Kind code of ref document: A1