WO2019117363A1 - High-mobility oxide sintered body and thin-film transistor comprising same - Google Patents

High-mobility oxide sintered body and thin-film transistor comprising same Download PDF

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Publication number
WO2019117363A1
WO2019117363A1 PCT/KR2017/014738 KR2017014738W WO2019117363A1 WO 2019117363 A1 WO2019117363 A1 WO 2019117363A1 KR 2017014738 W KR2017014738 W KR 2017014738W WO 2019117363 A1 WO2019117363 A1 WO 2019117363A1
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oxide
film transistor
thin film
sintered body
molding
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PCT/KR2017/014738
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French (fr)
Korean (ko)
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강동한
박정구
홍길수
박주현
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엘티메탈 주식회사
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Publication of WO2019117363A1 publication Critical patent/WO2019117363A1/en

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    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • C04B35/453—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on zinc, tin, or bismuth oxides or solid solutions thereof with other oxides, e.g. zincates, stannates or bismuthates
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    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/622—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/626—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B
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    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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    • C04B2235/02—Composition of constituents of the starting material or of secondary phases of the final product
    • C04B2235/30—Constituents and secondary phases not being of a fibrous nature
    • C04B2235/32—Metal oxides, mixed metal oxides, or oxide-forming salts thereof, e.g. carbonates, nitrates, (oxy)hydroxides, chlorides
    • C04B2235/3284—Zinc oxides, zincates, cadmium oxides, cadmiates, mercury oxides, mercurates or oxide forming salts thereof
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    • C04B2235/32—Metal oxides, mixed metal oxides, or oxide-forming salts thereof, e.g. carbonates, nitrates, (oxy)hydroxides, chlorides
    • C04B2235/3286—Gallium oxides, gallates, indium oxides, indates, thallium oxides, thallates or oxide forming salts thereof, e.g. zinc gallate
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    • C04B2235/00—Aspects relating to ceramic starting mixtures or sintered ceramic products
    • C04B2235/02—Composition of constituents of the starting material or of secondary phases of the final product
    • C04B2235/30—Constituents and secondary phases not being of a fibrous nature
    • C04B2235/32—Metal oxides, mixed metal oxides, or oxide-forming salts thereof, e.g. carbonates, nitrates, (oxy)hydroxides, chlorides
    • C04B2235/3293—Tin oxides, stannates or oxide forming salts thereof, e.g. indium tin oxide [ITO]
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    • C04B2235/604—Pressing at temperatures other than sintering temperatures
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    • C04B2235/00—Aspects relating to ceramic starting mixtures or sintered ceramic products
    • C04B2235/70—Aspects relating to sintered or melt-casted ceramic products
    • C04B2235/74—Physical characteristics
    • C04B2235/77—Density

Definitions

  • the present invention relates to an oxide sintered body whose composition is optimized so as to exhibit excellent mobility even when the size of a display is enlarged, a method of manufacturing the same, and a thin film transistor formed from the oxide sintered body and realizing high mobility and stability.
  • a thin film transistor for driving a display device by applying a driving voltage is widely used.
  • the thin film transistor is composed of a gate electrode, an insulating film, a semiconductor layer, and a source / drain electrode.
  • the semiconductor layer must be electrically stable and excellent in etching property.
  • the silicon-based material used as one of the above-described semiconductor layers has an advantage of being excellent in electrical stability and processability.
  • the silicon-based material absorbs a visible light region, malfunction of the thin film transistor can be caused by generation of carriers due to incident light.
  • a high-temperature process of about 200 ° C or more is required in forming amorphous silicon, resulting in an increase in manufacturing cost.
  • the silicon-based material is difficult to deposit on a polymer substrate, it is difficult to apply it to a subsequent flexible display.
  • Transparent oxide semiconductors can be formed on a substrate without heating, exhibit a mobility of about 10 cm 2 / Vs or more, and the structure of a thin film transistor can be simply changed compared to the case of using a conventional silicon-based material.
  • the InGaZnO oxide thin film transistor which is one of the transparent oxide semiconductors, can realize stable device characteristics.
  • the driving of the display becomes difficult due to the low mobility of InGaZnO. Therefore, it is required to develop an oxide semiconductor capable of exhibiting a high mobility of 20 cm 2 / Vs or more in order to be applied to a device that can be mounted on a large display.
  • Another object of the present invention is to provide a thin film transistor having a channel layer formed from an oxide sintered body of the above-mentioned composition.
  • Tin oxide Zinc oxide
  • a metal oxide containing at least one kind of metal ion M Al, Ga, Hf, V), wherein the atomic ratio represented by (M + Sn) / (M + In + Sn + Zn) To 20 at%, preferably an oxide sintered body for forming a thin film transistor (TFT) channel layer.
  • TFT thin film transistor
  • the metal oxide may include two metals (M) selected from the group consisting of Al, Ga, Hf, and V.
  • the relative density may be 95% or more and the specific resistance may be 1 x 10 < -2 >
  • the present invention also provides a thin film transistor including a gate electrode, an insulating layer, a channel layer, a source electrode, and a drain electrode formed on a substrate, wherein the channel layer includes a thin film transistor which is an amorphous oxide thin film formed by sputtering the oxide- to provide.
  • the thin film transistor may have a mobility of 20 cm 2 / Vs or more.
  • the thin film transistor may have a carrier concentration of 1.0 ⁇ 10 16 to 5.0 ⁇ 10 18 .
  • the present invention provides a flat panel display device including the thin film transistor described above.
  • the flat panel display device may be an LCD, an OLED, or an organic EL display, and the thin film transistor may be used as an electrode or an active layer thereof.
  • the pressing condition in the primary molding step is 50 MPa or more, and the molding density of the primary molded body may be 45 to 50%.
  • the pressing condition in the secondary molding step may be 2000 MPa or higher, and the molding density of the secondary molding may be 55 to 60%.
  • the sintering step may be performed at a temperature of 1400 to 1600 ° C. for 10 to 40 hours under atmospheric and oxygen.
  • the composition is optimized so as to exhibit excellent mobility characteristics, but also the oxide sintered body having little change in characteristics of the thin film transistor even when the film is formed for a long time can be provided.
  • a thin film transistor having a channel layer formed by using the above oxide sintered body as a sputtering target not only exhibits a high mobility of 20 cm / Vs or more, but also can significantly improve device stability characteristics.
  • the conventional InGaZnO-based oxide thin film transistor realizes stable device characteristics.
  • the driving of the display itself is difficult due to the low traveling speed of the InGaZnO-based oxide.
  • the above-described oxide semiconductor is an amorphous ITZO-based oxide having a high electron carrier concentration.
  • a thin film transistor using such an amorphous oxide as a channel layer may exhibit a high mobility of 20 cm / Vs or more and an electron carrier concentration of 1.0 ⁇ 10 16 to 5.0 ⁇ 10 18 .
  • the ITZO-based oxide semiconductor is a sputtering target which exhibits little change in the characteristics of the thin film transistor even when forming a film for a long time, and thus, when forming a thin film transistor, an excellent thin film transistor capable of simultaneously improving high mobility characteristics and element stability can be manufactured .
  • the oxide semiconductor sintered body according to the present invention is an ITZO-based oxide containing indium (In), tin (Sn), zinc (Zn), oxygen (O) and at least one metal ion (M) in the oxide.
  • the metal ion (M) contained in the ITZO-based oxide sintered body may be at least one or more of Al, Ga, Hf, and V, and preferably two or more.
  • the metal ion (M) may be gallium and aluminum, or may be hafnium and vanadium.
  • the oxide semiconductor sintered body contains only one kind of metal element, a carrier concentration of 1.0 x 10 < -18 > or more is likely to cause a short circuit in the manufacture of the thin film transistor device.
  • the electron carrier concentration can be controlled to 1.0 x 10 < -16 > and thus an oxide semiconductor target having device characteristics excellent in high mobility can be produced.
  • the added metal ion (M) stabilizes the ITZO- It is possible to exhibit high mobility of 20 cm 2 / Vs or more and excellent carrier concentration among the device characteristics of the thin film transistor.
  • the (M + Sn) / (M + In + Sn + Zn) if atoms is less than ratio of 10 atomic% shown by, note the effect of the additive element, because the improvement in the device characteristics insignificant, available 20cm applicable to a large display 2 / It can not show a high mobility of Vs or more.
  • the atomic ratio expressed by (M + Sn) / (M + In + Sn + Zn) exceeds 20 atomic%, the relative density and resistivity of the oxide semiconductor sintered body become rather poor, (See Table 1 below).
  • the oxide-sintered body of the present invention having the above composition may have a relative density of 95% or more and a specific resistance of 1 x 10 < -2 > Preferably, the relative density is 95% to 99.9%, the specific resistance may be 1 ⁇ 10 -3 ⁇ cm to 1 ⁇ 10 -2 ⁇ cm. If the relative density of the oxide-sintered body is less than 95%, there is a high probability that an abnormal discharge will occur due to nodules formed when the oxide-sintered body is used as a sputtering target.
  • the relative density is a value calculated by (actual density / theoretical density) x 100 of the sintered body.
  • the density is calculated by measuring the sintered body at 1 atm and 4 ° C water.
  • the oxide semiconductor sintered body according to the present invention can be produced by a conventional method known in the art.
  • it can be composed of a raw material powder preparation step, a step of preparing a powder spherulated with the mixed raw material powder, a step of producing a molded body, and a step of manufacturing a sintered body.
  • a spherical raw material powder containing indium oxide, tin oxide, zinc oxide, and at least one metal ion (M) is prepared.
  • powders containing the respective elements are weighed to meet the target composition, and then they are put into a mixer and pulverized and mixed with a bead mill to prepare a mixture (for example, slurry).
  • indium oxide, tin oxide, and zinc oxide can be used without limitation as conventional components known in the art.
  • In 2 O 3 , SnO 2 , ZnO and the like can be used.
  • additives such as a binder, a dispersant, a defoaming agent, etc., which are known in the art, may be added if necessary.
  • the dispersant is added in order to satisfy the purpose of finely pulverizing the particles while maintaining a stable dispersion evenly in the solution for a long time in the pulverized raw material particles.
  • usable dispersing agents include organic acid-based ones having a carboxyl group such as citric acid, polyacrylic acid (PAA) or a salt thereof, a copolymer, or a combination thereof.
  • the dispersant may be used in an amount of 0.5 to 3% by weight based on the weight of the powder in the slurry.
  • the binder is added in order to maintain the molding strength of the formed body in the process of drying the slurry after the powder is dried.
  • Non-limiting examples thereof include polymers such as polyvinyl alcohol and polyethylene glycol.
  • the amount of the binder to be used may be less than 2% by weight based on 100% by weight of the total powders in the slurry, specifically, 0.01% by weight or less and less than 2% by weight.
  • the antifoaming agent is used for removing bubbles in the slurry, and silicone oil, octyl alcohol, boric acid and the like can be usually used.
  • the amount of the antifoaming agent used may be in the range of 0.001 to 0.01% by weight relative to the powder in the slurry.
  • a mixture (slurry) prepared by mixing the above-mentioned indium oxide powder, tin oxide powder, zinc oxide powder, metal oxide containing at least one metal ion, water and at least one additive is milled and dried to prepare a dry powder .
  • the milling may be carried out using a conventional ball mill, bead mill or the like known in the art.
  • the pulverizing condition is not particularly limited, and for example, the pulverizing speed may be 1,000 to 2,500 rpm, and the time may be 5 to 10 hours.
  • the viscosity of the slurry obtained through milling is preferably maintained in the range of 250 to 450 Cps, and the amount of the binder is preferably adjusted to less than 2% by weight.
  • the milled slurry can be spray dried using a spray dryer equipment known in the art to obtain a spheronized dry powder.
  • the prepared spherical powder may be further subjected to a sieving process using a sieve of 120 mesh or less for homogenization.
  • step S20 the dry powder produced in the previous step S10 is subjected to a molding step of producing a molded body having a predetermined shape.
  • a two-step molding step is performed in order to increase the density of a molded body, compared with a case in which an oxide sintered body is manufactured by directly sintering after one forming step.
  • the classified spheroidized dry powder is put into a mold, and then a primary molded body having a desired shape is manufactured using a uniaxial molding machine.
  • the pressing conditions in the primary molding step are not particularly limited, and may be, for example, 50 MPa or more per unit area, and preferably 50 to 100 MPa.
  • the molding density of the primary molded product manufactured through the primary molding step may be adjusted to 45 to 50%. If the molding density of the primary molded article is lower than the above-mentioned range, the sintering driving force is lowered and the sintering time and temperature are increased. On the contrary, when the molding density is high, cracks may occur in the molded article. If the primary molded body does not have the above-described molding density, the primary molding step may be repeated one or more times as necessary.
  • a secondary molded body is manufactured by using an isostatic pressing machine.
  • Such isotropic pressing can obtain a molded article having homogeneous isotropy as compared with uniaxial pressing of a conventional mold press.
  • cold isostatic press CIP is preferably used.
  • the pressing conditions in the secondary molding step are not particularly limited, and may be, for example, 2,000 MPa or more per unit area, and preferably 2,000 to 2,500 MPa.
  • the molding density of the secondary molded product manufactured through the above-described secondary molding step can be adjusted to 55 to 60%. If the molding density of the secondary molded body is lower than the above range, the sintering driving force is lowered and the sintering time and temperature are increased. On the contrary, when the molding density is high, cracks may be generated in the molded body.
  • the secondary molding step may be repeated as necessary or the primary and secondary molding steps may be repeated continuously.
  • step S40 the secondary molded body is sintered to produce an oxide semiconductor sintered body.
  • the sintering step may be carried out at a temperature of 1400 to 1600 ° C for 10 to 40 hours under atmospheric (air) or oxygen atmosphere. At this time, the atmospheric gas injects air or oxygen, which serves to prevent the oxide from vaporizing during the sintering step.
  • the oxide sintered body thus produced may have a relative density of 95% or more and a specific resistance of 1 x 10 < -2 > Preferably, the relative density is 95% to 99.9%, the specific resistance may be 1 ⁇ 10 -3 ⁇ cm to 1 ⁇ 10 -2 ⁇ cm.
  • the oxide-sintered body having the above-described composition and physical properties according to the present invention can be used as a sputtering target to form an amorphous oxide thin film having a high electron concentration.
  • the formed amorphous oxide thin film is applied as a channel layer of a thin film transistor, thereby providing a thin film transistor (TFT) in which high mobility characteristics are secured and stability is realized.
  • TFT thin film transistor
  • One example of the film forming process through the sputtering process is to process the produced oxide sintered body into a predetermined size and shape, and then to attach the metal oxide film to a cooling metal plate or a backing plate to use as a sputtering target. Thereafter, an argon gas mixed with oxygen gas in a range of 0 to 1% in a vacuum chamber is supplied at a rate of 80 sccm, and the sputtering target is sputtered to produce an oxide semiconductor thin film used as a channel layer of the thin film transistor.
  • a thin film transistor (TFT) includes at least a gate electrode, an insulating film, a channel layer made of an oxide semiconductor, and a source electrode and a drain electrode formed on a substrate.
  • a thin film transistor is an active element having a function of applying a voltage to a gate electrode, controlling a current flowing to a channel layer, and switching a current between a source electrode and a drain electrode.
  • the thin film transistor may include a structure known in the art, except that an amorphous oxide thin film formed from an oxide sintered body of the above composition is used as a channel layer.
  • the type of the thin film transistor is not particularly limited, and may be, for example, a bottom gate type or an etch stop layer type.
  • the thin film transistor may further include a sacrificial layer formed on a channel layer, and a bottom gate in which a source electrode and a drain electrode are formed on the sacrificial layer.
  • the gate electrode is provided under the channel layer, and the source electrode and the drain electrode are provided on both sides of the channel layer on the sacrificial layer.
  • the thin film transistor further includes an etch stop layer (ESL) formed on the channel layer, and the etch stop layer (ESL) on which the source electrode and the drain electrode are formed Lt; / RTI > (ESL).
  • ESL etch stop layer
  • the gate electrode is provided under the channel layer, the source electrode and the drain electrode are located on the etch stop layer (ESL), and both electrodes are provided so as to contact both ends of the channel layer. have.
  • the source electrode and the drain electrode are contacted with the channel layer through a via hole or the like according to a conventional method known in the art.
  • the substrate can be any material used for a substrate of a conventional semiconductor device.
  • silicon Si
  • glass inorganic materials, organic materials or metals may be used without limitation.
  • the thickness of the substrate is not particularly limited, and when the flexible substrate is used, the thickness is preferably in the range of 50 to 500 mu m. If the thickness of the flexible substrate is less than 50 mu m, it is difficult to maintain sufficient flatness of the substrate itself. If the thickness of the flexible substrate exceeds 500 mu m, flexibility of the substrate itself becomes insufficient and it is difficult to bend the substrate itself It is because.
  • the substrate may have a moisture barrier layer (gas barrier layer) formed on its surface or back surface to prevent permeation of water vapor and oxygen.
  • a moisture barrier layer gas barrier layer
  • an inorganic material such as silicon nitride and silicon oxide is suitably used.
  • the moisture barrier layer can be formed by, for example, high-frequency sputtering.
  • a thermoplastic substrate is used, a hard coat layer, an undercoat layer, or the like may be further formed as necessary.
  • the gate electrode is for applying a voltage to turn on / off the thin film transistor.
  • the gate electrode may be formed using a conductive material such as a metal or a metal oxide.
  • the gate electrode may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, or Cu or an alloy thereof, IZO (InZnO)
  • IZO InZnO
  • a metal such as AZO (AlZnO) or a conductive oxide may be used, or an organic conductive compound such as polyaniline, polythiophene, and polypyrrole, or a mixture thereof may be used.
  • the gate electrode it is preferable to use Mo, Mo alloy or Cr from the viewpoint of reliability of TFT characteristics.
  • the thickness of the gate electrode may be in the range of, for example, 10 nm to 1000 nm.
  • the method of forming the gate electrode is not particularly limited.
  • the gate electrode is formed by a physical method such as a wet method such as a printing method or a coating method, a vacuum evaporation method, a sputtering method, and an ion plating method, or a chemical method such as CVD or plasma CVD.
  • the formation method can be appropriately selected in consideration of suitability with the material constituting the gate electrode.
  • a gate electrode is formed using Mo or Mo alloy, a DC sputtering method is used.
  • an organic conductive compound is used for the gate electrode, a wet film-forming method may be used.
  • the gate insulating film can be formed using an insulating material used in a typical semiconductor device, and silicon oxide or nitride can be used.
  • silicon oxide or nitride can be used.
  • HfO 2 , Al 2 O 3 , Si 3 N 4 , SiNx, YsO 3 , Ta 2 O 5 , or a mixture thereof can be used as the high-K material having a dielectric constant higher than that of SiO 2 or SiO 2 .
  • a double layer film made of these materials, or a polymer insulator such as polyimide may also be used.
  • the thickness of the gate insulating film is not particularly limited, and is preferably in the range of 10 nm to 10 mu m.
  • the gate insulating film needs to have a certain thickness to some extent in order to increase the voltage resistance in order to reduce the leakage current.
  • the thickness of the gate insulating film is more preferably 50 nm to 1000 nm in the case of the inorganic insulator, and more preferably 0.5 to 5 mu m in the case of the polymer insulator.
  • a high dielectric constant insulator such as HfO 2
  • HfO 2 it is preferable to use a high dielectric constant insulator for the gate insulating film because the transistor can be driven at a low voltage even if the film thickness is increased.
  • the source electrode and the drain electrode may be formed using a conductive material, respectively.
  • a metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, Cr, Ta and Ti or an alloy thereof, an alloy such as Al-Nd and APC, tin oxide, And may be formed using a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or AZO (AlZnO). It is preferable to use molybdenum (Mo) or molybdenum (Mo) alloy as the material of the source electrode and the drain electrode in view of the reliability of the TFT characteristic and the etching rate with respect to the sacrificial layer.
  • the thickness of the source electrode and the drain electrode may be, for example, in the range of 10 nm to 1000 nm.
  • the source electrode and the drain electrode may be formed according to a conventional method known in the art.
  • the source electrode and the drain electrode are formed by forming a film, forming a resist pattern on the film by photolithography, and etching the film.
  • the method of forming the film constituted by the source electrode and the drain electrode is not particularly limited.
  • a physical method such as a wet method such as a printing method or a coating method, a vacuum evaporation method, a sputtering method, an ion plating method, A chemical method such as a plasma CVD method, or the like.
  • the source electrode and the drain electrode are formed of Mo or a Mo alloy
  • a Mo film or an Mo alloy film is formed using DC sputtering, and then a Mo film or a Mo alloy film is coated with a resist pattern And the Mo film or the Mo alloy film is etched by the etching solution to form the source electrode and the drain electrode.
  • the present invention further comprises a sacrificial layer or etch stop layer (ESL) to effectively protect the channel layer.
  • ESL etch stop layer
  • the components of the sacrificial layer are not particularly limited, and those known in the art can be used without limitation.
  • an amorphous oxide thin film can be formed by forming an oxide sintered body having a composition similar to that of the oxide sintered body constituting the channel layer by the sputtering method.
  • the thickness of the sacrificial layer is preferably adjusted to a range of 50 to 1000 angstroms.
  • the etch stop layer may be formed using an inorganic insulating material.
  • the etch stop layer may be at least one selected from the group consisting of SiO, SiN, Al 2 O 3 , and TiO 2 .
  • the etch stop layer may typically be patterned by dry etching.
  • the present invention may further include a protection layer for protecting the channel layer, the source electrode, and the drain electrode, and insulated from the electronic device fabricated on the transistor.
  • the protective layer may be formed by curing a conventional photosensitive or thermosetting resin composition known in the art or a resin composition containing a metal oxide, a metal nitride, a metal fluoride, or the like.
  • the method of forming the protective layer is not particularly limited and examples of the protective layer include vacuum vapor deposition, sputtering, reactive sputtering, MBE (molecular beam epitaxy), cluster ion beam, ion plating, plasma polymerization (high frequency excitation ion plating) , A plasma CVD method, a laser CVD method, a thermal CVD method, a gas source CVD method, a coating method, a printing method, or a transfer method.
  • the thin film transistor of the present invention can be manufactured by a conventional method known in the art. For example, there is a process of forming a gate electrode on a substrate; Forming an insulating layer on the gate electrode; Forming a channel layer made of an oxide semiconductor on the gate insulating layer; Forming a source electrode and a drain electrode on the etch stop layer; And a step of bringing the source electrode and the source electrode into contact with both ends of the channel layer.
  • a step of forming a sacrificial layer or an edge stop layer on the channel layer may be further included.
  • the thin film transistor of the present invention configured as described above can be applied as an electrode, an active layer, a switching element, or a driving element to a flat panel display device such as a liquid crystal display (LCD) and an organic light emitting diode (OLED)
  • a flat panel display device such as a liquid crystal display (LCD) and an organic light emitting diode (OLED)
  • the transistor according to the present invention since the transistor according to the present invention has a mobility of 20 cm 2 / vs or more and is stable, the reliability of the flat panel display can be improved by applying it to the flat panel display. In particular, even if the display size is increased, it can be used stably.
  • the structures of the above-described liquid crystal display device and organic light emitting display device are well known, and a detailed description thereof will be omitted.
  • the transistor according to the present invention can be applied to various fields of electronic devices such as a memory device and a logic device as well as a flat panel display device.
  • (Oxide of gallium oxide and aluminum oxide) of the additive element M in amounts of 45 atomic%, 9 atomic%, 45 atomic%, and 1 atomic%, respectively, of indium oxide, tin oxide, zinc oxide, And then mixed to disperse the wet slurry having a concentration of 55% with zirconia beads of 0.3 mm in a bead mill medium.
  • the dispersed slurry was spray dried, and the obtained spheroidized powder was used for molding. Molding was performed by primary uniaxial molding and secondary molding using an equipotential molding machine. The final forming density was 55 ⁇ 60%.
  • Sintering was carried out using the above molded body. Sintering conditions were maintained for 10 hours in the range of 1400 to 1600 ° C. The gas was injected at a flow rate of 40 L / min using oxygen.
  • the relative density of the oxide-sintered body target of Example 1 prepared as described above was 98.9%, and the resistivity was measured to be 1.0 10 -3 ?
  • the mobility of the thin film transistor formed using the obtained oxide target of Example 1 was measured to be 30 cm 2 / Vs, and the carrier concentration was 2.0 ⁇ 10 18 / cm 3 .
  • Example 2 Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 43 atomic%, 12 atomic%, 43 atomic% and 2 atomic%, respectively , An oxide-sintered body of Example 2 was prepared in the same manner as in Example 1. The relative density of the oxide-sintered body target of Example 2 obtained as described above was measured to be 98.5% and the specific resistance of 1.7 x 10 < -3 >
  • Example 3 Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 40 atom%, 16 atom%, 40 atom% and 4 atom%, respectively , An oxide-sintered body of Example 3 was prepared in the same manner as in Example 1. The relative density of the oxide-sintered body target of Example 3 thus obtained was measured to be 97.9% and the specific resistance thereof was 7.0 10 -3 ? Cm.
  • the mobility of the thin film transistor formed using the obtained oxide target of Example 3 was measured to be 24 cm 2 / Vs, and the carrier concentration was 4.0 ⁇ 10 17 / cm 3 .
  • Example 1 Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in a ratio of 46 atomic%, 6 atomic%, 46 atomic% and 2 atomic%, respectively , An oxide-sintered body of Comparative Example 1 was produced in the same manner as in Example 1.
  • the oxide-sintered compact target of Comparative Example 1 thus obtained had a relative density of 7.5% and a specific resistance of 2.0 x 10 < -3 >
  • the mobility of the thin film transistor formed using the obtained oxide target of Comparative Example 1 was measured to be 18 cm 2 / Vs, and the carrier concentration was 5.0 ⁇ 10 17 / cm 3 .
  • Example 2 Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 37 atomic%, 16 atomic%, 37 atomic% and 10 atomic%, respectively , An oxide-sintered body of Comparative Example 2 was produced in the same manner as in Example 1. The relative density of the oxide-sintered body target of Comparative Example 2 obtained as described above was measured to be 93% and the specific resistance thereof 8.0 x 10 < -3 >
  • the mobility of the thin film transistor formed using the obtained oxide target of Comparative Example 1 was measured to be 8 cm 2 / Vs, and the carrier concentration was maintained at 1.0 ⁇ 10 17 / cm 3 .
  • composition and relative density of the oxide-sintered bodies produced in Examples 1 to 3 and Comparative Examples 1 and 2 are shown in Table 1 below.
  • the mobility and the resistivity characteristics of the thin film transistor including the amorphous oxide thin film channel layer produced using the oxide sintered bodies of Examples 1 to 3 and Comparative Examples 1 and 2 were measured and are shown in Table 1 below.
  • the relative density was high and the mobility was 20 cm 2 / Vs or more.
  • the mobility was 36 cm 2 / Vs in Example 2. Therefore, it can be applied to a device which can be mounted on a large display.
  • Example 1 Example 2 Example 3 Comparative Example 1 Comparative Example 2 Indium oxide (at%) 45 43 40 46 37 Tin oxide (at%) 9 12 16 6 16 Zinc oxide (at%) 45 43 40 46 37 Metal oxide (at%) One 2 4 2 10 Relative density (%) 98.9 98.5 97.9 97.5 93.0 (M + Sn) / (M + In + Sn + Zn) (atomic%) 10 14 20 8 26 Resistivity (10 -3 ⁇ cm) 1.0 1.7 7.0 2.0 8.0 Mobility (cm 2 / Vs) 30 36 24 18 8

Abstract

The present invention provides: an oxide sintered body and a manufacturing method therefor, the oxide sintered body comprising a metal oxide containing indium oxide, tin oxide, zinc oxide, and at least one metal ion (M, here M = Al, Ga, Hf, V), wherein the atomic ratio thereof, represented by (M+Sn)/(M+In+Sn+Zn), is 10-20 at%; and a thin-film transistor formed from the oxide sintered body, thereby enabling the securing of high-mobility properties and the implementation of stability. According to the present invention, a composition of a semiconductor target used as a channel layer of the thin-film transistor is optimized, and thus a high-mobility thin-film transistor property of at least 20 cm/Vs may be secured.

Description

고이동도 산화물 소결체 및 이를 포함하는 박막 트랜지스터A high mobility oxide sintered body and a thin film transistor including the same
본 발명은 디스플레이의 크기가 대형화되더라도 우수한 이동도 특성을 나타낼 수 있도록 조성이 최적화된 산화물 소결체 및 이의 제조방법, 상기 산화물 소결체로부터 형성되어 고이동도 및 안정성이 구현되는 박막 트랜지스터에 관한 것이다. The present invention relates to an oxide sintered body whose composition is optimized so as to exhibit excellent mobility even when the size of a display is enlarged, a method of manufacturing the same, and a thin film transistor formed from the oxide sintered body and realizing high mobility and stability.
액정을 기반으로 하는 디스플레이에 구비되는 소자로는, 구동전압을 인가하여 표시장치를 구동시키는 박막 트랜지스터(thin film transistor, TFT)가 널리 사용되고 있다. 박막 트랜지스터는 게이트 전극, 절연막, 반도체층, 소스/드레인 전극으로 구성되어 있으며, 이중 반도체층은 전기적으로 안정되어야 하며, 에칭 특성이 우수해야 한다. 2. Description of the Related Art As a device provided in a liquid crystal-based display, a thin film transistor (TFT) for driving a display device by applying a driving voltage is widely used. The thin film transistor is composed of a gate electrode, an insulating film, a semiconductor layer, and a source / drain electrode. The semiconductor layer must be electrically stable and excellent in etching property.
전술한 반도체층의 일 성분으로 사용되는 실리콘계 재료는 전기적 안정성과 가공성이 우수하다는 장점을 가지고 있으나, 가시광 영역을 흡수하기 때문에 입사된 광에 의한 캐리어의 발생에 의해 박막 트랜지스터의 오작동을 일으킬 수 있다. 또한 실리콘계 재료의 경우 아몰퍼스 실리콘을 성막함에 있어서 약 200℃ 이상의 고온 공정을 요구하기 하기 때문에, 제조 비용의 상승이 초래된다. 또한 상기 실리콘계 재료는 폴리머 기판에 증착하기 어렵기 때문에, 차후 플랙시블 디스플레이에 적용하기가 어렵다. The silicon-based material used as one of the above-described semiconductor layers has an advantage of being excellent in electrical stability and processability. However, since the silicon-based material absorbs a visible light region, malfunction of the thin film transistor can be caused by generation of carriers due to incident light. In addition, in the case of a silicon-based material, a high-temperature process of about 200 ° C or more is required in forming amorphous silicon, resulting in an increase in manufacturing cost. Further, since the silicon-based material is difficult to deposit on a polymer substrate, it is difficult to apply it to a subsequent flexible display.
이에 따라, 실리콘계 재료 대신에 투명 산화물 반도체를 이용하는 박막트랜지스터의 개발이 활발히 이루어지고 있다. 투명 산화물 반도체는 가열 없이 기판 상에 성막이 가능하며, 약 10 cm2/Vs 이상의 이동도를 나타내고, 종래의 실리콘계 재료를 사용하는 경우에 비해 박막트랜지스터의 구조를 단순하게 변경할 수 있다.Accordingly, a thin film transistor using a transparent oxide semiconductor instead of a silicon material has been actively developed. Transparent oxide semiconductors can be formed on a substrate without heating, exhibit a mobility of about 10 cm 2 / Vs or more, and the structure of a thin film transistor can be simply changed compared to the case of using a conventional silicon-based material.
한편 종래 투명 산화물 반도체 중 하나인 InGaZnO 산화물 박막 트랜지스터는 안정적인 소자 특성을 구현할 수 있는 반면, 디스플레이의 크기가 대형화됨에 따라 InGaZnO의 낮은 이동도로는 디스플레이 구동이 어려워지는 난점이 발생된다. 따라서 대형 디스플레이에 탑재 가능한 소자에 적용하기 위해서, 20 cm2/Vs 이상의 고이동도를 나타낼 수 있는 산화물 반도체의 개발이 요구되는 실정이다. On the other hand, the InGaZnO oxide thin film transistor, which is one of the transparent oxide semiconductors, can realize stable device characteristics. On the other hand, as the size of the display is increased, the driving of the display becomes difficult due to the low mobility of InGaZnO. Therefore, it is required to develop an oxide semiconductor capable of exhibiting a high mobility of 20 cm 2 / Vs or more in order to be applied to a device that can be mounted on a large display.
본 발명은 전술한 문제점을 해결하기 위해 안출된 것으로서, 산화인듐, 산화주석, 산화아연 및 특정 금속이온(M = Al, Ga, Hf, V)을 함유하는 금속산화물을 포함하면서, 금속 이온(M)의 함량이 최적화된 고이동도 산화물 반도체의 조성을 구성함으로써, 대형 디스플레이에 탑재 가능하도록 높은 이동도를 갖는 산화물 소결체 및 이의 제조방법을 제공하는 것을 목적으로 한다.SUMMARY OF THE INVENTION The present invention has been conceived in order to solve the above-mentioned problems, and it is an object of the present invention to provide a method of manufacturing a semiconductor device, which comprises a metal oxide containing indium oxide, tin oxide, zinc oxide and metal ions containing specific metal ions (M = Al, Ga, Hf, V) ) Having a high mobility so as to be able to be mounted on a large display, and a method of manufacturing the oxide sintered body.
또한 본 발명은 전술한 조성의 산화물 소결체로부터 형성된 채널층을 구비하는 박막 트랜지스터를 제공하는 것을 또 다른 목적으로 한다. Another object of the present invention is to provide a thin film transistor having a channel layer formed from an oxide sintered body of the above-mentioned composition.
상기한 목적을 달성하기 위해, 본 발명은 산화인듐; 산화주석; 산화아연; 및 적어도 1종 이상의 금속 이온 M(M = Al, Ga, Hf, V)이 함유된 금속산화물을 포함하며, (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 10~20 원자%인 산화물 소결체, 바람직하게는 박막 트랜지스트(TFT) 채널층 형성용 산화물 소결체를 제공한다.In order to achieve the above object, Tin oxide; Zinc oxide; And a metal oxide containing at least one kind of metal ion M (M = Al, Ga, Hf, V), wherein the atomic ratio represented by (M + Sn) / (M + In + Sn + Zn) To 20 at%, preferably an oxide sintered body for forming a thin film transistor (TFT) channel layer.
본 발명의 일 구현예에 따르면, 상기 금속산화물은 Al, Ga, Hf, 및 V로 구성된 군에서 선택되는 2종의 금속(M)을 포함할 수 있다. According to an embodiment of the present invention, the metal oxide may include two metals (M) selected from the group consisting of Al, Ga, Hf, and V.
본 발명의 일 구현예에 따르면, 상대밀도가 95% 이상이고, 비저항이 1×10-2 Ωcm 이하일 수 있다. According to an embodiment of the present invention, the relative density may be 95% or more and the specific resistance may be 1 x 10 < -2 >
또한, 본 발명은 기판 상에 형성된 게이트 전극, 절연막, 채널층, 소스 전극 및 드레인 전극을 포함하는 박막 트랜지스터로서, 상기 채널층은, 전술한 산화물 소결체 타겟을 스퍼터링하여 형성된 아몰퍼스 산화물 박막인 박막 트랜지스터를 제공한다. The present invention also provides a thin film transistor including a gate electrode, an insulating layer, a channel layer, a source electrode, and a drain electrode formed on a substrate, wherein the channel layer includes a thin film transistor which is an amorphous oxide thin film formed by sputtering the oxide- to provide.
본 발명의 일 구현예에 따르면, 상기 박막 트랜지스터는 이동도가 20 cm2/Vs 이상일 수 있다. According to an embodiment of the present invention, the thin film transistor may have a mobility of 20 cm 2 / Vs or more.
본 발명의 일 구현예에 따르면, 상기 박막 트랜지스터는 캐리어 농도가 1.0×1016 내지 5.0×1018 일 수 있다. According to an embodiment of the present invention, the thin film transistor may have a carrier concentration of 1.0 × 10 16 to 5.0 × 10 18 .
아울러, 본 발명은 전술한 박막 트랜지스터를 포함하는 평판 표시장치를 제공한다. 여기서, 상기 평판 표시장치는 LCD, OLED, 유기 EL 디스플레이일 수 있으며, 상기 박막 트랜지스터는 이들의 전극 또는 활성층으로 사용될 수 있다. In addition, the present invention provides a flat panel display device including the thin film transistor described above. Here, the flat panel display device may be an LCD, an OLED, or an organic EL display, and the thin film transistor may be used as an electrode or an active layer thereof.
나아가, 본 발명은 (i) 산화 인듐; 산화 주석; 산화아연 분말; 및 적어도 1종 이상의 금속 이온 M(M = Al, Ga, Hf, V)을 함유하는 금속산화물을 혼합하여 슬러리를 준비하고 분쇄하는 단계; (ii) 상기 분쇄물을 일축 가압하여 1차 성형하는 단계; (iii) 상기 1차 성형체를 등방압하여 2차 성형하는 단계; (iv) 상기 2차 성형체를 소결하는 단계를 포함하는 산화물 소결체의 제조방법을 제공한다.Further, the present invention relates to a method for manufacturing a semiconductor device, comprising: (i) indium oxide; Tin oxide; Zinc oxide powder; And a metal oxide containing at least one kind of metal ions M (M = Al, Ga, Hf, V) to prepare and crush a slurry; (ii) uniaxially pressurizing the pulverized product to perform primary molding; (iii) isostatically pressing the primary molding to form secondary molding; (iv) sintering the secondary formed body.
본 발명의 일 구현예에 따르면, 상기 1차 성형단계에서의 가압 조건은 50 MPa 이상이고, 1차 성형체의 성형밀도는 45~50%일 수 있다. According to an embodiment of the present invention, the pressing condition in the primary molding step is 50 MPa or more, and the molding density of the primary molded body may be 45 to 50%.
본 발명의 일 구현예에 따르면, 상기 2차 성형단계에서의 가압 조건은 2000 MPa 이상이고, 2차 성형체의 성형밀도는 55~60%일 수 있다. According to an embodiment of the present invention, the pressing condition in the secondary molding step may be 2000 MPa or higher, and the molding density of the secondary molding may be 55 to 60%.
본 발명의 일 구현예에 따르면, 상기 소결단계는 대기 및 산소 하에서 1400~1600℃의 온도로 10~40 시간 동안 유지될 수 있다. According to an embodiment of the present invention, the sintering step may be performed at a temperature of 1400 to 1600 ° C. for 10 to 40 hours under atmospheric and oxygen.
본 발명에서는 우수한 이동도 특성을 나타낼 수 있도록 조성이 최적화되었을 뿐만 아니라 장시간 성막한 경우에도 박막 트랜지스터의 특성 변화가 적은 산화물 소결체를 제공할 수 있다. In the present invention, not only the composition is optimized so as to exhibit excellent mobility characteristics, but also the oxide sintered body having little change in characteristics of the thin film transistor even when the film is formed for a long time can be provided.
전술한 산화물 소결체를 스퍼터링 타겟으로 사용하여 형성된 채널층을 구비하는 박막 트랜지스터는 20 cm/Vs 이상의 고이동도를 나타낼 뿐만 아니라, 소자 안정성 특성을 유의적으로 향상시킬 수 있다. A thin film transistor having a channel layer formed by using the above oxide sintered body as a sputtering target not only exhibits a high mobility of 20 cm / Vs or more, but also can significantly improve device stability characteristics.
이하, 본 발명을 상세하게 설명한다. Hereinafter, the present invention will be described in detail.
기존 InGaZnO계 산화물 박막 트랜지스터는 안정적인 소자 특성을 구현하지만, 디스플레이가 대형화됨에 따라 InGaZnO계 산화물의 낮은 이동도로는 디스플레이의 구동 자체가 어려운 문제가 있다. The conventional InGaZnO-based oxide thin film transistor realizes stable device characteristics. However, as the display becomes larger, the driving of the display itself is difficult due to the low traveling speed of the InGaZnO-based oxide.
본 발명은, 적어도 1종 이상의 특정 금속이온(M = Al, Ga, Hf, V)을 포함하면서, 이들의 원자수 비가 최적화된 ITZO계 산화물 반도체 소결체를 구성함으로써, 20 cm/Vs 이상의 고이동도를 가진 산화물 소자를 제공하고자 한다. The present invention provides an ITZO-based oxide semiconductor sintered body including at least one kind of specific metal ions (M = Al, Ga, Hf, V) Lt; / RTI >
전술한 산화물 반도체는 전자 캐리어 농도가 높은 아몰퍼스 ITZO계 산화물이다. 이러한 아몰퍼스 산화물을 채널층으로 이용한 박막 트랜지스터는 20 cm/Vs 이상의 고이동도를 나타낼 수 있으며, 전자 캐리어 농도가 1.0×1016 내지 5.0×1018 일 수 있다. The above-described oxide semiconductor is an amorphous ITZO-based oxide having a high electron carrier concentration. A thin film transistor using such an amorphous oxide as a channel layer may exhibit a high mobility of 20 cm / Vs or more and an electron carrier concentration of 1.0 × 10 16 to 5.0 × 10 18 .
또한 상기 ITZO계 산화물 반도체는 장시간 성막한 경우에도 박막 트랜지스터의 특성 변화가 적은 스퍼터링 타겟이므로, 이를 이용하여 박막 트랜지스터를 형성하는 경우 고이동도 특성과 소자 안정성을 동시에 향상시키는 우수한 박막 트랜지스터를 제작할 수 있다.In addition, the ITZO-based oxide semiconductor is a sputtering target which exhibits little change in the characteristics of the thin film transistor even when forming a film for a long time, and thus, when forming a thin film transistor, an excellent thin film transistor capable of simultaneously improving high mobility characteristics and element stability can be manufactured .
<산화물 반도체 소결체 ><Sintered oxide semiconductor>
본 발명에 따른 산화물 반도체 소결체는 ITZO계 산화물로서, 당해 산화물 내 인듐(In), 주석(Sn), 아연(Zn), 산소(O)와, 적어도 1종 이상의 금속 이온(M)을 포함한다. The oxide semiconductor sintered body according to the present invention is an ITZO-based oxide containing indium (In), tin (Sn), zinc (Zn), oxygen (O) and at least one metal ion (M) in the oxide.
구체적으로, 상기 산화물 소결체는 산화인듐; 산화주석; 산화아연; 및 적어도 1종 이상의 금속 이온(M, 여기서 M = Al, Ga, Hf, V)이 함유된 금속산화물을 포함하고, (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 10~20 원자%로 포함되어 있다. Specifically, the oxide-sintered body may include indium oxide; Tin oxide; Zinc oxide; And a metal oxide containing at least one or more metal ions (M, where M = Al, Ga, Hf, V), and the number of atoms represented by (M + Sn) / (M + In + Sn + Zn) And a ratio of 10 to 20 atomic%.
상기 ITZO계 산화물 소결체에 포함되는 금속 이온(M)은 Al, Ga, Hf, 및 V 중에서 적어도 하나 이상일 수 있으며, 바람직하게는 2종 이상일 수 있다. 일례로, 상기 금속 이온(M)은 갈륨과 알루미늄일 수 있으며, 또는 하프늄과 바나듐일 수 있다. The metal ion (M) contained in the ITZO-based oxide sintered body may be at least one or more of Al, Ga, Hf, and V, and preferably two or more. In one example, the metal ion (M) may be gallium and aluminum, or may be hafnium and vanadium.
한편 산화물 반도체 소결체가 1종의 금속 원소만을 포함할 경우, 캐리어 농도가 1.0×10-18 이상을 나타내게 되므로, 박막 트랜지스터 소자 제조시 쇼트(short)가 발생될 가능성이 존재하게 된다. 이에 비해, 본 발명에서 2종 이상의 금속원소를 포함할 경우 전자 캐리어 농도를 1.0×10- 16 까지 제어할 수 있으므로, 고이동도의 우수한 소자 특성을 갖는 산화물 반도체 타겟을 제조할 수 있다.On the other hand, when the oxide semiconductor sintered body contains only one kind of metal element, a carrier concentration of 1.0 x 10 &lt; -18 &gt; or more is likely to cause a short circuit in the manufacture of the thin film transistor device. In contrast, when two or more kinds of metal elements are included in the present invention, the electron carrier concentration can be controlled to 1.0 x 10 &lt; -16 &gt; and thus an oxide semiconductor target having device characteristics excellent in high mobility can be produced.
또한, 상기 산화물 소결체에서 (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 10~20 원자%인 경우, 첨가된 금속 이온(M)이 ITZO계 타겟의 안정화 및 소결체 내의 산소를 흡착하여 박막 트랜지스터의 소자 특성 중 20 cm2/Vs 이상의 높은 이동도와 우수한 캐리어 농도를 나타낼 수 있다. 이때 (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 10 원자% 미만인 경우, 첨가원소의 영향이 적어 소자 특성의 향상이 미미하므로, 대형 디스플레이에 적용 가능한 20cm2/Vs 이상의 높은 이동도를 나타낼 수 없다. 또한 상기 (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 20 원자%를 초과하는 경우, 산화물 반도체 소결체의 상대밀도 및 비저항 특성 면에서도 오히려 저조해지게 되며, 이동도 역시 현저히 감소하게 된다(하기 표 1 참조). When the atomic ratio expressed by (M + Sn) / (M + In + Sn + Zn) in the oxide-sintered body is in the range of 10 to 20 atomic%, the added metal ion (M) stabilizes the ITZO- It is possible to exhibit high mobility of 20 cm 2 / Vs or more and excellent carrier concentration among the device characteristics of the thin film transistor. The (M + Sn) / (M + In + Sn + Zn) if atoms is less than ratio of 10 atomic% shown by, note the effect of the additive element, because the improvement in the device characteristics insignificant, available 20cm applicable to a large display 2 / It can not show a high mobility of Vs or more. When the atomic ratio expressed by (M + Sn) / (M + In + Sn + Zn) exceeds 20 atomic%, the relative density and resistivity of the oxide semiconductor sintered body become rather poor, (See Table 1 below).
전술한 조성을 갖는 본 발명의 산화물 소결체는, 상대 밀도 95% 이상, 비저항은 1×10-2 Ωcm 이하인 것을 사용할 수 있다. 바람직하게는 상대 밀도가 95% 내지 99.9%이며, 비저항은 1×10-3 Ωcm 내지 1×10-2 Ωcm 일 수 있다. 이때 상기 산화물 소결체의 상대 밀도가 95% 미만인 경우 스퍼터링 타겟으로 사용하여 성막하는 경우 노듈이 발생하여 이상방전이 발생할 가능성이 높아지게 된다. The oxide-sintered body of the present invention having the above composition may have a relative density of 95% or more and a specific resistance of 1 x 10 &lt; -2 &gt; Preferably, the relative density is 95% to 99.9%, the specific resistance may be 1 × 10 -3 Ωcm to 1 × 10 -2 Ωcm. If the relative density of the oxide-sintered body is less than 95%, there is a high probability that an abnormal discharge will occur due to nodules formed when the oxide-sintered body is used as a sputtering target.
여기서, 상대밀도란 소결체의 (실측 밀도/이론 밀도) × 100으로 하여 계산되는 값이다. 실측밀도의 경우 소결체를 보통 1기압, 4℃의 물에서 측정하여 밀도를 산출한다. Here, the relative density is a value calculated by (actual density / theoretical density) x 100 of the sintered body. For the actual density, the density is calculated by measuring the sintered body at 1 atm and 4 ° C water.
본 발명에 따른 산화물 반도체 소결체는 당 분야에 공지된 통상적인 방법에 따라 제조될 수 있다. 일례로, 원료 분말 준비 단계, 혼합된 원료분말을 이용하여 구상화된 분말을 제조하는 단계, 성형체 제조 단계, 및 소결체 제조 단계로 이루어질 수 있다. The oxide semiconductor sintered body according to the present invention can be produced by a conventional method known in the art. For example, it can be composed of a raw material powder preparation step, a step of preparing a powder spherulated with the mixed raw material powder, a step of producing a molded body, and a step of manufacturing a sintered body.
상기 제조방법의 일 실시형태를 들면, (i) 산화인듐 분말; 산화주석 분말; 산화아연 분말; 및 적어도 1종 이상의 금속 이온(M, 여기서 M = Al, Ga, Hf, V)이 함유된 금속산화물을 혼합하여 슬러리를 준비한 후 밀링하고 건조하여 분쇄하는 단계('S10 단계'); (ii) 상기 분쇄물을 일축 가압하여 1차 성형하는 단계('S20 단계'); (iii) 상기 1차 성형체를 등방압하여 2차 성형하는 단계('S30 단계'); 및 (iv) 상기 2차 성형체를 소결하는 단계('S40 단계')를 포함하여 구성될 수 있다.In one embodiment of the above production method, (i) an indium oxide powder; Tin oxide powder; Zinc oxide powder; And a metal oxide containing at least one kind of metal ion (M, where M = Al, Ga, Hf, and V) are mixed to prepare a slurry, followed by milling, drying and pulverizing (Step S10); (ii) uniaxially pressurizing the pulverized product to perform primary molding (step S20); (iii) isostatically pressurizing the primary molded body to perform secondary molding (step S30); And (iv) sintering the secondary formed body (step S40).
이하, 상기 제조방법을 각 공정 단계별로 나누어 설명하면 다음과 같다.Hereinafter, the manufacturing method will be described separately for each process step as follows.
1) 원료분말 준비 단계('S10 단계')1) Preparation of raw material powder (step S10)
상기 S10 단계에서는, 산화인듐, 산화주석, 산화아연, 및 적어도 1종 이상의 금속 이온(M)를 포함하는 구상화된 원료분말을 준비한다. In the step S10, a spherical raw material powder containing indium oxide, tin oxide, zinc oxide, and at least one metal ion (M) is prepared.
구체적으로, 목적 조성에 맞도록 각 원소를 함유하는 분말을 칭량한 후, 이들을 혼합기에 투입하고 비드밀로 분쇄 및 혼합하여 혼합물(예, 슬러리)을 제조한다. Specifically, powders containing the respective elements are weighed to meet the target composition, and then they are put into a mixer and pulverized and mixed with a bead mill to prepare a mixture (for example, slurry).
본 발명에서, 산화인듐, 산화주석, 산화아연은 당 업계에 알려진 통상적인 성분을 제한없이 사용할 수 있으며, 일례로 In2O3, SnO2, ZnO 등을 사용할 수 있다. In the present invention, indium oxide, tin oxide, and zinc oxide can be used without limitation as conventional components known in the art. For example, In 2 O 3 , SnO 2 , ZnO and the like can be used.
전술한 원료분말들을 혼합시, 필요에 따라 당 업계에 알려진 통상적인 첨가제, 예컨대 바인더, 분산제, 소포제 등을 추가로 포함할 수 있다.When mixing the above-described raw material powders, additives such as a binder, a dispersant, a defoaming agent, etc., which are known in the art, may be added if necessary.
분산제는 분쇄된 원료입자가 용액 내에서 장시간 동안 고르게 안정된 분산을 유지하면서 동시에 입자가 미세하게 분쇄되기 위한 목적을 만족시키기 위해 첨가된다. 사용 가능한 분산제의 비제한적인 예로는, 시트르산 등의 카르복실기가 붙은 유기산 계열, 폴리아크릴산 (PAA) 또는 그의 염, 공중합체, 또는 이들의 조합 등이 있다. 상기 분산제는 슬러리 내 분말 중량 대비 0.5 내지 3 중량% 사용될 수 있다.The dispersant is added in order to satisfy the purpose of finely pulverizing the particles while maintaining a stable dispersion evenly in the solution for a long time in the pulverized raw material particles. Nonlimiting examples of usable dispersing agents include organic acid-based ones having a carboxyl group such as citric acid, polyacrylic acid (PAA) or a salt thereof, a copolymer, or a combination thereof. The dispersant may be used in an amount of 0.5 to 3% by weight based on the weight of the powder in the slurry.
또한 바인더는 슬러리를 분말로 건조시킨 후 성형하는 과정에서 성형체의 성형강도를 유지하기 위하여 첨가되는 것이다. 이들의 비제한적인 예로는, 폴리비닐알코올, 폴리에틸렌글리콜 등의 고분자 등이 있다. 상기 바인더의 사용량은 슬러리 내 전체 분말 100 중량% 대비 2 중량% 미만일 수 있으며, 구체적으로 0.01 중량% 이상, 2 중량% 미만일 수 있다. The binder is added in order to maintain the molding strength of the formed body in the process of drying the slurry after the powder is dried. Non-limiting examples thereof include polymers such as polyvinyl alcohol and polyethylene glycol. The amount of the binder to be used may be less than 2% by weight based on 100% by weight of the total powders in the slurry, specifically, 0.01% by weight or less and less than 2% by weight.
소포제는 슬러리 내의 거품을 제거하기 위한 것으로, 통상적으로 실리콘유, 옥틸알콜, 붕초 등을 사용할 수 있다. 상기 소포제의 사용량은 슬러리 내 분말 대비 0.001 내지 0.01 중량% 범위일 수 있다. The antifoaming agent is used for removing bubbles in the slurry, and silicone oil, octyl alcohol, boric acid and the like can be usually used. The amount of the antifoaming agent used may be in the range of 0.001 to 0.01% by weight relative to the powder in the slurry.
전술한 산화인듐 분말, 산화주석 분말, 산화아연 분말, 적어도 1종의 금속 이온을 포함하는 금속산화물, 물 및 1종 이상의 첨가제를 혼합하여 준비된 혼합물(슬러리)를 밀링하고 건조하여 건조분말을 준비한다. A mixture (slurry) prepared by mixing the above-mentioned indium oxide powder, tin oxide powder, zinc oxide powder, metal oxide containing at least one metal ion, water and at least one additive is milled and dried to prepare a dry powder .
이때 밀링(분쇄)은 당 업계에 알려진 통상적인 볼밀, 비드밀 등을 사용하여 수행될 수 있다. 또한 분쇄조건은 특별히 제한되지 않으며, 일례로 분쇄 속도는 1,000 내지 2,500 rpm이고, 시간은 5 내지 10시간일 수 있다. 밀링을 통하여 얻어진 슬러리의 점도는 250~450 Cps 범위로 유지하며, 바인더의 양은 2 중량% 미만으로 조절하는 것이 바람직하다.The milling may be carried out using a conventional ball mill, bead mill or the like known in the art. The pulverizing condition is not particularly limited, and for example, the pulverizing speed may be 1,000 to 2,500 rpm, and the time may be 5 to 10 hours. The viscosity of the slurry obtained through milling is preferably maintained in the range of 250 to 450 Cps, and the amount of the binder is preferably adjusted to less than 2% by weight.
밀링을 거친 슬러리를 당 분야에 공지된 스프레이 드라이어(spray dryer) 장비를 이용하여 분무건조함으로써 구상화된 건조분말을 얻을 수 있다. 제조된 구상화된 분말은 균일화를 위해서 120 mesh 이하의 시브(sieve)를 이용하여 분급공정(Sieving)을 더 실시할 수도 있다. The milled slurry can be spray dried using a spray dryer equipment known in the art to obtain a spheronized dry powder. The prepared spherical powder may be further subjected to a sieving process using a sieve of 120 mesh or less for homogenization.
2) 1차 성형체 제조 ('S20 단계')2) Manufacture of primary molding ('S20 step')
상기 S20 단계에서는, 이전 S10 단계에서 제조된 건조분말을 소정의 형상을 갖는 성형체로 제조하는 성형단계를 거친다.In the step S20, the dry powder produced in the previous step S10 is subjected to a molding step of producing a molded body having a predetermined shape.
종래에는 하나의 성형공정을 거친 후 바로 소결하여 산화물 소결체를 제조한 것에 비해, 본 발명에서는 성형체의 밀도를 높이기 위해서 2단계로 이루어진 성형단계를 실시한다. Conventionally, in the present invention, a two-step molding step is performed in order to increase the density of a molded body, compared with a case in which an oxide sintered body is manufactured by directly sintering after one forming step.
구체적으로, 1차 성형단계는 분급된 구상화 건조분말을 성형금형 내부에 투입한 후, 일축 성형기를 이용하여 원하는 형상의 1차 성형체를 제작한다. Specifically, in the first molding step, the classified spheroidized dry powder is put into a mold, and then a primary molded body having a desired shape is manufactured using a uniaxial molding machine.
상기 1차 성형단계에서의 가압 조건은 특별히 제한되지 않으며, 일례로 단위 면적당 50 MPa 이상일 수 있으며, 바람직하게는 50 내지 100 MPa 범위일 수 있다. The pressing conditions in the primary molding step are not particularly limited, and may be, for example, 50 MPa or more per unit area, and preferably 50 to 100 MPa.
전술한 1차 성형단계를 거쳐 제조된 1차 성형체의 성형 밀도는 45~50%로 조절될 수 있다. 상기 1차 성형체의 성형밀도가 전술한 범위보다 낮을 경우 소결 구동력이 낮아져 소결 시간 및 온도가 증가하게 되며, 반대로 성형 밀도가 높을 경우 성형체에 크랙(Crack)이 발생할 수 있다. 상기 1차 성형체가 전술한 성형밀도를 가지지 못할 경우, 필요에 따라 1차 성형단계를 1회 이상 반복실시할 수 있다. The molding density of the primary molded product manufactured through the primary molding step may be adjusted to 45 to 50%. If the molding density of the primary molded article is lower than the above-mentioned range, the sintering driving force is lowered and the sintering time and temperature are increased. On the contrary, when the molding density is high, cracks may occur in the molded article. If the primary molded body does not have the above-described molding density, the primary molding step may be repeated one or more times as necessary.
3) 2차 성형체 제조 ('S30 단계')3) Manufacture of secondary molding ('S30 step')
상기 S30 단계에서는, 1차 성형된 성형체를 등방압 성형기를 이용하여 2차 성형체를 제작한다.In the step S30, a secondary molded body is manufactured by using an isostatic pressing machine.
이러한 등방압 성형은, 종래 금형프레스의 일축가압에 비하여 균질한 등방성을 갖는 성형체를 얻을 수 있다. 상기 등방압 성형시, 냉간 정수압 프레스 (cold isostatic press, CIP)를 이용하는 것이 바람직하다. Such isotropic pressing can obtain a molded article having homogeneous isotropy as compared with uniaxial pressing of a conventional mold press. In the isostatic pressing, cold isostatic press (CIP) is preferably used.
또한 상기 2차 성형단계에서의 가압 조건은 특별히 제한되지 않으며, 일례로 단위 면적당 2,000 MPa 이상일 수 있으며, 바람직하게는 2,000 내지 2,500 MPa 범위일 수 있다. The pressing conditions in the secondary molding step are not particularly limited, and may be, for example, 2,000 MPa or more per unit area, and preferably 2,000 to 2,500 MPa.
전술한 2차 성형단계를 거쳐 제조된 2차 성형체의 성형 밀도는 55~60%로 조절될 수 있다. 상기 2차 성형체의 성형밀도가 전술한 범위보다 낮을 경우 소결 구동력이 낮아져 소결 시간 및 온도가 증가하게 되며, 반대로 성형 밀도가 높을 경우 성형체에 크랙(Crack)이 발생할 수 있다. The molding density of the secondary molded product manufactured through the above-described secondary molding step can be adjusted to 55 to 60%. If the molding density of the secondary molded body is lower than the above range, the sintering driving force is lowered and the sintering time and temperature are increased. On the contrary, when the molding density is high, cracks may be generated in the molded body.
상기 2차 성형체가 전술한 성형밀도를 가지지 못할 경우, 필요에 따라 2차 성형단계를 반복 실시하거나, 또는 1차 및 2차 성형단계를 연속적으로 반복실시할 수 있다. If the secondary molded body does not have the above-described molding density, the secondary molding step may be repeated as necessary or the primary and secondary molding steps may be repeated continuously.
4) 소결체 제조 ('S40 단계')4) Manufacture of sintered body ('S40 step')
상기 S40 단계에서는, 2차 성형체를 소결하여 산화물 반도체 소결체를 제조한다.In step S40, the secondary molded body is sintered to produce an oxide semiconductor sintered body.
상기 소결단계는 대기(공기) 또는 산소 분위기 하에서 1400~1600℃의 온도로 10~40 시간 동안 유지할 수 있다. 이때 분위기 가스는 공기 또는 산소를 주입하는데, 이러한 가스는 소결단계 중 산화물이 기화되는 것을 방지하는 역할을 한다. The sintering step may be carried out at a temperature of 1400 to 1600 ° C for 10 to 40 hours under atmospheric (air) or oxygen atmosphere. At this time, the atmospheric gas injects air or oxygen, which serves to prevent the oxide from vaporizing during the sintering step.
상기와 같이 제조된 산화물 소결체는 상대 밀도가 95% 이상, 비저항은 1×10-2 Ωcm 이하일 수 있다. 바람직하게는 상대 밀도가 95% 내지 99.9%이며, 비저항은 1×10-3 Ωcm 내지 1×10-2 Ωcm 일 수 있다.The oxide sintered body thus produced may have a relative density of 95% or more and a specific resistance of 1 x 10 &lt; -2 &gt; Preferably, the relative density is 95% to 99.9%, the specific resistance may be 1 × 10 -3 Ωcm to 1 × 10 -2 Ωcm.
본 발명에 따라 전술한 조성과 물성을 갖는 산화물 소결체는, 스퍼터링 타겟으로 이용되어 전자 농도가 높은 아몰퍼스 산화물 박막을 형성할 수 있다. 형성된 아몰퍼스 산화물 박막은 박막 트랜지스터의 채널층으로 적용되어, 고이동도 특성이 확보되고, 안정성이 구현된 박막 트랜지스터(TFT)를 제공할 수 있다.The oxide-sintered body having the above-described composition and physical properties according to the present invention can be used as a sputtering target to form an amorphous oxide thin film having a high electron concentration. The formed amorphous oxide thin film is applied as a channel layer of a thin film transistor, thereby providing a thin film transistor (TFT) in which high mobility characteristics are secured and stability is realized.
상기 스퍼터링 공정을 통한 성막공정의 일례를 들면, 제조된 산화물 소결체를 일정한 크기와 형태로 가공한 후 냉각용 금속판 또는 백킹 플레이트 (backing plate)에 붙여 스퍼터링 타겟으로 이용한다. 이후 진공조 내에서 산소 가스가 0~1% 범위로 혼합된 아르곤 가스를 80 sccm의 속도로 공급하면서, 상기 스퍼터링 타겟을 스퍼터하여 박막 트랜지스터의 채널층으로 이용되는 산화물 반도체 박막을 제조할 수 있다. One example of the film forming process through the sputtering process is to process the produced oxide sintered body into a predetermined size and shape, and then to attach the metal oxide film to a cooling metal plate or a backing plate to use as a sputtering target. Thereafter, an argon gas mixed with oxygen gas in a range of 0 to 1% in a vacuum chamber is supplied at a rate of 80 sccm, and the sputtering target is sputtered to produce an oxide semiconductor thin film used as a channel layer of the thin film transistor.
<박막 트랜지스터><Thin Film Transistor>
본 발명에 따른 박막 트랜지스터(TFT)는, 기판 상에 형성된 적어도 게이트 전극, 절연막, 산화물 반도체로 이루어지는 채널층, 소스 전극 및 드레인 전극을 포함한다. 필요에 따라 당 업계에 공지된 희생층, 에지스톱층, 또는 보호층 등을 더 포함할 수 있다. A thin film transistor (TFT) according to the present invention includes at least a gate electrode, an insulating film, a channel layer made of an oxide semiconductor, and a source electrode and a drain electrode formed on a substrate. A sacrificial layer, an edge stop layer, or a protective layer or the like as is known in the art, if necessary.
박막 트랜지스터(TFT)는 게이트 전극에 전압을 인가하고, 채널층으로 흐르는 전류를 제어하고, 소스 전극과 드레인 전극 간의 전류를 스위칭하는 기능을 갖는 액티브 소자이다. A thin film transistor (TFT) is an active element having a function of applying a voltage to a gate electrode, controlling a current flowing to a channel layer, and switching a current between a source electrode and a drain electrode.
상기 박막 트랜지스터는 전술한 조성의 산화물 소결체로부터 성막된 아몰퍼스 산화물 박막을 채널층으로 이용하는 것을 제외하고는, 당 분야에 공지된 구성을 포함할 수 있다. 이러한 박막 트랜지스터의 종류는 특별히 한정되지 않으며, 일례로 보텀 게이트형(Bottom Gate) 또는 에치 스톱형(Etch Stop Layer)형일 수 있다. The thin film transistor may include a structure known in the art, except that an amorphous oxide thin film formed from an oxide sintered body of the above composition is used as a channel layer. The type of the thin film transistor is not particularly limited, and may be, for example, a bottom gate type or an etch stop layer type.
본 발명의 일 구현예에 따르면, 상기 박막 트랜지스터는 채널층 상에 형성된 희생층을 더 포함하고, 상기 희생층 상에 소스 전극 및 드레인 전극이 형성되는 보텀 케이트형(bottom gate)일 수 있다. 바람직하게는, 상기 게이트 전극이 채널층 아래에 구비되고, 소스 전극 및 드레인 전극은 상기 희생층 상에 상기 채널층의 양단에 접촉되도록 구비되는 구조이다. According to an embodiment of the present invention, the thin film transistor may further include a sacrificial layer formed on a channel layer, and a bottom gate in which a source electrode and a drain electrode are formed on the sacrificial layer. Preferably, the gate electrode is provided under the channel layer, and the source electrode and the drain electrode are provided on both sides of the channel layer on the sacrificial layer.
본 발명의 다른 일 구현예에 따르면, 상기 박막 트랜지스터는, 채널층 상에 형성된 에치스톱층(Etch Stop Layer, ESL)을 더 포함하고, 상기 ESL층 상에 소스 전극 및 드레인 전극이 형성되는 에치 스톱형(ESL)일 수 있다. 바람직하게는, 상기 게이트 전극이 채널층 아래에 구비되고, 소스 전극 및 드레인 전극은 상기 에치스톱층(ESL) 상에 위치하되, 상기 양 전극이 상기 채널층의 양단에 접촉되도록 구비되는 구조일 수 있다. 이때 소스 전극 및 드레인 전극은 당 업계에 알려진 통상적인 방법에 따라, 예컨대 비아홀 등을 통하여 채널층과 접촉된다. According to another embodiment of the present invention, the thin film transistor further includes an etch stop layer (ESL) formed on the channel layer, and the etch stop layer (ESL) on which the source electrode and the drain electrode are formed Lt; / RTI &gt; (ESL). Preferably, the gate electrode is provided under the channel layer, the source electrode and the drain electrode are located on the etch stop layer (ESL), and both electrodes are provided so as to contact both ends of the channel layer. have. At this time, the source electrode and the drain electrode are contacted with the channel layer through a via hole or the like according to a conventional method known in the art.
상기 기판은 통상적인 반도체 소자의 기판에 사용되는 물질을 제한없이 사용할 수 있다. 일례로 실리콘(Si), 유리, 무기계 재료, 유기물 재료 또는 금속을 제한 없이 사용할 수 있다. The substrate can be any material used for a substrate of a conventional semiconductor device. For example, silicon (Si), glass, inorganic materials, organic materials or metals may be used without limitation.
이때 기판의 두께는 특별히 제한되지 않으며, 가요성 기판을 사용하는 경우 두께를 50㎛ 내지 500㎛ 범위로 하는 것이 바람직하다. 상기 가요성 기판의 두께가 50㎛ 미만에서는 기판 자체의 충분한 평탄성을 유지하는 것이 어렵고, 상기 가요성 기판의 두께가 500㎛를 초과하면 기판 자체의 가요성이 부족해져서 기판 자체를 자유롭게 굽히는 것이 곤란해지기 때문이다.In this case, the thickness of the substrate is not particularly limited, and when the flexible substrate is used, the thickness is preferably in the range of 50 to 500 mu m. If the thickness of the flexible substrate is less than 50 mu m, it is difficult to maintain sufficient flatness of the substrate itself. If the thickness of the flexible substrate exceeds 500 mu m, flexibility of the substrate itself becomes insufficient and it is difficult to bend the substrate itself It is because.
상기 기판은 수증기 및 산소의 투과를 방지하기 위해서 그 표면 또는 이면에 투습 방지층(가스 배리어층)을 형성할 수도 있다. 투습 방지층(가스 배리어층)의 재료로서는 질화 규소, 산화 규소 등의 무기물이 적합하게 사용된다. 투습 방지층(가스 배리어층)은, 예를 들면 고주파 스퍼터링법 등에 의해 형성할 수 있다. 또한, 열가소성 기판을 사용할 경우에는 필요에 따라서 하드 코트층, 언더코트층 등을 더 형성해도 좋다.The substrate may have a moisture barrier layer (gas barrier layer) formed on its surface or back surface to prevent permeation of water vapor and oxygen. As the material of the moisture permeation preventing layer (gas barrier layer), an inorganic material such as silicon nitride and silicon oxide is suitably used. The moisture barrier layer (gas barrier layer) can be formed by, for example, high-frequency sputtering. When a thermoplastic substrate is used, a hard coat layer, an undercoat layer, or the like may be further formed as necessary.
게이트 전극은 박막 트랜지스터를 온/오프하기 위한 전압 인가를 위한 것이다. 상기 게이트 전극은 금속 또는 금속 산화물과 같은 전도성 물질을 사용하여 형성될 수 있으며, 일례로 Pt, Ru, Au, Ag, Mo, Al, W 또는 Cu 와 같은 금속 또는 이들의 합금, IZO (InZnO) 또는 AZO (AlZnO)와 같은 금속 또는 전도성 산화물을 사용하거나, 여기에 폴리아닐린, 폴리티오펜, 폴리피롤 등의 유기도전성 화합물 또는 이들의 혼합물을 사용해서 형성할 수 있다. The gate electrode is for applying a voltage to turn on / off the thin film transistor. The gate electrode may be formed using a conductive material such as a metal or a metal oxide. For example, the gate electrode may be formed of a metal such as Pt, Ru, Au, Ag, Mo, Al, W, or Cu or an alloy thereof, IZO (InZnO) A metal such as AZO (AlZnO) or a conductive oxide may be used, or an organic conductive compound such as polyaniline, polythiophene, and polypyrrole, or a mixture thereof may be used.
게이트 전극으로서는 TFT 특성의 신뢰성이라고 하는 관점에서 Mo, Mo 합금 또는 Cr을 사용하는 것이 바람직하다. 상기 게이트 전극의 두께는, 예를 들면 10nm 내지 1000nm 범위일 수 있다.As the gate electrode, it is preferable to use Mo, Mo alloy or Cr from the viewpoint of reliability of TFT characteristics. The thickness of the gate electrode may be in the range of, for example, 10 nm to 1000 nm.
상기 게이트 전극의 형성방법은 특별히 한정되는 것은 아니다. 일례로, 게이트 전극은, 인쇄 방식, 코팅방식 등의 습식 방식, 진공증착법, 스퍼터링법, 이온 플레이이팅법 등의 물리적 방식, CVD, 플라즈마 CVD법 등의 화학적 방식 등을 사용해서 형성된다. 이들 중에서, 게이트 전극을 구성하는 재료와의 적합성을 고려해서 형성방법을 적절히 선택할 수 있다. 일례로, Mo 또는 Mo 합금을 사용해서 게이트 전극을 형성할 경우 DC 스퍼터링법이 사용된다. 또한, 게이트 전극에 유기 도전성 화합물을 사용할 경우에는 습식제막법이 이용될 수 있다.The method of forming the gate electrode is not particularly limited. For example, the gate electrode is formed by a physical method such as a wet method such as a printing method or a coating method, a vacuum evaporation method, a sputtering method, and an ion plating method, or a chemical method such as CVD or plasma CVD. Of these, the formation method can be appropriately selected in consideration of suitability with the material constituting the gate electrode. For example, when a gate electrode is formed using Mo or Mo alloy, a DC sputtering method is used. When an organic conductive compound is used for the gate electrode, a wet film-forming method may be used.
게이트 절연막은 통상적인 반도체 소자에 사용되는 절연 물질을 사용하여 형성할 수 있으며, 실리콘 산화물 또는 질화물을 이용할 수 있다. 예를 들면, SiO2 또는 SiO2보다 유전율이 높은 High-K 물질인 HfO2, Al2O3, Si3N4, SiNx, YsO3, Ta2O5, 또는 이들의 혼합물을 사용할 수 있다. 또는 이들 물질로 이루어지는 이중층 막이거나, 폴리이미드와 같은 고분자 절연체도 사용될 수 있다.The gate insulating film can be formed using an insulating material used in a typical semiconductor device, and silicon oxide or nitride can be used. For example, HfO 2 , Al 2 O 3 , Si 3 N 4 , SiNx, YsO 3 , Ta 2 O 5 , or a mixture thereof can be used as the high-K material having a dielectric constant higher than that of SiO 2 or SiO 2 . Or a double layer film made of these materials, or a polymer insulator such as polyimide may also be used.
상기 게이트 절연막의 두께는 특별히 제한되지 않으며, 일례로 10nm 내지 10㎛ 범위가 바람직하다. 상기 게이트 절연막은 리크 전류를 감소시키기 위해 전압 내성을 높이기 위해서 어느 정도 막두께를 두껍게 할 필요가 있다. 그러나, 게이트 절연막의 막두께를 두껍게 하면 TFT의 구동 전압의 상승을 초래한다. 이 때문에, 게이트 절연막의 두께는 무기 절연체의 경우 50nm 내지 1000nm인 것이 보다 바람직하고, 고분자 절연체의 경우 0.5㎛ 내지 5㎛인 것이 보다 바람직하다.The thickness of the gate insulating film is not particularly limited, and is preferably in the range of 10 nm to 10 mu m. The gate insulating film needs to have a certain thickness to some extent in order to increase the voltage resistance in order to reduce the leakage current. However, if the film thickness of the gate insulating film is increased, the driving voltage of the TFT is increased. Therefore, the thickness of the gate insulating film is more preferably 50 nm to 1000 nm in the case of the inorganic insulator, and more preferably 0.5 to 5 mu m in the case of the polymer insulator.
또한, HfO2와 같은 고유전율 절연체를 게이트 절연막에 사용하였을 경우, 막두께를 두껍게 해도 저전압에서의 트랜지스터의 구동이 가능하기 때문에, 게이트 절연막에는 고유전율 절연체를 사용하는 것이 바람직하다.In addition, when a high dielectric constant insulator such as HfO 2 is used for the gate insulating film, it is preferable to use a high dielectric constant insulator for the gate insulating film because the transistor can be driven at a low voltage even if the film thickness is increased.
소스 전극 및 드레인 전극은 각각 전도성 물질을 사용하여 형성할 수 있다. 예를 들면 Pt, Ru, Au, Ag, Mo, Al, W, Cu, Cr, Ta, Ti 등의 금속 또는 이들의 합금, Al-Nd, APC 등의 합금, 산화 주석, 산화 아연, 산화 인듐, 산화 인듐주석(ITO), 산화 인듐아연(IZO), 또는 AZO(AlZnO) 등의 금속 산화물 도전물질을 사용해서 형성할 수 있다. TFT 특성의 신뢰성 및 희생층과의 에칭 속도 관점에서, 상기 소스 전극 및 드레인 전극 재질로는 몰리브덴(Mo) 또는 Mo 합금을 사용하는 것이 바람직하다. 또한, 소스 전극 및 드레인 전극의 두께는, 예를 들면 10nm 내지 1000nm 범위일 수 있다.The source electrode and the drain electrode may be formed using a conductive material, respectively. A metal such as Pt, Ru, Au, Ag, Mo, Al, W, Cu, Cr, Ta and Ti or an alloy thereof, an alloy such as Al-Nd and APC, tin oxide, And may be formed using a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or AZO (AlZnO). It is preferable to use molybdenum (Mo) or molybdenum (Mo) alloy as the material of the source electrode and the drain electrode in view of the reliability of the TFT characteristic and the etching rate with respect to the sacrificial layer. The thickness of the source electrode and the drain electrode may be, for example, in the range of 10 nm to 1000 nm.
소스 전극 및 드레인 전극은 당 분야에 알려진 통상적인 방법에 따라 형성될 수 있으며, 일례로 막을 형성하고, 포토리소그래피법을 사용하여 상기 막에 레지스트 패턴을 형성하고, 이 막을 에칭함으로써 형성된다.The source electrode and the drain electrode may be formed according to a conventional method known in the art. For example, the source electrode and the drain electrode are formed by forming a film, forming a resist pattern on the film by photolithography, and etching the film.
또한, 소스 전극 및 드레인 전극이 구성하는 막의 형성방법은 특별히 한정되지 않으며, 일례로 예를 들면 인쇄 방식, 코팅 방식 등의 습식 방식, 진공증착법, 스퍼터링법, 이온 플레이이팅법 등의 물리적 방식, CVD, 플라즈마 CVD법 등의 화학적 방식 등을 사용해서 형성될 수 있다. The method of forming the film constituted by the source electrode and the drain electrode is not particularly limited. For example, a physical method such as a wet method such as a printing method or a coating method, a vacuum evaporation method, a sputtering method, an ion plating method, A chemical method such as a plasma CVD method, or the like.
본 발명에서 소스 전극 및 드레인 전극을 Mo 또는 Mo 합금으로 형성할 경우, 일례로 DC 스퍼터링법을 사용하여 Mo 막 또는 Mo 합금막을 형성한 후 포토리소그래피법을 사용하여 Mo 막 또는 Mo 합금막에 레지스트 패턴을 형성하고, 에칭액에 의해 Mo 막 또는 Mo 합금막을 에칭해서 소스 전극 및 드레인 전극을 형성하게 된다.In the present invention, when the source electrode and the drain electrode are formed of Mo or a Mo alloy, for example, a Mo film or an Mo alloy film is formed using DC sputtering, and then a Mo film or a Mo alloy film is coated with a resist pattern And the Mo film or the Mo alloy film is etched by the etching solution to form the source electrode and the drain electrode.
필요에 따라, 본 발명은 채널층을 효과적으로 보호하기 위해서 희생층 또는 에치스톱층(etch stop layer; ESL)을 더 구비한다. Optionally, the present invention further comprises a sacrificial layer or etch stop layer (ESL) to effectively protect the channel layer.
희생층의 성분은 특별히 제한되지 않으며, 당 분야에 공지된 것을 제한 없이 사용할 수 있다. 일례로 상기 채널층을 구성하는 산화물 소결체와 유사한 조성을 갖는 산화물 소결체를 스퍼터링법에 의해 성막함으로써 아몰퍼스 산화물 박막을 형성할 수 있다. 이때 희생층의 박막 두께는 50~1000Å 범위로 조절하는 것이 바람직하다.The components of the sacrificial layer are not particularly limited, and those known in the art can be used without limitation. For example, an amorphous oxide thin film can be formed by forming an oxide sintered body having a composition similar to that of the oxide sintered body constituting the channel layer by the sputtering method. At this time, the thickness of the sacrificial layer is preferably adjusted to a range of 50 to 1000 angstroms.
또한 에치스톱층은 무기 절연(inorganic insulating) 재료를 이용하여 형성될 수 있으며, 일례로 SiO, SiN, Al2O3, 및 TiO2로 구성된 군으로부터 선택되는 1종 이상일 수 있다. 상기 에치스톱층은 보통 건식에칭에 의해 패터닝될 수 있다. The etch stop layer may be formed using an inorganic insulating material. For example, the etch stop layer may be at least one selected from the group consisting of SiO, SiN, Al 2 O 3 , and TiO 2 . The etch stop layer may typically be patterned by dry etching.
전술한 구성 이외에, 본 발명에서는 채널층, 소스 전극 및 드레인 전극을 보호하고, 트랜지스터 상에 제작되는 전자 디바이스와 절연할 목적으로 보호층을 더 포함할 수 있다.In addition to the above-described configuration, the present invention may further include a protection layer for protecting the channel layer, the source electrode, and the drain electrode, and insulated from the electronic device fabricated on the transistor.
상기 보호층은 당 업계에 알려진 통상적인 감광성 또는 열경화성 수지 조성물, 또는 상기 수지 조성물에 금속 산화물, 금속질화물, 금속불화물 등이 포함된 형태를 경화처리하여 형성될 수 있다. The protective layer may be formed by curing a conventional photosensitive or thermosetting resin composition known in the art or a resin composition containing a metal oxide, a metal nitride, a metal fluoride, or the like.
상기 보호층의 형성방법은 특별히 한정되지 않으며, 일례로 진공증착법, 스퍼터링법, 반응성 스퍼터링법, MBE(분자선 에피택시)법, 클러스터 이온빔법, 이온 플래이팅법, 플라즈마 중합법 (고주파 여기 이온 플래이팅법), 플라즈마 CVD법, 레이저 CVD법, 열 CVD법, 가스소스 CVD법, 코팅법, 인쇄법, 또는 전사법을 적용하여 형성될 수 있다. The method of forming the protective layer is not particularly limited and examples of the protective layer include vacuum vapor deposition, sputtering, reactive sputtering, MBE (molecular beam epitaxy), cluster ion beam, ion plating, plasma polymerization (high frequency excitation ion plating) , A plasma CVD method, a laser CVD method, a thermal CVD method, a gas source CVD method, a coating method, a printing method, or a transfer method.
본 발명의 박막 트랜지스터는 당 업계에 알려진 통상적인 방법에 의해 제조될 수 있다. 일례로, 기판 상에 게이트 전극을 형성하는 공정; 상기 게이트 전극 상에 절연층을 형성하는 공정; 상기 게이트 절연층 상에 산화물 반도체로 이루어지는 채널층을 형성하는 공정; 상기 에치스톱층 상에 소스 전극과 드레인 전극을 형성하는 공정; 및 상기 소스 전극과 소스 전극을 채널층의 양단에 접촉시키는 공정을 포함하여 구성될 수 있다. The thin film transistor of the present invention can be manufactured by a conventional method known in the art. For example, there is a process of forming a gate electrode on a substrate; Forming an insulating layer on the gate electrode; Forming a channel layer made of an oxide semiconductor on the gate insulating layer; Forming a source electrode and a drain electrode on the etch stop layer; And a step of bringing the source electrode and the source electrode into contact with both ends of the channel layer.
이때 필요에 따라, 상기 채널층 상에 희생층 또는 에지스톱층을 형성하는 공정을 더 포함할 수 있다. At this time, if necessary, a step of forming a sacrificial layer or an edge stop layer on the channel layer may be further included.
전술한 바와 같이 구성되는 본 발명의 박막 트랜지스터는 액정표시장치(LCD) 및 유기발광표시장치(OLED) 등과 같은 평판 표시장치에 전극, 활성층, 스위칭소자 또는 구동소자로 적용될 수 있다. The thin film transistor of the present invention configured as described above can be applied as an electrode, an active layer, a switching element, or a driving element to a flat panel display device such as a liquid crystal display (LCD) and an organic light emitting diode (OLED)
앞서 설명한 바와 같이, 본 발명에 따른 트랜지스터는 이동도가 20 cm2/vs 이상이고 안정하므로, 이를 평판표시장치에 적용하면, 평판표시장치의 신뢰성을 향상시킬 수 있다. 특히, 디스플레이 크기가 대형화하더라도 안정적으로 사용될 수 있다. As described above, since the transistor according to the present invention has a mobility of 20 cm 2 / vs or more and is stable, the reliability of the flat panel display can be improved by applying it to the flat panel display. In particular, even if the display size is increased, it can be used stably.
여기서, 전술한 액정표시장치 및 유기발광표시장치 등의 구조는 잘 알려진 바, 이들에 대한 자세한 설명은 생략한다. 본 발명에 따른 트랜지스터는 평판 표시장치뿐 아니라, 메모리소자 및 논리소자 등 다른 전자소자 분야에 다양한 용도로 적용될 수 있다.Here, the structures of the above-described liquid crystal display device and organic light emitting display device are well known, and a detailed description thereof will be omitted. The transistor according to the present invention can be applied to various fields of electronic devices such as a memory device and a logic device as well as a flat panel display device.
이하 본 발명을 실시예를 통해 구체적으로 설명하나, 하기 실시예 및 실험예는 본 발명의 한 형태를 예시하는 것에 불과할 뿐이며, 본 발명의 범위가 하기 실시예 및 실험예에 의해 제한되는 것은 아니다. Hereinafter, the present invention will be described in more detail with reference to Examples. However, the following Examples and Experimental Examples are merely illustrative of the present invention, and the scope of the present invention is not limited by the following Examples and Experimental Examples.
[실시예 1] [Example 1]
분말의 평균 입자크기가 5㎛ 이하인 산화인듐, 산화주석, 산화아연, 첨가원소 M의 각 산화 분말(산화갈륨과 산화알루미늄)을 각각 45 원자%, 9 원자%, 45 원자%, 1 원자%의 비율로 칭량한 후 혼합하여 농도가 55%인 습식 슬러리를 비즈밀 매체 0.3mm의 지르코니아 비즈로 분산시켰다. 분산된 슬러리를 분무건조한 후 확보된 구상화 분말을 이용하여 성형을 실시하였다. 성형은 1차 일축성형 후 등방향 성형기를 이용하여 2차 성형하였다. 최종 성형밀도는 55~60%로 확보하였다. 상기 성형체를 이용하여 소결을 실시하였으며, 소결 조건은 1400~1600℃ 구간에서 10시간 유지하였으며, 가스는 산소를 사용하여 분당 40L의 유량으로 주입하였다. 상기와 같이 제조된 실시예 1의 산화물 소결체 타겟의 상대밀도는 98.9%이고, 비저항은 1.0×10-3 Ωcm으로 측정되었다. (Oxide of gallium oxide and aluminum oxide) of the additive element M in amounts of 45 atomic%, 9 atomic%, 45 atomic%, and 1 atomic%, respectively, of indium oxide, tin oxide, zinc oxide, And then mixed to disperse the wet slurry having a concentration of 55% with zirconia beads of 0.3 mm in a bead mill medium. The dispersed slurry was spray dried, and the obtained spheroidized powder was used for molding. Molding was performed by primary uniaxial molding and secondary molding using an equipotential molding machine. The final forming density was 55 ~ 60%. Sintering was carried out using the above molded body. Sintering conditions were maintained for 10 hours in the range of 1400 to 1600 ° C. The gas was injected at a flow rate of 40 L / min using oxygen. The relative density of the oxide-sintered body target of Example 1 prepared as described above was 98.9%, and the resistivity was measured to be 1.0 10 -3 ? Cm.
얻어진 실시예 1의 산화물 타겟을 이용하여 구성된 박막트랜지스터의 이동도를 측정한 결과 30 cm2/Vs 이었으며, 캐리어 농도는 2.0×1018/cm3을 확보하였다. The mobility of the thin film transistor formed using the obtained oxide target of Example 1 was measured to be 30 cm 2 / Vs, and the carrier concentration was 2.0 × 10 18 / cm 3 .
[실시예 2][Example 2]
산화 인듐, 산화 주석, 산화아연, 첨가원소 M의 각 산화 분말(산화갈륨과 산화알루미늄)로서 각각 43 원자%, 12 원자%, 43 원자%, 2 원자%의 비율로 칭량하여 사용한 것을 제외하고는, 상기 실시예 1과 동일한 방법을 수행하여 실시예 2의 산화물 소결체를 제조하였다. 상기와 같이 얻어진 실시예 2의 산화물 소결체 타겟의 상대밀도는 98.5%, 비저항은 1.7×10-3 Ωcm으로 측정되었다. Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 43 atomic%, 12 atomic%, 43 atomic% and 2 atomic%, respectively , An oxide-sintered body of Example 2 was prepared in the same manner as in Example 1. The relative density of the oxide-sintered body target of Example 2 obtained as described above was measured to be 98.5% and the specific resistance of 1.7 x 10 &lt; -3 &gt;
얻어진 실시예 2의 산화물 타겟을 이용하여 구성된 박막트랜지스터의 이동도를 측정한 결과 36 cm2/Vs 이었으며, 캐리어 농도는 8.0×1016/cm3을 확보하였다. As a result of measuring the mobility of the thin film transistor formed using the obtained oxide target of Example 2, it was found to be 36 cm 2 / Vs and a carrier concentration of 8.0 × 10 16 / cm 3 was secured.
[실시예 3][Example 3]
산화인듐, 산화주석, 산화아연, 첨가원소 M의 각 산화 분말(산화갈륨과 산화알루미늄)로서 각각 40 원자%, 16 원자%, 40 원자%, 4 원자%의 비율로 칭량하여 사용한 것을 제외하고는, 상기 실시예 1과 동일한 방법을 수행하여 실시예 3의 산화물 소결체를 제조하였다. 상기와 같이 얻어진 실시예 3의 산화물 소결체 타겟의 상대밀도는 97.9%, 비저항은 7.0×10-3 Ωcm으로 측정되었다. Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 40 atom%, 16 atom%, 40 atom% and 4 atom%, respectively , An oxide-sintered body of Example 3 was prepared in the same manner as in Example 1. The relative density of the oxide-sintered body target of Example 3 thus obtained was measured to be 97.9% and the specific resistance thereof was 7.0 10 -3 ? Cm.
얻어진 실시예 3의 산화물 타겟을 이용하여 구성된 박막트랜지스터의 이동도를 측정한 결과 24 cm2/Vs 이었으며, 캐리어 농도는 4.0×1017/cm3을 확보하였다. The mobility of the thin film transistor formed using the obtained oxide target of Example 3 was measured to be 24 cm 2 / Vs, and the carrier concentration was 4.0 × 10 17 / cm 3 .
[비교예 1][Comparative Example 1]
산화인듐, 산화주석, 산화아연, 첨가원소 M의 각 산화 분말(산화갈륨과 산화알루미늄)로서 각각 46 원자%, 6 원자%, 46 원자%, 2 원자%의 비율로 칭량하여 사용한 것을 제외하고는, 상기 실시예 1과 동일한 방법을 수행하여 비교예 1의 산화물 소결체를 제조하였다. 상기와 같이 얻어진 비교예 1의 산화물 소결체 타겟의 상대밀도는 7.5%, 비저항은 2.0×10-3 Ωcm으로 측정되었다. Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in a ratio of 46 atomic%, 6 atomic%, 46 atomic% and 2 atomic%, respectively , An oxide-sintered body of Comparative Example 1 was produced in the same manner as in Example 1. The oxide-sintered compact target of Comparative Example 1 thus obtained had a relative density of 7.5% and a specific resistance of 2.0 x 10 &lt; -3 &gt;
얻어진 비교예 1의 산화물 타겟을 이용하여 구성된 박막트랜지스터의 이동도를 측정한 결과 18 cm2/Vs 이었으며, 캐리어 농도는 5.0×1017/cm3을 확보하였다. The mobility of the thin film transistor formed using the obtained oxide target of Comparative Example 1 was measured to be 18 cm 2 / Vs, and the carrier concentration was 5.0 × 10 17 / cm 3 .
[비교예 2][Comparative Example 2]
산화인듐, 산화주석, 산화아연, 첨가원소 M의 각 산화 분말(산화갈륨과 산화알루미늄)로서 각각 37 원자%, 16 원자%, 37 원자%, 10 원자%의 비율로 칭량하여 사용한 것을 제외하고는, 상기 실시예 1과 동일한 방법을 수행하여 비교예 2의 산화물 소결체를 제조하였다. 상기와 같이 얻어진 비교예 2의 산화물 소결체 타겟의 상대밀도는 93%, 비저항은 8.0×10-3 Ωcm으로 측정되었다. Except that the respective oxide powders (gallium oxide and aluminum oxide) of indium oxide, tin oxide, zinc oxide and the additive element M were weighed out in proportions of 37 atomic%, 16 atomic%, 37 atomic% and 10 atomic%, respectively , An oxide-sintered body of Comparative Example 2 was produced in the same manner as in Example 1. The relative density of the oxide-sintered body target of Comparative Example 2 obtained as described above was measured to be 93% and the specific resistance thereof 8.0 x 10 &lt; -3 &gt;
얻어진 비교예 1의 산화물 타겟을 이용하여 구성된 박막트랜지스터의 이동도를 측정한 결과 8 cm2/Vs 이었으며, 캐리어 농도는 1.0×1017 /cm3을 확보하였다. The mobility of the thin film transistor formed using the obtained oxide target of Comparative Example 1 was measured to be 8 cm 2 / Vs, and the carrier concentration was maintained at 1.0 × 10 17 / cm 3 .
[실험예 1. 박막 트랜지스터의 물성 평가][Experimental Example 1. Evaluation of physical properties of thin film transistor]
실시예 1~3 및 비교예 1~2에서 제조된 산화물 소결체의 조성 및 상대밀도를 하기 표 1에 기재하였다. 또한 실시예 1~3 및 비교예 1~2의 산화물 소결체를 이용하여 제조된 아몰퍼스 산화물 박막 채널층을 구비하는 박막 트랜지스터의 이동도와 비저항 특성을 각각 측정하여 하기 표 1에 나타냈다. The composition and relative density of the oxide-sintered bodies produced in Examples 1 to 3 and Comparative Examples 1 and 2 are shown in Table 1 below. The mobility and the resistivity characteristics of the thin film transistor including the amorphous oxide thin film channel layer produced using the oxide sintered bodies of Examples 1 to 3 and Comparative Examples 1 and 2 were measured and are shown in Table 1 below.
실험 결과, 비교예 1~2는 모두 20 cm2/Vs 미만의 저조한 이동도를 나타냈다. 이에 따라, 대형 디스플레이에 탑재 가능한 소자에 적용 불가하다는 것을 확인할 수 있었다. 특히, 첨가원소(M)의 함량이 높아질수록 산화물 소결체의 상대밀도가 현저히 감소하고, 이동도 역시 동반 감소한다는 것을 알 수 있었다. As a result of the experiment, all of Comparative Examples 1 and 2 exhibited a low mobility of less than 20 cm 2 / Vs. As a result, it can be confirmed that the present invention is not applicable to a device that can be mounted on a large display. In particular, it was found that as the content of the additive element (M) increases, the relative density of the oxide-sintered body decreases markedly, and the mobility also decreases.
이에 비해, 본 발명의 실시예 1~3에서는 상대밀도가 높고 이동도가 20 cm2/Vs 이상을 나타냈으며, 특히 실시예 2에서는 이동도가 36 cm2/Vs를 나타냈다. 이에 따라 대형 디스플레이에 탑재 가능한 소자에 유용하게 적용할 수 있음을 알 수 있었다. In contrast, in Examples 1 to 3 of the present invention, the relative density was high and the mobility was 20 cm 2 / Vs or more. In particular, the mobility was 36 cm 2 / Vs in Example 2. Therefore, it can be applied to a device which can be mounted on a large display.
실시예1Example 1 실시예2Example 2 실시예3Example 3 비교예1Comparative Example 1 비교예2Comparative Example 2
산화인듐(at%)Indium oxide (at%) 4545 4343 4040 4646 3737
산화주석(at%)Tin oxide (at%) 99 1212 1616 66 1616
산화아연(at%)Zinc oxide (at%) 4545 4343 4040 4646 3737
금속산화물(at%)Metal oxide (at%) 1One 22 44 22 1010
상대밀도(%)Relative density (%) 98.998.9 98.598.5 97.997.9 97.597.5 93.093.0
(M+Sn)/(M+In+Sn+Zn)(원자%)(M + Sn) / (M + In + Sn + Zn) (atomic%) 1010 1414 2020 88 2626
비저항 (10-3 Ωcm)Resistivity (10 -3 Ωcm) 1.01.0 1.71.7 7.07.0 2.02.0 8.08.0
이동도 (cm2/Vs)Mobility (cm 2 / Vs) 3030 3636 2424 1818 88

Claims (11)

  1. 산화인듐; 산화주석; 산화아연; 및 적어도 1종 이상의 금속 이온(M, 여기서 M = Al, Ga, Hf, V)이 함유된 금속산화물을 포함하며, Indium oxide; Tin oxide; Zinc oxide; And a metal oxide containing at least one or more metal ions (M, where M = Al, Ga, Hf, V)
    (M+Sn)/(M+In+Sn+Zn)로 표시되는 원자수 비가 10~20 원자%인, 산화물 소결체.Wherein the atomic ratio represented by (M + Sn) / (M + In + Sn + Zn) is 10 to 20 atomic%.
  2. 제1항에 있어서, The method according to claim 1,
    상기 금속산화물은 Al, Ga, Hf, 및 V로 구성된 군에서 선택되는 2종의 금속(M)을 포함하는 산화물 소결체. Wherein the metal oxide comprises two kinds of metals (M) selected from the group consisting of Al, Ga, Hf, and V.
  3. 제1항에 있어서, The method according to claim 1,
    상대밀도가 95% 이상이고, 비저항이 1×10-2 Ωcm 이하인 산화물 소결체. A relative density of 95% or more, and a specific resistance of 1 x 10 &lt; -2 &gt;
  4. 기판 상에 형성된 게이트 전극, 절연막, 채널층, 소스 전극 및 드레인 전극을 포함하는 박막 트랜지스터로서, A thin film transistor comprising a gate electrode, an insulating film, a channel layer, a source electrode, and a drain electrode formed on a substrate,
    상기 채널층은, 제1항 내지 제3항 중 어느 한 항의 산화물 소결체 타겟을 스퍼터링하여 형성된 아몰퍼스 산화물 박막인 것을 특징으로 박막 트랜지스터. Wherein the channel layer is an amorphous oxide thin film formed by sputtering the oxide-sintered body target according to any one of claims 1 to 3.
  5. 제4항에 있어서, 5. The method of claim 4,
    이동도가 20cm2/Vs 이상인 박막 트랜지스터.A thin film transistor having a mobility of 20 cm 2 / Vs or more.
  6. 제4항에 있어서, 5. The method of claim 4,
    캐리어 농도가 1.0×1016 내지 5.0×1018 인 박막 트랜지스터.And a carrier concentration of 1.0 × 10 16 to 5.0 × 10 18 .
  7. 제4항에 기재된 박막 트랜지스터를 포함하는 평판 표시장치. A flat panel display device comprising the thin film transistor according to claim 4.
  8. (i) 산화 인듐; 산화 주석; 산화아연 분말; 및 적어도 1종 이상의 금속 이온 M(M = Al, Ga, Hf, V)을 함유하는 금속산화물을 혼합하여 슬러리를 준비하고 분쇄하는 단계;(i) indium oxide; Tin oxide; Zinc oxide powder; And a metal oxide containing at least one kind of metal ions M (M = Al, Ga, Hf, V) to prepare and crush a slurry;
    (ii) 상기 분쇄물을 일축 가압하여 1차 성형하는 단계;(ii) uniaxially pressurizing the pulverized product to perform primary molding;
    (iii) 상기 1차 성형체를 등방압하여 2차 성형하는 단계; 및(iii) isostatically pressing the primary molding to form secondary molding; And
    (iv) 상기 2차 성형체를 소결하는 단계(iv) sintering the secondary formed body
    를 포함하는 제1항의 산화물 소결체의 제조방법.Wherein the oxide-sintered body is made of a metal.
  9. 제8항에 있어서, 9. The method of claim 8,
    상기 1차 성형단계에서의 가압 조건은 50 MPa 이상이고, 1차 성형체의 성형밀도가 45~50%인 제조방법. Wherein the pressing condition in the primary molding step is 50 MPa or more and the molding density of the primary molded article is 45 to 50%.
  10. 제8항에 있어서, 9. The method of claim 8,
    상기 2차 성형단계에서의 가압 조건은 2,000 MPa 이상이고, 2차 성형체의 성형밀도가 55~60%인 제조방법. Wherein the pressing condition in the secondary molding step is 2,000 MPa or more and the molding density of the secondary molded article is 55 to 60%.
  11. 제8항에 있어서, 9. The method of claim 8,
    상기 소결단계는 대기 및 산소 하에서 1400~1600℃의 온도로 10~40 시간 동안 유지되는 것인 제조방법. Wherein the sintering step is maintained at a temperature of 1400 to 1600 캜 for 10 to 40 hours under atmospheric and oxygen.
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