WO2019111092A1 - 表示装置及びその動作方法 - Google Patents

表示装置及びその動作方法 Download PDF

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Publication number
WO2019111092A1
WO2019111092A1 PCT/IB2018/059279 IB2018059279W WO2019111092A1 WO 2019111092 A1 WO2019111092 A1 WO 2019111092A1 IB 2018059279 W IB2018059279 W IB 2018059279W WO 2019111092 A1 WO2019111092 A1 WO 2019111092A1
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WIPO (PCT)
Prior art keywords
pixel
transistor
display
display device
display panel
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PCT/IB2018/059279
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English (en)
French (fr)
Japanese (ja)
Inventor
吉本智史
檜山真里奈
楠紘慈
Original Assignee
株式会社半導体エネルギー研究所
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Application filed by 株式会社半導体エネルギー研究所 filed Critical 株式会社半導体エネルギー研究所
Priority to CN201880077464.9A priority Critical patent/CN111418000B/zh
Priority to JP2019557701A priority patent/JP7289793B2/ja
Publication of WO2019111092A1 publication Critical patent/WO2019111092A1/ja

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators

Definitions

  • One embodiment of the present invention relates to a display device and an operation method thereof.
  • the technical field of one embodiment of the present invention includes a semiconductor device, a display device, a light emitting device, a display system, an electronic device, a lighting device, an input device (eg, a touch sensor or the like), an input / output device (eg, a touch panel or the like),
  • an input device eg, a touch sensor or the like
  • an input / output device eg, a touch panel or the like
  • the driving method of or the manufacturing method of them can be mentioned as an example.
  • a semiconductor device refers to any device that can function by utilizing semiconductor characteristics.
  • a display device (a liquid crystal display device, a light emitting display device, or the like), a projection device, a lighting device, an electro-optical device, a power storage device, a memory device, a semiconductor circuit, an imaging device, an electronic device, or the like may be referred to as a semiconductor device. Alternatively, it may be said that these have a semiconductor device.
  • a display device with high resolution has been required.
  • a display device with a large number of pixels such as full high vision (the number of pixels 1920 ⁇ 1080), 4K (the number of pixels 3840 ⁇ 2160 or 4096 ⁇ 2160), and further 8K (the number of pixels 7680 ⁇ 4320 or 8192 ⁇ 4320) is thriving Has been developed.
  • the enlargement of a display apparatus is calculated
  • Patent Document 1 discloses a technique of using amorphous silicon as a semiconductor material of a transistor.
  • Patent Document 2 and Patent Document 3 disclose a technique of using a metal oxide as a semiconductor material of a transistor.
  • Patent Document 4 discloses a technique for manufacturing a large display device by arranging a plurality of display panels.
  • An object of one embodiment of the present invention is to provide a display device with high display quality.
  • An object of one embodiment of the present invention is to provide a display device with reduced display unevenness.
  • An object of one embodiment of the present invention is to provide a display device with high resolution.
  • An object of one embodiment of the present invention is to provide a display device having a large display area.
  • An object of one embodiment of the present invention is to provide a display device operable at a high frame frequency.
  • An object of one embodiment of the present invention is to provide a display device with low power consumption.
  • An object of one embodiment of the present invention is to provide a thin display device.
  • An object of one embodiment of the present invention is to provide a flexible display device.
  • An object of one embodiment of the present invention is to provide a display device with a wide viewing angle.
  • An object of one embodiment of the present invention is to provide a display device that can be manufactured with a small manufacturing device.
  • An object of one embodiment of the present invention is to provide a low-cost display device.
  • An object of one embodiment of the present invention is to provide a highly reliable display device.
  • An object of one embodiment of the present invention is to provide a novel display device.
  • An object of one embodiment of the present invention is to provide a novel semiconductor device or the like.
  • An object of one embodiment of the present invention is to provide a method for operating a display device with high display quality.
  • An object of one embodiment of the present invention is to provide a method for operating a display device in which display unevenness is reduced.
  • An object of one embodiment of the present invention is to provide a method for operating a display device with high resolution.
  • An object of one embodiment of the present invention is to provide a method for operating a display device having a large display area.
  • An object of one embodiment of the present invention is to provide a method of operating a display device operable at a high frame frequency.
  • An object of one embodiment of the present invention is to provide a method for operating a display device with low power consumption.
  • An object of one embodiment of the present invention is to provide a method for operating a thin display device.
  • An object of one embodiment of the present invention is to provide a method for operating a flexible display device.
  • An object of one embodiment of the present invention is to provide a method for operating a display device with a wide viewing angle.
  • An object of one embodiment of the present invention is to provide a method for operating a display device that can be manufactured with a small manufacturing device.
  • An object of one embodiment of the present invention is to provide a method for operating a low cost display device.
  • An object of one embodiment of the present invention is to provide a method for operating a highly reliable display device.
  • An object of one embodiment of the present invention is to provide a novel operation method of a display device.
  • An object of one embodiment of the present invention is to provide a method for operating a novel semiconductor device or the like.
  • One embodiment of the present invention is an operation method of a display device including a first pixel portion in which first pixels are arranged in a matrix and a second pixel portion in which second pixels are arranged in a matrix
  • a first correction filter having a function of correcting an image displayed in the first pixel unit, and a second correction filter having a function of correcting an image displayed in the second pixel unit; Of the first correction filter and the filter value of the second correction filter, and correcting the filter value of the first correction filter based on the comparison result. It is.
  • the first correction filter has a filter value corresponding to the first pixel
  • the second correction filter has a filter value corresponding to the second pixel, and the boundary portion with the second pixel portion Corresponding to a second pixel provided at the boundary between the first pixel portion and the average value of the filter values corresponding to the first pixel provided in It compares the average value of the filter value, and based on the comparison result, an operation method of a display device for correcting the filter value of the first correction filter.
  • the first correction filter is emitted from the first pixel by measuring the luminance of light emitted from the first pixel for a plurality of gradation values of the first pixel.
  • Data of the correspondence between the luminance of the light and the gradation value of the first pixel is acquired, and an image of a specific gradation value is displayed in the first pixel portion, and the light is emitted from the first pixel
  • the luminance data is acquired by measuring the luminance of the light, it may be created using the correspondence data and the luminance data.
  • one embodiment of the present invention is a display device including a first pixel portion in which first pixels are arranged in a matrix and a second pixel portion in which second pixels are arranged in a matrix.
  • the first image is displayed in the first pixel portion
  • the second image is displayed in the second pixel portion
  • the luminance of the light emitted from the first pixel and the second pixel are displayed.
  • the luminance of light emitted from the first pixel is corrected, and the luminance of the light emitted from the first pixel is corrected based on the comparison result.
  • the first image is displayed in the first pixel portion
  • the second image is displayed in the second pixel portion
  • the first pixel Is the method of operation of the display device for correcting the brightness of the light emitted from the light source.
  • the luminance of the light emitted from the first pixel is Data of the correspondence between the luminance of the light emitted from the first pixel and the gradation value of the first pixel by measuring a plurality of gradation values of the first pixel;
  • the luminance data is acquired by displaying the image of the specific gradation value on the unit and measuring the luminance of the light emitted from the first pixel, and the correspondence data and the luminance data are used.
  • a correction filter is created, and the first image may be an image corrected using the correction filter.
  • the image of a specific tone value may be an image in which the tone values of all the first pixels are equal.
  • one embodiment of the present invention is a display device including a pixel portion and a processing portion, in the pixel portion, pixels are arrayed in a matrix, and the pixel includes a display element and a memory circuit.
  • the processing unit has a function of creating a correction filter using luminance data acquired based on the image displayed by the display element, and the memory circuit is a display device having a function of holding the correction filter. .
  • the pixel includes the display element, the first transistor, the second transistor, the third transistor, the fourth transistor, the first capacitor, and the second capacitor.
  • One of the source or drain of the first transistor is electrically connected to one electrode of the first capacitive element, and the other electrode of the first capacitive element is the source of the second transistor Or one of the drain and one of the source or the drain of the second transistor is electrically connected to the gate of the third transistor, and the gate of the third transistor is The other electrode of the second capacitor element is electrically connected to one of the electrodes, and the other electrode of the second capacitor element is electrically connected to one of the source or the drain of the third transistor, and the source or the drain of the third transistor One is the source or of the fourth transistor is electrically connected to one of the drain, the other of the source and the drain of the fourth transistor may be one electrode electrically connected to the display device.
  • the display element may be an organic EL element.
  • the second transistor includes a metal oxide in the channel formation region, and the metal oxide includes In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).
  • a display device with high display quality can be provided.
  • a display device with reduced display unevenness can be provided.
  • a display device with high resolution can be provided.
  • a display device having a large display area can be provided.
  • a display capable of operating at a high frame frequency can be provided.
  • a display device with low power consumption can be provided.
  • a thin display device can be provided.
  • a flexible display device can be provided.
  • a display device with a wide viewing angle can be provided.
  • a display device that can be manufactured with a small manufacturing device can be provided.
  • a low cost display device can be provided.
  • a highly reliable display device can be provided.
  • a novel display device can be provided.
  • a novel semiconductor device or the like can be provided.
  • a method for operating a display device with high display quality can be provided.
  • an operation method of a display device with reduced display unevenness can be provided.
  • an operation method of a display device with high resolution can be provided.
  • an operation method of a display device having a large display area can be provided.
  • a method for operating a display device with low power consumption can be provided.
  • an operation method of a thin display device can be provided.
  • an operation method of a flexible display device can be provided.
  • a method for operating a display device with a wide viewing angle can be provided.
  • an operation method of a display device which can be manufactured with a small manufacturing device can be provided.
  • an inexpensive method for operating a display device can be provided.
  • One embodiment of the present invention can provide a method for operating a highly reliable display device.
  • a novel display device operation method can be provided.
  • an operation method of a novel semiconductor device or the like can be provided.
  • FIG. 7 is a diagram illustrating an example of a display device. The figure which shows an example of a display part.
  • FIG. 7 is a diagram illustrating an example of a display panel.
  • FIG. 7 is a diagram illustrating an example of a display device.
  • FIG. 8 shows an example of operation of a display device.
  • FIG. 8 shows an example of operation of a display device.
  • FIG. 8 shows an example of operation of a display device.
  • FIG. 2 is a diagram showing an example of a pixel.
  • FIG. 7 is a diagram illustrating an example of a display device. The figure which shows an example of a display part.
  • FIG. 2 is a diagram showing an example of a pixel.
  • FIG. 6 shows an example of the operation of a pixel.
  • FIG. 2 is a diagram showing an example of a pixel.
  • FIG. 6 shows an example of the operation of a pixel.
  • FIG. 8 shows an example of operation of a display device.
  • FIG. 8 shows an example of operation of a display device.
  • FIG. 7 is a diagram illustrating an example of a display device.
  • FIG. 18 illustrates an example of a transistor.
  • FIG. 18 illustrates an example of a transistor.
  • FIG. 18 illustrates an example of a transistor.
  • FIG. 18 illustrates an example of a transistor.
  • FIG. 6 illustrates an example of an electronic device.
  • FIG. 2 is a view showing a display device used in Example 1; The photograph which shows the display result of Example 1.
  • FIG. 2 is a view showing a display device used in Example 1; The photograph which shows the display result of Example 1.
  • FIG. The photograph which shows the luminance data of Example 2.
  • FIG. 2 is a view showing a display
  • membrane and the term “layer” can be replaced with each other depending on the case or situation.
  • conductive layer can be changed to the term “conductive film”.
  • insulating film can be changed to the term “insulating layer”.
  • the metal oxide is a metal oxide in a broad sense.
  • Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductor or simply OS), and the like.
  • oxide semiconductors also referred to as oxide semiconductor or simply OS
  • the metal oxide may be referred to as an oxide semiconductor. That is, in the case of describing an OS FET, the transistor can be put in another way as a transistor including a metal oxide or an oxide semiconductor.
  • metal oxides having nitrogen may also be collectively referred to as metal oxides.
  • a metal oxide having nitrogen may be referred to as metal oxynitride.
  • Embodiment 1 a display device of one embodiment of the present invention will be described with reference to FIGS.
  • One embodiment of the present invention relates to a display device and its operation method in which a boundary between display panels is difficult to be recognized even when a large display region is realized by arranging a plurality of display panels.
  • FIGS. 1A and 1B are block diagrams showing a configuration example of the display device 10A.
  • the display device 10A has a function of generating image data using data received from the outside, and a function of displaying an image based on the image data.
  • the display device 10A includes a display unit 20A and a signal generation unit 30A.
  • the display unit 20A has a plurality of display panels DP.
  • the signal generation unit 30A has a function of generating image data using data received from the outside.
  • the display panel DP has a function of displaying an image based on the image data.
  • FIG. 1A shows an example in which the display panel DP is arranged in two rows and one column in the display unit 20A.
  • the display of the display panel DP can be controlled independently. Note that three or more lines of display panels DP may be arranged in the display unit 20A, or two or more lines may be arranged.
  • the display panel DP provided at the p-th row and the q-th column (p and q are integers of 1 or more) is referred to as a display panel DP [p, q].
  • the display unit 20A having a wide display area can be manufactured.
  • FIG. 1B shows a configuration example of the display panel DP [1, 1] and the display panel DP [2, 1].
  • the display panel DP [1,1] includes a pixel portion 21A, a scanning line drive circuit 22A (also referred to as a gate driver), a signal line drive circuit 23A (also referred to as a source driver), and a timing controller 24A.
  • the display panel DP [2, 1] includes a pixel unit 21B, a scanning line drive circuit 22B, a signal line drive circuit 23B, and a timing controller 24B.
  • the signal generation unit 30A includes a front end unit 31, a decoder 32, a processing unit 33, a reception unit 34, an interface 35, a control unit 36, a processing unit 40A, and a division unit 45A.
  • a pixel portion provided in a display portion included in a display device of one embodiment of the present invention may be referred to as a pixel portion 21.
  • the scan line drive circuit provided in the display portion of the display device of one embodiment of the present invention such as the scan line drive circuit 22A and the scan line drive circuit 22B, may be referred to as a scan line drive circuit 22.
  • a signal line driver circuit provided in a display portion of the display device of one embodiment of the present invention such as the signal line driver circuit 23A and the signal line driver circuit 23B, may be referred to as a signal line driver circuit 23.
  • the pixel unit 21A and the pixel unit 21B have a plurality of pixels.
  • the pixel unit 21A and the pixel unit 21B have a function of displaying an image.
  • the pixel has a display element.
  • the pixel has a function of emitting light of luminance according to the gradation value.
  • the tone of the pixel is controlled by the signals supplied from the scanning line drive circuit 22A and the signal line drive circuit 23A, and a predetermined image is displayed on the pixel section 21A. Further, the gradation of the pixel is controlled by the signals supplied from the scanning line drive circuit 22B and the signal line drive circuit 23B, and a predetermined image is displayed on the pixel section 21B.
  • the scanning line drive circuit 22A has a function of supplying a signal for selecting a pixel (also referred to as a selection signal) to the pixel portion 21A.
  • the scanning line drive circuit 22B has a function of supplying a selection signal to the pixel portion 21B.
  • the signal line drive circuit 23A has a function of supplying a signal (also referred to as an image signal) representing a gray scale represented by a pixel to the pixel portion 21A.
  • the signal line drive circuit 23B has a function of supplying an image signal to the pixel portion 21B.
  • the timing controller 24A has a function of generating timing signals (clock signal, start pulse signal and the like) used in the scanning line drive circuit 22A, the signal line drive circuit 23A and the like.
  • the timing controller 24B has a function of generating timing signals used in the scanning line drive circuit 22B, the signal line drive circuit 23B, and the like.
  • One or both of the timing when the selection signal is output from the scanning line drive circuit 22A and the timing when the image signal is output from the signal line drive circuit 23A are controlled by the timing signal generated by the timing controller 24A.
  • One or both of the timing when the selection signal is output from the scanning line drive circuit 22B and the timing when the image signal is output from the signal line drive circuit 23B are controlled by the timing signal generated by the timing controller 24B.
  • timings at which signals are output from the plurality of scanning line driving circuits are synchronized by a timing signal generated by the timing controller 24A.
  • the display panel DP [2, 1] includes a plurality of scanning line drive circuits, timings at which signals are output from the plurality of scanning line drive circuits are synchronized by the timing signal generated by the timing controller 24B.
  • the display panel DP [1, 1] has a plurality of signal line drive circuits
  • timings at which signals are output from the signal line drive circuits are synchronized by timing signals generated by the timing controller 24A.
  • the display panel DP [2, 1] includes a plurality of signal line drive circuits, timings at which signals are output from the signal line drive circuits are synchronized by timing signals generated by the timing controller 24B.
  • the front end unit 31 has a function of receiving a signal input from the outside and appropriately performing signal processing.
  • the front end unit 31 receives, for example, a broadcast signal or the like that has been encoded and modulated according to a predetermined method.
  • the front end unit 31 can have a function of demodulating the received image signal, performing analog-digital conversion, and the like.
  • the front end unit 31 may have a function of performing error correction.
  • the data received by the front end unit 31 and subjected to the signal processing is output to the decoder 32.
  • the decoder 32 has a function of decoding the encoded signal.
  • the decoder 32 performs decompression.
  • the decoder 32 can have a function of performing inverse orthogonal transformation such as entropy decoding, inverse quantization, inverse discrete cosine transformation (IDCT), inverse discrete sine transformation (IDST), intra-frame prediction, inter-frame prediction, etc. .
  • the image data generated by the decoding process by the decoder 32 is output to the processing unit 33.
  • the processing unit 33 has a function of performing image processing on the image data input from the decoder 32, generating the first image data SD1, and outputting the first image data SD1 to the processing unit 40A.
  • Examples of the image processing include noise removal processing, tone conversion processing, color tone correction processing, luminance correction processing and the like.
  • Color tone correction processing and luminance correction processing can be performed using gamma correction or the like.
  • Examples of the noise removal process include removal of various noises such as mosquito noise generated around an outline of a character or the like, block noise generated in a high-speed moving image, and random noise causing flicker.
  • the gradation conversion process is a process of converting the gradation indicated by the first image data SD1 into a gradation corresponding to the output characteristic of the display unit 20A. For example, in the case where the number of gradations is increased, processing for smoothing the histogram can be performed by interpolating and allocating gradation values corresponding to respective pixels to an image input with a small number of gradations. Also, high dynamic range (HDR) processing, which extends the dynamic range, is also included in the tone conversion processing.
  • HDR high dynamic range
  • Color tone correction processing is processing for correcting the color tone of an image.
  • the luminance correction processing is processing for correcting the brightness (luminance contrast) of an image. For example, the brightness and the color tone of the image displayed on the display unit 20A are corrected so as to be optimal according to the type and the brightness or the color purity of the illumination in the space where the display unit 20A is provided.
  • the interframe interpolation process is a process of generating an image of a frame (interpolated frame) which does not originally exist, when the frame frequency of the image to be displayed is increased.
  • an image of an interpolation frame to be inserted between two images is generated from the difference between two images.
  • images of a plurality of interpolation frames can be generated between two images.
  • the frame frequency of the image data is 60 Hz
  • the frame frequency of the image signal output to the display unit 20A is doubled by 120 Hz, or quadrupled by 240 Hz, by generating a plurality of interpolation frames. It can be increased to eight times 480 Hz and so on.
  • the above-described image processing can also be performed by a processing unit provided separately from the processing unit 33.
  • one or more of the above-described image processing may be performed by the processing unit 40A.
  • the receiving unit 34 has a function of receiving externally input data or control signals.
  • the arithmetic processing unit 50 a remote controller, a portable information terminal (such as a smartphone or a tablet), an operation button provided on the display unit 20A, a touch panel, or the like can be used to input data or control signals to the reception unit 34.
  • the arithmetic processing unit 50 may be a computer such as a computer, a server, or a cloud, which has an excellent arithmetic processing capability.
  • the interface 35 has a function of appropriately performing signal processing on the data or control signal received by the receiving unit 34 and outputting the data or control signal to the control unit 36.
  • the control unit 36 has a function of supplying control signals to the circuits included in the signal generation unit 30A.
  • the control unit 36 has a function of supplying a control signal to the decoder 32, the processing unit 33, the processing unit 40A, and the dividing unit 45A.
  • the control by the control unit 36 can be performed based on the control signal or the like received by the receiving unit 34.
  • the processing unit 40A has a function of creating a correction filter.
  • the processing unit 40A also has a function of generating the second image data SD2 by correcting the first image data SD1 input from the processing unit 33 using the created correction filter.
  • the processing unit 40A has a function of correcting the first image data SD1 so as to reduce display unevenness of the image displayed on the display unit 20A.
  • the processing unit 40A has a function of correcting the first image data SD1 so that the boundaries between the display panels are not easily recognized.
  • the second image data SD2 generated by the processing unit 40A is output to the dividing unit 45A.
  • the dividing unit 45A has a function of dividing the second image data SD2 input from the processing unit 40A.
  • the second image data SD2 can be divided into the same number as that of the display panel DP provided in the display unit 20A.
  • the second image data SD2 is divided into 2 ⁇ 1 pieces (second image data SD2 [1,1] and second image data SD2 [2,1]) and displayed. It is output to the unit 20A.
  • the second image data SD2 [1,1] is image data corresponding to the image displayed on the display panel DP [1,1]
  • the second image data SD2 [2,1] is the display panel DP It is image data corresponding to the image displayed in [2, 1].
  • the dividing unit 45A outputs the second image data SD2 [1,1] to the signal line drive circuit 23A, and outputs the second image data SD2 [2,1] to the signal line drive circuit 23B.
  • FIG. 2 shows a specific configuration example of the display panel DP [1, 1] and the display panel DP [2, 1].
  • Each of the pixel unit 21A and the pixel unit 21B has a plurality of pixels 25.
  • FIG. 2 illustrates an example in which the pixel unit 21A and the pixel unit 21B each have a plurality of pixels 25 arranged in a matrix of m rows and n columns (m and n are integers of 1 or more).
  • a pixel provided in the pixel portion 21A may be referred to as a first pixel.
  • a pixel provided in the pixel portion 21B may be referred to as a second pixel.
  • a boundary between the pixel unit 21A and the pixel unit 21B is referred to as a boundary 28A.
  • a boundary between the pixel unit 21B and the pixel unit 21A is referred to as a boundary 28B.
  • the pixel 25 in the m-th row can be provided in the boundary portion 28A.
  • the pixels 25 in the (7/8) m + 1st to m-th rows can be provided in the boundary portion 28A.
  • the pixels 25 in the (3/4) m + 1st to m-th rows can be provided in the boundary portion 28A.
  • the pixels 25 in the (1/2) m + 1-th to m-th rows can be provided in the boundary portion 28A.
  • the pixels 25 in the first row can be provided.
  • the pixels 25 in the first to (1/8) m-th rows can be provided.
  • the pixels 25 in the first to (1/4) m-th rows can be provided.
  • the pixels 25 in the first to (1/2) m-th rows can be provided.
  • the display panel DP [1,1] includes m scanning lines GLa (also referred to as selection signal lines, gate lines, and the like).
  • the display panel DP [2, 1] has m scanning lines GLb.
  • the m scanning lines GLa and the m scanning lines GLb respectively extend in the row direction.
  • the m scanning lines GLa and the m scanning lines GLb are electrically connected to the pixels 25 aligned in the row direction.
  • a scan line provided in a display device of one embodiment of the present invention such as the scan line GLa and the scan line GLb, may be referred to as a scan line GL.
  • the scan line GL electrically connected to the pixel 25 in the i-th row (i is an integer of 1 or more and m or less) is referred to as a scan line GL [i].
  • the symbol or code representing the element in the i-th row may be distinguished by adding [i].
  • the scanning line driving circuit 22A has a function of supplying a selection signal to the scanning line GLa
  • the scanning line driving circuit 22B has a function of supplying a selection signal to the scanning line GLb.
  • the selection signal is supplied to the pixel 25 included in the pixel unit 21A through the scanning line GLa, and is supplied to the pixel 25 included in the pixel unit 21B through the scanning line GLb.
  • the scanning line drive circuit 22A has a function of sequentially supplying selection signals from the scanning line GLa [1] to the scanning line GLa [m]. In other words, the scanning line drive circuit 22A has a function of sequentially scanning the scanning lines GLa [1] to the scanning lines GLa [m]. After scanning up to the scanning line GLa [m], scanning is sequentially performed again from the scanning line GLa [1].
  • the scanning line drive circuit 22B has a function of supplying selection signals in order from the scanning line GLb [1] to the scanning line GLb [m]. In other words, the scanning line drive circuit 22B has a function of sequentially scanning the scanning lines GLb [1] to the scanning lines GLb [m]. After scanning up to the scanning line GLb [m], scanning is sequentially performed again from the scanning line GLb [1].
  • another scanning line driving circuit may be provided on the display panel DP [1, 1].
  • the scan line drive circuit is electrically connected to the other end of the scan line GLa. Therefore, two scanning line driving circuits are provided at positions facing each other across the pixel portion 21A.
  • another scanning line driving circuit may be provided in the display panel DP [2, 1].
  • the scan line drive circuit is electrically connected to the other end of the scan line GLb. Thus, two scanning line driving circuits are provided at positions facing each other across the pixel portion 21B.
  • the selection signal is simultaneously supplied from one of the two scanning line driving circuits to one of the scanning lines GLa or scanning line GLb. Can increase the supply capability of the selection signal.
  • the display panel DP [1, 1] has n signal lines SLa (also referred to as image signal lines, source lines and the like), and the display panel DP [2, 1] has n signal lines SLb.
  • n signal lines SLa and the n signal lines SLb extends in the column direction.
  • the n signal lines SLa and the n signal lines SLb are electrically connected to the plurality of pixels 25 arranged in the column direction.
  • signal lines provided in a display device of one embodiment of the present invention such as the signal line SLa and the signal line SLb, may be referred to as a signal line SL.
  • the signal line SL electrically connected to the pixel 25 in the j-th column (j is an integer of 1 or more and n or less) is referred to as a signal line SL [j].
  • the symbol or code representing the element in the j-th column may be distinguished by adding [j].
  • Signal line SLa is electrically connected to signal line drive circuit 23A
  • signal line SLb is electrically connected to signal line drive circuit 23B
  • the signal line drive circuit 23A has a function of supplying an image signal to the signal line SLa
  • the signal line drive circuit 23B has a function of supplying an image signal to the signal line SLb.
  • the image signal is supplied to the pixel 25 of the pixel unit 21A through the signal line SLa, and is supplied to the pixel 25 of the pixel unit 21B through the signal line SLb.
  • the pixel 25 has a display element.
  • a light emitting element can be given as an example of the display element provided in the pixel 25.
  • Examples of light emitting elements include self-luminous light emitting elements such as organic light emitting diodes (OLEDs), light emitting diodes (LEDs), quantum-dot light emitting diodes (QLEDs), and semiconductor lasers.
  • OLEDs organic light emitting diodes
  • LEDs light emitting diodes
  • QLEDs quantum-dot light emitting diodes
  • semiconductor lasers semiconductor lasers.
  • a bright image can be displayed and display quality can be improved by using a light-emitting element, in particular an OLED or a micro LED, as a display element.
  • a display device having a light-emitting element does not require a backlight, so that a thin display device can be provided.
  • a flexible display device can be provided.
  • a display device with a wide viewing angle can be provided.
  • liquid crystal element may be used as the display element.
  • liquid crystal elements include transmissive liquid crystal elements, reflective liquid crystal elements, and semi-transmissive liquid crystal elements.
  • a shutter type MEMS (Micro Electro Mechanical System) element As a display element, a shutter type MEMS (Micro Electro Mechanical System) element, an optical interference type MEMS element, a microcapsule type, an electrophoresis type, an electrowetting type, an electronic powder fluid (registered trademark) type, etc. are applied.
  • a display element or the like may be used.
  • the number of pixels 25 provided in the display unit 20A can be freely set. In order to increase the size of the display unit 20A and to display a high definition image, it is preferable to dispose a large number of pixels 25. For example, in the case of displaying a 2K image, it is preferable to provide 1920 ⁇ 1080 or more pixels. Further, in the case of displaying a 4K image, it is preferable to provide 3840 ⁇ 2160 or more pixels, or 4096 ⁇ 2160 or more pixels. In the case of displaying an 8K image, it is preferable to provide 7680 ⁇ 4320 or more pixels, or 8192 ⁇ 4320 or more pixels. In addition, more pixels can be provided in the display unit 20A.
  • the size of one display panel DP does not have to be large. Therefore, it is not necessary to increase the size of the manufacturing apparatus for manufacturing the display panel DP, and space can be saved. In addition, since it is possible to use a medium-to-small display panel manufacturing apparatus and not to use a new manufacturing apparatus for increasing the size of the display unit 20A, the manufacturing cost can be reduced. In addition, it is possible to suppress a decrease in yield due to the enlargement of the display panel DP.
  • the display unit having a plurality of display panels DP has a wider display area than the display unit having one display panel DP, and the amount of information which can be displayed at one time is large. And so on.
  • Each of the plurality of pixels 25 illustrated in FIG. 2 can have a function of emitting light of red (R), green (G), or blue (B).
  • each of the plurality of pixels 25 illustrated in FIG. 2 can have a function of emitting light of red (R), green (G), blue (B), or white (W).
  • R red
  • G green
  • B blue
  • W white
  • the pixels 25 capable of emitting light of different colors in the pixel portion 21A and the pixel portion 21B full-color display can be performed. Note that when the pixels 25 capable of emitting light of different colors are provided in the pixel portion 21A and the pixel portion 21B, the pixels 25 can be referred to as sub-pixels.
  • the display panel DP has a non-display area so as to surround the pixel unit 21. At this time, for example, when one image is displayed by combining output images of a plurality of display panels DP, the one image is visually perceived as separated by the user of the display device 10A.
  • the distance between the end of the display panel DP and the element in the display panel DP becomes short, and the element is degraded by impurities entering from the outside of the display panel DP. It may be easier.
  • a plurality of display panels DP are arranged so as to overlap with each other.
  • the display panel DP positioned at least on the display surface side (upper side) of the two superimposed display panels DP has a region transmitting visible light adjacent to the pixel portion 21.
  • the pixel portion 21 of the display panel DP disposed on the lower side and the region transmitting visible light of the display panel DP disposed on the upper side overlap with each other. Therefore, the non-display area between the pixel portions 21 of the two overlapped display panels DP can be reduced or eliminated. As a result, it is possible to realize a large display unit 20A in which the user can not easily recognize the joints of the display panel DP.
  • At least a part of the non-display area of the display panel DP located on the upper side is an area that transmits visible light, and can overlap with the pixel portion 21 of the display panel DP located on the lower side.
  • at least a part of the non-display area of the display panel DP located on the lower side can be overlapped with the pixel portion 21 of the display panel DP located on the upper side or an area that blocks visible light. In these parts, since the narrowing of the frame (reduction of the area other than the pixel part) of the display unit 20A is not affected, the area may not be reduced.
  • the distance between the end of the display panel DP and the element in the display panel DP becomes long, and deterioration of the element by impurities entering from the outside of the display panel DP can be suppressed .
  • impurities such as moisture or oxygen penetrate the organic EL element from the outside of the display panel DP. It becomes difficult (or hard to reach).
  • the area of the non-display region of the display panel DP can be sufficiently ensured, and therefore, a large display portion with high reliability can be obtained even if the display panel DP using an organic EL element or the like is applied 20A can be realized.
  • the plurality of display panels DP be arranged such that the pixel units 21 are continuous between the adjacent display panels DP.
  • FIG. 3A shows a configuration example of the display panel DP
  • FIG. 3B shows an arrangement example of the display panel DP.
  • the display panel DP illustrated in FIG. 3A includes the pixel portion 21, a region 72 which transmits visible light, and a region 73 which blocks visible light.
  • the region 72 transmitting visible light and the region 73 blocking visible light are provided adjacent to the pixel portion 21 respectively.
  • FIG. 3A shows an example in which a flexible printed circuit (FPC) 74 is provided on the display panel DP.
  • FPC flexible printed circuit
  • the pixel unit 21 includes a plurality of pixels 25.
  • the region 72 which transmits visible light may be provided with a pair of substrates constituting the display panel DP, a sealing material for sealing a display element held between the pair of substrates, and the like.
  • a material having transparency to visible light is used as a member provided in the region 72 which transmits visible light.
  • a wire or the like electrically connected to the pixel 25 included in the pixel unit 21 may be provided in the area 73 for blocking visible light.
  • one or both of the scanning line drive circuit 22 and the signal line drive circuit 23 may be provided in the area 73 for blocking visible light.
  • a terminal connected to the FPC 74, a wire connected to the terminal, or the like may be provided in the region 73 for blocking visible light.
  • FIG. 3B is an example in which two display panels DP shown in FIG. 3A are arranged in the vertical direction (row direction), and is a perspective view of the display surface side of the display panel DP.
  • the two display panels DP are arranged so as to have overlapping regions. Specifically, a region 72 transmitting visible light included in the display panel DP [2, 1] is disposed so as to overlap on the pixel portion 21A (display surface side). Thereby, the area where the pixel portion 21A and the pixel portion 21B are arranged substantially without a seam can be set as the display area 29 of the display portion 20A.
  • the display panel DP preferably has flexibility.
  • the pair of substrates that constitute the display panel DP preferably has flexibility.
  • the display panel DP [2, 1] can be gently curved so that the height of the upper surface of the pixel section 21B matches the height of the upper surface of the pixel section 21A. Therefore, it is possible to make the heights of the display areas uniform except in the vicinity of the area where the display panel DP [1, 1] and the display panel DP [2, 1] overlap, and the display quality of the image displayed in the display area 29 Can be enhanced.
  • the thickness of the display panel DP is preferably thin in order to reduce a step between the two adjacent display panels DP.
  • the thickness of the display panel DP is preferably 1 mm or less, more preferably 300 ⁇ m or less, and still more preferably 100 ⁇ m or less.
  • an area where the display panel DP is adjacent that is, an area (joint area S in the drawing) of the joint of the display panel DP exists.
  • an area joint area S in the drawing
  • the characteristics of the transistor of the pixel 25 or the size of the capacitive element, the parasitic resistance or parasitic capacitance of the signal line SL, the drive capability of the signal line drive circuit 23, and the like may vary among the display panels DP. Therefore, when the image signal is supplied to each display panel DP, an error occurs in the display image for each display panel DP, and the image may be discontinuous in the area of the joint. Further, as shown in FIG. 3B, in the case where the pixel portion 21 of one display panel DP has a region overlapping with the region 72 which transmits visible light of the other display panel DP, the pixel portion 21 is formed in the joint region.
  • first image data SD1 [1,1] and first image data SD1 [2,1] obtained by dividing the first image data SD1 generated by the processing unit 33 as it is is displayed on each display panel DP.
  • the discontinuous image can be viewed in the area S, as shown in FIG. 4 (B).
  • the processing unit 40A of the display device 10A can correct the first image data SD1 so as to alleviate the discontinuity of the image at the joint of the two display panels DP.
  • the display unit 20A is configured using a plurality of display panels DP, it is possible to make visual disturbances in the joints of the display panels DP less visible.
  • the difference between the color tone of each display panel for example, the difference between the color tone of the image displayed on the display panel DP [1, 1] and the color tone of the image displayed on the display panel DP [2, 1] be able to.
  • the display quality can be improved.
  • FIGS. 5A and 5B are flowcharts illustrating a method of creating a correction filter used to reduce image discontinuity at the joint of the display panel DP.
  • the processing unit 40A supports the correction filter used to correct the image data corresponding to the image displayed on the display panel DP [1, 1] and the image displayed on the display panel DP [2, 1].
  • a correction filter used to correct image data to be corrected is created (step S01).
  • a correction filter used to correct image data corresponding to an image displayed on the display panel DP [1, 1] is referred to as a first correction filter.
  • a correction filter used to correct image data corresponding to an image displayed on the display panel DP [2, 1] is referred to as a second correction filter.
  • the first correction filter can be, for example, a correction filter for reducing display unevenness of an image displayed on the display panel DP [1, 1].
  • the second correction filter can be, for example, a correction filter for reducing display unevenness of an image displayed on the display panel DP [2, 1].
  • the details of the method of creating the first correction filter and the second correction filter will be described later, but when the first correction filter displays an image of a specific tone value, for example, on the display panel DP [1, 1] The variation in the brightness of light emitted from the pixel 25 between the pixels 25 can be reduced.
  • the second correction filter for example, reduces variation among the pixels 25 in the luminance of light emitted from the pixels 25 when an image of a specific gradation value is displayed on the display panel DP [2, 1]. Can be created as
  • an image of a specific tone value indicates, for example, an image in which the tone values of all pixels are equal.
  • an image having a specific gradation value is to be an image in which the gradation values of all the pixels 25 are equal, for example, it is preferable to set an image in which the gradation values of all the pixels 25 are intermediate gradations.
  • the gradation value that can be expressed by the pixel 25 is 0 to 255, it is preferable to set an image in which the gradation value of all the pixels 25 is 127 or near. For example, it is preferable that it is a full gray image.
  • the first correction filter has, for example, data representing a correction intensity for each pixel 25 of the luminance of the light emitted from the pixel 25 of the display panel DP [1, 1].
  • the second correction filter has, for example, data representing the correction intensity for each pixel 25 of the luminance of light emitted from the pixel 25 of the display panel DP [2, 1].
  • values such as correction strength represented by data of the correction filter are referred to as filter values.
  • the first correction filter can be said to have filter values equal in number to the number of pixels of the pixels 25 provided in the display panel DP [1, 1], for example.
  • the second correction filter can be said to have filter values equal in number to the number of pixels of the pixels 25 provided in the display panel DP [2, 1], for example.
  • the processing unit 40A corrects the image data corresponding to the image of the specific tone value using the first correction filter, and the image corresponding to the corrected image data is displayed on the display panel DP [1 , 1]. Further, the processing unit 40A corrects the image data corresponding to the image of the specific tone value using the second correction filter, and the image corresponding to the image data after the correction is displayed on the display panel DP [2,, Displayed in 1]. Thereafter, the brightness of light emitted from the pixels 25 provided in the boundary portion 28A and the boundary portion 28B is measured using a two-dimensional luminance meter or the like (step S02).
  • the brightness of light emitted from the pixel 25 provided in the boundary portion 28A is compared with the brightness of light emitted from the pixel 25 provided in the boundary portion 28B (step S03).
  • the average value of the luminances of light emitted from the pixels 25 provided in the boundary portion 28A is compared with the average value of the luminances of light emitted from the pixels 25 provided in the boundary portion 28B.
  • the processing unit 40A corrects the correction filter (step S04). For example, when an average value of luminances of light emitted from the pixels 25 provided in the boundary portion 28A is L A , and an average value of luminances of light emitted from the pixels 25 provided in the boundary portion 28B is L B The second correction filter is corrected such that the luminance of light emitted from the pixel 25 provided in the pixel unit 21B is multiplied by L A / L B.
  • the first correction filter is corrected such that the luminance of light emitted from the pixel 25 provided in the pixel unit 21A is multiplied by L B / L A.
  • the brightness of light emitted from the pixel 25 in the pixel portion 21A (L A + L B) / 2L A modifies the first correction filter as multiplying the pixels provided in the pixel portion 21B
  • the second correction filter is corrected so as to multiply the luminance of the light emitted from 25 by (L A + L B ) / 2L B.
  • a new correction filter is created.
  • the above is an example of the method of creating the correction filter used in the display device 10A.
  • the correction filter is corrected to correct the luminance of light emitted from all the pixels 25 provided in the pixel unit 21A and / or the pixel unit 21B based on the comparison result.
  • the correction filter may be modified to correct the luminance of the light emitted from the pixel 25 provided in the boundary portion 28A and / or the boundary portion 28B based on the comparison result.
  • the luminance of light emitted from all of the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B and a part of the pixels 25 provided in the other region is based on the above comparison result.
  • the correction filter may be corrected to perform the correction. For example, as shown in FIG. 3B, even if the correction filter is corrected so as to correct the luminance of light emitted from the pixel 25 provided in the area overlapping with the area 72 based on the comparison result. Good.
  • step S11 the processing unit 40A creates a first correction filter and a second correction filter (step S11).
  • a filter value corresponding to the pixel 25 provided in the boundary portion 28A, which the first correction filter has, and a filter value corresponding to the pixel 25 provided in the boundary portion 28B, which the second correction filter has (Step S12).
  • the average value of the filter values corresponding to the pixels 25 provided in the boundary portion 28A is compared with the average value of the filter values corresponding to the pixels 25 provided in the boundary portion 28B.
  • the correction filter is corrected based on the comparison result. For example, the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28A D A, the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28B if a D B, of the second The second correction filter is corrected such that the filter values of the correction filter are multiplied by D A / D B respectively.
  • the first correction filter is corrected so that, for example, the filter values of the first correction filter are multiplied by D B / D A , respectively.
  • the first correction filter is corrected so that the filter value of the first correction filter is multiplied by (D A + D B ) / 2D A , respectively, and the filter value of the second correction filter is changed to (D A Correct the second correction filter so as to multiply + D B ) / 2D B.
  • a new correction filter is created.
  • the correction filter is corrected to perform correction based on the comparison result for filter values corresponding to all the pixels 25 provided in the pixel unit 21A and / or the pixel unit 21B.
  • the correction filter may be modified to perform correction based on the comparison result for the filter value corresponding to the pixel 25 provided in the boundary portion 28A and / or the boundary portion 28B.
  • the correction filter may be modified to For example, as shown in FIG. 3B, the correction filter may be modified so that correction based on the comparison result is performed on the filter value corresponding to the pixel 25 provided in the area overlapping with the area 72.
  • the correction filter may be further modified to adjust the correction intensity for each pixel 25.
  • the correction intensity for the pixels 25 provided outside the boundary 28A may be weaker than the correction intensity for the pixels 25 provided in the boundary 28A.
  • the correction intensity for the pixel 25 provided outside the boundary portion 28B is weaker than the correction intensity for the pixel 25 provided in the boundary portion 28B. It is also good.
  • the processing unit 40A corrects, for example, the first image data SD1 corresponding to a signal input from the outside using the correction filter, and generates the second image data SD2. .
  • the dividing unit 45A converts the second image data SD2 into image data SD2 [1,1] corresponding to an image displayed on the display panel DP [1,1], and the display panel DP [2,1]. Is divided into image data SD2 [2, 1] corresponding to the image displayed on Thereafter, an image corresponding to the image data SD2 [1,1] is displayed on the pixel unit 21A, and an image corresponding to the image data SD2 [2,1] is displayed on the pixel unit 21B.
  • the above is an example of the operation method of the display device 10A.
  • the correction filter may be further corrected.
  • the correction filter may be modified so as to remove noise that is difficult to remove depending on the correction filter created by the method shown in FIGS. 5A and 5B.
  • the correction filter may be modified to make it difficult to visually recognize a defect such as a pixel drop.
  • the correction filter may be modified so that the same processing as the image processing that can be performed by the processing unit 33 can be performed.
  • the correction filter can be corrected, for example, so that the correction filter created by the method shown in FIGS. 5A and 5B has a function as a smoothing filter. Accordingly, the display quality of the display device of one embodiment of the present invention can be further enhanced.
  • the correction of the correction filter may be performed, for example, between step S01 and step S02 and between step S11 and step S12.
  • the processing unit 40A creates a new correction filter, when the correction filter is further corrected, the processing unit 33 can be omitted.
  • FIGS. 1 to 5 have two display panels DP aligned in the horizontal direction (column direction).
  • the display panel DP [1,1] and the display panel DP [1,1 Even when 2] is provided it is applicable.
  • the term “row” is “column”
  • the term “m line” is “n column”
  • the term “display panel DP [2,1]” is “display panel DP [1 , 2]] and rephrased accordingly.
  • FIGS. 6A, 6B, and 6C are schematic views showing an example of a method of creating a correction filter, and the operation proceeds in the order of (A), (B), and (C).
  • the display panel DP [1, 1], the display panel DP [2, 1], and the display panel DP [1, 1] are used as the display panel DP of 2 rows and 2 columns. 2] and a display panel DP [2, 2].
  • the boundary between the display panel DP [1,1] and the display panel DP [2,1] is referred to as a boundary 28A.
  • the boundary between the display panel DP [2, 1] and the display panel DP [1, 1] is referred to as a boundary 28B.
  • the boundary between the display panel DP [1, 2] and the display panel DP [2, 2] is referred to as a boundary 28C.
  • the boundary between the display panel DP [2, 2] and the display panel DP [1, 2] is referred to as a boundary 28D.
  • the boundary between the display panel DP [1, 1] and the display panel DP [1, 2] is referred to as a boundary 29A. Further, the boundary between the display panel DP [2, 1] and the display panel DP [2, 2] is referred to as a boundary 29B. Further, the boundary between the display panel DP [1, 2] and the display panel DP [1, 1] is referred to as a boundary 29C. Further, the boundary between the display panel DP [2, 2] and the display panel DP [2, 1] is referred to as a boundary 29D.
  • step S03 shown to FIG. 5 (A) the brightness
  • the filter value corresponding to the pixel 25 provided in the boundary portion 28C is compared with the filter value corresponding to the pixel 25 provided in the boundary portion 28D.
  • no image is formed at the joint between the display panel DP [1, 1] and the display panel DP [2, 1] and at the joint between the display panel DP [1, 2] and the display panel DP [2, 2]. Continuity is relaxed.
  • the luminance of light emitted from the pixels 25 provided in the boundary portion 28A and the boundary portion 28C is collectively compared with the luminance of light emitted from the pixels 25 provided in the boundary portion 28B and the boundary portion 28D. It is also good. That is, provided, for example pixels 25 provided in the boundary portion 28A, and the light emitted from the pixel 25 provided in the boundary portion 28C Average value L AC luminance pixels 25 provided in the boundary portion 28B, and the boundary portion 28D it may be compared with the average value L BD of the luminance of light emitted from the pixel 25 to be.
  • the filter values corresponding to the pixels 25 provided in the boundary portion 28A and the boundary portion 28C may be collectively compared with the filter values corresponding to the pixels 25 provided in the boundary portion 28B and the boundary portion 28D.
  • pixels to be provided for example pixels 25 provided in the boundary portion 28A, and the average value D AC filter values corresponding to the pixels 25 provided in the boundary portion 28C, the pixels 25 provided in the boundary portion 28B, and the boundary portion 28D It may be compared with the average value D BD of the filter values corresponding to 25.
  • step S03 shown in FIG. 5A the luminance of the light emitted from the pixel 25 provided in the boundary portion 29A and the luminance of the light emitted from the pixel 25 provided in the boundary portion 29C, Compare Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29A is compared with the filter value corresponding to the pixel 25 provided in the boundary portion 29C.
  • step S03 shown in FIG. 5A the luminance of the light emitted from the pixel 25 provided in the boundary portion 29B and the luminance of the light emitted from the pixel 25 provided in the boundary portion 29D, Compare Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29B is compared with the filter value corresponding to the pixel 25 provided in the boundary portion 29D.
  • the comparison between the luminance of light emitted from the pixel 25 provided in the boundary portion 29A and the luminance of light emitted from the pixel 25 provided in the boundary portion 29C may not necessarily be performed. Further, the comparison between the filter value corresponding to the pixel 25 provided in the boundary portion 29A and the filter value corresponding to the pixel 25 provided in the boundary portion 29C may not necessarily be performed.
  • FIGS. 7A, 7B, and 7C are schematic views showing an example of a method of creating a correction filter, and the operation proceeds in the order of (A), (B), and (C).
  • the display panel DP [1, 1], the display panel DP [2, 1], and the display panel DP [1, 1] are used as the display panel DP of 2 rows and 3 columns. 2], display panel DP [2, 2], display panel DP [1, 3], and display panel DP [2, 3].
  • the boundary between the display panel DP [1, 2] and the display panel DP [1, 3] is referred to as a boundary 29E.
  • the boundary between the display panel DP [2, 2] and the display panel DP [2, 3] is referred to as a boundary 29F.
  • boundary 29G the boundary between the display panel DP [1, 3] and the display panel DP [1, 2] is referred to as a boundary 29G.
  • boundary 29H the boundary between the display panel DP [2, 3] and the display panel DP [2, 2] is referred to as a boundary 29H.
  • the operations shown in 6 (A), (B) and (C) are performed.
  • the operation illustrated in FIG. 5A or 5B is performed on the display panel DP [1, 3] and the display panel DP [2, 3].
  • step S03 shown to FIG. 5 (A) the brightness
  • step S12 shown in FIG. 5B the filter value corresponding to the pixel 25 provided in the boundary 29E is compared with the filter value corresponding to the pixel 25 provided in the boundary 29G.
  • step S03 shown to FIG. 5 (A) the brightness
  • step S12 shown in FIG. 5B the filter value corresponding to the pixel 25 provided in the boundary 29F is compared with the filter value corresponding to the pixel 25 provided in the boundary 29H.
  • FIG. 8 (A) and (B) are circuit diagram showing a configuration example of the pixel 25 having a light emitting element.
  • FIG. 8B is a circuit diagram showing a configuration example of the pixel 25 having a liquid crystal element.
  • the pixel 25 illustrated in FIG. 8A includes a transistor 446, a capacitor 433, a transistor 251, a transistor 444, and a light emitting element 170.
  • One of the source and the drain of the transistor 446 is electrically connected to a signal line SL to which an image signal is supplied.
  • the gate of the transistor 446 is electrically connected to the scan line GL to which the selection signal is supplied.
  • the transistor 446 has a function of controlling writing of the image signal to the node 445.
  • One electrode of the capacitor 433 is electrically connected to the node 445, and the other electrode of the capacitor 433 is electrically connected to the node 447.
  • the other of the source and the drain of the transistor 446 is electrically connected to the node 445.
  • the capacitor 433 has a function as a storage capacitor which holds data written to the node 445.
  • One of the source or the drain of the transistor 251 is electrically connected to the potential supply line VL_a, and the other of the source or the drain of the transistor 251 is electrically connected to the node 447. Further, the gate of the transistor 251 is electrically connected to the node 445.
  • One of the source or the drain of the transistor 444 is electrically connected to the potential supply line V0, and the other of the source or the drain of the transistor 444 is electrically connected to the node 447. Further, the gate of the transistor 444 is electrically connected to the scan line GL.
  • One electrode of the light emitting element 170 is electrically connected to the potential supply line VL_b, and the other electrode of the light emitting element 170 is electrically connected to the node 447.
  • the power supply potential for example, a relatively high potential side potential or a low potential side potential can be used.
  • the power supply potential on the high potential side is referred to as a high power supply potential (also referred to as "VDD")
  • the power supply potential on the low potential side is referred to as a low power supply potential (also referred to as "VSS").
  • the ground potential can also be used as a high power supply potential or a low power supply potential.
  • the high power supply potential is the ground potential
  • the low power supply potential is a potential lower than the ground potential
  • the low power supply potential is the ground potential
  • the high power supply potential is a potential higher than the ground potential.
  • the high power supply potential VDD is supplied to one of the potential supply line VL_a or the potential supply line VL_b
  • the low power supply potential VSS is supplied to the other of the potential supply line VL_a or the potential supply line VL_b.
  • the pixels 25 in each row are sequentially selected by the scan line driver circuit 22, and the transistor 446 and the transistor 444 are turned on to write an image signal to the node 445.
  • the pixel 25 whose data is written to the node 445 is held by turning off the transistor 446 and the transistor 444. Further, the amount of current flowing between the source and the drain of the transistor 251 is controlled in accordance with the potential of the data written to the node 445, and the light emitting element 170 emits light with luminance according to the amount of current flowing. Images can be displayed by sequentially performing this on a row-by-row basis.
  • the pixel 25 illustrated in FIG. 8B includes a transistor 446, a capacitor 433, and a liquid crystal element 180.
  • the potential of one of the electrodes of the liquid crystal element 180 is appropriately set in accordance with the specification of the pixel 25.
  • the alignment state of the liquid crystal element 180 is set by data written to the node 445. Note that a common potential (common potential) may be applied to one of the electrodes of the liquid crystal element 180 included in each of the plurality of pixels 25. Further, different potentials may be applied to one electrode of the liquid crystal element 180 for each pixel 25 of each row.
  • one of the source and the drain of the transistor 446 is electrically connected to the signal line SL, and the other is electrically connected to the node 445.
  • the gate of the transistor 446 is electrically connected to the scan line GL.
  • the transistor 446 has a function of controlling writing of an image signal to the node 445.
  • One electrode of the capacitor 433 is electrically connected to a wiring (hereinafter, a capacitor line CL) to which a specific potential is supplied, and the other electrode of the capacitor 433 is electrically connected to the node 445. Further, the other electrode of the liquid crystal element 180 is electrically connected to the node 445. Note that the value of the potential of the capacitor line CL is appropriately set in accordance with the specification of the pixel 25.
  • the capacitor 433 has a function as a storage capacitor which holds data written to the node 445.
  • the scan line driver circuit 22 sequentially selects the pixels 25 in each row, turns on the transistor 446, and writes an image signal to the node 445.
  • the pixel 25 whose image signal is written to the node 445 is held as the transistor 446 is turned off. Images can be displayed by sequentially performing this on a row-by-row basis.
  • FIG. 9 is a block diagram showing a configuration example of the display device 10B.
  • the display device 10B has a function of generating image data using data received from the outside, and a function of displaying an image based on the image data.
  • the display device 10B includes a display unit 20B and a signal generation unit 30B. Similar to the display unit 20A, the display unit 20B includes a plurality of display panels DP. Similar to the signal generation unit 30A, the signal generation unit 30B has a function of generating image data using data received from the outside.
  • FIG. 9 shows an example in which the display panel DP is arranged in two rows and one column on the display unit 20B.
  • the display of the display panel DP can be controlled independently. Similar to the display unit 20A, the display unit 20B may arrange the display panels DP in three or more rows or in two or more columns.
  • the signal generation unit 30B includes a front end unit 31, a decoder 32, a processing unit 33, a reception unit 34, an interface 35, a control unit 36, a processing unit 40B, and a division unit 45B.
  • the processing unit 40B has a function of creating a correction filter.
  • the processing unit 40B may not have the function of correcting the first image data SD1 using the created correction filter. Then, the created correction filter is output as the correction filter FIL to the dividing unit 45B together with the first image data SD1 that is the image data before correction.
  • the dividing unit 45B has a function of dividing the first image data SD1 input from the processing unit 40A and the correction filter FIL.
  • the first image data SD1 and the correction filter FIL can be divided into the same number as the display panels DP provided in the display unit 20B.
  • the first image data SD1 is divided into 2 ⁇ 1 pieces (first image data SD1 [1,1] and first image data [2,1]) and output to the display unit 20B.
  • Ru Further, the correction filter FIL is divided into 2 ⁇ 1 pieces (the correction filter FIL [1, 1] and the correction filter FIL [2, 1]), and is output to the display unit 20B.
  • the first image data SD1 [1,1] and the correction filter FIL [1,1] are output to the display panel DP [1,1], and the first image data SD1 [2,1] and The correction filter FIL [2, 1] is output to the display panel DP [2, 1].
  • a pixel provided in the display panel DP has a memory circuit, and the memory circuit can hold the correction filter FIL. Thereby, the correction of the first image data SD1 can be performed inside the pixel without performing the correction in the processing unit 40B. Therefore, the configuration of the processing unit 40B can be simplified, and power consumption of the display device of one embodiment of the present invention can be reduced.
  • FIG. 10 shows a configuration example of the display panel DP [1, 1] and the display panel DP [2, 1] provided in the display device 10B having the configuration shown in FIG.
  • the display panel DP [1,1] having the configuration shown in FIG. 10 has the pixel portion 21A, the scanning line drive circuit 22A, and the signal line drive circuit 23A, similarly to the display panel DP [1,1] having the configuration shown in FIG. Have.
  • the display panel DP [2,1] having the configuration shown in FIG. 10 has the pixel portion 21B, the scanning line drive circuit 22B, and the signal line drive circuit 23B, similarly to the display panel DP [2,1] having the configuration shown in FIG. Have.
  • the pixel portion 21A and the pixel portion 21B each have a plurality of pixels 26.
  • FIG. 10 shows an example in which the pixel portion 21A and the pixel portion 21B each have a plurality of pixels 26 arranged in a matrix of m rows and n columns.
  • the pixel 26 is provided with a memory circuit MEM.
  • the memory circuit MEM has a function of holding the correction filter FIL.
  • the display panel DP [1,1] has m scanning lines GL1a, m scanning lines GL2a, and m scanning lines GL3a, and the display panel DP [2,1] includes m scanning lines There are GL1 b, m scanning lines GL2 b, and m scanning lines GL3 b.
  • the m scanning lines GL1a, scanning lines GL1b, scanning lines GL2a, scanning lines GL2b, scanning lines GL3a, and scanning lines GL3b extend in the row direction.
  • the m scanning lines GL1a are electrically connected to the memory circuits MEM provided in the pixels 26 aligned in the row direction in the pixel section 21A, and the m scanning lines GL1b are each in the row direction in the pixel section 21B.
  • the m scanning lines GL2a and the scanning line GL3a are electrically connected to the pixels 26 aligned in the row direction in the pixel unit 21A, and the m scanning lines GL2b and the scanning line GL3b are each connected to the pixel unit 21B.
  • scan line drive circuit 22A One end of scan line GL1a, scan line GL2a, and scan line GL3a is electrically connected to scan line drive circuit 22A, and one end of scan line GL1b, scan line GL2b, and scan line GL3b is connected to scan line drive circuit 22B. Electrically connected.
  • the scan line drive circuit 22A has a function of supplying selection signals to the scan line GL1a, the scan line GL2a, and the scan line GL3a
  • the scan line drive circuit 22B corresponds to the scan line GL1b, the scan line GL2b, and the scan line GL3b. It has a function of supplying a selection signal.
  • a scan line provided in a display device of one embodiment of the present invention such as the scan line GL1a and the scan line GL1b, may be referred to as a scan line GL1.
  • a scan line provided in a display device of one embodiment of the present invention such as the scan line GL2a and the scan line GL2b, may be referred to as a scan line GL2.
  • a scan line provided in a display device of one embodiment of the present invention, such as the scan line GL3a and the scan line GL3b may be referred to as a scan line GL3.
  • the display panel DP [1,1] has n signal lines SL1a and n signal lines SL2a
  • the display panel DP [2,1] has n signal lines SL1b and n signals. It has a line SL2b.
  • Each of the n signal lines SL1a, SL1b, SL2a, and SL2b extends in the column direction.
  • the n signal lines SL1a are electrically connected to the memory circuits MEM provided in the plurality of pixels 26 aligned in the column direction in the pixel unit 21A
  • the n signal lines SL1b are each connected in the pixel unit 21B. It is electrically connected to the memory circuit MEM provided in the plurality of pixels 26 aligned in the column direction.
  • Each of the n signal lines SL2a is electrically connected to the plurality of pixels 26 aligned in the column direction in the pixel section 21A
  • each of the n signal lines SL2b is a plurality of pixels aligned in the column direction in the pixel section 21B. It is electrically connected to 26.
  • the signal line SL1a and the signal line SL2a are electrically connected to the signal line drive circuit 23A, and the signal line SL1b and the signal line SL2b are electrically connected to the signal line drive circuit 23B.
  • the signal line drive circuit 23A has a function of supplying a signal corresponding to the correction filter to the signal line SL1a
  • the signal line drive circuit 23B has a function of supplying a signal corresponding to the correction filter to the signal line SL1b.
  • a signal corresponding to the correction filter is referred to as a correction filter signal.
  • the correction filter signal is supplied to the memory circuit MEM via the signal line SL1a or the signal line SL1b.
  • the signal line drive circuit 23A has a function of supplying an image signal to the signal line SL2a
  • the signal line drive circuit 23B has a function of supplying an image signal to the signal line SL2b.
  • the image signal is supplied to the pixel 26 via the signal line SL2a or the signal line SL2b.
  • signal lines provided in a display device of one embodiment of the present invention such as the signal line SL1a and the signal line SL1b, may be referred to as a signal line SL1.
  • a signal line provided in a display device of one embodiment of the present invention such as the signal line SL2a and the signal line SL2b, may be referred to as a signal line SL2.
  • the pixel 26 has a display element.
  • a display element provided in the pixel 26 for example, a light emitting element or a liquid crystal element can be used similarly to the display element provided in the pixel 25.
  • Each of the plurality of pixels 26 illustrated in FIG. 10 can have a function of emitting light of red (R), green (G), or blue (B) similarly to the pixel 25.
  • each of the plurality of pixels 26 illustrated in FIG. 10 can have a function of emitting light of red (R), green (G), blue (B), or white (W).
  • two display panels DP are arranged in the horizontal direction (column direction).
  • the display panel DP [1, 1] and the display panel DP [1, 2] Can be applied even if.
  • the term "display panel DP [2, 1]" is appropriately rephrased as "display panel DP [1, 2]”.
  • Pixel configuration example 2> Below, the structural example of the pixel 26 is demonstrated using FIG.
  • FIG. 11 is a circuit diagram showing a configuration example of the pixel 26.
  • a pixel 26 configured as shown in FIG. 11 includes a transistor 101, a transistor 102, a transistor 111, a transistor 112, a capacitor 103, a capacitor 113, and a light emitting element 104.
  • an organic EL element, an inorganic EL element, or the like can be used as the light emitting element 104.
  • One of the source and the drain of the transistor 101 is electrically connected to one electrode of the capacitor 113.
  • the other electrode of the capacitor 113 is electrically connected to one of the source and the drain of the transistor 111.
  • One of the source and the drain of the transistor 111 is electrically connected to the gate of the transistor 112.
  • the gate of the transistor 112 is electrically connected to one electrode of the capacitor 103.
  • the other electrode of the capacitor 103 is electrically connected to one of the source and the drain of the transistor 112.
  • One of the source or the drain of the transistor 112 is electrically connected to one of the source or the drain of the transistor 102.
  • the other of the source and the drain of the transistor 102 is electrically connected to one electrode of the light-emitting element 104.
  • a wiring to which the other electrode of the capacitor 113, one of the source or the drain of the transistor 111, the gate of the transistor 112, and one electrode of the capacitor 103 is connected is a node NM1.
  • a wiring to which the other of the source and the drain of the transistor 102 and one electrode of the light-emitting element 104 is connected is a node NA1.
  • the gate of the transistor 101 is electrically connected to the scan line GL2.
  • the gate of the transistor 102 is electrically connected to the scan line GL3.
  • the gate of the transistor 111 is electrically connected to the scan line GL1.
  • the other of the source and the drain of the transistor 101 is electrically connected to the signal line SL2.
  • the other of the source and the drain of the transistor 111 is electrically connected to the signal line SL1.
  • the other of the source and the drain of the transistor 112 is electrically connected to the potential supply line 128.
  • the other electrode of the light emitting element 104 is electrically connected to the common wiring 129.
  • the high power supply potential VDD can be supplied to the potential supply line 128.
  • any potential can be supplied to the common wiring 129.
  • the transistor 111 and the capacitor 113 form a memory circuit MEM.
  • the node NM1 is a storage node, and by turning on the transistor 111, the signal supplied to the signal line SL1 can be written to the node NM1.
  • the potential of the node NM1 can be held for a long time.
  • a transistor in which a metal oxide is used for a channel formation region hereinafter referred to as an OS transistor
  • an OS transistor can be used as the transistor.
  • the OS transistor may be applied not only to the transistor 111 but also to other transistors included in the pixel 26.
  • a transistor having Si in a channel formation region (hereinafter, a Si transistor) may be applied to the transistor 111.
  • both an OS transistor and a Si transistor may be used.
  • the Si transistor include a transistor having amorphous silicon, a transistor having crystalline silicon (typically, low temperature polysilicon), a transistor having single crystal silicon, and the like.
  • a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used.
  • an oxide semiconductor or the like containing indium can be used, for example, CAAC-OS or CAC-OS described later.
  • the CAAC-OS is suitable for a transistor or the like in which the atoms constituting the crystal are stable and reliability is important.
  • CAC-OS exhibits high mobility characteristics, it is suitable for a transistor or the like which performs high-speed driving.
  • An OS transistor exhibits extremely low off-current characteristics because of its large energy gap.
  • the OS transistor has characteristics different from Si transistors, such as no impact ionization, avalanche breakdown, short channel effect and the like, and can form a highly reliable circuit.
  • a silicon substrate can be used and a region where an Si transistor and an OS transistor overlap with each other can be formed. Therefore, the pixel density can be improved even if the number of transistors is relatively large.
  • the signal written to the node NM1 is capacitively coupled to the image signal supplied from the signal line SL2, and can be output to the node NA1.
  • the transistor 101 has a function of selecting a pixel.
  • the transistor 102 has a function as a switch which controls light emission of the light emitting element 104.
  • the transistor 112 when the potential of the signal written from the signal line SL1 to the node NM1 is larger than the threshold voltage (V th ) of the transistor 112, the transistor 112 is turned on before the image signal is written, and the light emitting element 104 emits light. It will Therefore, it is preferable that the transistor 102 be provided and the transistor 102 be turned on after the potential of the node NM1 is determined to cause the light emitting element 104 to emit light.
  • the correction filter signal corresponding to the correction filter FIL created by the processing unit 40B is stored in the node NM1, the correction filter signal can be added to the image signal. Thereby, the image signal can be corrected.
  • the correction filter signal since the correction filter signal may be attenuated by an element on the transmission path, it is preferable to generate in consideration of the attenuation.
  • correction filter signal (Vp) supplied to the signal line SL1 can be any signal of positive and negative, here, the case where a signal of positive potential is supplied will be described.
  • the transistor 101 When the potential of the scan line GL1 is low, the potential of the scan line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scan line GL3 is low at time T1, the transistor 101 is turned on. The potential of the other of the electrodes becomes low.
  • the operation is a reset operation for performing a later capacitive coupling operation. Before time T1, the light emitting operation of the light emitting element 104 in the previous frame is performed, but the potential of the node NM1 is changed by the reset operation and the current flowing to the light emitting element 104 is changed. It is preferable that the light emission of the light emitting element 104 be stopped.
  • the transistor 101 When the potential of the scan line GL1 is low, the potential of the scan line GL2 is high, the potential of the signal line SL1 is low, and the potential of the scan line GL3 is low at time T11, the transistor 101 is turned on.
  • the potential of the signal line SL2 is added to the potential of the node NM1 by the capacitive coupling of That is, the node NM1 has a potential (Vs + Vp) obtained by adding the correction filter signal (Vp) to the image signal (Vs).
  • the above is the correction operation of the image signal (Vs) and the operation of causing the light emitting element 104 to emit light.
  • the write operation of the correction filter signal (Vp) described above and the input operation of the image signal (Vs) may be performed continuously, after writing the correction filter signal (Vp) to all the pixels.
  • the input operation of the image signal (Vs) can also be performed.
  • FIG. 13 is a circuit diagram showing a configuration example of the pixel 26 different from FIG.
  • a pixel 26 configured as shown in FIG. 13 includes a transistor 121, a transistor 122, a transistor 123, a capacitor 124, a capacitor 125, and a liquid crystal element 126.
  • One of the source and the drain of the transistor 121 is electrically connected to one electrode of the capacitor 124.
  • the other electrode of the capacitor 124 is electrically connected to one of the source and the drain of the transistor 122.
  • One of the source or the drain of the transistor 122 is electrically connected to one of the source or the drain of the transistor 123.
  • the other of the source and the drain of the transistor 123 is electrically connected to one electrode of the capacitor 125.
  • One electrode of the capacitor 125 is electrically connected to one electrode of the liquid crystal element 126.
  • a wiring to which the other electrode of the capacitor 124, one of the source or the drain of the transistor 122, and one of the source or the drain of the transistor 123 is connected is a node NM2.
  • a wiring to which the other of the source and the drain of the transistor 123, one of the electrodes of the capacitor 125, and one of the electrodes of the liquid crystal element 126 are connected is a node NA2.
  • the gate of the transistor 121 is electrically connected to the scan line GL2.
  • the gate of the transistor 122 is electrically connected to the scan line GL1.
  • the gate of the transistor 123 is electrically connected to the scan line GL3.
  • the other of the source and the drain of the transistor 121 is electrically connected to the signal line SL2.
  • the other of the source and the drain of the transistor 122 is electrically connected to the signal line SL1.
  • the other electrode of the capacitor 125 is electrically connected to the common wiring 132.
  • the other electrode of the liquid crystal element 126 is electrically connected to the common wiring 133. Note that any potential can be supplied to the common wiring 132 and the common wiring 133.
  • the common wiring 132 and the common wiring 133 may be electrically connected.
  • the transistor 122 and the capacitor 124 form a memory circuit MEM.
  • the node NM2 is a memory node, and the transistor 122 is turned on and the transistor 123 is turned off, whereby the signal supplied to the signal line SL1 can be written to the node NM2.
  • the potential of the node NM2 can be held for a long time.
  • an OS transistor can be used for the transistor.
  • an OS transistor may be applied to another transistor included in the pixel.
  • a Si transistor may be applied to a transistor included in a pixel.
  • both an OS transistor and a Si transistor may be used.
  • a silicon substrate can be used, and a silicon transistor and an OS transistor can be formed to have an overlapping region. Therefore, the pixel density can be improved even if the number of transistors is relatively large.
  • the signal written to the node NM2 is capacitively coupled to the image signal supplied from the signal line SL2, and can be output to the node NA2.
  • the transistor 121 has a function of selecting a pixel and supplying an image signal.
  • the transistor 123 has a function as a switch which controls the operation of the liquid crystal element 126.
  • the liquid crystal element 126 may operate before the image signal is written. Therefore, it is preferable that the transistor 123 be provided and the liquid crystal element 126 be operated after the potential of the node NM2 is determined and the transistor 123 is turned on.
  • the correction filter signal corresponding to the correction filter FIL created by the processing unit 40B is stored in the node NM2, the correction filter signal can be added to the image signal. Thereby, the image signal can be corrected.
  • the correction filter signal since the correction filter signal may be attenuated by an element on the transmission path, it is preferable to generate in consideration of the attenuation.
  • the operation of the liquid crystal element 126 can be reset by setting the potential of the signal line SL1 to a reset potential (for example, a reference potential such as 0 V).
  • the transistor 121 When the potential of the scan line GL1 is low, the potential of the scan line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scan line GL3 is low at time T2, the transistor 121 is turned on. The potential of the other of the electrodes becomes low.
  • the operation is a reset operation for performing a later capacitive coupling operation.
  • the transistor 122 When the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T3, the transistor 122 is turned on and the signal line SL1 Potential (correction filter signal (Vp)) is written to the node NM2.
  • the potential of the signal line SL1 is fixed to a desired value (corrected filter signal (Vp)) from time T2 to time T3.
  • the correction filter signal (Vp) held in the node NM2 is preferably set in consideration of distribution to the node NA2.
  • the transistor 121 is turned on and the capacitor 124 is turned on.
  • the potential of the signal line SL2 is added to the potential of the node NA2 by the capacitive coupling of That is, the node NA2 has a potential (Vs + Vp) 'corresponding to the potential obtained by adding the correction filter signal (Vp) to the image signal (Vs). Note that the potential (Vs + Vp) 'includes the fluctuation of the potential due to the capacitive coupling of the capacitance between the interconnections.
  • the transistor 121 When the potential of the scan line GL1 is low, the potential of the scan line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scan line GL3 is low at time T13, the transistor 121 is turned off. Holds the potential (Vs + Vp) '. Then, a display operation is performed by the liquid crystal element 126 in accordance with the potential.
  • the above is the description of the correction operation of the image signal (Vs) and the display operation of the liquid crystal element 126.
  • the write operation of the correction filter signal (Vp) described above and the input operation of the image signal (Vs) may be performed continuously, after writing the correction filter signal (Vp) to all the pixels.
  • the input operation of the image signal (Vs) can also be performed.
  • the display operation by the liquid crystal element 126 may be performed by supplying an image signal to the signal line SL1 and controlling conduction and non-conduction of the transistor 122 and the transistor 123. At this time, the transistor 121 may be always off.
  • step S01 shown in FIG. 5A and step S11 shown in FIG. 5B that is, an example of a method of creating a correction filter corresponding to one display panel DP will be described with reference to FIG. It demonstrates using the flowchart shown.
  • a first correction filter which is a correction filter corresponding to the display panel DP [1, 1]
  • a second correction filter which is a correction filter corresponding to the display panel DP [2, 1] are shown in FIG. It can be created by the method.
  • the correction filter created by the method shown in FIG. 15 has a function of correcting image data so as to reduce display unevenness of an image displayed on the display panel DP, for example.
  • the brightness of light emitted from the pixels provided in the display panel DP is measured for a plurality of gradation values.
  • the luminance of light is measured using a luminance meter or the like (step S21).
  • the processing unit 40A or the processing unit 40B acquires data of the correspondence between the luminance of the light emitted from the pixel and the gradation value (step S22).
  • FIGS. 16A-1 and 16B-1 are graphs showing the relationship between the luminance of light emitted from a pixel and the gradation value, and the plots shown in FIG. Is the luminance measured in step S21.
  • the solid line shown in FIG. 16 (B-1) represents the brightness of the light emitted from the pixel and the floor, which are calculated in step S22 based on the measurement result shown in FIG. 16 (A-1). There is a correspondence relationship with the price adjustment.
  • the luminance of the light emitted from the pixels may be measured for all the gradation values.
  • the luminance of the light emitted from the pixel may be measured for all of the gradation values 0 to 255.
  • the brightness of light emitted from a pixel may be measured for some gradation values. Even when luminance is measured for some gradation values, it is preferable to measure luminance for white, black, and middle gradation in order to enhance the accuracy of the correspondence data.
  • the luminance of the light emitted from the pixel may be measured for the gradation value 0, the gradation value 127, and the gradation value 255. preferable.
  • the data of the correspondence shown in FIG. 16 (B-1) can be obtained, for example, by regression analysis based on the measurement result shown in FIG. 16 (A-1). For example, it can acquire by curve regression analysis. Alternatively, it can be obtained, for example, using a neural network, such as a fully coupled neural network. Even if the number of measurement points shown in FIG. 16 (A-1) is small, accuracy of the data of the correspondence relationship can be increased by acquiring data of the correspondence relationship shown in FIG. 16 (B-1) using a neural network. it can.
  • FIG. 16A-2 shows measured values when the luminance of light emitted from the pixel is measured for each of red (R), green (G), and blue (B) in step S21.
  • 16 (B-2) is calculated for each of red (R), green (G), and blue (B) based on the measurement results shown in FIG. 16 (A-2) in step S22. It is the correspondence of the luminance of the light emitted from the pixel and the gradation value.
  • high accuracy can be achieved by acquiring the data of the correspondence between the luminance and the gradation value for each color of light emitted from the pixel.
  • a correction filter capable of correction can be created.
  • FIGS. 17A, 17B, and 17C show an example of the position of a pixel for measuring the luminance of the emitted light in step S21.
  • the pixel unit 21 indicates a pixel unit provided in one display panel DP, such as the pixel unit 21A and the pixel unit 21B.
  • the luminance of light emitted from the pixels included in the area 27 shown in FIGS. 17A, 17B, and 17C is measured in step S21.
  • the luminance of light emitted from the pixels may be measured so as to include the central portion of the pixel portion 21 as shown in FIG.
  • measurement may be performed at a plurality of locations of the pixel unit 21, for example, four locations on the upper left, upper right, lower left, and lower right.
  • the entire pixel portion 21 may be measured.
  • the total area of the region 27 is small, the brightness of the light emitted from the pixel can be measured by a simple method.
  • the total area of the region 27 is large, it is possible to create a correction filter capable of highly accurate correction.
  • step S22 an image having a specific gradation value is displayed on the pixel unit 21, and luminance data is acquired by measuring the luminance of light emitted from the pixel using a two-dimensional luminance meter or the like (see FIG. Step S23).
  • luminance data is acquired by measuring the luminance of light emitted from all the pixels provided in the pixel unit 21 using a two-dimensional luminance meter or the like.
  • step S23 luminance data is acquired in order to acquire information on variations in luminance of light emitted from the pixels.
  • a correction filter for correcting the variation in luminance of light emitted from the pixels is processed. It prepares by the department (step S24). For example, if the luminance at a gradation value 127 of a certain pixel that can be read from luminance data is 100 and the correspondence data indicates that the luminance at a gradation value 127 is 120, the luminance of a certain pixel is 1.2 times Create a correction filter to
  • step S22 for example, data of correspondence with luminance is acquired for all gradation values. Therefore, by displaying two or more types of images in step S23 and acquiring luminance data for each image, it is possible to create a correction filter capable of higher accuracy correction. For example, when the gradation value that can be expressed by a pixel is 0 to 255, in step S23, an image in which the gradation of all pixels is 0, an image in which the gradation of all pixels is 127, and all pixels Luminance data can be acquired for each of the images whose gray level is 255. In order to simplify the measurement of the brightness of light in step S23, the number of types of brightness data acquired in step S23 may be smaller than the number of gradation values obtained by measuring the brightness of light in step S21. preferable.
  • the image data is input to the processing unit 40A or 40B, and the input image data is corrected using the correction filter created in step S24 (step S25).
  • the image data input to the processing unit 40A or the processing unit 40B be, for example, image data corresponding to an image of a specific gradation value.
  • Step S25 an image corresponding to the image data corrected in step S25 is displayed on the pixel unit 21, and the luminance of light emitted from the pixel is measured using a two-dimensional luminance meter or the like as in step S23.
  • Step S26 the luminance corresponding to the image after correction measured in step S26 is compared with the luminance calculated from the data of the correspondence obtained in step S22 for each pixel. For example, when the difference between the luminance corresponding to the image after correction and the luminance calculated from the data of the correspondence obtained in step S22 is less than a predetermined value, it is assumed that the correction accuracy is equal to or higher than the specified value. Finish creating the correction filter.
  • Step S24 and S27 are performed again to create a correction filter again (step S27).
  • the above is an example of a method of creating the correction filter used in the display device 10A and the display device 10B. Note that steps S26 and S27 may be omitted.
  • step S23 When two or more types of images are displayed in step S23, the brightness of light emitted from the pixels is measured in step S26, and the correction accuracy of each image is determined in step S27. preferable.
  • step S01 shown in FIG. 5A and step S11 shown in FIG. 5B that is, an example of a method of creating a correction filter corresponding to one display panel DP.
  • This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
  • Second Embodiment a structural example of a display device using a liquid crystal element and a structural example of a display device using an EL element will be described. In the present embodiment, descriptions of the elements, operations, and functions of the display device described in Embodiment 1 will be omitted.
  • FIGS. 18A and 18B are cross-sectional views illustrating configuration examples of a display device of one embodiment of the present invention.
  • the display devices illustrated in FIGS. 18A and 18B each include an electrode 4015, and the electrode 4015 is electrically connected to a terminal included in the FPC 4018 through an anisotropic conductive layer 4019.
  • the electrode 4015 is electrically connected to the wiring 4014 in an opening formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110.
  • the electrode 4015 is formed of the same conductive layer as the first electrode layer 4030, and the wiring 4014 is formed of the same conductive layer as the source electrode and the drain electrode of the transistor 4010 and the transistor 4011.
  • the display portion 215 and the scan line driver circuit 221 provided over the first substrate 4001 have a plurality of transistors, and are included in the display portion 215 in FIGS. 18A and 18B.
  • the transistor 4010 and the transistor 4011 included in the scan line driver circuit 221 are illustrated.
  • bottom-gate transistors are illustrated as the transistors 4010 and 4011 in FIGS. 18A and 18B, top-gate transistors may be used.
  • the insulating layer 4112 is provided over the transistor 4010 and the transistor 4011.
  • the partition 4510 is formed over the insulating layer 4112.
  • the transistor 4010 and the transistor 4011 are provided over the insulating layer 4102.
  • the transistor 4010 and the transistor 4011 each have an electrode 4017 formed over the insulating layer 4111.
  • the electrode 4017 can function as a back gate electrode.
  • the display devices illustrated in FIGS. 18A and 18B each include a capacitor 4020.
  • the capacitor 4020 includes an electrode 4021 formed in the same step as the gate electrode of the transistor 4010, and an electrode formed in the same step as the source electrode and the drain electrode. Each electrode has a region overlapping with the insulating layer 4103 interposed therebetween.
  • the capacitance of a capacitor provided in a pixel portion of a display device is set so as to hold charge for a predetermined period, in consideration of leakage current or the like of a transistor provided in the pixel portion.
  • the capacitance of the capacitor may be set in consideration of the off current of the transistor and the like.
  • FIG. 18A illustrates an example of a liquid crystal display device using a liquid crystal element as a display element.
  • a liquid crystal element 4013 which is a display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008.
  • an insulating layer 4032 and an insulating layer 4033 which function as alignment films are provided so as to sandwich the liquid crystal layer 4008.
  • the second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 overlap with each other through the liquid crystal layer 4008.
  • the spacer 4035 is a columnar spacer obtained by selectively etching the insulating layer, and is provided to control a distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. ing. A spherical spacer may be used.
  • an optical member such as a black matrix (light shielding layer), a colored layer (color filter), a polarization member, a retardation member, an anti-reflection member, etc.
  • an optical member such as a black matrix (light shielding layer), a colored layer (color filter), a polarization member, a retardation member, an anti-reflection member, etc.
  • circularly polarized light by a polarizing substrate and a retardation substrate may be used.
  • a backlight, a sidelight, or the like may be used as a light source.
  • a light shielding layer 4132, a coloring layer 4131, and an insulating layer 4133 are provided between the second substrate 4006 and the second electrode layer 4031.
  • the material that can be used as the light shielding layer examples include carbon black, titanium black, metals, metal oxides, and composite oxides containing a solid solution of a plurality of metal oxides.
  • the light shielding layer may be a film containing a resin material or may be a thin film of an inorganic material such as a metal.
  • a stacked film of films including a material of a colored layer can also be used for the light shielding layer.
  • a layered structure of a film containing a material used for a colored layer transmitting light of a certain color and a film containing a material used for a colored layer transmitting light of another color can be used. It is preferable to use a common material for the colored layer and the light shielding layer, as it is possible to share the device and simplify the process.
  • Examples of materials that can be used for the colored layer include metal materials, resin materials, resin materials containing pigments or dyes, and the like.
  • the light shielding layer and the colored layer may be formed in the same manner as the formation method of each layer described above. For example, it may be performed by an inkjet method or the like.
  • the display devices illustrated in FIGS. 18A and 18B each include an insulating layer 4111 and an insulating layer 4104.
  • As the insulating layer 4111 and the insulating layer 4104 an insulating layer which hardly transmits an impurity element is used. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, entry of impurities from the outside can be prevented.
  • a light-emitting element (EL element) using electroluminescence can be applied as a display element included in a display device.
  • the EL element has a layer containing a light-emitting compound (also referred to as “EL layer”) between a pair of electrodes.
  • a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the light emitting compound contained in the EL layer emits light.
  • EL elements are distinguished depending on whether the light emitting material is an organic compound or an inorganic compound, and in general, the former is called an organic EL element and the latter is called an inorganic EL element.
  • the organic EL element In the organic EL element, electrons are injected from one electrode and holes are injected from the other electrode to the EL layer by applying a voltage. Then, the carriers (electrons and holes) recombine to form an excited state in the light emitting organic compound, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light emitting element is referred to as a current excitation light emitting element.
  • the EL layer may be formed of a substance having a high hole injecting property, a substance having a high hole transporting property, a hole blocking material, a substance having a high electron transporting property, a substance having a high electron injecting property, or a bipolar other than a light emitting compound. It may have a polar substance (a substance having a high electron transporting property and a hole transporting property) or the like.
  • the EL layer can be formed by an evaporation method (including a vacuum evaporation method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • Inorganic EL elements are classified into a dispersion-type inorganic EL element and a thin-film-type inorganic EL element according to the element configuration.
  • the dispersion-type inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light emission mechanism is donor-acceptor recombination light emission utilizing a donor level and an acceptor level.
  • the thin film type inorganic EL element has a structure in which the light emitting layer is sandwiched by dielectric layers and further sandwiched by electrodes, and the light emission mechanism is localized light emission utilizing inner shell electron transition of metal ions.
  • an organic EL element is described as a light emitting element.
  • At least one of the pair of electrodes may be transparent. Then, a transistor and a light emitting element are formed over the substrate, and top emission (top emission) structure in which light emission is extracted from the surface opposite to the substrate, or bottom emission (bottom emission) structure in which light emission is extracted from the surface of the substrate.
  • top emission (top emission) structure in which light emission is extracted from the surface opposite to the substrate
  • bottom emission (bottom emission) structure in which light emission is extracted from the surface of the substrate
  • FIG. 18B illustrates an example of a light-emitting display device (also referred to as “EL display device”) using a light-emitting element as a display element.
  • a light emitting element 4513 which is a display element is electrically connected to a transistor 4010 provided in the display portion 215.
  • the structure of the light-emitting element 4513 is a stacked structure of the first electrode layer 4030, the light-emitting layer 4511, and the second electrode layer 4031, but is not limited to this structure.
  • the structure of the light emitting element 4513 can be changed as appropriate in accordance with the direction of light extracted from the light emitting element 4513 or the like.
  • the partition 4510 is formed using an organic insulating material or an inorganic insulating material.
  • the light emitting layer 4511 may be either a single layer or a plurality of layers stacked.
  • the emission color of the light-emitting element 4513 can be white, red, green, blue, cyan, magenta, yellow, or the like depending on the material of the light-emitting layer 4511.
  • a method of realizing color display there are a method of combining a light emitting element 4513 of white light emitting color and a coloring layer, and a method of providing a light emitting element 4513 of different light emitting color for each pixel.
  • the former method is more productive than the latter method.
  • the productivity is lower than the former method.
  • luminescent color having higher color purity can be obtained than in the former method.
  • the color purity can be further enhanced by providing the light emitting element 4513 with a microcavity structure.
  • the light emitting layer 4511 may have an inorganic compound such as a quantum dot.
  • a quantum dot for the light-emitting layer, it can also function as a light-emitting material.
  • a protective layer may be formed over the second electrode layer 4031 and the partition 4510 so that oxygen, hydrogen, moisture, carbon dioxide, and the like do not enter the light-emitting element 4513.
  • the protective layer silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (Diamond Like Carbon), or the like can be formed.
  • a filler 4514 is provided in a space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005 and sealed.
  • a protective film such as a laminated film or an ultraviolet curable resin film
  • a cover material which has high airtightness and low degassing so as not to be exposed to the outside air.
  • an ultraviolet curable resin or a thermosetting resin in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin , PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) or the like can be used.
  • the filler 4514 may contain a desiccant.
  • sealant 4005 a glass material such as a glass frit, a cured resin such as a two-component mixed resin that cures at normal temperature, a photocurable resin, or a thermosetting resin can be used.
  • the sealant 4005 may contain a desiccant.
  • an optical film such as a polarizing plate or a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate ( ⁇ / 4 plate, ⁇ / 2 plate), a color filter, etc. on the emission surface of the light emitting element You may provide suitably.
  • an antireflective film may be provided on the polarizing plate or the circularly polarizing plate. For example, anti-glare processing can be performed to diffuse reflected light and reduce reflection due to the unevenness of the surface.
  • light with high color purity can be extracted by forming the light-emitting element with a microcavity structure.
  • reflection can be reduced, and the visibility of a display image can be enhanced.
  • first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, a counter electrode layer, and the like) which apply voltage to the display element, the direction of light to be extracted, a location where the electrode layer is provided, Translucency and reflectivity may be selected depending on the pattern structure of the electrode layer.
  • the first electrode layer 4030 and the second electrode layer 403 are indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium containing titanium oxide
  • a light-transmitting conductive material such as tin oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added can be used.
  • the first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta) Metals such as chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or alloys thereof, or It can be formed using one or more of metal nitrides.
  • the first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive high molecule (also referred to as a conductive polymer).
  • a conductive high molecule also referred to as a conductive polymer.
  • a so-called ⁇ electron conjugated conductive high molecule can be used.
  • polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer of two or more of aniline, pyrrole and thiophene or a derivative thereof can be given.
  • a protective circuit for protecting the driver circuit is preferably provided.
  • the protection circuit is preferably configured using a non-linear element.
  • This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
  • the display device of one embodiment of the present invention can be manufactured using various types of transistors such as a bottom gate transistor and a top gate transistor. Therefore, according to the existing manufacturing line, the material of the semiconductor layer to be used and the transistor structure can be easily replaced.
  • FIG. 19A1 is a cross-sectional view in the channel length direction of a channel protective transistor 810 which is a kind of bottom gate transistor.
  • the transistor 810 is formed over a substrate 771.
  • the transistor 810 includes an electrode 746 over the substrate 771 with the insulating layer 772 interposed therebetween.
  • the semiconductor layer 742 is provided over the electrode 746 with the insulating layer 726 interposed therebetween.
  • the electrode 746 can function as a gate electrode.
  • the insulating layer 726 can function as a gate insulating layer.
  • the insulating layer 741 is provided over the channel formation region of the semiconductor layer 742.
  • an electrode 744 a and an electrode 744 b are provided over the insulating layer 726 in contact with part of the semiconductor layer 742.
  • the electrode 744a can function as one of a source electrode and a drain electrode.
  • the electrode 744 b can function as the other of the source electrode and the drain electrode.
  • a portion of the electrode 744 a and a portion of the electrode 744 b are formed over the insulating layer 741.
  • the insulating layer 741 can function as a channel protective layer. By providing the insulating layer 741 over the channel formation region, exposure of the semiconductor layer 742 which is generated at the time of formation of the electrode 744a and the electrode 744b can be prevented. Thus, the channel formation region of the semiconductor layer 742 can be prevented from being etched when the electrode 744a and the electrode 744b are formed. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be realized.
  • the transistor 810 includes the insulating layer 728 over the electrode 744a, the electrode 744b, and the insulating layer 741, and the insulating layer 729 over the insulating layer 728.
  • a part of the semiconductor layer 742 can be deprived of oxygen and oxygen deficiency can be generated in at least a portion of the electrode 744 a and the electrode 744 b in contact with the semiconductor layer 742.
  • the region of the semiconductor layer 742 in which oxygen vacancies occur has an increased carrier concentration, and the region becomes n-type to become an n-type region (n + layer). Thus, the region can function as a source region or a drain region.
  • tungsten, titanium, or the like can be given as an example of a material that can deprive the semiconductor layer 742 of oxygen and cause oxygen vacancies.
  • the contact resistance between the electrode 744 a and the electrode 744 b and the semiconductor layer 742 can be reduced. Accordingly, electrical characteristics of the transistor, such as field effect mobility and threshold voltage, can be improved.
  • a layer functioning as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744 a and between the semiconductor layer 742 and the electrode 744 b.
  • a layer functioning as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.
  • the insulating layer 729 is preferably formed using a material having a function of preventing or reducing diffusion of impurities into the transistor from the outside. Note that the insulating layer 729 can be omitted as needed.
  • a transistor 811 illustrated in FIG. 19A2 is different from the transistor 810 in that an electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
  • the electrode 723 can be formed by the same material and method as the electrode 746.
  • the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode are disposed so as to sandwich the channel formation region of the semiconductor layer.
  • the back gate electrode can function similarly to the gate electrode.
  • the potential of the back gate electrode may be the same as the potential of the gate electrode, or may be the ground potential (GND potential) or any potential.
  • the threshold voltage of the transistor can be changed by changing the potential of the back gate electrode independently without interlocking with the gate electrode.
  • the electrode 746 and the electrode 723 can both function as a gate electrode.
  • the insulating layer 726, the insulating layer 728, and the insulating layer 729 can each function as a gate insulating layer.
  • the electrode 723 may be provided between the insulating layer 728 and the insulating layer 729.
  • the other is referred to as a “back gate electrode”.
  • the electrode 746 when the electrode 723 is referred to as a “gate electrode”, the electrode 746 is referred to as a “back gate electrode”.
  • the transistor 811 can be considered as a kind of top gate transistor.
  • one of the electrode 746 and the electrode 723 may be referred to as “first gate electrode”, and the other may be referred to as “second gate electrode”.
  • the region where carriers flow in the semiconductor layer 742 becomes larger in the film thickness direction.
  • the amount of carrier movement increases.
  • the on current of the transistor 811 is increased, and the field effect mobility is increased.
  • the transistor 811 is a transistor having a large on current with respect to the occupied area. That is, the area occupied by the transistor 811 can be reduced with respect to the on current required. According to one embodiment of the present invention, the area occupied by the transistor can be reduced. Thus, according to one embodiment of the present invention, a semiconductor device with a high degree of integration can be realized.
  • the gate electrode and the back gate electrode are formed of a conductive layer, they have a function to prevent an electric field generated outside the transistor from acting on the semiconductor layer in which a channel is formed (in particular, an electric field shielding function against static electricity or the like). .
  • the electric field shielding function can be enhanced by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode.
  • the back gate electrode is formed using a light-shielding conductive film
  • light can be prevented from entering the semiconductor layer from the back gate electrode side. Accordingly, light deterioration of the semiconductor layer can be prevented, and deterioration of the electrical characteristics such as a shift in threshold voltage of the transistor can be prevented.
  • a highly reliable transistor can be realized.
  • a highly reliable semiconductor device can be realized.
  • FIG. 19B1 is a cross-sectional view in the channel length direction of a channel protective transistor 820 having a different structure from that in FIG. 19A1.
  • the transistor 820 has substantially the same structure as the transistor 810, except that the insulating layer 741 covers an end portion of the semiconductor layer 742.
  • the semiconductor layer 742 and the electrode 744 a are electrically connected to each other in an opening formed by selectively removing part of the insulating layer 741 which has a region overlapping with the semiconductor layer 742.
  • the semiconductor layer 742 and the electrode 744 b are electrically connected to each other in another opening which is formed by selectively removing part of the insulating layer 741 which has a region overlapping with the semiconductor layer 742.
  • the region of the insulating layer 741 overlapping with the channel formation region can function as a channel protective layer.
  • the transistor 821 illustrated in FIG. 19B2 is different from the transistor 820 in that the electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
  • the insulating layer 741 can prevent the semiconductor layer 742 from being exposed at the time of formation of the electrodes 744a and 744b. Thus, thinning of the semiconductor layer 742 can be prevented at the time of formation of the electrode 744a and the electrode 744b.
  • the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 are longer than those in the transistors 810 and 811.
  • parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced.
  • parasitic capacitance generated between the electrode 744 b and the electrode 746 can be reduced.
  • a transistor with favorable electrical characteristics can be realized.
  • FIG. 19C1 is a cross-sectional view in the channel length direction of a channel-etched transistor 825 which is one of bottom-gate transistors.
  • the transistor 825 forms the electrode 744a and the electrode 744b without providing the insulating layer 741. Therefore, part of the semiconductor layer 742 exposed when the electrode 744a and the electrode 744b are formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be improved.
  • a transistor 826 illustrated in FIG. 19C2 is different from the transistor 825 in that the electrode 723 which can function as a back gate electrode is provided over the insulating layer 729.
  • 20A1 to 20C2 are cross-sectional views in the channel width direction of the transistor 810, the transistor 811, the transistor 820, the transistor 821, the transistor 825, and the transistor 826, respectively.
  • the gate electrode and the back gate electrode are connected, and the gate electrode and the back gate electrode have the same potential.
  • the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.
  • the length in the channel width direction of each of the gate electrode and the back gate electrode is longer than the length in the channel width direction of the semiconductor layer 742, and the entire channel width direction of the semiconductor layer 742 is the insulating layer 726, the insulating layer 741, the insulating layer 728 and the insulating layer 729 are interposed between the gate electrode and the back gate electrode.
  • the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric field of the gate electrode and the back gate electrode.
  • a device structure of a transistor that electrically surrounds a semiconductor layer 742 in which a channel formation region is formed by an electric field of a gate electrode and a back gate electrode It can be called structure.
  • an electric field for inducing a channel can be effectively applied to the semiconductor layer 742 by one or both of the gate electrode and the back gate electrode, so that the current drive capability of the transistor is improved. It is possible to obtain high on-current characteristics. In addition, since the on current can be increased, the transistor can be miniaturized. In addition, with the S-channel structure, mechanical strength of the transistor can be increased.
  • a transistor 842 illustrated in FIG. 21A1 is one of top-gate transistors.
  • the transistor 842 forms the electrode 744a and the electrode 744b after forming the insulating layer 729.
  • the electrode 744a and the electrode 744b are electrically connected to the semiconductor layer 742 in an opening formed in the insulating layer 728 and the insulating layer 729.
  • a portion of the insulating layer 726 which does not overlap with the electrode 746 is removed, and an impurity is introduced into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 as a mask.
  • the impurity region can be formed in a self alignment manner (self alignment).
  • the transistor 842 has a region where the insulating layer 726 extends beyond the end of the electrode 746.
  • the impurity concentration of the region into which the impurity is introduced through the insulating layer 726 of the semiconductor layer 742 is smaller than that of the region into which the impurity is introduced without through the insulating layer 726.
  • a lightly doped drain (LDD) region is formed in a region which does not overlap with the electrode 746.
  • a transistor 843 illustrated in FIG. 21A2 is different from the transistor 842 in that the electrode 723 is provided.
  • the transistor 843 has an electrode 723 formed over the substrate 771.
  • the electrode 723 has a region overlapping with the semiconductor layer 742 with the insulating layer 772 interposed therebetween.
  • the electrode 723 can function as a back gate electrode.
  • the transistor 844 illustrated in FIG. 21B1 and the transistor 845 illustrated in FIG. 21B2 all the insulating layer 726 in a region which does not overlap with the electrode 746 may be removed.
  • the insulating layer 726 may be left.
  • transistors 842 to 847 after forming the electrode 746, an impurity is introduced into the semiconductor layer 742 using the electrode 746 as a mask, so that the impurity region can be formed in the semiconductor layer 742 in a self-aligned manner.
  • a transistor with favorable electrical characteristics can be realized.
  • a semiconductor device with a high degree of integration can be realized.
  • 22A1 to 22C2 are cross-sectional views in the channel width direction of the transistors 842 to 847, respectively.
  • the transistor 843, the transistor 845, and the transistor 847 each have the S-channel structure described above. However, without limitation thereto, the transistor 843, the transistor 845, and the transistor 847 may not have an S-channel structure.
  • This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
  • Embodiment 4 In this embodiment, a detailed configuration example of the OS transistor will be described.
  • the semiconductor layer included in the OS transistor is, for example, an In-M-Zn-based oxide containing indium, zinc and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium).
  • the film can be represented by
  • the oxide semiconductor forming the semiconductor layer is an In-M-Zn-based oxide
  • the atomic ratio of metal elements in a sputtering target used for forming the In-M-Zn oxide is In ⁇ M, Zn It is preferable to satisfy ⁇ M.
  • the atomic ratio of the semiconductor layer to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal element contained in the sputtering target.
  • an oxide semiconductor with low carrier density is used.
  • the semiconductor layer has a carrier density of 1 ⁇ 10 17 / cm 3 or less, preferably 1 ⁇ 10 15 / cm 3 or less, more preferably 1 ⁇ 10 13 / cm 3 or less, more preferably 1 ⁇ 10 11 / cm 3 3 or less, more preferably less than 1 ⁇ 10 10 / cm 3, it is possible to use an oxide semiconductor of 1 ⁇ 10 -9 / cm 3 or more carrier density.
  • Such an oxide semiconductor is referred to as a high purity intrinsic or substantially high purity intrinsic oxide semiconductor.
  • the oxide semiconductor has low defect state density and can be said to be an oxide semiconductor having stable characteristics.
  • composition is not limited to those described above, and a composition having an appropriate composition may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, and the like) of the required transistor.
  • semiconductor characteristics and electrical characteristics field effect mobility, threshold voltage, and the like
  • the concentration of silicon or carbon (the concentration obtained by secondary ion mass spectrometry) in the semiconductor layer is 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the concentration of alkali metal or alkaline earth metal (concentration obtained by secondary ion mass spectrometry) in the semiconductor layer is 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less make it
  • the nitrogen concentration (the concentration obtained by secondary ion mass spectrometry) in the semiconductor layer is preferably 5 ⁇ 10 18 atoms / cm 3 or less.
  • the semiconductor layer may have, for example, a non-single crystal structure.
  • the non-single crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) having a crystal aligned in the c-axis, a polycrystalline structure, a microcrystalline structure, or an amorphous structure.
  • CAAC-OS C-Axis Aligned Crystalline Oxide Semiconductor
  • the amorphous structure has the highest density of defect states
  • CAAC-OS has the lowest density of defect states.
  • the oxide semiconductor film having an amorphous structure has, for example, disordered atomic arrangement and no crystalline component.
  • the oxide film having an amorphous structure has, for example, a completely amorphous structure and no crystal part.
  • the semiconductor layer may be a mixed film having two or more of a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, a region having a CAAC-OS, and a region having a single crystal structure.
  • the mixed film may have, for example, a single layer structure or a laminated structure including any two or more of the above-described regions.
  • CAC Cloud-Aligned Composite
  • the CAC-OS is, for example, a configuration of a material in which an element included in an oxide semiconductor is unevenly distributed in a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or in the vicinity thereof.
  • an element included in an oxide semiconductor is unevenly distributed in a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or in the vicinity thereof.
  • the oxide semiconductor one or more metal elements are unevenly distributed, and a region including the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less
  • the state in which they are mixed is also called a mosaic or patch.
  • the oxide semiconductor preferably contains at least indium.
  • One or more selected from may be included.
  • CAC-OS in the In-Ga-Zn oxide is an indium oxide (hereinafter referred to as InO).
  • InO indium oxide
  • X1 X1 is a real number greater than 0
  • In X2 Zn Y2 O Z2 X2, Y2, and Z2 are real numbers greater than 0
  • GaO X3 X3 is a real number greater than 0
  • Ga X4 Zn Y4 O Z4 X4, Y4, and Z4 a real number greater than 0) to.
  • the material becomes mosaic by separate into, mosaic InO X1, or in X2 Zn Y2 O Z2 is configured uniformly distributed in the film (hereinafter, cloud-like It is also referred to.).
  • the CAC-OS is a complex oxide semiconductor having a structure in which a region in which GaO X3 is a main component and a region in which In X2 Zn Y2 O Z2 or InO X1 is a main component are mixed.
  • the ratio of the atomic ratio of In to the element M in the first region is larger than the atomic ratio of In to the element M in the second region, It is assumed that the concentration of In is higher than that in the region 2.
  • IGZO is a common name and may refer to one compound of In, Ga, Zn, and O. Representative examples are represented by InGaO 3 (ZnO) m1 (m1 is a natural number), or In (1 + x0) Ga ( 1-x0) O 3 (ZnO) m0 (-1 ⁇ x0 ⁇ 1, m0 is an arbitrary number) Crystalline compounds are mentioned.
  • the crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure.
  • the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without orientation in the a-b plane.
  • CAC-OS relates to the material configuration of an oxide semiconductor.
  • the CAC-OS refers to a region observed in the form of nanoparticles mainly composed of Ga in a material configuration including In, Ga, Zn, and O, and nanoparticles composed mainly of In in some components.
  • region observed in shape says the structure currently disperse
  • CAC-OS does not include a stacked structure of two or more types of films different in composition. For example, a structure including two layers of a film containing In as a main component and a film containing Ga as a main component is not included.
  • the CAC-OS is partially observed in the form of nanoparticles having the metal element as a main component, and partially having In as a main component.
  • region observed in particle form says the structure currently each disperse
  • the CAC-OS can be formed by, for example, a sputtering method under conditions in which the substrate is not intentionally heated.
  • a sputtering method one or more selected from an inert gas (typically, argon), an oxygen gas, and a nitrogen gas may be used as a deposition gas.
  • an inert gas typically, argon
  • oxygen gas typically, oxygen gas
  • a nitrogen gas may be used as a deposition gas.
  • the flow rate ratio of the oxygen gas to the total flow rate of the film forming gas at the time of film formation is preferably as low as possible.
  • the flow rate ratio of the oxygen gas is 0% to 30%, preferably 0% to 10%. .
  • CAC-OS has a feature that a clear peak is not observed when it is measured using a ⁇ / 2 ⁇ scan by the Out-of-plane method, which is one of X-ray diffraction (XRD) measurement methods.
  • XRD X-ray diffraction
  • the CAC-OS has a ring-like high luminance region and a plurality of ring regions. A bright spot is observed. Therefore, it can be seen from the electron diffraction pattern that the crystal structure of the CAC-OS has an nc (nano-crystal) structure having no orientation in the planar direction and in the cross-sectional direction.
  • GaO X3 is a main component by EDX mapping acquired using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy) It can be confirmed that the region and the region containing In X 2 Zn Y 2 O Z 2 or In O X 1 as the main component have a structure in which the regions are localized and mixed.
  • EDX Energy Dispersive X-ray spectroscopy
  • the CAC-OS has a structure different from the IGZO compound in which the metal element is uniformly distributed, and has different properties from the IGZO compound. That is, CAC-OS is phase separated into a region in which GaO X3 or the like is a main component and a region in which In X2 Zn Y2 O Z2 or InO X1 is a main component, and a region in which each element is a main component Has a mosaic-like structure.
  • the region whose main component is In X2 Zn Y2 O Z2 or InO X1 is a region whose conductivity is higher than the region whose main component is GaO X3 or the like. That is, when carriers flow in a region mainly containing In X2 Zn Y2 O Z2 or InO X1 , conductivity as an oxide semiconductor is exhibited. Accordingly, In X2 Zn Y2 O Z2, or InO X1 is the main component region, that distributed in the cloud-like in the oxide semiconductor, a high field-effect mobility (mu) can be realized.
  • the region whose main component is GaO X3 or the like is a region whose insulating property is higher than the region whose main component is In X2 Zn Y2 O Z2 or InO X1 . That is, by distributing a region containing GaO X3 or the like as a main component in the oxide semiconductor, leakage current can be suppressed and favorable switching operation can be realized.
  • CAC-OS when CAC-OS is used for a semiconductor element, the insulating property due to GaO X3 and the like and the conductivity due to In X 2 Zn Y 2 O Z 2 or InO X 1 are high by acting complementarily.
  • the on current (I on ) and high field effect mobility ( ⁇ ) can be realized.
  • CAC-OS is suitable as a constituent material of various semiconductor devices.
  • This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
  • the electronic device of this embodiment includes the display device of one embodiment of the present invention.
  • the display quality of the image displayed on the display unit of the electronic device can be improved.
  • An image having a resolution of, for example, full high definition, 2K, 4K, 8K, 16K, or more can be displayed on the display portion of the electronic device of this embodiment.
  • the screen size of the display portion can be 20 inches or more diagonally, 30 inches or more diagonally, 50 inches or more diagonally, 60 inches diagonally or more, or 70 inches diagonally or more.
  • Examples of the electronic devices include relatively large screens of television devices, desktop or notebook personal computers, monitors for computers, etc., large-sized game machines such as digital signage (Digital Signage), pachinko machines, etc.
  • digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, portable information terminals, sound reproduction devices, and the like can be given.
  • the electronic device of one embodiment of the present invention may have an antenna.
  • the display portion can display an image, information, and the like.
  • the antenna may be used for contactless power transmission.
  • the electronic device of one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation number, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, It may have a function of measuring voltage, power, radiation, flow rate, humidity, inclination, vibration, smell or infrared light.
  • the electronic device of one embodiment of the present invention can have various functions. For example, a function of displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function of displaying dates, time, etc., a function of executing various software (programs), wireless A communication function, a function of reading a program or data recorded in a recording medium, and the like can be provided.
  • FIG. 23A shows an example of a television set.
  • a display portion 7000 is incorporated in a housing 7101.
  • a structure in which the housing 7101 is supported by the stand 7103 is shown.
  • the display device of one embodiment of the present invention can be applied to the display portion 7000.
  • the television set 7100 illustrated in FIG. 23A can be operated by an operation switch of the housing 7101 or a separate remote controller 7111.
  • the display portion 7000 may be provided with a touch sensor or may be operated by touching the display portion 7000 with a finger or the like.
  • the remote controller 7111 may have a display unit for displaying information output from the remote controller 7111. Channels and volume can be controlled with an operation key or a touch panel of the remote controller 7111, and an image displayed on the display portion 7000 can be manipulated.
  • the television set 7100 is provided with a receiver, a modem, and the like.
  • the receiver can receive a general television broadcast.
  • a modem by connecting to a wired or wireless communication network via a modem, one-way (sender to receiver) or two-way (sender and receiver, or between receivers, etc.) information communication can be performed. It is also possible.
  • FIG. 23B shows an example of a laptop personal computer.
  • the laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like.
  • a display portion 7000 is incorporated in the housing 7211.
  • the display device of one embodiment of the present invention can be applied to the display portion 7000.
  • FIGS. 23C and 23D show an example of digital signage.
  • a digital signage 7300 illustrated in FIG. 23C includes a housing 7301, a display portion 7000, a speaker 7303, and the like. Furthermore, an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like can be included.
  • FIG. 23D shows a digital signage 7400 attached to a cylindrical column 7401.
  • the digital signage 7400 has a display portion 7000 provided along the curved surface of the column 7401.
  • the display device of one embodiment of the present invention can be applied to the display portion 7000.
  • the display unit 7000 As the display unit 7000 is wider, the amount of information that can be provided at one time can be increased. Also, the wider the display portion 7000, the easier it is for a person to see, and for example, the advertising effect of the advertisement can be enhanced.
  • a touch panel By applying a touch panel to the display portion 7000, not only a still image or a moving image can be displayed on the display portion 7000, but also the user can operate intuitively, which is preferable. Moreover, when it uses for the application for providing information, such as route information or traffic information, usability can be improved by intuitive operation.
  • the digital signage 7300 or the digital signage 7400 can cooperate with the information terminal 7311 or information terminal 7411 such as a smartphone possessed by the user by wireless communication. Is preferred.
  • information of an advertisement displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display of the display portion 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.
  • the digital signage 7300 or the digital signage 7400 execute a game in which the screen of the information terminal 7311 or the information terminal 7411 is an operation means (controller). In this way, an unspecified number of users can simultaneously participate in and enjoy the game.
  • the display device of one embodiment of the present invention can be incorporated along the inner or outer wall of a house or building, or along the curved surface of the interior or exterior of a vehicle.
  • This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.
  • FIG. 24 is a diagram for explaining a display device displaying an image in the present embodiment.
  • the display panel (display panel DP [1, 1], display panel DP [2, 1], display panel DP [1, 2], and display panel DP [2, 2] are arranged in two rows and two columns. The image was displayed on the display apparatus which arranged].
  • the display panel is provided with pixels of 720 rows and 1280 columns.
  • an area provided with pixels for 320 columns from the boundary between the display panel DP [1,1] and the display panel DP [1,2] is a boundary portion. It is assumed that 229A. Further, in the display panel DP [2, 1], an area provided with pixels for 320 columns from the boundary between the display panel DP [2, 1] and the display panel DP [2, 2] is a boundary portion 229B. I assume. Further, in the display panel DP [1, 2], an area provided with pixels for 320 columns from the boundary between the display panel DP [1, 1] and the display panel DP [1, 2] is a boundary portion 229C. I assume. Further, in the display panel DP [2, 2], an area provided with pixels for 320 columns from the boundary between the display panel DP [2, 1] and the display panel DP [2, 2] is a boundary portion 229D. I assume.
  • a correction filter is created for each display panel by the method shown in FIG.
  • the pixels provided in the display panel can express gradation values 0 to 255
  • the images displayed in step S23 and step S26 are images in which the gradation values of all the pixels are 127.
  • the average value D AB of filter values corresponding to the pixels provided in the boundary portion 229A and the boundary portion 229B, and the average value D CD of filter values corresponding to the pixels provided in the boundary portion 229C and the boundary 229D was calculated. Thereafter, the filter value as multiplied D AB / D CD corresponding to the pixel provided in the display panel DP [1, 2] and the display panel DP [2, 2], by modifying the correction filter, a new I created a correction filter.
  • FIG. 25A shows a display result when an image is displayed without correcting the filter created by the method shown in FIG.
  • FIG. 25B shows a display result when the filter created by the method shown in FIG. 15 is corrected by the above method, a new correction filter is created, and an image is displayed.
  • an image corrected by the correction filter created by the method shown in FIG. 15 is displayed on one display panel.
  • the pixels provided in the display panel can express gradation values 0 to 255, and the image to be displayed in step S23 and the image subjected to correction have a gradation value of 127 for all pixels.
  • the image was Moreover, in step S23 and step S26, the luminance of the light emitted from the pixel was measured using a two-dimensional luminance meter.
  • FIG. 26A shows luminance data of the display panel on which the image before correction is displayed, which is obtained by the two-dimensional luminance meter in step S23.
  • FIG. 26B shows luminance data of the display panel on which the image after correction is displayed, which is acquired by the two-dimensional luminance meter after the correction filter is created.
  • the luminance at the central portion of the display panel was higher than the luminance at the peripheral portion of the display panel.
  • the display panel is displaying an image after correction, as shown in FIG. 26B, the luminance is uniformed in the entire display panel before the correction.

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  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
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