WO2019096291A1 - 信息发送、接收方法及装置 - Google Patents

信息发送、接收方法及装置 Download PDF

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Publication number
WO2019096291A1
WO2019096291A1 PCT/CN2018/116114 CN2018116114W WO2019096291A1 WO 2019096291 A1 WO2019096291 A1 WO 2019096291A1 CN 2018116114 W CN2018116114 W CN 2018116114W WO 2019096291 A1 WO2019096291 A1 WO 2019096291A1
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WO
WIPO (PCT)
Prior art keywords
resource set
control resource
coreset
ssb
signal block
Prior art date
Application number
PCT/CN2018/116114
Other languages
English (en)
French (fr)
Inventor
刘星
郝鹏
贺海港
毕峰
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to SG11202004533TA priority Critical patent/SG11202004533TA/en
Priority to JP2020527820A priority patent/JP7317824B2/ja
Priority to KR1020207017555A priority patent/KR102578527B1/ko
Priority to KR1020237030403A priority patent/KR20230133400A/ko
Priority to EP23153522.0A priority patent/EP4221402A1/en
Priority to EP18877712.2A priority patent/EP3713338A4/en
Publication of WO2019096291A1 publication Critical patent/WO2019096291A1/zh
Priority to US16/875,701 priority patent/US11528694B2/en
Priority to US17/989,208 priority patent/US11825296B2/en
Priority to JP2023117528A priority patent/JP2023139111A/ja
Priority to US18/485,347 priority patent/US20240040579A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/20—Control channels or signalling for resource management
    • H04W72/23—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
    • H04W72/231—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal the control data signalling from the layers above the physical layer, e.g. RRC or MAC-CE signalling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/20—Control channels or signalling for resource management
    • H04W72/23—Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/0091—Signaling for the administration of the divided path
    • H04L5/0094—Indication of how sub-channels of the path are allocated
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/30—Resource management for broadcast services
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/0001—Arrangements for dividing the transmission path
    • H04L5/0003—Two-dimensional division
    • H04L5/0005—Time-frequency
    • H04L5/0007—Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • H04W72/044—Wireless resource allocation based on the type of the allocated resource
    • H04W72/0446—Resources in time domain, e.g. slots or frames

Definitions

  • the present application relates to the field of communications, for example, to a method and apparatus for transmitting and receiving information.
  • system information is divided into minimum system information (minimum SI) and other system information (other SI).
  • Minimum SI minimum system information
  • other SI other system information
  • the minimization system information is divided into "Master Information Block (MIB)" carried on a Physical Broadcast Channel (PBCH), and "Remaining Minimization” carried on the physical downlink shared channel.
  • MIB Master Information Block
  • RMSI Remaining minimum SI
  • the main system information is used to provide the basic system parameters of the cell, and the remaining minimized system information is used to provide initial access-related configuration information, such as the initial access request transmission configuration, initial connection In response message receiving configuration, etc.
  • initial access-related configuration information such as the initial access request transmission configuration, initial connection In response message receiving configuration, etc.
  • Other system information that needs to be broadcasted is called other system information.
  • the RMSI is scheduled by a Physical Downlink Control Channel (PDCCH) and carried on a Physical Downlink Shared Channel (PDSCH).
  • PDCH Physical Downlink Control Channel
  • PDSCH Physical Downlink Shared Channel
  • the time-frequency domain location of the control-resource set (CORESET) where the RMSI scheduling information is located may be indicated in the PBCH.
  • the PBCH is carried in a Synchronization Signal (SS)/Physical Broadcast Channel Block (PBCH block), and multiple SS/PBCH blocks are included in one synchronization period, and different SS/PBCH blocks can transmit the same. Or synchronous broadcast signals of different beam directions or ports to achieve full coverage of the expected area.
  • the PBCHs of different beam directions or ports have the requirement of combined reception. Therefore, when considering the introduction of indication information into the PBCH, it is necessary to ensure that the information content is the same.
  • the relationship between the time domain location of different SS/PBCH blocks and the time domain location of the corresponding RMSI common control resource set may be different, and how to effectively prevent the PBCH combined reception.
  • the time domain location of the RMSI common control resource set indicates that there is no effective solution in the related art.
  • the embodiment of the present application provides a method and an apparatus for transmitting and receiving information, so as to at least solve the technical problem that the time-frequency domain resource location of the control resource set cannot be effectively indicated in the related art without affecting the PBCH merge reception.
  • a method for transmitting information including: carrying configuration information of a control resource set on a physical broadcast channel; wherein the configuration information is used to indicate to the terminal the following of the control resource set At least one of: time domain location information and frequency domain location information; and sending the control resource set to the terminal according to the configuration information.
  • another information sending method including: receiving configuration information of a control resource set, where configuration information of the control resource set is carried on a physical broadcast channel, and the configuration information is used for And indicating at least one of the following: the time domain location information and the frequency domain location information; and receiving the control resource set according to the configuration information.
  • an information transmitting apparatus including: a configuration module, configured to carry configuration information of a control resource set on a physical broadcast channel; wherein the configuration information is used to indicate to the terminal At least one of the following: a time domain location information and a frequency domain location information; and a sending module, configured to send the control resource set according to the configuration information.
  • another information receiving apparatus including: a first receiving module, configured to receive configuration information of a control resource set, where configuration information of the control resource set is carried on a physical broadcast channel
  • the configuration information is used to indicate at least one of the following: the time domain location information and the frequency domain location information
  • the second receiving module is configured to receive the control resource set according to the configuration information.
  • a storage medium comprising a stored program, wherein the program is executed to perform the method of any of the above.
  • a processor for running a program wherein the program is executed to perform the method of any of the above.
  • FIG. 1 is a flowchart of an information transmitting method according to an embodiment of the present application.
  • FIG. 2 is a flowchart of an information receiving method according to an embodiment of the present application.
  • FIG. 3 is a structural block diagram of an information transmitting apparatus according to an embodiment of the present application.
  • FIG. 4 is a structural block diagram of an information receiving apparatus according to an embodiment of the present application.
  • Figure 5 is a schematic diagram of a synchronization signal block of this embodiment
  • FIG. 6 is a schematic diagram 1 of the frequency domain location of the present embodiment indicated by a frequency offset between the control resource set and the synchronization signal block;
  • FIG. 7 is a schematic diagram showing the frequency domain location of the present embodiment indicating the frequency offset by the frequency offset between the control resource set and the synchronization signal block;
  • FIG. 8 is a schematic diagram of the frequency domain location in the present embodiment indicating the frequency offset between the control resource set and the synchronization signal block;
  • FIG. 9 is a schematic diagram showing the frequency domain location of the present embodiment indicating the frequency offset by the frequency offset between the control resource set and the synchronization signal block;
  • FIG. 10 is a schematic diagram showing the frequency domain location of the present embodiment indicating the fifth through the frequency offset between the control resource set and the synchronization signal block;
  • FIG. 11 is a schematic diagram of the frequency domain location of the present embodiment indicating a frequency offset between the control resource set and the synchronization signal block;
  • FIG. 12 is a schematic structural diagram of a CORESET transmitted only in a time slot in which an SSB is located in the embodiment
  • FIG. 13 is a schematic diagram of a transmission period using a plurality of synchronization signal blocks in the embodiment.
  • FIG. 14 is a schematic diagram of a mapping pattern of a current synchronization signal block (SSB) to a time slot according to the embodiment
  • 15 is a first schematic diagram of position information of symbols occupied by CORESET in a time slot in this embodiment
  • 16 is a second schematic diagram of position information of symbols occupied by CORESET in a time slot according to this embodiment
  • 17 is a schematic diagram 1 of a slot in which CORESET is mapped outside the SSB according to the embodiment
  • FIG. 18 is a schematic diagram 2 of a slot in which CORESET is mapped outside the SSB according to the embodiment
  • Figure 19 is a diagram showing the CORESET transmission in the time slot containing the sync signal block in the embodiment.
  • 20 is a schematic diagram of CORESET transmission in a time slot not including a synchronization signal block in this embodiment
  • 21 is a schematic diagram of transmission of a CORESET in a time slot including a synchronization signal block and a time slot not including a synchronization signal block in the embodiment;
  • 22 is a schematic diagram of CORESET transmission in the time slot in which the synchronization signal block is located in the embodiment
  • FIG. 23 is a schematic diagram 1 of CORESET transmission in a time slot not including a synchronization signal block in this embodiment
  • Figure 24 is a schematic diagram 2 of the CORESET transmission in the time slot without the synchronization signal block in this embodiment
  • 25 is a schematic diagram of all synchronization signal blocks corresponding to the same CORESET monitoring window in this embodiment.
  • FIG. 26 is a schematic diagram of a plurality of synchronization signal blocks corresponding to one CORESET monitoring window in the embodiment.
  • the network architecture that can be run by the embodiment of the present application includes: a base station and a terminal, where the base station and the terminal perform information interaction.
  • FIG. 1 is a flowchart of a method for sending information according to an embodiment of the present application. As shown in FIG. 1, the process includes: step S102 and step S104. . In step S102, the configuration information of the control resource set is carried on the physical broadcast channel.
  • the configuration information is used to indicate to the terminal at least one of the following: a time domain location information and a frequency domain location information.
  • step S104 a control resource set is transmitted to the terminal according to the configuration information.
  • the configuration information of the control resource set is carried on the physical broadcast channel, and the control resource set is sent to the terminal according to the configuration information, which solves the problem that the control technology cannot be effectively indicated without affecting the PBCH combined reception in the related art.
  • the technical problem of the collection of time-frequency domain resource locations improves the flexibility of data transmission.
  • the execution body of the foregoing steps may be a network side, such as a base station, etc., but is not limited thereto.
  • the configuration information of the control resource set includes: control bandwidth information of the resource set.
  • the bandwidth information comprises at least one of: a minimum channel bandwidth and a minimum terminal bandwidth.
  • the configuration information of the control resource set includes: frequency domain location information of the control resource set, wherein the frequency domain location information is indicated by controlling a frequency offset between the resource set and the synchronization signal block.
  • the frequency domain location information of the control resource set is indicated by one of the following:
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET - BW SSB ) / 2 - M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET - BW SSB ) / 2 - (12 ⁇ SC CORESET - M ⁇ SC SSB );
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET + BW SSB ) / 2 + M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET + BW SSB ) / 2 + (12 ⁇ SC CORESET + M ⁇ SC SSB );
  • M is the number of frequency domain offset synchronization signal block subcarriers between the synchronization signal block and the carrier physical resource block grid PRB grid
  • M is an integer
  • SC CORESET is the frequency domain width of the control resource set subcarrier
  • SC SSB For the frequency domain width of the sync signal block subcarrier
  • BW CORESET is the control resource set bandwidth
  • BW SSB is the sync signal block bandwidth.
  • the configuration information of the control resource set includes time domain location information of the control resource set; wherein the time domain location information includes at least one of the following information: the time slot information in which the control resource set is located and the control resource set in the time slot The location information of the symbol inside.
  • the location information of the symbol occupied by the control resource set in the time slot includes: a start symbol index of the symbol occupied by the control resource set in the time slot, and the number of symbols occupied by the control resource set in the time slot.
  • the time slot information in which the control resource set is located includes one of the following:
  • the control resource set is transmitted in a time slot containing the synchronization signal block
  • the control resource set is transmitted in a time slot that does not include a synchronization signal block
  • the set of control resources is transmitted both in the time slot containing the sync signal block and in the time slot containing no sync signal block.
  • the configuration information of the control resource set is further used to indicate whether a control resource set is transmitted in a time slot including the synchronization signal block; or whether a control resource is transmitted in a time slot not including the synchronization signal block. set.
  • the control resource set when the control resource set is transmitted in both the time slot containing the synchronization signal block and the time slot not including the synchronization signal block, the control resource set is in the time slot containing the synchronization signal block, and The time slots that do not contain the sync block use the same resource mapping rules.
  • the configuration information of the control resource set includes monitoring window configuration information of the control resource set, where the monitoring window configuration information of the control resource set includes at least one of the following: monitoring the monitoring period of the resource set, and monitoring the window time domain. The length, and the time domain offset between adjacent monitoring windows, and the starting point monitoring window location, wherein the monitoring window of the control resource set includes at least one control resource set monitoring opportunity.
  • the monitoring window of the control resource set corresponds to the synchronization signal block.
  • the monitoring window time domain length of the control resource set is greater than or equal to 1 time slot.
  • the time domain offset between adjacent monitoring windows includes at least one of the following: 0, the time domain length of the monitoring window, and 1/X of the monitoring window time domain length, where X is an integer greater than 1.
  • the value of X is predefined by a predetermined protocol or indicated by signaling.
  • the time domain offset between adjacent monitoring windows is the time domain length of the monitoring window, or the monitoring window time domain length 1/X;
  • the time domain offset between adjacent monitoring windows is 0, or 1/X of the monitoring window time domain length.
  • the start point monitoring window position is indicated by a time domain offset from the start time slot of the synchronization time block, or the start point monitoring window position is fixedly configured.
  • the set of control resources is one of: a remaining minimized system information RMSI common control resource set, and a paging information common control resource set.
  • FIG. 2 is a flowchart of an information receiving method according to an embodiment of the present application. As shown in FIG. 2, the process includes the following steps S202 and S204. .
  • step S202 configuration information of a control resource set is received.
  • the configuration information of the control resource set is carried on the physical broadcast channel, and the configuration information is used to indicate at least one of the following: the time domain location information and the frequency domain location information.
  • step S204 a control resource set is received according to the configuration information.
  • the configuration information of the control resource set includes: control bandwidth information of the resource set.
  • the configuration information of the control resource set includes: frequency domain location information of the control resource set, wherein the frequency domain location information is indicated by controlling a frequency offset between the resource set and the synchronization signal block.
  • the frequency domain location information of the control resource set is indicated by one of the following:
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET - BW SSB ) / 2 - M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET - BW SSB ) / 2 - (12 ⁇ SC CORESET - M ⁇ SC SSB );
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET + BW SSB ) / 2 + M ⁇ SC SSB ;
  • the offset between the center frequency of the control resource set and the center frequency of the sync signal block is (BW CORESET + BW SSB ) / 2 + (12 ⁇ SC CORESET + M ⁇ SC SSB );
  • M is the number of frequency domain offset synchronization signal block subcarriers between the synchronization signal block and the carrier physical resource block grid PRB grid
  • M is an integer
  • SC CORESET is the frequency domain width of the control resource set subcarrier
  • SC SSB For the frequency domain width of the sync signal block subcarrier
  • BW CORESET is the control resource set bandwidth
  • BW SSB is the sync signal block bandwidth.
  • the configuration information of the control resource set includes time domain location information of the control resource set; wherein the time domain location information includes at least one of the following information: control slot information in which the resource set is located, and control resource set in the time slot The location information of the symbol inside.
  • the configuration information of the control resource set includes monitoring window configuration information of the control resource set, where the monitoring window configuration information of the control resource set includes at least one of the following: monitoring the monitoring period of the resource set, and monitoring the window time domain. The length, the time domain offset between adjacent monitoring windows, and the starting point monitoring window location, wherein the monitoring window of the control resource set includes at least one control resource set monitoring opportunity.
  • the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, by hardware, but in many cases, the former is A better implementation.
  • the technical solution of the present application which is essential or contributes to the prior art, may be embodied in the form of a software product stored in a storage medium (such as ROM/RAM, disk,
  • the optical disc includes a number of instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the methods described in various embodiments of the present application.
  • an information transmitting and receiving device is further provided, and the device is used to implement the foregoing embodiments and preferred embodiments, and details are not described herein.
  • the term "module" can implement at least one of software and hardware for a predetermined function.
  • the apparatus described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware, is also possible and conceivable.
  • FIG. 3 is a structural block diagram of an information sending apparatus according to an embodiment of the present application, which may be applied to a network side network element, such as a base station. As shown in FIG. 3, the apparatus includes: a configuration module 30 and a sending module 32.
  • the configuration module 30 is configured to: carry the configuration information of the control resource set on the physical broadcast channel, where the configuration information is used to indicate to the terminal at least one of the following: the time domain location information, the frequency domain location information.
  • the sending module 32 is configured to send the control resource set according to the configuration information.
  • FIG. 4 is a structural block diagram of an information receiving apparatus according to an embodiment of the present application, which can be applied to a terminal. As shown in FIG. 4, the method includes: a first receiving module 40 and a second receiving module 42.
  • the first receiving module 40 is configured to receive the configuration information of the control resource set, where the configuration information of the control resource set is carried on a physical broadcast channel, where the configuration information is used to indicate at least one of the following: : Time domain location information, frequency domain location information.
  • the second receiving module 42 is configured to receive the control resource set according to the configuration information.
  • each of the above modules may be implemented by software or hardware.
  • the foregoing may be implemented by, but not limited to, the foregoing modules are all located in the same processor; or, the above modules are in any combination.
  • the forms are located in different processors.
  • the relationship between the time domain location of different SS/PBCH blocks and the time domain location of the corresponding RMSI common control resource set may be different, and how to effectively prevent the PBCH combined reception.
  • the time domain location of the RMSI common control resource set is an issue that must be considered and resolved.
  • system information is divided into minimum system information (minimum SI) and other system information (other SI).
  • the minimization system information is further divided into "main system information (MIB)" carried on a physical broadcast channel (PBCH), and "remaining minimized system information" carried on a physical downlink shared channel; main system information
  • MIB main system information
  • main system information For providing basic cell system parameters, the remaining minimized system information is used to provide initial access related configuration information, such as a transmission configuration of an initial access request, an initial access response message receiving configuration, and the like.
  • Other system information that needs to be broadcasted is called other system information.
  • the RMSI is scheduled by the physical downlink control channel PDCCH and carried on the physical downlink shared channel PDSCH.
  • the time-frequency domain location of the common control resource set CORESET where the RMSI scheduling information is located can be indicated in the PBCH.
  • the PBCH is transmitted in a synchronization signal/physical broadcast channel block (SS/PBCH block), and includes multiple SS/PBCH blocks in one synchronization period, and different SS/PBCH blocks can transmit the same or different beam directions. Or the synchronous broadcast signal of the port to achieve full coverage of the expected area.
  • the PBCHs of different beam directions or ports have the requirement of combined reception. Therefore, when considering the introduction of indication information into the PBCH, it is necessary to ensure that the information content is the same.
  • the relationship between the time domain location of different SS/PBCH blocks and the time domain location of the corresponding RMSI common control resource set may be different, and how to effectively prevent the PBCH combined reception.
  • the time domain location of the RMSI common control resource set is an issue that must be considered and resolved.
  • the application provides a method and system for transmitting information, including the following methods:
  • the network side carries the control resource set (CORESET) configuration information on the physical broadcast channel, where the control resource set configuration information is used to indicate to the terminal the time-frequency domain location information of the control resource set;
  • CORESET control resource set
  • the network side sends the control resource set CORESET according to the configuration information.
  • the control resource set configuration information includes one or more of the following:
  • the frequency domain location information of the control resource set
  • the time domain location information of the control resource set includes at least one of the following information: time slot information in which the control resource set is located, and location information of the symbol occupied by the control resource set in the time slot.
  • the location information of the symbol occupied by the control resource set in the time slot includes: a start symbol index of the symbol occupied by the control resource set in the time slot, and the symbol of the control resource set in the time slot quantity.
  • the monitoring window configuration information of the control resource set includes at least one of the following: a monitoring period of the control resource set, a monitoring window time domain length, and an adjacent monitoring window Time domain offset, as well as the starting point of the monitoring window.
  • the common control resource set CORESET of the embodiment may include one or more of the following downlink control information: paging downlink control information, scheduling information of remaining minimum system information, paging indication, and the like. Since this information needs to achieve full coverage of the expected range, a CORESET sends a common control information for a particular downstream port/downlink beam direction, including one or more CORESETs in one polling transmission period/CORESET monitoring period, in one Or common control information transmission of multiple downlink ports/downlink beam directions to achieve coverage for the expected range.
  • the paging downlink control information paging DCI is used to indicate scheduling information of the paging message, which is also called paging scheduling downlink control information paging scheduling DCI.
  • system information is divided into minimum system information (minimum SI) and other system information (other SI).
  • the minimization system information is further divided into "main system information (MIB)" carried on a physical broadcast channel (PBCH), and "remaining minimized system information" carried on a physical downlink shared channel; main system information
  • MIB main system information
  • main system information For providing basic cell system parameters, the remaining minimized system information is used to provide initial access related configuration information, such as a transmission configuration of an initial access request, an initial access response message receiving configuration, and the like.
  • Other system information that needs to be broadcasted is called other system information (other SI).
  • the RMSI is scheduled by the physical downlink control channel PDCCH and carried on the physical downlink shared channel PDSCH.
  • the time-frequency domain location of the common control resource set CORESET where the RMSI scheduling information is located may be indicated in the PBCH.
  • the paging indicator is used to trigger the terminal to report the downlink preferred beam, which is also called the paging group indicator.
  • FIG. 5 is the synchronization signal block of this embodiment.
  • the synchronization signal block usually includes four symbols, and the first and third symbols respectively carry a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS).
  • PSS Primary Synchronization Signal
  • SSS Secondary Synchronization Signal
  • the synchronization signal sequence is respectively mapped to 127 resource elements (Resources, REs) in 12 physical resource blocks (PRBs), as shown in (a) of FIG.
  • the physical broadcast channel The PBCH is only carried on the second and fourth symbols in the sync signal block, occupies 24 PRBs, or, in other resource configurations, the physical broadcast channel PBCH is mapped in the second, third and third of the sync signal block.
  • the number of occupied PRBs is as follows: 20 PRBs are occupied on the second and fourth symbols, and on the third symbol, the PBCH occupies both sides of the secondary synchronization signal. 4 PRB, a total of eight PRB.
  • the sync signal is aligned with the center frequency of the PBCH.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • the bandwidth information of the control resource set configuration information including the control resource set may be a minimum channel bandwidth, or a minimum terminal bandwidth.
  • the minimum channel bandwidth is defined as the minimum bandwidth supported by the system in a certain frequency range. For example, in the frequency range below 6 GHz, the minimum channel bandwidth is defined as 5 MHz; in the frequency range above 6 GHz, the minimum channel bandwidth is defined as 50 MHz.
  • the minimum terminal bandwidth refers to the maximum of the bandwidth that all terminals can support.
  • 1 bit may be included on the physical broadcast channel to indicate whether the CORESET bandwidth of the current carrier is the minimum channel bandwidth or the minimum terminal bandwidth. For example, 0 means that the CORESET bandwidth of the current carrier is the minimum channel bandwidth, and 1 means that the CORESET bandwidth of the current carrier is the minimum terminal bandwidth.
  • the CORESET bandwidth is pre-defined based on the frequency band, for example, in the protocol, the CORESET bandwidth of a certain frequency band is equal to the minimum channel bandwidth or the minimum terminal bandwidth.
  • the value of the CORESET bandwidth of the frequency band is given in the protocol, for example, 24 PRB (physical transport block), 48 PRB, and the like. At this time, it is not necessary to separately introduce the bandwidth indication bit.
  • the CORESET bandwidth is implicitly indicated by the number of symbols occupied by the control resource set in the time slot.
  • the number of symbols occupied by the CORESET in the time slot is 1, corresponding to the CORESET bandwidth being 48 PRB.
  • the CORESET bandwidth is 24 PRB. At this time, it is not necessary to separately introduce the bandwidth indication bit.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • This embodiment describes an indication of CORESET frequency domain location information, which is described as follows: the control resource set configuration information includes frequency domain location information of the control resource set; and the frequency domain location is between the control resource set and the synchronization signal block. The frequency offset is indicated.
  • FIG. 6 is a schematic diagram of the first embodiment of the present embodiment, wherein the frequency domain location is indicated by the frequency offset between the control resource set and the synchronization signal block
  • FIG. 7 is the frequency domain location of the embodiment between the control resource set and the synchronization signal block.
  • the frequency offset is used to indicate the second schematic diagram.
  • FIG. 8 is a schematic diagram showing the frequency domain location in the present embodiment by using the frequency offset between the control resource set and the synchronization signal block.
  • FIG. 9 is the frequency domain location in the embodiment.
  • the frequency offset between the resource set and the synchronization signal block is used to indicate the schematic diagram 4.
  • FIG. 10 is a schematic diagram showing the frequency domain location in the present embodiment by using the frequency offset between the control resource set and the synchronization signal block.
  • FIG. 11 is the implementation.
  • the frequency domain location indicates the schematic diagram 6 by the frequency offset between the control resource set and the synchronization signal block.
  • the physical resource block PRB boundary of the synchronization signal block may be There is an offset from the actual PRB boundary of the carrier (physical resource block grid (PRB grid)) (as indicated by offset).
  • Information bits (such as 4 bits or 5 bits) may be introduced in the physical broadcast channel to explicitly indicate the above offset, and may be predefined as the physical resource block PRB boundary of the synchronization signal block and the lower frequency carrier PRB boundary.
  • the offset (ie, as shown in Figures 6, 8, and 10) is also the offset of the physical resource block PRB boundary of the sync signal block from the higher frequency carrier PRB boundary (i.e., as shown in Figures 7, 9, and 11); There is no offset between the transmission of CORESET and the actual PRB boundary of the carrier. Therefore, when using the frequency offset between the signal block and the sync signal block to indicate the frequency domain position of CORESET, this offset needs to be taken into account.
  • the subcarrier spacing is equal to, when it is less than or greater than the subcarrier spacing of the synchronization signal block, the indication of the CORESET frequency domain position:
  • the carrier physical resource block In the PRB grid there are 12 sync signal block subcarriers in the frequency domain of one carrier PRB. Therefore, there are 12 possible offset values, that is, the offset ranges from 0 to 11 subcarriers.
  • the specific offset number ie, the value of offset is indicated by 4 bits in the PBCH.
  • the block grid (PRB grid) is defined by a large subcarrier spacing (30 kHz), and the smaller subcarriers are nested within a larger subcarrier, that is, one 30 kHz subcarrier frequency domain corresponds to two 15 kHz subcarriers.
  • one carrier PRB contains 12 synchronization signal block subcarriers in the frequency domain, and the offset offset ranges from 0 to 11 synchronization signal blocks (30 kHz).
  • the subcarriers indicate the specific offset number (ie, the value of offset) by 4 bits in the PBCH.
  • the carrier physics is defined by a large subcarrier spacing (30 kHz), and the smaller subcarriers are nested within a larger subcarrier, that is, one 30 kHz subcarrier frequency domain corresponds to two 15 kHz subcarriers. .
  • one carrier PRB contains 24 synchronization signal block subcarriers in the frequency domain, and the offset offset ranges from 0 to 23 synchronization signal blocks (30 kHz).
  • the subcarrier is indicated by 5 bits in the PBCH to indicate the specific offset number (ie, the value of offset).
  • the frequency domain position of the CORESET is as follows One of the frequency domain positions 1 to 5.
  • Case 1 (case 1): the low frequency boundary of the CORESET is lower than the low frequency boundary of the synchronization signal block by M 15 kHz subcarriers; at this time, the offset between the center frequency of the CORESET and the center frequency of the synchronization signal block It is: (BW CORESET -BW SSB )/2-M ⁇ SC SSB .
  • Case 2 (case 2): the high frequency boundary of the CORESET is higher than the high frequency boundary of the synchronization signal block by 12 ⁇ SC CORESET ⁇ M ⁇ SC SSB ; at this time, the center frequency of the CORESET and the synchronization signal block The offset between the center frequencies is: (BW CORESET - BW SSB ) / 2 - (12 ⁇ SC CORESET - M ⁇ SC SSB ).
  • Case 3 The offset between the center frequency of the CORESET and the center frequency of the sync signal block is M 15 kHz subcarriers; that is, the absolute offset between the center frequencies is M ⁇ SC SSB .
  • Case 4 (case 4): the high frequency boundary of the CORESET is lower than the low frequency boundary of the synchronization signal block by M 15 kHz subcarriers; at this time, the center frequency of the CORESET is offset from the center frequency of the synchronization signal block Move to: (BW CORESET + BW SSB ) / 2 + M ⁇ SC SSB .
  • Case 5 (case 5): the low frequency boundary of the CORESET is 12 ⁇ SC CORESET -M ⁇ SC SSB higher than the high frequency boundary of the synchronization signal block; at this time, the center frequency of the CORESET and the center of the synchronization signal block
  • the offset between frequencies is: (BW CORESET + BW SSB ) / 2 + (12 ⁇ SC CORESET - M ⁇ SC SSB );
  • the M is a number of frequency domain offset synchronization signal block subcarriers between the synchronization signal block and the PRB boundary, where M is an integer, and when the subcarrier spacing of the CORESET is less than or equal to the synchronization signal block When the subcarrier spacing is used, the value range of M is: 0 ⁇ M ⁇ 11. When the subcarrier spacing of the CORESET is greater than the subcarrier spacing of the synchronization signal block, the value range of M is: 0 ⁇ M ⁇ 23.
  • SC CORESET is the frequency domain width of the control resource set subcarrier
  • SC SSB is the frequency domain width of the synchronization signal block subcarrier
  • BW CORESET is the control resource set bandwidth
  • BW SSB is the synchronization signal block bandwidth.
  • the frequency domain range of the CORESET includes the frequency domain range of the synchronization signal block; in cases 4 and 5, the frequency domain range of the CORESET and the frequency domain range of the synchronization signal block are not mutually different. overlap.
  • Case 1 (case 1): the low frequency boundary of the CORESET is 12 ⁇ SC CORESET ⁇ M ⁇ SC SSB lower than the low frequency boundary of the synchronization signal block; at this time, the center frequency of the CORESET and the center frequency of the synchronization signal block The offset between them is: (BW CORESET - BW SSB ) / 2 - (12 ⁇ SC CORESET - M ⁇ SC SSB ).
  • Case 2 (case 2): the high frequency boundary of the CORESET is higher than the high frequency boundary of the sync signal block by M ⁇ SC SSB , that is, M sync signal block subcarriers; at this time, the center frequency of the CORESET is The offset between the center frequencies of the sync block is: (BW CORESET - BW SSB ) / 2 - M ⁇ SC SSB .
  • Case 3 The offset between the center frequency of the CORESET and the center frequency of the sync signal block is M 15 kHz subcarriers; that is, the absolute offset between the center frequencies is M ⁇ SC SSB .
  • Case 4 (case 4): the high frequency boundary of the CORESET is 12 ⁇ SC CORESET ⁇ M ⁇ SC SSB lower than the low frequency boundary of the synchronization signal block; at this time, the center frequency of the CORESET and the center of the synchronization signal block
  • the offset between frequencies is: (BW CORESET + BW SSB ) / 2 + (12 ⁇ SC CORESET - M ⁇ SC SSB ).
  • Case 5 (case 5): the low frequency boundary of the CORESET is higher than the high frequency boundary of the sync signal block by M ⁇ SC SSB , that is, M sync signal block subcarriers; at this time, the center frequency of the CORESET is The offset between the center frequencies of the sync block is: (BW CORESET + BW SSB ) / 2 + M ⁇ SC SSB .
  • the M is a number of frequency domain offset synchronization signal block subcarriers between the synchronization signal block and the PRB boundary, where M is an integer, and when the subcarrier spacing of the CORESET is less than or equal to the synchronization signal block When the subcarrier spacing is used, the value range of M is: 0 ⁇ M ⁇ 11. When the subcarrier spacing of the CORESET is greater than the subcarrier spacing of the synchronization signal block, the value range of M is: 0 ⁇ M ⁇ 23.
  • SC CORESET is the frequency domain width of the control resource set subcarrier
  • SC SSB is the frequency domain width of the synchronization signal block subcarrier
  • BW CORESET is the control resource set bandwidth
  • BW SSB is the synchronization signal block bandwidth.
  • the frequency domain range of the CORESET includes the frequency domain range of the synchronization signal block; in cases 4 and 5, the frequency domain range of the CORESET and the frequency domain range of the synchronization signal block are not mutually different. overlap.
  • any one or more optional locations may be specified in the protocol, and in the CORESET configuration information indication field of the PBCH, a frequency domain location indicating the bit to the terminal indicating the CORESET of the current carrier is introduced.
  • the protocol specifies that the frequency domain location of the CORESET includes the following four cases: case1, case2, case4, and case5, and the PBCH uses 2 bits to indicate which one of the above four frequency domain positions is currently used.
  • case 1 and case 2 since case 1 and case 2, CORESET and sync signal block bandwidth overlap, it is more suitable for the case where the two subcarrier spacings are the same. Conversely, in case 4 and case 5, the CORESET and sync signal block bandwidths are not. Overlap is more suitable for the case where the subcarrier spacing is different. Therefore, the protocol stipulates that when the CORESET and the synchronization signal block subcarrier spacing are the same, in the PBCH, 1 bit is introduced to indicate which configuration of the case1, case2 frequency domain position is currently used; when the CORESET and the synchronization signal block When the carrier spacing is different, 1 bit is introduced in the PBCH to indicate which configuration of the case 4 and case 5 frequency domain positions are currently used.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • This embodiment describes an indication manner of controlling time slot information in which a resource set is located.
  • the time slot information in which the CORESET is located has the following three cases.
  • Case 1 The CORESET is transmitted in a time slot including a synchronization signal block (as shown in (a) of FIG. 12, and FIG. 12 is a time slot in which the CORESET is in the time slot of the Synchronization Signal Block (SSB) in this embodiment.
  • SSB Synchronization Signal Block
  • Case 2 The CORESET is transmitted both in the time slot containing the synchronization signal block and in the time slot not including the synchronization signal block (as shown in (b) of FIG. 12, it is a CORESET when the SSB is located.
  • the CORESET corresponding to SSB1 is transmitted in a time slot that does not contain an SSB.
  • Case 3 The CORESET is transmitted in a time slot that does not include a sync signal block (as shown in (c) of FIG. 12, which is a structural representation of a CORESET transmitted in a time slot in which the SSB is not included: that is, in one In the time slot not containing the SSB, CORESET is mapped on the first and seventh symbols in the time slot, respectively).
  • a sync signal block as shown in (c) of FIG. 12, which is a structural representation of a CORESET transmitted in a time slot in which the SSB is not included: that is, in one In the time slot not containing the SSB, CORESET is mapped on the first and seventh symbols in the time slot, respectively).
  • the control resource set is transmitted in a time slot including a synchronization signal block, and another form is used, that is, a plurality of synchronization signal block transmission periods are utilized, and FIG. 13 is a plurality of synchronization signal blocks in this embodiment.
  • Schematic diagram of the transmission period (in FIG. 13, SS burst set periodicity refers to the transmission period of the synchronization signal block), two synchronization signal blocks are mapped in one slot, and CORESET1 corresponding to the previous SSB is in the first period.
  • the SSB1 is transmitted in the time slot, and the COSP2 corresponding to the next SSB is transmitted in the time slot of the SSB2 in the second cycle.
  • the transmission period of CORESET is twice the transmission period of the SSB.
  • the CORESET configuration information indication field of the PBCH information indicating the time slot in which the bit indicates to the terminal that the CORESET of the current carrier is located may be introduced. For example, 2 bits are used to indicate that '00' represents 'the control resource set is transmitted in a time slot containing a synchronization signal block', and '01' represents 'the control resource set is both in a time slot containing a synchronization signal block. Transmission, in the time slot not containing the synchronization signal block, ', '10' means 'the control resource set transmits in the time slot not containing the synchronization signal block', '11' represents the way of the cross-cycle CORESET transmission (corresponding to Figure 13)'.
  • '0' represents 'the control resource set is transmitted in a time slot containing a synchronization signal block'
  • '1' represents 'the control resource set only in a time slot not including a synchronization signal block.
  • Intratransport' At this time, '0' actually includes the three cases shown in (a) of FIG. 12, (b) of FIG. 12, and FIG.
  • '0' means 'the control resource set is transmitted only in the time slot containing the synchronization signal block'; '1' represents 'the control resource set in the time slot not containing the synchronization signal block Intratransport'.
  • '0' actually includes two cases of (a) and Fig. 13 of Fig. 12; '1' actually includes two cases of (b) of Fig. 12 and (c) of Fig. 12.
  • the protocol stipulates that any two of the above four cases are included, and further 1 bit is used in the PBCH to indicate which configuration is adopted by the current carrier.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:
  • the embodiment describes the indication manner of the location information of the symbol occupied by the CORESET in the time slot; wherein the location information of the symbol occupied by the CORESET in the time slot includes: the symbol occupied by the CORESET in the time slot The starting symbol index, the number of symbols occupied by the CORESET in the time slot.
  • FIG. 14 is a schematic diagram of a mapping pattern of a current synchronization signal block (SSB) to a time slot according to the embodiment, wherein (a) of FIG. 14 is applied to synchronization of a subcarrier spacing of 15 kHz or 30 kHz (pattern 2). Mapping of signal blocks to time slots; (b) of FIG. 14 is applicable to mapping of sync signal blocks to time slots with subcarrier spacing of 30 kHz (pattern 1) or 120 kHz; (c) of FIG. 14 is applicable to subcarrier spacing of 240 kHz The mapping of the sync signal block to the time slot.
  • the slots in (a) of FIG. 14 and (b) of FIG. 14 are time slots corresponding to the sub-carrier spacing of the current sync signal block; the slot in (c) of FIG. 14 corresponds to the time slot of 120 kHz.
  • FIG. 15 is a first schematic diagram of the position information of the symbol occupied by the CORESET in the time slot in the embodiment, as shown in FIG.
  • the position information of the symbol occupied in the time slot includes one or more of the following, wherein the arrow starting from the SSB points to the CORESET corresponding thereto.
  • each CORESET occupies 1 symbol and is mapped in the same slot.
  • the SSB specifically occupies a symbol before the SSB, that is, the CORESET corresponding to the first SSB in the slot occupies the second in the slot.
  • the symbol corresponds to the eighth symbol in the slot occupied by the CORESET of the second SSB in the slot.
  • each CORESET occupies 1 symbol, and the CORESET corresponding to the first SSB in the slot is mapped on the 8th symbol of the slot outside the 5ms SSB time window; the second SSB in the slot corresponds to CORESET is mapped in the slot where the SSB is located, and specifically takes up one symbol before the SSB, that is, the eighth symbol in the slot.
  • each CORESET occupies 1 symbol, and the CORESET corresponding to the first SSB in the slot is mapped in the slot where the SSB is located, specifically occupying a symbol before the SSB, that is, the second in the slot.
  • the symbol of the second SSB in the slot is mapped to the second symbol of the slot outside the 5ms SSB time window.
  • each CORESET occupies 1 symbol and is mapped in the slot where the SSB is located.
  • the SSB specifically occupies the first two symbols in the slot, that is, the CORESET occupying slot corresponding to the first SSB in the slot.
  • the first symbol in the corresponding symbol corresponds to the second symbol in the slot occupied by the CORESET of the second SSB in the slot.
  • each CORESET occupies 2 symbols, and the CORESET corresponding to the first SSB in the slot is mapped in the slot where the SSB is located, specifically occupying the first 2 symbols of the slot where the SSB is located; the second in the slot
  • the CORESETs corresponding to the SSBs are mapped on the first and second symbols of the slot outside the 5ms SSB time window.
  • each CORESET occupies 2 symbols, and the CORESET corresponding to the first SSB in the slot is mapped on the 7th and 8th symbols of the slot outside the 5ms SSB time window; the second SSB in the slot The corresponding CORESET is mapped in the slot where the SSB is located, and specifically takes the 7th and 8th symbols of the slot where the SSB is located.
  • each CORESET occupies 2 symbols, and the CORESET corresponding to the first SSB in the slot is mapped on the first and second symbols of the slot outside the 5ms SSB time window; the second SSB in the slot
  • the corresponding CORESET is mapped in the slot where the SSB is located, and specifically takes the 7th and 8th symbols of the slot where the SSB is located.
  • each CORESET occupies 2 symbols and is mapped in the same slot.
  • the SSB specifically occupies two symbols before the SSB, that is, the CORESET corresponding to the first SSB in the slot occupies the first slot in the slot. 1, 2 symbols, the CORESET corresponding to the second SSB in the slot occupies the 7th and 8th symbols in the slot.
  • each CORESET occupies 1 or 2 or 3 or 4 symbols, and the CORESET and the corresponding SSB are multiplexed by Frequency-Division Multiplexing (FDM), that is, The CORESET corresponding to the first SSB in the slot is mapped in the slot where the SSB is located.
  • FDM Frequency-Division Multiplexing
  • the CORESET corresponding to the second SSB in the slot is mapped in the slot where the SSB is located.
  • the ninth symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 9th and 10th symbols are occupied, and for the three symbols CORESET, the 9th, 10th, 11 symbols, occupying the 9, 10th, 11th, and 12th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • each CORESET occupies 1 or 2 or 3 or 4 symbols, and the CORESET and the corresponding SSB adopt the FDM multiplexing mode, that is, the CORESET corresponding to the first SSB in the slot is mapped in the SSB. Inside the slot.
  • the CORESET corresponding to the second SSB in the slot is mapped on the slot other than the 5ms SSB time window.
  • the 3rd symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 3rd and 4th symbols are occupied, and for the three symbols CORESET, the 3rd, 4th, 5 symbols, occupying the 3rd, 4th, 5th, and 6th symbols for the four symbols CORESET.
  • the SSB occupies resources other than the frequency domain resources in the frequency domain.
  • the mapping resource configuration is performed in two slots and four SSB periods, and FIG. 16 is the CORESET in the time slot in this embodiment.
  • the location information of the symbol occupied by the CORESET in the time slot includes one or more of the following, wherein the arrow starting from the SSB points to the CORESET corresponding thereto.
  • each CORESET occupies 1 symbol, wherein the CORESET of the first SSB occupies the third symbol in the previous slot; the CORESET of the second SSB occupies the 4th in the previous slot. The symbol of the third SSB occupies the first symbol in the next slot; the CORESET of the fourth SSB occupies the second symbol in the next slot.
  • each CORESET occupies 1 symbol, wherein the CORESET of the first SSB occupies the third symbol in the previous slot; the CORESET of the second SSB occupies the 4th in the previous slot.
  • the symbol of the third SSB occupies the 3rd symbol of the slot other than the 5ms SSB time window; the CORESET of the fourth SSB occupies the 4th symbol of the slot other than the 5ms SSB time window; 'CORESET of the first SSB
  • the CORESET interval from the third SSB is 'equal' to the CORESET interval of the second SSB and the CORESET interval of the fourth SSB, for example, the interval is equal to 5 ms.
  • each CORESET occupies 1 symbol, wherein the CORESET of the first SSB occupies the 4th symbol in the previous slot; the CORESET of the second SSB occupies the slot outside the 5ms SSB time window.
  • the third SSB's CORESET occupies the fourth symbol in the next slot; the fourth SSB's CORESET occupies the second symbol of the slot outside the 5ms SSB time window; 'the first SSB's CORESET
  • the CORESET interval from the third SSB is 'equal' to the CORESET interval of the second SSB and the CORESET interval of the fourth SSB, for example, the interval is equal to 5 ms.
  • each CORESET occupies 1 symbol and is mapped on the first four symbols in the first slot, respectively.
  • the CORESET of the first SSB occupies the first symbol in the previous slot;
  • the CORESET of the second SSB occupies the second symbol in the previous slot;
  • the CORESET of the third SSB occupies the previous slot The third symbol inside;
  • the fourth SSB's CORESET occupies the fourth symbol in the previous slot.
  • each CORESET occupies 2 symbols, wherein the CORESET of the first SSB occupies the first and second symbols in the previous slot; the CORESET of the second SSB occupies the previous slot. 3rd and 4th symbols; CORESET of the third SSB occupies the first and second symbols of the slot other than the 5ms SSB time window; the CORESET of the fourth SSB occupies the 3rd and 4th symbols of the slot other than the 5ms SSB time window
  • the 'time interval between the CORESET of the first SSB and the CORESET of the third SSB' is equal to the 'time interval between the CORESET of the second SSB and the CORESET of the fourth SSB', for example, the interval is equal to 5 ms.
  • each CORESET occupies 2 symbols, wherein the CORESET of the first SSB occupies the 3rd and 4th symbols in the previous slot; the CORESET of the second SSB occupies the next slot.
  • the 'time interval between the CORESET of the first SSB and the CORESET of the third SSB' is equal to the 'time interval between the CORESET of the second SSB and the CORESET of the fourth SSB', for example, the interval is equal to 5 ms.
  • each CORESET occupies 2 symbols, wherein the CORESET of the first SSB occupies the first and second symbols in the previous slot; the CORESET of the second SSB occupies the previous slot. 3rd and 4th symbols; CORESET of the third SSB occupies the 1st and 2nd symbols of the next slot; CORESET of the 4th SSB occupies the 1st and 2nd symbols of the slot other than the 5ms SSB time window; 'First The time interval between the CORESET of one SSB and the CORESET of the fourth SSB is equal to 5 ms.
  • each CORESET occupies 2 symbols, wherein the CORESET of the first SSB occupies the first and second symbols in the previous slot; the CORESET of the second SSB occupies the previous slot. 3rd and 4th symbols; CORESET of the third SSB occupies the 1st and 2nd symbols of the next slot; CORESET of the 4th SSB occupies the 1st and 2nd symbols of the slot other than the 5ms SSB time window; 'Second
  • the time interval between the CORESET of the SSB and the CORESET of the fourth SSB is equal to 5 ms, or the time interval of the CORESET of the third SSB and the CORESET of the fourth SSB is equal to 5 ms.
  • each CORESET occupies 1 or 2 or 3 or 4 symbols, and the CORESET and the corresponding SSB are multiplexed by FDM, namely:
  • the CORESET corresponding to the first SSB is mapped in the slot where the SSB is located.
  • the 5th symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 5th and 6th symbols are occupied, and for the three symbols CORESET, the 5th, 6th, 7 symbols, occupying the 5th, 6th, 7th, and 8th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • the CORESET corresponding to the second SSB is mapped in the slot where the SSB is located.
  • the ninth symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 9th and 10th symbols are occupied, and for the three symbols CORESET, the 9th, 10th, 11 symbols, occupying the 9, 10th, 11th, and 12th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • the CORESET corresponding to the third SSB is mapped in the slot where the SSB is located.
  • the 3rd symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 3rd and 4th symbols are occupied, and for the three symbols CORESET, the 3rd, 4th, 5 symbols, occupying the 3rd, 4th, 5th, and 6th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • the CORESET corresponding to the fourth SSB is mapped in the slot where the SSB is located.
  • the 7th symbol of the slot where the SSB is located is occupied, and for the two symbols CORESET, the 7th and 8th symbols are occupied, and for the three symbols CORESET, the 7th, 8th, 9 symbols, occupying the 7th, 8th, 9th, and 10th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • each CORESET occupies 1 or 2 or 3 or 4 symbols, and the CORESET and the corresponding SSB adopt the FDM multiplexing mode, namely:
  • the CORESET corresponding to the first SSB is mapped in the slot where the SSB is located.
  • the 5th symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 5th and 6th symbols are occupied, and for the three symbols CORESET, the 5th, 6th, 7 symbols, occupying the 5th, 6th, 7th, and 8th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • the CORESET corresponding to the second SSB is mapped in a slot other than the 5ms SSB time window.
  • the CORESET occupies 1 symbol the 5th symbol is occupied, for the two symbols CORESET, the 5th and 6th symbols are occupied, and for the three symbols CORESET, the 5th, 6th, and 7th symbols are occupied,
  • the frequency domain occupies resources other than the frequency domain resources of the SSB.
  • the 'CORESET interval of the first SSB and the third SSB' is equal to 5ms.
  • the CORESET corresponding to the third SSB is mapped in the slot where the SSB is located.
  • the 3rd symbol of the slot in which the SSB is located is occupied, and for the two symbols CORESET, the 3rd and 4th symbols are occupied, and for the three symbols CORESET, the 3rd, 4th, 5 symbols, occupying the 3rd, 4th, 5th, and 6th symbols for the four symbols CORESET; occupying resources other than the SSB in the frequency domain.
  • the CORESET corresponding to the fourth SSB is mapped in the slot in which the slot is outside the 5ms SSB time window.
  • the CORESET occupies 1 symbol the 7th symbol is occupied, for the two symbols CORESET, the 7th and 8th symbols are occupied, and for the three symbols CORESET, the 7th, 8th, and 9th symbols are occupied,
  • the seventh, eighth, ninth, and tenth symbols are occupied; in the frequency domain, resources other than the frequency domain resources of the SSB are occupied.
  • the interval of 'CORESET of the second SSB and the CORESET interval of the fourth SSB' is equal to 5 ms.
  • FIG. 17 is a schematic diagram 1 of a slot in which the CORESET is mapped to the SSB other than the SSB
  • FIG. 18 is a schematic diagram 2 of the slot in which the CORESET is mapped outside the SSB, as shown in FIG. 17 and FIG.
  • the location information of the symbols occupied by the CORESET in the time slot includes one or more of the following:
  • a slot contains two CORESETs, each occupying a symbol, located on the first and second symbols in the slot.
  • one slot contains two CORESETs, each occupying two symbols.
  • one CORESET is mapped on the first and second symbols in the slot, and the other CORESET is mapped on the third and fourth symbols in the slot.
  • one slot contains two CORESETs, each occupying one symbol, which are respectively located on the first and eighth symbols in the slot.
  • one slot contains two CORESETs, each occupying two symbols.
  • one CORESET is mapped on the first and second symbols in the slot, and the other CORESET is mapped on the eighth and nine symbols in the slot.
  • one slot contains two CORESETs, each occupying one symbol, which are respectively located on the third and ninth symbols in the slot.
  • one slot contains two CORESETs, each occupying two symbols.
  • one CORESET is mapped on the 3rd and 4th symbols in the slot, and the other CORESET is mapped on the 9th and 10th symbols in the slot.
  • one slot contains one CORESET, which occupies one symbol.
  • this CORESET is mapped on the first symbol within the slot.
  • one slot contains one CORESET, which occupies two symbols.
  • this CORESET is mapped on the first and second symbols in the slot.
  • each CORESET contains 1 symbol: the first CORESET is mapped on the 5th symbol of the previous slot, and the second CORESET The mapping is on the ninth symbol of the previous slot, the third CORESET is mapped on the third symbol of the next slot, and the fourth CORESET is mapped on the seventh symbol of the latter slot.
  • each CORESET contains 2 symbols: the first CORESET is mapped on the 5th and 6th symbols of the previous slot, and the second The CORESET maps on the 9th and 10th symbols of the previous slot, the third CORESET maps on the 3rd and 4th symbols of the next slot, and the fourth CORESET maps to the 7th and 8th symbols of the next slot. on.
  • the position of the symbol occupied by the currently used CORESET in the time slot can be given only to the terminal.
  • the terminal can determine the bandwidth of the current CORESET.
  • the CORESET bandwidth takes the minimum channel bandwidth, the bandwidth value is relatively small, so the CORESET and SSB time division multiplexing mode is preferred.
  • the method of frequency division multiplexing of CORESET and SSB is preferred.
  • the terminal can determine the slot information in which the CORESET is located.
  • the slot information in which CORESET is located is 'the control resource set is transmitted in the slot containing the synchronization signal block'; in the PBCH, 3-bit specific indication Which of the eight configurations in the terminal table 1 is employed.
  • Table 2 applies to the CORESET bandwidth taking a larger value, that is, 'minimum UE bandwidth', and the slot information in which CORESET is located is 'the control resource set is transmitted in the slot containing the synchronization signal block'; in the PBCH, 3 bits Specifically, which of the eight configurations in the terminal table 2 is used is adopted.
  • Table 3 applies to the time slot information of the CORESET where the 'the control resource set is transmitted in the time slot not containing the synchronization signal block'; or, the CORESET and the synchronization signal block subcarrier spacing are different, and the CORESET and the synchronization signal block are respectively divided. It belongs to a different bandwidth part (BWP).
  • BWP bandwidth part
  • 3 bits specifically indicate which of the eight configurations in the terminal table 3 is adopted.
  • Embodiment 5 is a diagrammatic representation of Embodiment 5:
  • This embodiment describes an indication manner of the CORESET monitoring window (PDCCH monitoring window) configuration information.
  • the CORESET monitoring window configuration information includes at least one of the following: a monitoring period of the CORESET, a starting point monitoring window position, a monitoring window time domain length, and a time domain offset between adjacent monitoring windows.
  • the CORESET monitoring window is also referred to as a physical downlink control channel PDCCH monitoring window, and each monitoring window corresponds to a synchronization signal block, and the CORESET monitoring window includes one or more CORESET monitoring opportunities, that is, one or more The resource of the PDCCH is transmitted.
  • the base station selects one PDCCH transmission resource in a CORESET monitoring window for PDCCH transmission, and the terminal may try to receive the PDCCH corresponding to the synchronization signal block on one or more PDCCH transmission resources in the CORESET monitoring window.
  • the synchronization signal block has a Quasi-co-location (QCL) relationship with the CORESET or PDCCH in the corresponding monitoring window.
  • QCL Quasi-co-location
  • the monitoring period of the CORESET can also be understood as the transmission period of the CORESET.
  • the value of this period can be predefined, for example, predefined as 40 ms. It is also possible to pre-define the values of multiple monitoring periods in the protocol, such as 20 ms, 40 ms, and indicate the specific value of the monitoring period of the current carrier by 1 bit in the PBCH.
  • the starting point of the CORESET monitoring window refers to the time domain starting position of the first CORESET monitoring window, taking the CORESET transmission period as 20ms as an example.
  • the CORESET starting point is monitored.
  • the window position is predefined.
  • FIG. 20 is a schematic diagram of the CORESET transmission in the time slot not including the synchronization signal block in this embodiment, as shown in FIG. 20
  • FIG. 21 is that the CORESET in this embodiment transmits and not in the time slot containing the synchronization signal block.
  • the monitoring window of the CORESET has a time domain length of one or more time slots; for example, the time domain length of the monitoring window is one or more of the following: 1 time slot, 2 time slots, 4 time slots, or M time slots, where M is the number of time slots occupied by the sync signal block in a sync signal block transmission period.
  • the time domain length of the monitoring window is 1 time slot; for transmitting CORESET in the time slot not including the synchronization signal block, the time domain length of the monitoring window may be One or more time slots.
  • a time domain length indicating the bit to the terminal indicating the current carrier's CORESET monitoring window may be introduced. For example, using 2 bits to indicate, '00' means 'the time domain length of the monitoring window is 1 time slot', '01' means 'the time domain length of the monitoring window is 2 time slots', and '10' stands for 'monitoring' The time domain length of the window is M time slots ', '11' state is reserved '.
  • the protocol stipulates that only two of the time domain lengths of the above four CORESET monitoring windows are included, and further one bit is used in the PBCH to indicate which configuration is used for the current carrier, for example, '0' stands for 'monitoring window
  • the time domain length is 1 time slot '
  • '1' represents 'the time domain length of the monitoring window is 2 time slots'.
  • the protocol specifies that the time domain length of the CORESET monitoring window can be configured in one of three modes: one time slot, two time slots, and four time slots; and the time domain transmission resource of the CORESET monitoring window and the monitoring window
  • the time domain length is jointly indicated, occupying 2 bits in total, for example,
  • the time domain offset between adjacent monitoring windows includes one or more of the following: 0, the time domain length of the monitoring window, and 1/X of the monitoring window time domain length, where X is an integer greater than 1, and the specific The value can be predefined in the protocol or indicated by signaling.
  • FIG. 22 is a schematic diagram of CORESET transmission in the time slot in which the synchronization signal block is located in the embodiment.
  • the time domain of the monitoring window is 1 time slot, and the time domain offset between adjacent monitoring windows is equal to the length of the monitoring window time domain, that is, 1 time slot. At this time, there is no overlap between adjacent monitoring windows.
  • eight sync signal blocks can be used as a resource for transmitting a sync signal and a physical broadcast channel, and the base station can select some or all of them as the actually transmitted sync signal block (actual SSB).
  • FIG. 23 is a schematic diagram 1 of the CORESET transmission in a time slot not including a synchronization signal block in the embodiment.
  • the CORESET is transmitted in a time slot not including a synchronization signal block, that is, a second half of a radio frame in which the synchronization signal block is located,
  • the time domain of the monitoring window is 1 time slot
  • the time domain offset between adjacent monitoring windows is equal to the length of the monitoring window time domain, that is, 1 time slot.
  • the dashed box in Figure 23 shows a spurious sync block (pseudo SSB).
  • the CORESET transmission will also avoid these spurious sync block blocks.
  • the resources occupied by CORESET in the time slot are the same as in Figure 22.
  • the advantage of this configuration is that when the transmission period of the synchronization signal block is 5 ms, at this time, the synchronization signal block of the next period will also be transmitted in the time slot in which the CORESET is located, since the transmission of the CORESET avoids the resource for transmitting the synchronization signal block. Therefore, even if the transmission period of the sync signal block is 5 ms, there is no collision between the two. The terminal does not need to know the actual synchronization signal block transmission period of the current carrier.
  • FIG. 24 is a schematic diagram showing the transmission of CORESET in a time slot not including a synchronization signal block in the embodiment.
  • the CORESET is transmitted in a time slot not including a synchronization signal block, that is, the second half of the radio frame in which the synchronization signal block is located.
  • the frame and monitoring window have a time domain length of 2 time slots, and the time domain offset between adjacent monitoring windows is equal to 1/2 of the monitoring window time domain length, that is, 1 time slot. Then the adjacent monitoring windows are partially overlapped.
  • the second synchronization signal block in the slot 1 in which the synchronization signal block is located is actually transmitted.
  • the synchronization signal block corresponds to the monitoring window 1, that is, the second and third time slots of the second half frame.
  • the time slots contain 4 CORESET transmission resources, and the base station selects one of them to transmit the CORESET corresponding to the synchronization signal block.
  • the first sync signal block in slot 2 is actually transmitted, which corresponds to the monitoring window 2, that is, the third and fourth time slots, and the base station selects one of the CORESET transmission resources in the two time slots. Send a CORESET corresponding to this sync signal block.
  • CORESET corresponding to different synchronization signal blocks cannot occupy the same CORESET transmission resource. Therefore, when the CORESET transmission resource is selected in the corresponding monitoring window for the subsequent synchronization signal block, it is necessary to avoid having been occupied. CORESET transmission resources.
  • FIG. 25 is a schematic diagram of all sync signal blocks corresponding to the same CORESET monitoring window in this embodiment. As shown in FIG. 25, all sync signal blocks correspond to the same CORESET monitoring window. In an embodiment, four time slots containing synchronization signal blocks contain eight synchronization signal block resources. At this time, only two synchronization signal blocks are transmitted, and eight synchronization signal blocks correspond to the same CORESET monitoring window. The monitoring window contains 8 CORESET transmission resources. For the terminal, no matter which synchronization signal block is received, it is necessary to try to receive the corresponding CORESET on the 8 CORESET monitoring timings in this monitoring window.
  • FIG. 26 is a schematic diagram of a plurality of synchronization signal blocks corresponding to one CORESET monitoring window according to the embodiment. As shown in FIG. 26, a plurality of synchronization signal blocks correspond to a CORESET monitoring window. In an embodiment, four time slots containing synchronization signal blocks include eight synchronization signal block resources.
  • the first four synchronization signal blocks are actually transmitted, and four synchronization signal blocks in the first two time slots are Corresponding to the first CORESET monitoring window (corresponding to the first two false sync block time slots in the time domain), the four sync signal blocks in the last two slots correspond to the second CORESET monitoring window (time domain) Corresponding to the third and fourth spurious sync block time slots), for the terminal, when receiving one of the first four SSBs, it is necessary to try on the eight CORESET monitoring opportunities in the monitoring window 1. Receiving the corresponding CORESET, when receiving one of the last four SSBs, it is necessary to try to receive the corresponding CORESET on the eight CORESET monitoring occasions in the monitoring window 2.
  • a time domain offset indicating the bit to the terminal indicating the CORESET neighboring monitoring window of the current carrier may be introduced. For example, using 2 bits to indicate that '00' represents 'the time domain offset of the adjacent monitoring window is 0', '01' represents 'the time domain offset of the adjacent monitoring window is the monitoring window length', and '10' represents The time domain offset of the adjacent monitoring window is 1/X' of the length of the monitoring window, and the '11' state is reserved. Where X is an integer greater than 1, and the specific value may be specified in the protocol, or indicated by signaling.
  • the time domain offset of the adjacent monitoring window is the monitoring window length (ie, the adjacent monitoring window) The non-overlapping and continuous configuration), or the time domain offset of the adjacent monitoring window is 1/X of the length of the monitoring window time domain (ie, the adjacent monitoring windows partially overlap). At this time, only 1 bit is needed to indicate the offset value.
  • '0' means 'the time domain offset of the adjacent monitoring window is the monitoring window length'
  • '1' represents the time domain offset of the adjacent monitoring window.
  • X is an integer greater than 1, and its specific value may be specified in the protocol, or indicated by signaling.
  • the time domain offset of the adjacent monitoring window is 0 (ie, the adjacent monitoring windows are completely overlapped).
  • the time domain offset of the adjacent monitoring window is 1/X of the length of the monitoring window (ie, the adjacent monitoring windows partially overlap).
  • '0' means 'the time domain offset of the adjacent monitoring window is 0'
  • '1' means that the time domain offset of the adjacent monitoring window is Monitor the length of the window by 1/X'.
  • X is an integer greater than 1, and its specific value may be specified in the protocol, or indicated by signaling.
  • This embodiment provides a method for transmitting common control information block configuration information.
  • the control resource set can be effectively indicated without affecting the PBCH combined reception (that is, ensuring the same PBCH content in each SS block).
  • Time-frequency domain resource location In addition, by configuring the control resource set monitoring window time domain length and the monitoring window time domain offset corresponding to the adjacent SS block, the transmission resource of the common control block is more flexible, and the burst service transmission to the common control block is well avoided. The impact of the transmission.
  • the embodiment of the present application further provides a storage medium including a stored program, wherein the program runs to perform the method described in any of the above.
  • the above storage medium may be configured to store program code for performing the following steps S1 and S2:
  • the configuration information of the control resource set is carried on the physical broadcast channel, where the configuration information is used to indicate to the terminal at least one of the following: the time domain location information, the frequency domain location information .
  • step S2 the control resource set is sent to the terminal according to the configuration information.
  • the foregoing storage medium may include, but is not limited to, a USB flash drive, a read-only memory (ROM), a random access memory (RAM), and a mobile hard disk.
  • ROM read-only memory
  • RAM random access memory
  • mobile hard disk A variety of media that can store program code, such as a disk or a CD.
  • Embodiments of the present application also provide a processor for running a program, wherein the program executes the steps of any of the above methods when executed.
  • the configuration information of the control resource set is carried on the physical broadcast channel, where the configuration information is used to indicate to the terminal at least one of the following: the time domain location information, the frequency domain location information .
  • step S2 the control resource set is sent to the terminal according to the configuration information.
  • modules or steps of the present application can be implemented by a general computing device, which can be concentrated on a single computing device or distributed in a network composed of multiple computing devices.
  • they may be implemented by program code executable by a computing device such that they may be stored in a storage device for execution by the computing device and, in some cases, may be different from
  • the steps shown or described are performed sequentially, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated into a single integrated circuit module.
  • the application is not limited to any particular combination of hardware and software.

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Abstract

公开了一种信息发送、接收方法及装置，其中，发送方法包括：将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；根据所述配置信息向终端发送所述控制资源集合。

Description

信息发送、接收方法及装置
本申请要求在2017年11月17日提交中国专利局、申请号为201711148126.3的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信领域，例如涉及一种信息发送、接收方法及装置。
背景技术
在新一代无线通信系统(New Radio，NR)中，系统信息被分为最小化系统信息(minimum SI)及其他系统信息(other SI)。其中，最小化系统信息被分为承载在物理广播信道(Physical Broadcast Channel，PBCH)上的“主系统信息(Master Information Block，MIB)”，及承载在物理下行共享信道上的“剩余的最小化系统信息(remaining minimum SI，RMSI)”；主系统信息用于提供小区基本系统参数，剩余的最小化系统信息用于提供初始接入相关的配置信息，例如初始接入请求的发送配置，初始接入响应消息接收配置等。其他需要广播发送的系统信息称为其他系统信息。
RMSI由物理下行控制信道(Physical Downlink Control Channel，PDCCH)调度，并承载在物理下行共享信道(Physical Downlink Shared Channel，PDSCH)上。RMSI调度信息所在的公共控制资源集合(control-resource set，CORESET)的时频域位置可以在PBCH中指示。
在NR系统中，PBCH是承载在同步信号(Synchronization Signal，SS)/物理广播信道块内(PBCH block)发送的，一个同步周期内包含多个SS/PBCH block，不同SS/PBCH block可以发送相同或不同波束方向或端口的同步广播信号，共同实现预期区域的全覆盖。不同波束方向或端口的PBCH有合并接收的需求，因此，在考虑向PBCH内引入指示信息时，要确保信息内容相同。
为了保证数据传输的灵活性，不同SS/PBCH block的时域位置与各自对应的RMSI公共控制资源集合的时域位置间的关系可能是不同的，如何在不影响PBCH合并接收的前提下，有效的指示RMSI公共控制资源集合的时域位置在相关技术中并没有有效的解决方案。
发明内容
本申请实施例提供了一种信息发送、接收方法及装置，以至少解决相关技术中在不影响PBCH合并接收的前提下不能有效的指示控制资源集合的时频域资源位置的技术问题。
根据本申请的一个实施例，提供了一种信息发送方法，包括：将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；根据所述配置信息向终端发送所述控制资源集合。
根据本申请的一个实施例，提供了另一种信息发送方法，包括：接收控制资源集合的配置信息，其中，所述控制资源集合的配置信息承载在物理广播信道上，所述配置信息用于指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；根据所述配置信息接收所述控制资源集合。
根据本申请的另一个实施例，提供了一种信息发送装置，包括：配置模块，设置为将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；发送模块，设置为根据所述配置信息发送所述控制资源集合。
根据本申请的另一个实施例，提供了另一种信息接收装置，包括：第一接收模块，设置为接收控制资源集合的配置信息，其中，所述控制资源集合的配置信息承载在物理广播信道上，所述配置信息用于指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；第二接收模块，设置为根据所述配置信息接收所述控制资源集合。
根据本申请的又一个实施例，还提供了一种存储介质，所述存储介质包括存储的程序，其中，所述程序运行时执行上述任一项所述的方法。
根据本申请的又一个实施例，还提供了一种处理器，所述处理器用于运行程序，其中，所述程序运行时执行上述任一项所述的方法。
附图概述
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1是根据本申请实施例的信息发送方法的流程图；
图2是根据本申请实施例的信息接收方法的流程图；
图3是根据本申请实施例的信息发送装置的结构框图；
图4是根据本申请实施例的信息接收装置的结构框图；
图5是本实施例同步信号块的示意图；
图6是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图一；
图7是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图二；
图8是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图三；
图9是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图四；
图10是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图五；
图11是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图六；
图12是本实施例一种CORESET仅在SSB所在时隙内传输的一种结构示意图；
图13是本实施例利用多个同步信号块发送周期的示意图；
图14为本实施例当前同步信号块(SSB)向时隙的映射图样示意图；
图15是本实施例CORESET在时隙内所占符号的位置信息示意图一；
图16是本实施例CORESET在时隙内所占符号的位置信息示意图二；
图17是本实施例CORESET映射在SSB以外的slot的示意图一；
图18是本实施例CORESET映射在SSB以外的slot的示意图二；
图19是本实施例CORESET在包含同步信号块的时隙内传输的示意图；
图20是本实施例CORESET在不包含同步信号块的时隙内传输的示意图；
图21是本实施例CORESET既在包含同步信号块的时隙内传输又在不包含同步信号块的时隙内传输示意图；
图22是本实施例CORESET在同步信号块所在时隙内传输示意图；
图23是本实施例CORESET在不包含同步信号块时隙内传输示意图一；
图24是本实施例CORESET在不包含同步信号块时隙内传输示意图二；
图25是本实施例所有同步信号块对应于相同的CORESET监测窗示意图；
图26是本实施例多个同步信号块对应于一个CORESET监测窗示意图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本申请。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
需要说明的是，本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
实施例1
本申请实施例可以运行的网络架构包括：基站和终端，其中，基站与终端之间进行信息交互。
在本实施例中提供了一种运行于上述网络架构的信息发送方法，图1是根据本申请实施例的信息发送方法的流程图，如图1所示，该流程包括：步骤S102和步骤S104。在步骤S102中，将控制资源集合的配置信息承载在物理广播信道上。
其中，配置信息用于向终端指示控制资源集合的以下至少之一：时域位置信息和频域位置信息。
在步骤S104中，根据配置信息向终端发送控制资源集合。
通过上述步骤，通过将控制资源集合的配置信息承载在物理广播信道上，并根据配置信息向终端发送控制资源集合，解决了相关技术中在不影响PBCH合并接收的前提下不能有效的指示控制资源集合的时频域资源位置的技术问题，提高了数据传输的灵活性。
在一实施例中，上述步骤的执行主体可以为网络侧，如基站等，但不限于此。
在一实施例中，控制资源集合的配置信息包括：控制资源集合的带宽信息。
在一实施例中，带宽信息包括以下至少之一：最小信道带宽和最小终端带宽。
在一实施例中，控制资源集合的配置信息包括：控制资源集合的频域位置信息，其中，频域位置信息通过控制资源集合与同步信号块间的频率偏移来指示。
在一实施例中，控制资源集合的频域位置信息通过以下之一来指示：
控制资源集合的中心频率与同步信号块的中心频率间的偏移为M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+(12×SC CORESET+M×SC SSB)；
其中，M为同步信号块与载波物理资源块网格PRB grid间的频域偏移同步信号块子载波的个数，M为整数，SC CORESET为控制资源集合子载波的频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
在一实施例中，控制资源集合的配置信息包括控制资源集合的时域位置信息；其中，时域位置信息包括以下信息至少之一：控制资源集合所在的时隙信息和控制资源集合在时隙内所占符号的位置信息。
在一实施例中，控制资源集合在时隙内所占符号的位置信息包括：控制资源集合在时隙内所占符号的起始符号索引，控制资源集合在时隙内所占符号的数量。
在一实施例中，控制资源集合所在的时隙信息包括以下之一：
控制资源集合在包含同步信号块的时隙内传输；
控制资源集合在不包含同步信号块的时隙内传输；
控制资源集合既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输。
在一实施例中，控制资源集合的配置信息还用于指示：在包含同步信号块的时隙内是否传输了控制资源集合；或者，在不包含同步信号块的时隙内是否传输了控制资源集合。
在一实施例中，在控制资源集合既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输时，控制资源集合在包含同步信号块的时隙，及在不包含同步信号块的时隙采用相同的资源映射规则。
在一实施例中，控制资源集合的配置信息包括控制资源集合的监测窗配置信息，其中，控制资源集合的监测窗配置信息包括以下信息至少之一：控制资源集合的监测周期，监测窗时域长度，以及相邻监测窗之间的时域偏移，以及起点监测窗位置，其中，控制资源集合的监测窗内包括至少一个控制资源集合监测时机。
在一实施例中，控制资源集合的监测窗与同步信号块对应。
在一实施例中，控制资源集合的监测窗时域长度大于或等于1个时隙。
在一实施例中，相邻监测窗之间的时域偏移包括以下至少一种：0，监测窗的时域长度，监测窗时域长度的1/X，其中，X为大于1的整数，其X的取值通过预定协议预定义或者通过信令指示。
在一实施例中，当控制资源集合的监测窗时域长度为1个时隙时，相邻监测窗之间的时域偏移为监测窗的时域长度，或者，监测窗时域长度的1/X；当控制资源集合的监测窗时域长度为大于1个时隙时，相邻监测窗之间的时域偏移为0，或者，监测窗时域长度的1/X。
在一实施例中，起点监测窗位置，通过与同步时间块起点时隙间的时域偏移来指示，或者，起点监测窗位置固定配置。
在一实施例中，控制资源集合为以下之一：剩余的最小化系统信息RMSI公共控制资源集合，寻呼信息公共控制资源集合。
在本实施例中提供了一种运行于上述网络架构的信息接收方法，图2是根据本申请实施例的信息接收方法的流程图，如图2所示，该流程包括如下步骤S202和步骤S204。
在步骤S202中，接收控制资源集合的配置信息。
其中，控制资源集合的配置信息承载在物理广播信道上，配置信息用于指示控制资源集合的以下至少之一：时域位置信息和频域位置信息。
在步骤S204中，根据配置信息接收控制资源集合。
在一实施例中，控制资源集合的配置信息包括：控制资源集合的带宽信息。
在一实施例中，控制资源集合的配置信息包括：控制资源集合的频域位置信息，其中，频域位置信息通过控制资源集合与同步信号块间的频率偏移来指示。
在一实施例中，控制资源集合的频域位置信息通过以下之一来指示：
控制资源集合的中心频率与同步信号块的中心频率间的偏移为M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+M×SC SSB；
控制资源集合的中心频率与同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+(12×SC CORESET+M×SC SSB)；
其中，M为同步信号块与载波物理资源块网格PRB grid间的频域偏移同步信号块子载波的个数，M为整数，SC CORESET为控制资源集合子载波的频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
在一实施例中，控制资源集合的配置信息包括控制资源集合的时域位置信息；其中，时域位置信息包括以下信息至少之一：控制资源集合所在的时隙信息，控制资源集合在时隙内所占符号的位置信息。
在一实施例中，控制资源集合的配置信息包括控制资源集合的监测窗配置信息，其中，控制资源集合的监测窗配置信息包括以下信息至少之一：控制资源集合的监测周期，监测窗时域长度，相邻监测窗之间的时域偏移，以及起点监测窗位置，其中，控制资源集合的监测窗内包括至少一个控制资源集合监测时机。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
实施例2
在本实施例中还提供了一种信息发送，接收装置，该装置用于实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和硬件中的至少之一。尽管以下实施例所描述 的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图3是根据本申请实施例的信息发送装置的结构框图，可以应用在网络侧网元，如基站等，如图3所示，该装置包括：配置模块30和发送模块32。
配置模块30，设置为将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息，频域位置信息。
发送模块32，设置为根据所述配置信息发送所述控制资源集合。
图4是根据本申请实施例的信息接收装置的结构框图，可以应用在终端，如图4所示，包括：第一接收模块40和第二接收模块42。
第一接收模块40，设置为接收控制资源集合的配置信息，其中，所述控制资源集合的配置信息承载在物理广播信道上，所述配置信息用于指示所述控制资源集合的以下至少之一：时域位置信息，频域位置信息。
第二接收模块42，设置为根据所述配置信息接收所述控制资源集合。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
实施例3
为了保证数据传输的灵活性，不同SS/PBCH block的时域位置与各自对应的RMSI公共控制资源集合的时域位置间的关系可能是不同的，如何在不影响PBCH合并接收的前提下，有效的指示RMSI公共控制资源集合的时域位置是必须考虑和解决的问题。
在新一代无线通信系统NR中，系统信息被分为最小化系统信息(minimum SI)及其他系统信息(other SI)。其中，最小化系统信息进一步被分为承载在物理广播信道(PBCH)上的“主系统信息(MIB)”，及承载在物理下行共享信道上的“剩余的最小化系统信息”；主系统信息用于提供小区基本系统参数，剩余的最小化系统信息用于提供初始接入相关的配置信息，例如初始接入请求的发送配置，初始接入响应消息接收配置等。其他需要广播发送的系统信息称为其他系统信息。
RMSI由物理下行控制信道PDCCH调度，并承载在物理下行共享信道PDSCH上。RMSI调度信息所在的公共控制资源集合CORESET的时频域位置 可以在PBCH中指示。
在NR系统中，PBCH是承载在同步信号/物理广播信道块内(SS/PBCH block)发送的，一个同步周期内包含多个SS/PBCH block，不同SS/PBCH block可以发送相同或不同波束方向或端口的同步广播信号，共同实现预期区域的全覆盖。不同波束方向或端口的PBCH有合并接收的需求，因此，在考虑向PBCH内引入指示信息时，要确保信息内容相同。
为了保证数据传输的灵活性，不同SS/PBCH block的时域位置与各自对应的RMSI公共控制资源集合的时域位置间的关系可能是不同的，如何在不影响PBCH合并接收的前提下，有效的指示RMSI公共控制资源集合的时域位置是必须考虑和解决的问题。
本申请给出了一种信息传输方法与系统，包含以下方式：
网络侧将控制资源集合(Control Resource Set，CORESET)配置信息承载在物理广播信道上；其中，所述控制资源集合配置信息用于向终端指示所述控制资源集合的时频域位置信息；
所述网络侧根据所述配置信息发送所述控制资源集合CORESET。
所述控制资源集合配置信息包含以下一项或多项：
所述控制资源集合的带宽信息；
所述控制资源集合的频域位置信息；
所述控制资源集合的时域位置信息；包括以下信息至少之一：所述控制资源集合所在的时隙信息，所述控制资源集合在时隙内所占符号的位置信息。其中，所述控制资源集合在时隙内所占符号的位置信息，包括：所述控制资源集合在时隙内所占符号的起始符号索引，所述控制资源集合在时隙内所占符号的数量。
所述控制资源集合的监测窗配置信息；所述控制资源集合的监测窗配置信息包括以下信息至少之一：所述控制资源集合的监测周期，监测窗时域长度，相邻监测窗之间的时域偏移，以及起点监测窗位置。
本实施例的在公共控制资源集合CORESET内，可能包含如下下行控制信息中的一项或多项：寻呼下行控制信息，剩余最小化系统信息的调度信息，寻呼指示等。由于这些信息需要实现预期范围的全覆盖，某一个CORESET发送某一特定下行端口/下行波束方向的公共控制信息，在一个轮询发射周期/CORESET监测周期内，包含一个或多个CORESET，在一个或多个下行端口/ 下行波束方向的公共控制信息发送，实现对于预期范围的覆盖。
寻呼下行控制信息paging DCI，用于指示寻呼消息的调度信息，又称为寻呼调度下行控制信息paging scheduling DCI。
在新一代无线通信系统NR中，系统信息被分为最小化系统信息(minimum SI)及其他系统信息(other SI)。其中，最小化系统信息进一步被分为承载在物理广播信道(PBCH)上的“主系统信息(MIB)”，及承载在物理下行共享信道上的“剩余的最小化系统信息”；主系统信息用于提供小区基本系统参数，剩余的最小化系统信息用于提供初始接入相关的配置信息，例如初始接入请求的发送配置，初始接入响应消息接收配置等。其他需要广播发送的系统信息称为其他系统信息(other SI)。
RMSI由物理下行控制信道PDCCH调度，并承载在物理下行共享信道PDSCH上。RMSI调度信息所在的公共控制资源集合CORESET的时频域位置可以在PBCH中指示。
寻呼指示paging indicator，用于触发终端上报下行优选波束，又称为寻呼分组指示paging group indicator。
同步信号块(SS/PBCH block)：用于承载同步信号，物理广播信道(及对应解调参考信号DMRS)等接入相关的信号信道的时频与资源，图5是本实施例同步信号块的示意图，如图5所示，同步信号块通常包含4个符号，第一和第三符号上分别承载了主同步信号(Primary Synchronization Signal，PSS)和辅同步信号(Secondary Synchronization Signal，SSS)，同步信号序列分别映射在12个物理资源块(Physical Resource Block，PRB)内的127个资源单元(Resource Element，RE)上，如图5的(a)所示，在有些配置下，物理广播信道PBCH只承载在同步信号块内的第二和第四个符号上，占用24个PRB，或者，在另外一些资源配置下，物理广播信道PBCH映射在同步信号块内的第二、第三和第四个符号上，在多个符号上，占用的PRB数量如下示例：在第二和第四个符号上占用20个PRB，在第三个符号上，PBCH占用辅同步信号两侧有4个PRB，共8个PRB。在上述配置下，同步信号与PBCH的中心频率对齐。
本实施例还包括如下实施方式：
实施方式1：
本实施方式描述CORESET的带宽信息的指示，具体描述如下：所述控制资源集合配置信息包含所述控制资源集合的带宽信息可以是最小信道带宽，或 者，最小终端带宽。
其中，最小信道带宽定义为某一频段范围内系统所支持的最小带宽，例如，在6GHz以下频率范围，最小信道带宽定义为5MHz；在6GHz以上频率范围，最小信道带宽定义为50MHz。
最小终端带宽指，所有终端都能支持的带宽中的最大值。
对于所述CORESET带宽信息的指示，可以在物理广播信道上包含1比特(bit)用于指示当前载波的CORESET带宽是最小信道带宽，还是最小终端带宽。例如，0代表当前载波的CORESET带宽是最小信道带宽，1代表当前载波的CORESET带宽是最小终端带宽。
或者，所述CORESET带宽是基于频段预定义的，例如，在协议中规定，某一frequency band的CORESET带宽等于最小信道带宽，还是最小终端带宽。或者，在协议中给出frequency band的CORESET带宽取值，例如，24PRB(物理传输块)，48PRB等。此时，不需要单独引入带宽指示比特。
或者，所述CORESET带宽，由所述控制资源集合在时隙内所占符号的数量隐含指示，例如，所述CORESET在时隙内所占符号数为1，对应于所述CORESET带宽为48PRB；当所述CORESET在时隙内所占符号数为2时，所述CORESET带宽为24PRB。此时，不需要单独引入带宽指示比特。
实施方式2：
本实施方式描述CORESET频域位置信息的指示，描述如下：所述控制资源集合配置信息包含所述控制资源集合的频域位置信息；所述频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示。
图6是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图一，图7是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图二，图8是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图三，图9是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图四，图10是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图五，图11是本实施例频域位置通过所述控制资源集合与同步信号块间的频率偏移来指示示意图六，如图6、7、8、9、10、11所示，同步信号块的物理资源块PRB边界可以与载波实际的PRB边界(物理资源块网格(PRB grid))存在偏移(如offset所示)。物理广播信道中会引入信息比特(如4比特或5比特) 显式指示上述偏移量，并且可以预定义这个偏移是同步信号块的物理资源块PRB边界与更低频率的载波PRB边界的偏移(即如图6、8、10所示)，还是同步信号块的物理资源块PRB边界与更高频率的载波PRB边界的偏移(即如图7、9、11所示)；而CORESET的传输与载波实际的PRB边界不会存在偏移，因此，当利用与同步信号块间的频率偏移来指示CORESET的频域位置时，需要把这个偏移考虑进去，下面分别描述当CORESET的子载波间隔等于，小于或者大于同步信号块的子载波间隔时，对CORESET频域位置的指示方式：
所述CORESET的子载波间隔与所述同步信号块的子载波间隔相等时(例如CORESET与同步信号块的子载波间隔均为15kHz)，如图6、7所示，此时，载波物理资源块网格(PRB grid)内，一个载波PRB内频域上包含12个同步信号块子载波，因此，有12种可能的偏移值，即，偏移的取值范围为0到11个子载波，在PBCH内以4比特来指示具体偏移数量(即offset的取值)。
如图8、9所示，所述CORESET的子载波间隔小于所述同步信号块的子载波间隔时(例如CORESET的子载波间隔为15kHz，同步信号块的子载波间隔为30kHz)，载波物理资源块网格(PRB grid)以较大的子载波间隔(30kHz)来定义，较小子载波嵌套在较大子载波内，即1个30kHz子载波频域上对应于两个15kHz子载波。此时，载波物理资源块网格(PRB grid)内，一个载波PRB内频域上包含12个同步信号块子载波，偏移量offset的取值范围为0-11个同步信号块(30kHz)子载波，在PBCH内以4比特来指示具体偏移数量(即offset的取值)。
如图10、11所示，当所述CORESET的子载波间隔大于所述同步信号块的子载波间隔时(例如CORESET的子载波间隔为30kHz，同步信号块的子载波间隔为15kHz)，载波物理资源块网格(PRB grid)以较大的子载波间隔(30kHz)来定义，较小子载波嵌套在较大子载波内，即1个30kHz子载波频域上对应于两个15kHz子载波。此时，载波物理资源块网格(PRB grid)内，一个载波PRB内频域上包含24个同步信号块子载波，偏移量offset的取值范围为0-23个同步信号块(30kHz)子载波，在PBCH内以5比特来指示具体偏移数量(即offset的取值)。
子实施方式2.1：
当定义所述偏移是同步信号块的物理资源块PRB边界与更低频率的载波PRB边界的偏移(即如图6、8、10所示)时，所述CORESET的频域位置为如 下频域位置情况1至情况5中的一种。
情况1(case 1)：所述CORESET的低频边界比所述同步信号块的低频边界低M个15kHz子载波；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET-BW SSB)/2-M×SC SSB。
情况2(case 2)：所述CORESET的高频边界比所述同步信号块的高频边界高12×SC CORESET-M×SC SSB；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)。
情况3(case 3)：所述CORESET的中心频率与所述同步信号块的中心频率间的偏移为M个15kHz子载波；即中心频率间的绝对偏移为M×SC SSB。
情况4(case 4)：所述CORESET的高频边界比所述同步信号块的低频边界低M个15kHz子载波；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET+BW SSB)/2+M×SC SSB。
情况5(case 5)：所述CORESET的低频边界比所述同步信号块的高频边界高12×SC CORESET-M×SC SSB；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET+BW SSB)/2+(12×SC CORESET-M×SC SSB)；
其中，所述M为所述同步信号块与PRB边界间的频域偏移同步信号块子载波的个数，M为整数，且当所述CORESET的子载波间隔小于等于所述同步信号块的子载波间隔时，M的取值范围为：0≤M≤11。当所述CORESET的子载波间隔大于所述同步信号块的子载波间隔时，M的取值范围为：0≤M≤23。SC CORESET为控制资源集合子载波的频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
在上述5种情况下，其中，情况1、2、3，CORESET的频域范围包含同步信号块的频域范围；情况4、5，CORESET的频域范围与同步信号块的频域范围互不交叠。
子实施方式2.2：
图7、9、11描述了，所述偏移offset为同步信号块的物理资源块PRB边界与更高频率的载波PRB边界间的偏移的情况，与图6所描述的情况类似的，有如下情况1至情况5。
情况1(case 1)：所述CORESET的低频边界比所述同步信号块的低频边界低12×SC CORESET-M×SC SSB；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)。
情况2(case 2)：所述CORESET的高频边界比所述同步信号块的高频边界高M×SC SSB，即M个同步信号块子载波；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET-BW SSB)/2-M×SC SSB。
情况3(case 3)：所述CORESET的中心频率与所述同步信号块的中心频率间的偏移为M个15kHz子载波；即中心频率间的绝对偏移为M×SC SSB。
情况4(case 4)：所述CORESET的高频边界比所述同步信号块的低频边界低12×SC CORESET-M×SC SSB；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET+BW SSB)/2+(12×SC CORESET-M×SC SSB)。
情况5(case 5)：所述CORESET的低频边界比所述同步信号块的高频边界高M×SC SSB，即M个同步信号块子载波；此时，所述CORESET的中心频率与所述同步信号块中心频率间的偏移为：(BW CORESET+BW SSB)/2+M×SC SSB。
其中，所述M为所述同步信号块与PRB边界间的频域偏移同步信号块子载波的个数，M为整数，且当所述CORESET的子载波间隔小于等于所述同步信号块的子载波间隔时，M的取值范围为：0≤M≤11。当所述CORESET的子载波间隔大于所述同步信号块的子载波间隔时，M的取值范围为：0≤M≤23。SC CORESET为控制资源集合子载波的频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
在上述5种情况下，其中，情况1、2、3，CORESET的频域范围包含同步信号块的频域范围；情况4、5，CORESET的频域范围与同步信号块的频域范围互不交叠。
如上CORESET频域位置中，可以在协议规定其中任一种或多种可选位置，并在PBCH的CORESET配置信息指示域内，引入指示比特向终端指示当前载波的CORESET的频域位置。例如，协议规定了CORESET的频域位置包含有如下四种：case1、case2、case4、case5，PBCH内利用2比特指示当前采用上述四种频域位置的哪一种配置。
或者，如下定义，由于case 1和case 2下，CORESET与同步信号块带宽重叠，更适用于两者子载波间隔相同的情况，反之，case 4和case 5下，CORESET与同步信号块带宽互不重叠，更适用于两者子载波间隔不同的情况。因此，协议中规定，当CORESET与同步信号块子载波间隔相同时，在PBCH内，引入1比特用于指示当前采用上述case1，case2频域位置的哪一种配置；当CORESET与同步信号块子载波间隔不同时，在PBCH内，引入1比特用于指示当前采用 上述case4，case5频域位置的哪一种配置。
实施方式3：
本实施方式描述控制资源集合所在的时隙信息的指示方式。
所述CORESET所在的时隙信息有如下三种情况。
情况1：所述CORESET在包含同步信号块的时隙内传输(如图12的(a)所示，图12是本实施例一种CORESET在同步信号块(Synchronization Signal Block，SSB)所在时隙内传输的一种结构示意图：即在一个时隙内，包含两个同步信号块SSB1、SSB2，各自对应的CORESET在SSB所占符号的前一个符号内)。
情况2：所述CORESET既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输(如图12的(b)所示，是一种CORESET既在SSB所在时隙内传输，又在不包含同步信号块的时隙内传输的一种结构示意：即在一个时隙内，包含两个同步信号块SSB1、SSB2，SSB2对应的CORESET在SSB所占符号的前一个符号内，SSB1对应的CORESET在不包含SSB的时隙内传输)。
情况3：所述CORESET在不包含同步信号块的时隙内传输(如图12的(c)所示，是一种CORESET在不包含SSB所在时隙内传输的一种结构示意：即在一个不包含SSB的时隙内，CORESET分别映射在时隙内的第一个和第七个符号上)。
如图13所示，所述控制资源集合在包含同步信号块的时隙内传输还有另外一种形式，即利用多个同步信号块发送周期，图13是本实施例利用多个同步信号块发送周期的示意图(图13中，SS burst set periodicity指同步信号块的发送周期)，一个时隙(slot)内的映射了两个同步信号块，前一个SSB对应的CORESET1在第一个周期内的SSB1所在时隙内传输，后一个SSB对应的CORESET2在第二个周期内的SSB2所在时隙内传输。此时，CORESET的传输周期是SSB传输周期的2倍。
哪一个SS burst set周期内传输哪些SSB对应的CORESET可以是系统预定义的，例如，在系统帧号SFN mod 4＝0的无线帧上，包含奇数SSB对应的CORESET；在SFN mod 4＝2的无线帧上，包含偶数SSB对应的CORESET。或者，在SFN mod 4＝0或1的无线帧上，包含奇数SSB对应的CORESET；在SFN mod 4＝2或3的无线帧上，包含偶数SSB对应的CORESET。
在PBCH的CORESET配置信息指示域内，可以引入指示比特向终端指示 当前载波的CORESET所在时隙的信息。例如，利用2比特来指示，‘00’代表‘所述控制资源集合在包含同步信号块的时隙内传输’，‘01’代表‘所述控制资源集合既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输’，‘10’代表‘所述控制资源集合在不包含同步信号块的时隙内传输’，‘11’代表‘跨周期CORESET传输的方式(与图13对应)’。
或者，利用1比特来指示，‘0’代表‘所述控制资源集合在包含同步信号块的时隙内传输’，‘1’代表‘所述控制资源集合仅在不包含同步信号块的时隙内传输’。此时，‘0’实际上包含了图12的(a)、图12的(b)、图13所示三种情况。
或者，利用1比特来指示，‘0’代表‘所述控制资源集合仅在包含同步信号块的时隙内传输’；‘1’代表‘所述控制资源集合在不包含同步信号块的时隙内传输’。此时，‘0’实际上包含图12的(a)和图13两种情况；‘1’实际上包含图12的(b)和图12的(c)两种情况。
或者，协议中规定包含上述四种情况中的任意两种，在PBCH中进一步用1比特来指示当前载波采用具体哪一种配置。
实施方式4：
本实施方式描述所述CORESET在时隙内所占符号的位置信息的指示方式；其中，所述CORESET在时隙内所占符号的位置信息，包括：所述CORESET在时隙内所占符号的起始符号索引，所述CORESET在时隙内所占符号的数量。
如图14所示，图14为本实施例当前同步信号块(SSB)向时隙的映射图样示意图，其中，图14的(a)适用于子载波间隔为15kHz或30kHz(pattern 2)的同步信号块向时隙的映射；图14的(b)适用于子载波间隔为30kHz(pattern 1)或120kHz的同步信号块向时隙的映射；图14的(c)适用于子载波间隔为240kHz的同步信号块向时隙的映射。图14的(a)和图14的(b)中slot均为对应于当前同步信号块子载波间隔的时隙；图14的(c)中的slot对应于120kHz的时隙。
子实施方式4.1：
对于图14的(a)所示的15kHz或30kHz(pattern 2)的同步信号块映射，图15是本实施例CORESET在时隙内所占符号的位置信息示意图一，如图15所示，CORESET在时隙内所占符号的位置信息包括如下一种或多种，其中，由SSB出发的箭头指向与它对应的CORESET。
在图15(1)配置中，每个CORESET占用1个符号，并且映射在相同slot内，SSB具体占用SSB之前的一个符号，即对应于slot内第一个SSB的CORESET 占用slot内的第2个符号，对应于slot内第二个SSB的CORESET占用slot内的第8个符号。
在图15(2)配置中，每个CORESET占用1个符号，并且slot内第一个SSB对应的CORESET映射在5ms SSB时间窗以外slot的第8个符号上；slot内第二个SSB对应的CORESET映射在与SSB所在的slot内，具体占用SSB之前的1个符号，即slot内的第8个符号。
在图15(3)配置中，每个CORESET占用1个符号，并且slot内第一个SSB对应的CORESET映射在与SSB所在的slot内，具体占用SSB之前的一个符号，即slot内的第二个符号；slot内第二个SSB对应的CORESET映射在5ms SSB时间窗以外slot的第2个符号上。
在图15(4)配置中，每个CORESET占用1个符号，并且映射在SSB所在的slot内，SSB具体占用slot内的前两个符号，即对应于slot内第一个SSB的CORESET占用slot内的第1个符号，对应于slot内第二个SSB的CORESET占用slot内的第2个符号。
在图15(5)配置中，每个CORESET占用2个符号，并且slot内第一个SSB对应的CORESET映射在SSB所在的slot内，具体占用SSB所在slot的前2个符号；slot内第二个SSB对应的CORESET映射在5ms SSB时间窗以外slot的第1、2个符号上。
在图15(6)配置中，每个CORESET占用2个符号，并且slot内第一个SSB对应的CORESET映射在5ms SSB时间窗以外slot的第7、8个符号上；slot内第二个SSB对应的CORESET映射在SSB所在的slot内，具体占用SSB所在slot的第7、8个符号。
在图15(7)配置中，每个CORESET占用2个符号，并且slot内第一个SSB对应的CORESET映射在5ms SSB时间窗以外slot的第1、2个符号上；slot内第二个SSB对应的CORESET映射在SSB所在的slot内，具体占用SSB所在slot的第7、8个符号。
在图15(8)配置中，每个CORESET占用2个符号，并且映射在相同slot内，SSB具体占用SSB之前的两个符号，即对应于slot内第一个SSB的CORESET占用slot内的第1、2个符号，对应于slot内第二个SSB的CORESET占用slot内的第7、8个符号。
在图15(9)配置中，每个CORESET占用1或2或3或4个符号，且CORESET 与对应的SSB采用频分多路复用(Frequency-division multiplexing，FDM)的复用方式，即slot内第一个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第3个符号，对于两个符号CORESET，占用第3、4个符号，对于三个符号CORESET，占用第3、4、5个符号，对于四个符号CORESET，占用第3、4、5、6个符号；slot内第二个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第9个符号，对于两个符号CORESET，占用第9、10个符号，对于三个符号CORESET，占用第9、10、11个符号，对于四个符号CORESET，占用第9、10、11、12个符号；频域上占用SSB以外的资源。
在图15(10)配置中，每个CORESET占用1或2或3或4个符号，且CORESET与对应的SSB采用FDM的复用方式，即slot内第一个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第3个符号，对于两个符号CORESET，占用第3、4个符号，对于三个符号CORESET，占用第3、4、5个符号，对于四个符号CORESET，占用第3、4、5、6个符号；slot内第二个SSB对应的CORESET映射在5ms SSB时间窗以外slot上。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第3个符号，对于两个符号CORESET，占用第3、4个符号，对于三个符号CORESET，占用第3、4、5个符号，对于四个符号CORESET，占用第3、4、5、6个符号。频域上占用SSB对应频域资源以外的资源。
子实施方式4.2：
对于图14的(b)所示的30kHz(pattern 1)或120kHz的同步信号块映射，是以两个slot，4个SSB为周期进行映射资源配置的，图16是本实施例CORESET在时隙内所占符号的位置信息示意图二，如图16所示，CORESET在时隙内所占符号的位置信息包括如下一种或多种，其中，由SSB出发的箭头指向与它对应的CORESET。
在图16(1)配置中，每个CORESET占用1个符号，其中，第一个SSB的CORESET占用前一个slot内的第3个符号；第二个SSB的CORESET占用前一个slot内的第4个符号；第三个SSB的CORESET占用后一个slot内的第1个符号；第四个SSB的CORESET占用后一个slot内的第2个符号。
在图16(2)配置中，每个CORESET占用1个符号，其中，第一个SSB 的CORESET占用前一个slot内的第3个符号；第二个SSB的CORESET占用前一个slot内的第4个符号；第三个SSB的CORESET占用5ms SSB时间窗以外slot的第3个符号上；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第4个符号上；‘第一个SSB的CORESET与第三个SSB的CORESET间隔’等于‘第二个SSB的CORESET与第四个SSB的CORESET间隔’，例如，间隔都等于5ms。
在图16(3)配置中，每个CORESET占用1个符号，其中，第一个SSB的CORESET占用前一个slot内的第4个符号；第二个SSB的CORESET占用5ms SSB时间窗以外slot的第4个符号上；第三个SSB的CORESET占用后一个slot内的第4个符号；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第2个符号上；‘第一个SSB的CORESET与第三个SSB的CORESET间隔’等于‘第二个SSB的CORESET与第四个SSB的CORESET间隔’，例如，间隔都等于5ms。
在图16(4)配置中，每个CORESET占用1个符号，并且分别映射在第一个slot内的前四个符号上。在一实施例中，第一个SSB的CORESET占用前一个slot内的第1个符号；第二个SSB的CORESET占用前一个slot内的第2个符号；第三个SSB的CORESET占用前一个slot内的第3个符号；第四个SSB的CORESET占用前一个slot内的第4个符号。
在图16(5)配置中，每个CORESET占用2个符号，其中，第一个SSB的CORESET占用前一个slot内的第1、2个符号；第二个SSB的CORESET占用前一个slot内的第3、4个符号；第三个SSB的CORESET占用5ms SSB时间窗以外slot的第1、2个符号上；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第3、4个符号上；‘第一个SSB的CORESET与第三个SSB的CORESET的时域间隔’等于‘第二个SSB的CORESET与第四个SSB的CORESET的时域间隔’，例如，间隔都等于5ms。
在图16(6)配置中，每个CORESET占用2个符号，其中，第一个SSB的CORESET占用前一个slot内的第3、4个符号；第二个SSB的CORESET占用后一个slot内的第1、2个符号；第三个SSB的CORESET占用5ms SSB时间窗以外slot的第3、4个符号上；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第1、2个符号上；‘第一个SSB的CORESET与第三个SSB的CORESET的时域间隔’等于‘第二个SSB的CORESET与第四个SSB的 CORESET的时域间隔’，例如，间隔都等于5ms。
在图16(7)配置中，每个CORESET占用2个符号，其中，第一个SSB的CORESET占用前一个slot内的第1、2个符号；第二个SSB的CORESET占用前一个slot内的第3、4个符号；第三个SSB的CORESET占用后一个slot的第1、2个符号；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第1、2个符号上；‘第一个SSB的CORESET与第四个SSB的CORESET的时域间隔’等于5ms。
在图16(8)配置中，每个CORESET占用2个符号，其中，第一个SSB的CORESET占用前一个slot内的第1、2个符号；第二个SSB的CORESET占用前一个slot内的第3、4个符号；第三个SSB的CORESET占用后一个slot的第1、2个符号；第四个SSB的CORESET占用5ms SSB时间窗以外slot的第1、2个符号上；‘第二个SSB的CORESET与第四个SSB的CORESET的时域间隔’等于5ms，或者，‘第三个SSB的CORESET与第四个SSB的CORESET的时域间隔’等于5ms。
在图16(9)配置中，每个CORESET占用1个或2个或3个或4个符号，且CORESET与对应的SSB采用FDM的复用方式，即：
第一个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第5个符号，对于两个符号CORESET，占用第5、6个符号，对于三个符号CORESET，占用第5、6、7个符号，对于四个符号CORESET，占用第5、6、7、8个符号；频域上占用SSB以外的资源。
第二个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第9个符号，对于两个符号CORESET，占用第9、10个符号，对于三个符号CORESET，占用第9、10、11个符号，对于四个符号CORESET，占用第9、10、11、12个符号；频域上占用SSB以外的资源。
第三个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第3个符号，对于两个符号CORESET，占用第3、4个符号，对于三个符号CORESET，占用第3、4、5个符号，对于四个符号CORESET，占用第3、4、5、6个符号；频域上占用SSB以外的资源。
第四个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第7个符号，对于两个符号CORESET，占用第7、8个符号，对于三个符号CORESET，占用第7、8、9个符号，对于四个符号CORESET，占用第7、8、9、10个符号；频域上占用SSB以外的资源。
在图16(10)配置中，每个CORESET占用1个或2个或3个或4个符号，且CORESET与对应的SSB采用FDM的复用方式，即：
第一个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第5个符号，对于两个符号CORESET，占用第5、6个符号，对于三个符号CORESET，占用第5、6、7个符号，对于四个符号CORESET，占用第5、6、7、8个符号；频域上占用SSB以外的资源。
第二个SSB对应的CORESET映射在5ms SSB时间窗以外的slot内。在一实施例中，当CORESET占用1个符号时，占用第5个符号，对于两个符号CORESET，占用第5、6个符号，对于三个符号CORESET，占用第5、6、7个符号，对于四个符号CORESET，占用第5、6、7、8个符号；频域上占用SSB对应频域资源以外的资源。且‘第一个SSB的CORESET与第三个SSB的CORESET间隔’等于5ms。
第三个SSB对应的CORESET映射在SSB所在的slot内。在一实施例中，当CORESET占用1个符号时，占用SSB所在slot的第3个符号，对于两个符号CORESET，占用第3、4个符号，对于三个符号CORESET，占用第3、4、5个符号，对于四个符号CORESET，占用第3、4、5、6个符号；频域上占用SSB以外的资源。
第四个SSB对应的CORESET映射在5ms SSB时间窗以外的slot内所在的slot内。在一实施例中，当CORESET占用1个符号时，占用第7个符号，对于两个符号CORESET，占用第7、8个符号，对于三个符号CORESET，占用第7、8、9个符号，对于四个符号CORESET，占用第7、8、9、10个符号；频域上占用SSB对应频域资源以外的资源。且‘第二个SSB的CORESET与第四个SSB的CORESET间隔’间隔等于5ms。
子实施方式4.3：
当CORESET仅映射在SSB以外的slot时，图17是本实施例CORESET映 射在SSB以外的slot的示意图一，图18是本实施例CORESET映射在SSB以外的slot的示意图二，如图17、18所示，CORESET在时隙内所占符号的位置信息包括如下一种或多种：
在图17(1)配置中，一个slot内包含两个CORESET，每个占一个符号，分别位于slot内的第一个和第二个符号上。
在图17(2)配置中，一个slot内包含两个CORESET，每个占两个符号。在一实施例中，一个CORESET映射在slot内的第1、2符号上，另一个CORESET映射在slot内的第3、4符号上。
在图17(3)配置中，一个slot内包含两个CORESET，每个占一个符号，分别位于slot内的第一个和第8个符号上。
在图17(4)配置中，一个slot内包含两个CORESET，每个占两个符号。在一实施例中，一个CORESET映射在slot内的第1、2符号上，另一个CORESET映射在slot内的第8、9符号上。
在图17(5)配置中，一个slot内包含两个CORESET，每个占一个符号，分别位于slot内的第3个和第9个符号上。
在图17(6)配置中，一个slot内包含两个CORESET，每个占两个符号。在一实施例中，一个CORESET映射在slot内的第3、4符号上，另一个CORESET映射在slot内的第9、10符号上。
在图17(7)配置中，一个slot内包含1个CORESET，占1个符号。在一实施例中，这个CORESET映射在slot内的第1符号上。
在图17(8)配置中，一个slot内包含1个CORESET，占2个符号。在一实施例中，这个CORESET映射在slot内的第1、2符号上。
在图18(1)配置中，以两个slot为配置周期，包含4个CORESET，每个CORESET包含1个符号：第一个CORESET映射在前一个slot的第5个符号上，第二个CORESET映射在前一个slot的第9个符号上，第三个CORESET映射在后一个slot的第3个符号上，第四个CORESET映射在后一个slot的第7个符号上。
在图18(2)配置中，以两个slot为配置周期，包含4个CORESET，每个CORESET包含2个符号：第一个CORESET映射在前一个slot的第5、6个符号上，第二个CORESET映射在前一个slot的第9、10个符号上，第三个CORESET映射在后一个slot的第3、4个符号上，第四个CORESET映射在后一个slot的 第7、8个符号上。
在上述配置中，可以通过如下方式只是给终端，当前所采用的CORESET在时隙内所占符号的位置。
终端根据实施方式1所描述的CORESET带宽配置，可以确定当前CORESET的带宽，当CORESET带宽取最小信道带宽时，由于带宽值比较小，因此，倾向于采用CORESET与SSB时分复用的方式。
反之，当CORESET带宽取较大值，即最小UE带宽时，倾向于采用CORESET与SSB频分复用的方式。
另外，终端根据实施方式3所描述的方式，可以确定CORESET所在的时隙信息。
定义如下3个表格，表1，表2，表3。
其中，表1适用于CORESET带宽配置为‘最小信道带宽’，且CORESET所在的时隙信息为‘所述控制资源集合在包含同步信号块的时隙内传输’；在PBCH中，3比特具体指示终端表1中8种配置中的哪一种被采用。
表2适用于CORESET带宽取较大值，即‘最小UE带宽’，且CORESET所在的时隙信息为‘所述控制资源集合在包含同步信号块的时隙内传输’；在PBCH中，3比特具体指示终端表2中8种配置中的哪一种被采用。
表3适用于CORESET所在的时隙信息为‘所述控制资源集合在不包含同步信号块的时隙内传输’；或者，CORESET与同步信号块子载波间隔不同，此时CORESET与同步信号块分属于不同的带宽部分(Bandwidth Part，BWP)，在PBCH中，3比特具体指示终端表3中8种配置中的哪一种被采用。
表1
Figure PCTCN2018116114-appb-000001
Figure PCTCN2018116114-appb-000002
表2
Figure PCTCN2018116114-appb-000003
表3
Figure PCTCN2018116114-appb-000004
实施方式5：
本实施方式描述所述CORESET监测窗(PDCCH监测窗)配置信息的指示方式。
所述CORESET监测窗配置信息包括以下信息至少之一：所述CORESET的监测周期，起点监测窗位置，监测窗时域长度，以及相邻监测窗之间的时域偏移。
其中，所述CORESET监测窗又称为物理下行控制信道PDCCH监测窗，每个监测窗与一个同步信号块对应，所述CORESET的监测窗内包含一个或多个CORESET监测时机，即一个或多个传输PDCCH的资源。基站在一个CORESET监测窗内选择一个PDCCH传输资源，用于PDCCH发送，终端可以在CORESET监测窗内的一个或多个PDCCH传输资源上尝试接收与同步信号块相对应的PDCCH。同步信号块与对应监测窗内的CORESET或PDCCH存在准共位置(Quasi-co-location，QCL)关系。
所述CORESET的监测周期，也可以理解为CORESET的传输周期，这个周期的取值可以是预定义的，例如，预定义为40ms。也可以在协议中预定义多个监测周期的取值，如20ms，40ms，在PBCH中通过1比特指示当前载波的监测周期具体取值。
所述CORESET的起点监测窗位置，指第一个CORESET监测窗的时域起点位置，以CORESET传输周期为20ms为例，当所述CORESET在包含同步信号块的时隙内传输时，CORESET起点监测窗位置是预定义的，图19是本实施例CORESET在包含同步信号块的时隙内传输的示意图，如图19所示，CORESET的起点监测窗位置为SFN mod 2＝0的无线帧起点。
当所述CORESET在不包含同步信号块的时隙内传输，CORESET起点监测窗位置是预定义的，图20是本实施例CORESET在不包含同步信号块的时隙内传输的示意图，如图20所示，CORESET的起点监测窗位置为SFN mod 2＝0的无线帧的第6个子帧(即后半帧)。
当所述CORESET既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输，图21是本实施例CORESET既在包含同步信号块的时隙内传输又在不包含同步信号块的时隙内传输示意图(如图21所示，对于在同步信号块所在时隙内发送的CORESET，其起点监测窗位置为SFN mod 2＝0的无线帧起点；对于在不包含同步信号块的时隙内发送的CORESET，其起点监测窗位 置为SFN mod 2＝0的无线帧的第6个子帧(即后半帧)。
所述CORESET的监测窗时域长度为1个或多个时隙；例如，监测窗的时域长度为以下一种或多种：1个时隙，2个时隙，4个时隙，或者，M个时隙，其中，M为一个同步信号块传输周期内同步信号块所占用的时隙数量。
当所述CORESET在同步信号块所在时隙内传输时，监测窗的时域长度为1个时隙；对于在不包含同步信号块的时隙内传输CORESET时，监测窗的时域长度可以是1个或多个时隙。
在PBCH的CORESET配置信息指示域内，可以引入指示比特向终端指示当前载波的CORESET监测窗的时域长度。例如，利用2比特来指示，‘00’代表‘监测窗的时域长度为1个时隙’，‘01’代表‘监测窗的时域长度为2个时隙’，‘10’代表‘监测窗的时域长度为M个时隙’，‘11’状态保留’。
或者，协议中规定只包含上述四种CORESET监测窗的时域长度中的任意两种，在PBCH中进一步用1比特来指示当前载波采用具体哪一种配置，例如，‘0’代表‘监测窗的时域长度为1个时隙’，‘1’代表‘监测窗的时域长度为2个时隙’。
或者，协议中规定CORESET监测窗的时域长度可以在以下三种之中配置：1个时隙，2个时隙，4个时隙；并将CORESET监测窗的时域传输资源与监测窗的时域长度进行联合指示，共占用2比特，例如，
′00′：CORESET在包含SS/PBCH block的时隙中传输，且CORESET监测窗长度＝1slot；
′01′：CORESET在不包含SS/PBCH block的时隙中传输，且CORESET监测窗长度＝1slot；
′10′：CORESET在不包含SS/PBCH block的时隙中传输，且CORESET监测窗长度＝2slot；
′11′：CORESET在不包含SS/PBCH block的时隙中传输，且CORESET监测窗长度＝4slot；
相邻监测窗之间的时域偏移，包括以下一种或多种：0，监测窗的时域长度，监测窗时域长度的1/X，其中，X为大于1的整数，其具体取值可以是在协议中预定义的，或者，是通过信令指示的。
图22是本实施例CORESET在同步信号块所在时隙内传输示意图，如图22所示，所述CORESET在同步信号块所在时隙内传输时，且CORESET与对应的SSB频分复用传输，监测窗时域长度为1个时隙，相邻监测窗之间的时域偏移 等于监测窗时域长度，即1个时隙。此时，相邻监测窗间不存在交叠。图22中，包含8个同步信号块可以被用来作为发送同步信号及物理广播信道的资源，基站可以在其中选择部分或全部作为实际发送的同步信号块(actual SSB)。
图23是本实施例CORESET在不包含同步信号块时隙内传输示意图一，图23中，所述CORESET在不包含同步信号块时隙内传输，即同步信号块所在无线帧的后半帧，监测窗时域长度为1个时隙，相邻监测窗之间的时域偏移等于监测窗时域长度，即1个时隙。此时，相邻监测窗间不存在交叠。图23中虚框所示为虚假的同步信号块(pseudo SSB)，CORESET的传输也将避开这些虚假的同步信号块，CORESET在时隙内所占用的资源，与图22相同。这样配置的好处是，当同步信号块的传输周期为5ms时，此时，CORESET所在的时隙内也将传输下一个周期的同步信号块，由于CORESET的传输避开了传输同步信号块的资源，因此，即使同步信号块的传输周期为5ms，两者也不会产生冲突。终端也就无需获知当前载波的实际同步信号块传输周期。
图24是本实施例CORESET在不包含同步信号块时隙内传输示意图二，如图24所示，所述CORESET在不包含同步信号块时隙内传输，即同步信号块所在无线帧的后半帧，监测窗时域长度为2个时隙，相邻监测窗之间的时域偏移等于监测窗时域长度的1/2，即1个时隙。则相邻监测窗间是部分重叠的。在一实施例中，同步信号块所在时隙slot1内第二个同步信号块被实际传输，这个同步信号块对应于监测窗1，即后半帧的第二、第三个时隙，这两个时隙内包含4个CORESET传输资源，基站在其中选择一个来发送与这个同步信号块对应的CORESET。类似的，在slot2内的第一个同步信号块被实际发送，它对应与监测窗2，即第三、第四个时隙，基站在这两个时隙内的CORESET传输资源中选择一个来发送与这个同步信号块对应的CORESET。
需要注意的是，与不同同步信号块相对应的CORESET，不能占用相同的CORESET传输资源，因此，当为后面的同步信号块在对应的监测窗内选择CORESET传输资源时，需要避开已经被占用的CORESET传输资源。
图25是本实施例所有同步信号块对应于相同的CORESET监测窗示意图，如图25所示，所有同步信号块对应于相同的CORESET监测窗。在一实施例中，4个包含同步信号块的时隙内包含8个同步信号块资源，此时，只发送了其中两个同步信号块，8个同步信号块均对应于同一个CORESET监测窗，监测窗内包含8个CORESET传输资源，对于终端来说，无论接收到哪一个同步信号块， 均需要在这个监测窗内的8个CORESET监测时机上，尝试接收对应的CORESET。
图26是本实施例多个同步信号块对应于一个CORESET监测窗示意图，如图26所示，多个同步信号块对应于一个CORESET监测窗。在一实施例中，4个包含同步信号块的时隙内包含8个同步信号块资源，此时，实际发送了前4个同步信号块，前两个时隙内的4个同步信号块均对应于第一个CORESET监测窗(时域上对应于前两个虚假的同步信号块时隙)，后两个时隙内的4个同步信号块均对应于第二个CORESET监测窗(时域上对应于第三、第四个虚假的同步信号块时隙)，对于终端来说，当接收到前四个SSB中的一个时，需要在监测窗1内的8个CORESET监测时机上，尝试接收对应的CORESET，当接收到后四个SSB中的一个时，需要在监测窗2内的8个CORESET监测时机上，尝试接收对应的CORESET。
在PBCH的CORESET配置信息指示域内，可以引入指示比特向终端指示当前载波的CORESET相邻监测窗的时域偏移。例如，利用2比特来指示，‘00’代表‘相邻监测窗的时域偏移为0’，‘01’代表‘相邻监测窗的时域偏移为监测窗长度’，‘10’代表‘相邻监测窗的时域偏移为监测窗长度的1/X’，‘11’状态保留’。其中，X为大于1的整数，其具体取值可以在协议中规定，或者，通过信令指示。
在上述指示方式中，需要引入2比特的指示开销，为了缩减这个开销。也可以根据不同的监测窗时域长度，限制相邻监测窗时域偏移的种类。例如，当监测窗长度为1个时隙时，规定相邻监测窗之间的时域偏移只存在两种可能：相邻监测窗的时域偏移为监测窗长度(即相邻监测窗不重叠，且连续配置)，或者，相邻监测窗的时域偏移为监测窗时域长度的1/X(即相邻监测窗部分重叠)。此时，只需1比特进行这个偏移值的指示，例如，‘0’代表‘相邻监测窗的时域偏移为监测窗长度’，‘1’代表‘相邻监测窗的时域偏移为监测窗长度的1/X’。同样的，X为大于1的整数，其具体取值可以在协议中规定，或者，通过信令指示。
对于监测窗长度大于1个时隙的情况，规定相邻监测窗之间的时域偏移也只存在两种可能：相邻监测窗的时域偏移为0(即相邻监测窗完全重叠)，相邻监测窗的时域偏移为监测窗长度的1/X(即相邻监测窗部分重叠)。此时，只需1比特进行这个偏移值的指示，例如，‘0’代表‘相邻监测窗的时域偏移为0’，‘1’代表‘相邻监测窗的时域偏移为监测窗长度的1/X’。同样的，X为大于1的整数，其具体取值可以在协议中规定，或者，通过信令指示。
本申请中，各个实施方式中的技术特征，在不冲突的情况下，可以组合在一个实施方式中使用。每个实施方式仅仅是本申请的最优实施方式。
本实施例给出了公共控制信息块配置信息的传输方法，通过本方案，可以在不影响PBCH合并接收(即保证各个SS block内的PBCH内容相同)的前提下，有效的指示控制资源集合的时频域资源位置。另外，通过配置控制资源集合监测窗时域长度，及相邻SS block对应的监测窗时域偏移，使得公共控制块的传输资源更灵活，很好的避免了突发业务传输对公共控制块传输造成的影响。
实施例4
本申请的实施例还提供了一种存储介质，该存储介质包括存储的程序，其中，上述程序运行时执行上述任一项所述的方法。
在本实施例中，上述存储介质可以被设置为存储用于执行以下步骤S1和步骤S2的程序代码：
在步骤S1中，将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息，频域位置信息。
在步骤S2中，根据所述配置信息向终端发送所述控制资源集合。
在一实施例中，在本实施例中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、移动硬盘、磁碟或者光盘等多种可以存储程序代码的介质。
本申请的实施例还提供了一种处理器，该处理器用于运行程序，其中，该程序运行时执行上述任一项方法中的步骤。
在本实施例中，上述程序用于执行以下步骤S1和步骤S2。
在步骤S1中，将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息，频域位置信息。
在步骤S2中，根据所述配置信息向终端发送所述控制资源集合。
在一实施例中，本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例，本实施例在此不再赘述。
显然，本领域的技术人员应该明白，上述的本申请的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，在一实施例中，它们可以用计算装置可执行的程 序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本申请不限制于任何特定的硬件和软件结合。

Claims (27)

  1. 一种信息发送方法，包括：
    将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；
    根据所述配置信息向终端发送所述控制资源集合。
  2. 根据权利要求1所述的方法，其中，所述控制资源集合的配置信息包括：所述控制资源集合的带宽信息。
  3. 根据权利要求2所述的方法，其中，所述带宽信息包括以下至少之一：最小信道带宽和最小终端带宽。
  4. 根据权利要求1所述的方法，其中，所述控制资源集合的配置信息包括：所述控制资源集合的频域位置信息，其中，所述频域位置信息通过所述控制资源集合与同步信号块间的频率偏移来指示。
  5. 根据权利要求4所述的方法，其中，所述控制资源集合的频域位置信息通过以下之一来指示：
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+(12×SC CORESET+M×SC SSB)；
    其中，所述M为所述同步信号块与载波物理资源块网格PRB grid间的频域偏移同步信号块子载波的个数，M为整数，SC CORESET为控制资源集合子载波的频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
  6. 根据权利要求1所述的方法，其中，所述控制资源集合的配置信息包括所述控制资源集合的时域位置信息；其中，所述时域位置信息包括以下信息至少之一：所述控制资源集合所在的时隙信息和所述控制资源集合在时隙内所占 符号的位置信息。
  7. 根据权利要求6所述的方法，其中，所述控制资源集合在时隙内所占符号的位置信息包括：所述控制资源集合在时隙内所占符号的起始符号索引和所述控制资源集合在时隙内所占符号的数量。
  8. 根据权利要求6所述的方法，其中，所述控制资源集合所在的时隙信息包括以下之一：
    所述控制资源集合在包含同步信号块的时隙内传输；
    所述控制资源集合在不包含同步信号块的时隙内传输；
    所述控制资源集合既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输。
  9. 根据权利要求8所述的方法，其中，所述控制资源集合的配置信息还用于指示：在所述包含同步信号块的时隙内是否传输了所述控制资源集合；或者，在不包含所述同步信号块的时隙内是否传输了所述控制资源集合。
  10. 根据权利要求8所述的方法，其中，在所述控制资源集合既在包含同步信号块的时隙内传输，又在不包含同步信号块的时隙内传输时，所述控制资源集合在所述包含同步信号块的时隙，及在所述不包含同步信号块的时隙采用相同的资源映射规则。
  11. 根据权利要求1所述的方法，其中，所述控制资源集合的配置信息包括所述控制资源集合的监测窗配置信息，其中，所述控制资源集合的监测窗配置信息包括以下信息至少之一：所述控制资源集合的监测周期，监测窗时域长度，相邻监测窗之间的时域偏移，以及起点监测窗位置，其中，所述控制资源集合的监测窗内包括至少一个控制资源集合监测时机。
  12. 根据权利要求11所述的方法，其中，所述控制资源集合的监测窗与同步信号块对应。
  13. 根据所述权利要求11所述的方法，其中，所述控制资源集合的监测窗时域长度大于或等于1个时隙。
  14. 根据权利要求11所述的方法，其中，所述相邻监测窗之间的时域偏移包括以下至少一种：0，监测窗的时域长度，监测窗时域长度的1/X，其中，X为大于1的整数，其X的取值通过预定协议预定义或者通过信令指示。
  15. 根据权利要求13或14所述的方法，其中，
    当所述控制资源集合的监测窗时域长度为1个时隙时，所述相邻监测窗之 间的时域偏移为监测窗的时域长度，或者，监测窗时域长度的1/X；
    当所述控制资源集合的监测窗时域长度为大于1个时隙时，所述相邻监测窗之间的时域偏移为0，或者，监测窗时域长度的1/X。
  16. 根据权利要求11所述的方法，其中，所述起点监测窗位置，通过与同步时间块起点时隙间的时域偏移来指示，或者，所述起点监测窗位置固定配置。
  17. 根据权利要求1所述的方法，其中，所述控制资源集合为以下之一：剩余的最小化系统信息RMSI公共控制资源集合和寻呼信息公共控制资源集合。
  18. 一种信息接收方法，包括：
    接收控制资源集合的配置信息，其中，所述控制资源集合的配置信息承载在物理广播信道上，所述配置信息用于指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；
    根据所述配置信息接收所述控制资源集合。
  19. 根据权利要求18所述的方法，其中，所述控制资源集合的配置信息包括：所述控制资源集合的带宽信息。
  20. 根据权利要求18所述的方法，其中，所述控制资源集合的配置信息包括：所述控制资源集合的频域位置信息，其中，所述频域位置信息通过所述控制资源集合与同步信号块间的频率偏移来指示。
  21. 根据权利要求20所述的方法，其中，所述控制资源集合的频域位置信息通过以下之一来指示：
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET-BW SSB)/2-(12×SC CORESET-M×SC SSB)；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+M×SC SSB；
    所述控制资源集合的中心频率与所述同步信号块的中心频率间的偏移为(BW CORESET+BW SSB)/2+(12×SC CORESET+M×SC SSB)；
    其中，所述M为所述同步信号块与载波物理资源块网格PRB grid间的频域偏移同步信号块子载波的个数，M为整数，SC CORESET为控制资源集合子载波的 频域宽度，SC SSB为同步信号块子载波的频域宽度，BW CORESET为控制资源集合带宽，BW SSB为同步信号块带宽。
  22. 根据权利要求18所述的方法，其中，所述控制资源集合的配置信息包括所述控制资源集合的时域位置信息；其中，所述时域位置信息包括以下信息至少之一：所述控制资源集合所在的时隙信息和所述控制资源集合在时隙内所占符号的位置信息。
  23. 根据权利要求18所述的方法，其中，所述控制资源集合的配置信息包括所述控制资源集合的监测窗配置信息，其中，所述控制资源集合的监测窗配置信息包括以下信息至少之一：所述控制资源集合的监测周期，监测窗时域长度，相邻监测窗之间的时域偏移，以及起点监测窗位置，其中，所述控制资源集合的监测窗内包括至少一个控制资源集合监测时机。
  24. 一种信息发送装置，其中，包括：
    配置模块，设置为将控制资源集合的配置信息承载在物理广播信道上；其中，所述配置信息用于向终端指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；
    发送模块，设置为根据所述配置信息发送所述控制资源集合。
  25. 一种信息接收装置，其中，包括：
    第一接收模块，设置为接收控制资源集合的配置信息，其中，所述控制资源集合的配置信息承载在物理广播信道上，所述配置信息用于指示所述控制资源集合的以下至少之一：时域位置信息和频域位置信息；
    第二接收模块，设置为根据所述配置信息接收所述控制资源集合。
  26. 一种存储介质，所述存储介质包括存储的程序，其中，所述程序运行时执行权利要求1至23中任一项所述的方法。
  27. 一种处理器，所述处理器用于运行程序，其中，所述程序在所述处理器上运行时执行权利要求1至23中任一项所述的方法。
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