WO2019085232A1 - 一种高速dml发射组件 - Google Patents

一种高速dml发射组件 Download PDF

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Publication number
WO2019085232A1
WO2019085232A1 PCT/CN2017/118635 CN2017118635W WO2019085232A1 WO 2019085232 A1 WO2019085232 A1 WO 2019085232A1 CN 2017118635 W CN2017118635 W CN 2017118635W WO 2019085232 A1 WO2019085232 A1 WO 2019085232A1
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Prior art keywords
ceramic substrate
dml
heat sink
chip
high speed
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PCT/CN2017/118635
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English (en)
French (fr)
Inventor
刘倚红
段启金
喻慧君
伍斌
付永安
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武汉电信器件有限公司
武汉光迅科技股份有限公司
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Publication of WO2019085232A1 publication Critical patent/WO2019085232A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4266—Thermal aspects, temperature control or temperature monitoring
    • G02B6/4268—Cooling
    • G02B6/4271—Cooling with thermo electric cooling
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects

Definitions

  • the present invention relates to the field of laser technology, and in particular to a high speed DML transmitting assembly.
  • DML Directly Modulated Laser
  • the temperature of the working temperature DML chip is high, the availability is poor, the price of the commercial temperature or the extended temperature chip is low, and the availability is strong, especially the products with higher speed and performance requirements, such as 50G PAM4, it is almost difficult to have Directly used temperature chip.
  • the first one adopts the traditional butterfly packaging process, with built-in optical isolators, TECs, chips, lenses, etc.
  • the related patents are "high-speed butterfly-packaged light emitter components" (CN 104570236A), which have excellent performance but process. More complicated, high-volume manufacturing costs are higher;
  • the technical problem to be solved by the present invention is that there is a lack of an effective high-speed DML transmitting component in the prior art, which can meet the quality requirements of the input differential signal and achieve the TEC temperature control solution.
  • a further technical problem to be solved by the present invention is to improve the high speed differential signal GND loop in the DML transmitting component.
  • the present invention provides a high speed DML emitting assembly comprising a metal base 001, a DML chip 002, an MPD chip 003, a ceramic substrate 004, a heat sink 005, a thermistor 006 and a TEC 007, the ceramic substrate 004 being an inverted concave structure
  • the metal base 001 is located adjacent to the two-pole pin 009, and is respectively provided with a conductive boss 008.
  • the two arms of the ceramic substrate 004 are respectively fixed on the metal base 001, and are located on the corresponding conductive boss 008 and the bipolar tube.
  • the back surface of the ceramic substrate 004 is plated with a grounding conductive layer, and is electrically connected to the conductive bumps 008 adjacent to the two poles, respectively, and the front faces of the arms of the ceramic substrate 004 and the two-pole pins respectively
  • the conductive connection of the 009, wherein the front surface of the ceramic substrate 004 is respectively plated with a conductive layer, and the conductive layers of the two arms are respectively used to couple the power supply interface of the DML chip 002, so that the two-pole pin 009 and the DML Chip 002 completes electrical connection;
  • the TEC 007 is disposed on the metal base 001 and embedded in the recessed portion of the ceramic substrate 004.
  • the MPD chip 003 is disposed on the TEC 007 and located at the backlight of the DML chip 002; the heat sink 005 is attached to the The TEC007 and the back surface of the ceramic substrate are described, and the thermistor 006 is disposed on the surface of the heat sink 005.
  • the heat sink 005 is specifically an L-shaped heat sink, specifically:
  • the heat sink 005 is placed against the ceramic substrate 004 and mounted on the upper surface of the TEC 007.
  • a thermal conductive adhesive is filled between the heat sink 005 and the coupling surface of the ceramic substrate 004.
  • the coupling surface of the heat sink 005 and the TEC007 is filled with a gold tin solder or a conductive silver paste.
  • the high speed DML emitting component is suitable for the TO package, and further includes a cap 013, wherein the cap 013 is coupled to the metal base 001, and a lens is disposed at the light exit of the cap 013.
  • the high-speed DML transmitting component is applicable to the TO package, and further includes a first metal member 014, an isolator 015, a second metal member 016, a fiber optic pin assembly 017, and a flexible circuit board 018, specifically:
  • the bottom of the first metal member 014 is coupled to the cap 013, and the isolator 015 is disposed at a connection interface between the top of the first metal member 014 and the bottom of the second metal member 016.
  • the optical fiber pin assembly 017 a bottom portion coupled to the top of the second metal;
  • the coupling is fixed by gluing or laser welding.
  • the flexible circuit board 018 is specifically made of a substrate having a low dielectric constant of PI, LCP or TK.
  • the heat sink 005 is made of tungsten copper having a high thermal conductivity.
  • two conductive bumps are introduced on the sides of the two poles on the metal base, and a ceramic substrate with a thin film circuit is inserted between them for transmitting the differential driving signal of the DML chip; And designing a thin film metal circuit as an impedance transmission line; the TEC is disposed on the metal base and embedded in the groove portion of the ceramic substrate, so that the DML can optimize the differential input signal while satisfying the basic TEC temperature control. Improve differential signal integrity.
  • FIG. 1 is a structural exploded view of a high speed DML transmitting component according to an embodiment of the present invention
  • FIG. 2 is a schematic front view of a ceramic pedestal in a high-speed DML transmitting component according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a GND equation of a ceramic susceptor for comparison according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram of a GND equation of a ceramic susceptor according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram showing a layout position of a conductive bump in a high-speed DML transmitting component according to an embodiment of the present invention
  • FIG. 6 is a schematic view showing a mounting position of a ceramic substrate in a high-speed DML transmitting component according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of an L-type heat sink structure in a high-speed DML transmitting component according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of pin connections of components in a high-speed DML transmitting component according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a package structure of a high-speed DML transmitting component in a TO package according to an embodiment of the present invention.
  • FIG. 10 is a structural exploded view of a high-speed DML transmitting component in a TO package with a flexible tape and an optical interface according to an embodiment of the present invention
  • FIG. 11 is a schematic structural diagram of a high-speed DML transmitting component in a TO package with a flexible tape and an optical interface according to an embodiment of the present invention.
  • FIG. 13 is a diagram showing the results of an electric reflection simulation simulation experiment of a monolithic ceramic substrate solution according to an embodiment of the present invention.
  • the symbol “/” means a meaning having two functions at the same time, for example, "second in/out port” indicates that the port can enter or exit light.
  • the symbol “A and / or B” indicates that the combination between the front and back objects connected by the symbol includes “A”, “B”, “A and B", such as “backscattered light and / or Reflected light indicates that it can express either “backscattered light”, “reflected light” alone, and “backscattered light and reflected light”.
  • Embodiment 1 of the present invention provides a high-speed DML transmitting component, as shown in FIG. 1 and FIG. 2, including a metal base 001, a DML chip 002, an MPD chip 003, a ceramic substrate 004, a heat sink 005, a thermistor 006, and a TEC.
  • the ceramic substrate 004 is an inverted concave structure (as shown in FIG. 2, with respect to the metal base 001, the ceramic substrate 004 is a concave structure placed in an inverted position, referred to as an inverted concave structure for short)
  • the metal base 001 is located adjacent to the two-pole pin 009, and is respectively provided with a conductive boss 008.
  • the two arms of the ceramic substrate 004 (such as 041 and 042 identified in FIG. 2) are respectively embedded on the metal base 001, and are correspondingly located. Between the conductive bump 008 and the two-pole pin 009, the back surface of the ceramic substrate 004 is plated with a ground conductive layer (not shown in FIG. 2), and is electrically connected to the conductive bumps 008 adjacent to the two poles, respectively.
  • the front faces of the two arms of the ceramic substrate 004 are respectively electrically connected to the two-pole pins 009.
  • the front faces of the ceramic substrate 004 are respectively plated with conductive layers, and the conductive layers of the two arms are respectively used for coupling DML.
  • the TEC 007 is disposed on the metal base 001 and embedded in the recessed portion of the ceramic substrate 004.
  • the MPD chip 003 is disposed on the TEC 007 and located at the backlight of the DML chip 002; the heat sink 005 is attached to the The TEC007 and the back surface of the ceramic substrate are described, and the thermistor 006 is disposed on the surface of the heat sink 005.
  • two conductive bumps are introduced on the sides of the two poles on the metal base, and a ceramic substrate with a thin film circuit is inserted between them for transmitting the differential driving signal of the DML chip; And designing a thin film metal circuit as an impedance transmission line; the TEC is disposed on the metal base and embedded in the groove portion of the ceramic substrate, so that the DML can optimize the differential input signal while satisfying the basic TEC temperature control. Improve differential signal integrity. Aligned with the two-pole pin and soldered together, the same as the block ceramic substrate, and then the gold wire bond connection scheme (as shown in Figure 3, where the dotted line plane is the GND loop, the dotted line frame is corresponding, etc. Equation), because the GND loop (the dotted line in Figure 4 is the GND loop of the invention) is more complete, the electrical reflection is smaller, the high-frequency signal attenuation is lower, and the signal integrity is better.
  • the embodiments of the invention are applicable to industrial grade ultra-high temperature or ultra-low temperature requirements, and are particularly suitable for products with high requirements on emission performance such as 50G PAM4.
  • a conductive layer is grown on both arms 041 and 042 of the ceramic substrate 004 by sputtering, respectively, for providing a conduction path for driving signals to the DML chip 002 fixed on the front side of the ceramic substrate 004.
  • the ceramic substrate 004 is preferably made of a high-heat-dissipation aluminum nitride AlN material, and the ceramic substrate 004 has a pre-sputtered solder design on the front and back sides, wherein the front solder has a higher melting point than the back solder; in general, the DML chip is first used.
  • 002 is formed by soldering and gold bonding to form a CoC (Chip on Carrier) on the ceramic substrate 004, and then aging by CoC, and then fixing the qualified CoC to the operation of the bipolar pin 009 and the conductive bump 008.
  • CoC Chip on Carrier
  • the conductive bump 008 and the two-pole pin 009 are symmetrically distributed, wherein the conductive bump 008 also functions to provide a ground loop for the DML chip 002, and a fixed function. Therefore, the conductive bump 008 and the metal base 001 can be fixed by using a conductive adhesive or directly using solder.
  • the ceramic substrate 004 is formed to have a thickness that fits into a space region composed of a single pin 009 and a single conductive bump 008 because the ceramic substrate 004 needs to be separately coupled to the bipolar pin 009 and the conductive bump.
  • the 008 completes the electrical connection (for example, the conductive layers on the two arms 041 and 042 of the ceramic substrate 004 are electrically connected to the two-pole pin 009 by soldering; the back surface of the ceramic substrate 004 is electrically connected to the conductive bump 008 by the conductive paste 008 connection).
  • the heat sink 005 is specifically an L-shaped heat sink, specifically:
  • the heat sink 005 is placed against the ceramic substrate 004 and mounted on the upper surface of the TEC 007.
  • the L-shaped heat 005 can be made into an unequal model, that is, the thickness of the bottom of the heat sink 005 that is attached to the TEC 007 ( The thickness of the sidewall of the heat sink 005 bonded to the ceramic substrate 004 (shown as d2 as shown in FIG. 7) is made thicker (ie, d1>d2), as shown by d1 in FIG.
  • the thermistor 006 is disposed on the heat sink 005 (preferably disposed on the sidewall of the L-shaped heat sink 005 as shown in FIG. 7, that is, in the heat sink region on the back surface of the ceramic substrate 004),
  • the temperature monitoring of the ceramic substrate 004 is more sensitive, making it relatively less sensitive to temperature monitoring of the TEC007.
  • the heat sink 007 also plays a role in improving the temperature control effect of the TEC007, and improves the heat conduction efficiency of the TEC007 for the DML chip 002, and the temperature control sensitivity is higher.
  • a thermal conductive adhesive is filled between the coupling surface of the heat sink 005 and the ceramic substrate 004.
  • a general gold tin solder or a conductive silver paste can also be applied to the coupling surface of the heat sink 005 and the ceramic substrate 004.
  • the coupling surface of the heat sink 005 and the ceramic substrate 004 may also be vacant, and there is no need to provide a filler, and the heat conduction through the air in a close-to-close manner, the disadvantage of this alternative manner
  • the heat conduction effect is not in any other way, but the advantage is also obvious, that is, the thermal stability of the heat sink 005 is prevented from affecting the operational stability of the DML chip 002 fixed on the ceramic substrate 004.
  • FIG. 8 is a schematic diagram showing the connection of each module component of the transmitting component to the pin of the metal base 001 according to an embodiment of the present invention.
  • the TEC007 realizes the connection of the TEC+ and the TEC-drive signal through a pair of pins 011; the DML chip 002 is indirectly connected to the two-pole pin 009 by being fixed on the ceramic substrate 004, and the two-pole pin 009 is used for
  • the DML chip 002 provides a laser driving signal; the thermistor 006 realizes the output of the self-monitoring signal through the pin 010; and the MPD chip 003 performs the output of the monitoring signal through the pin 012.
  • the grounding pole of the thermistor is completed through the conductive path of the back surface of the heat sink 005-ceramic substrate 004-conductive bump 008-metal base 001, and the temperature monitoring signal is transmitted with the connected pin 010; and MPD
  • the grounding of the chip 003 is completed by the conductive path of the conductive layer on the surface of the TEC007 - the heat sink 003 - the back surface of the ceramic substrate 004 - the conductive bump 008 - the metal base 001, and the laser detecting signal is transmitted in conjunction with the connected pin 012.
  • the high-speed DML transmitting component is suitable for the TO package, as shown in FIG. 9 , further includes a cap 013 , wherein the cap 013 is coupled to the metal base 001 , And a lens is provided at the light exit of the cap 013.
  • the high-speed DML transmitting component is suitable for a TO package, as shown in FIG. 10, further including a first metal member 014, an isolator 015, and a second metal member.
  • the bottom of the first metal member 014 is coupled to the cap 013, and the isolator 015 is disposed at a connection interface between the top of the first metal member 014 and the bottom of the second metal member 016.
  • the optical fiber pin assembly 017 a bottom portion coupled to the top of the second metal;
  • the coupling is fixed by gluing or laser welding.
  • FIG. 11 the outline structure of the DML component for completing the TO package is shown.
  • the isolator 015 can be formed by attaching the inner end surface of the optical fiber pin to the optical fiber pin isolator integrated component, in addition to the free space isolator shown in FIG.
  • the isolator 015 can be a monopolar or bipolar isolator.
  • the optical fiber pin assembly 013 is an LC or SC optical port type
  • the optical interface package is an SFP (Small Form-factor Pluggables) or XMD;
  • the flexible circuit board 018 is specifically made of a substrate of PI, LCP (Liquid Crystal Polymer) or TK low dielectric constant.
  • the heat sink 005 is made of tungsten copper having a high thermal conductivity.
  • the electrical reflection S11 of the embodiment of the present invention is -20dB@20GHZ (using the structure shown in FIG. 4), as shown in FIG. 12, the electrical reflection S11 of the block ceramic plate scheme is - 10dB@20GHZ (using the structure shown in FIG. 3), the electric reflection of the embodiment of the present invention is obviously superior to the block ceramic plate scheme.

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Abstract

一种高速DML发射组件，其中陶瓷基板(004)为倒凹形结构，金属底座(001)上位于两极管脚(009)相邻处，分别设置有一导电凸台(008)，陶瓷基板(004)的两臂(041，042)分别固定在金属底座(001)上，且位于相应导电凸台(008)和两极管脚(009)之间，陶瓷基板(004)的背面镀有接地导电层，并分别与两极管脚(009)相邻处的导电凸台(008)导电连接，陶瓷基板(004)的两臂(041，042)的正面分别与两极管脚(009)的导电连接。在金属底座(001)上的两极管脚(009)边上引入两个导电凸台(008)，并且在之间插入带有薄膜金属电路的陶瓷基板(004)，用于传输DML芯片(002)的驱动信号；采用整块陶瓷基板(004)，表面附有薄膜金属电路，由于GND回路更完整，电反射更小，高频信号衰减更低，信号完整性更好。

Description

一种高速DML发射组件 【技术领域】
本发明涉及激光器技术领域，特别是涉及一种高速DML发射组件。
【背景技术】
随着互联网与无线通信技术的飞速发展，越来越多的光电收发模块均要求支持工业级宽温应用，个别地区甚至要求高温到95℃。然而，对于光电收发模块发射端的DML芯片，其特性在极限温度下一般会呈现下降趋势，主要体现在两方面：
一方面，在工业级85℃甚至95℃超高温环境下，芯片带宽下降和高温饱和两大特性会导致发射高温眼图劣化较快，导致传输接收误码；另一方面，在工业级-40℃～-20℃超低温条件下，直接调制器激光器(Directly Modulated Laser，简写为：DML)尤其DFB的光谱特性会变差，光谱展宽，直接影响传输质量，无法满足客户端使用要求。同时，工温DML芯片价格高，可获得性较差，商温或扩展温度芯片价格较低，可获得性较强，尤其是速率、性能要求越高的产品，例如50G PAM4，几乎很难有直接采用的工温芯片。
因此，对于工业级应用，若采用商温或扩展温度的DML芯片方案，其对应发射组件需要进行温度控制处理。目前温度控制处理主要有两种实现途径：
第一种采用传统的蝶形封装工艺，内置光隔离器、TEC、芯片、透镜等，相关专利有“高速蝶形封装光发射器组件”(CN 104570236A)，这类封装虽然性能优良，但是工艺比较复杂，大批量制造成本较高；
另一种实现途径就是同轴TO-CAN方案，这种封装比较成熟，批量制造成本较低，然而，目前基于TEC方案的专利，基本上都是针对EML单端信号应用，如专利“一种高速同轴封装致冷型激光器组件”(CN 202586075U)，但是，该 结构仅适用于高速EML发射组件的单端信号应用，而对于高速差分信号应用的DML发射组件来说，该结构完全无法有效实现。
【发明内容】
本发明要解决的技术问题是现有技术中缺少一种有效的针对高速DML发射组件，既能满足其输入的差分信号的质量要求，又能达到TEC温度控制的解决方案。
本发明进一步要解决的技术问题是针对DML发射组件中，高速差分信号GND回路的改进。
本发明采用如下技术方案：
本发明提供了一种高速DML发射组件，包括金属底座001、DML芯片002、MPD芯片003、陶瓷基板004、热沉005、热敏电阻006和TEC 007，所述陶瓷基板004为倒凹形结构，所述金属底座001上位于两极管脚009相邻处，分别设置有一导电凸台008，所述陶瓷基板004的两臂分别固定在金属底座001上，且位于相应导电凸台008和两极管脚009之间，陶瓷基板004的背面镀有接地导电层，并分别与所述两极相邻处的导电凸台008导电连接，所述陶瓷基板004的两臂的正面分别与所述两极管脚009的导电连接；其中，所述陶瓷基板004的正面对应两臂分别镀有导电层，所述两臂的导电层分别用于耦合DML芯片002的供电接口，使得所述两极管脚009与DML芯片002完成电器连接；
所述TEC007设置在金属底座001上，且嵌入在所述陶瓷基板004的凹槽部位，所述MPD芯片003设置在TEC007上且位于DML芯片002的背光处；所述热沉005贴合于所述TEC007和陶瓷基板背面，并且，所述热敏电阻006设置在所述热沉005表面。
优选的，所述热沉005具体为L型热沉，具体的：
热沉005背靠陶瓷基板004，并且贴装在TEC 007的上表面。
优选的，所述热沉005与陶瓷基板004的耦合面之间填充有导热胶。
优选的，所述热沉005与TEC007的耦合面之间填充有金锡焊料或者导电银胶。
优选的，所述高速DML发射组件适用于TO封装，则还包括盖帽013，其中，盖帽013与所述金属底座001耦合，并且盖帽013的出光口处设置有透镜。
优选的，所述高速DML发射组件适用于TO封装，则还包括第一金属件014、隔离器015、第二金属件016、光纤插针组件017和柔性电路板018，具体的：
所述第一金属件014的底部与所述盖帽013耦合，所述隔离器015设置在第一金属件014顶部与所述第二金属件016底部的连接接口处，所述光纤插针组件017的底部与所述第二金属的顶部耦合；
其中，所述耦合处通过胶合或者激光焊接完成固定。
优选的，所述柔性电路板018具体为PI、LCP或者TK低介电常数的基材制作。
优选的，所述热沉005由导热系数较高的钨铜制作。
与现有技术相比，本发明的有益效果在于：
本发明实施例在金属底座上的两极管脚边上引入两个导电凸台，并且在之间插入带有薄膜电路的陶瓷基板，用于传输DML芯片的差分驱动信号；采用整块陶瓷基板，并设计薄膜金属电路，作为阻抗传输线；所述TEC设置在金属底座上，且嵌入在所述陶瓷基板的凹槽部位，从而使得DML在满足基本的TEC温度控制情况下，能够优化差分输入信号，提高差分信号完整性。
另一方面，与两极管脚对齐并焊接在一起，同分块陶瓷基板分别贴装，再金丝键合连接的方案相比(如图3所示，其中虚线平面为GND回路，标注虚线框的为对应等式)，由于GND回路(图4中虚线平面为本发明的GND回路)更完整，电反射更小，高频信号衰减更低，信号完整性更好。
【附图说明】
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是本发明实施例提供的一种高速DML发射组件的结构爆炸图；
图2是本发明实施例提供的一种高速DML发射组件中陶瓷基座的正面结构示意图；
图3是本发明实施例提供的一种用于对比的陶瓷基座GND等式示意图；
图4是本发明实施例提供的一种陶瓷基座GND等式示意图；
图5是本发明实施例提供的一种高速DML发射组件中导电凸台的布局位置示意图；
图6是本发明实施例提供的一种高速DML发射组件中陶瓷基板安装位置示意图；
图7是本发明实施例提供的一种高速DML发射组件中L型热沉结构示意图；
图8是本发明实施例提供的一种高速DML发射组件中各组件的管脚连接示意图；
图9是本发明实施例提供的一种高速DML发射组件在TO封装中的封装结构示意图；
图10是本发明实施例提供的一种高速DML发射组件在带软带和光接口的TO封装中结构爆炸图；
图11是本发明实施例提供的一种高速DML发射组件在带软带和光接口的TO封装中结构示意图
图12是本发明实施例提供的一种分块陶瓷基板方案的电反射仿真模拟实验结果图；
图13是本发明实施例提供的一种整块陶瓷基板方案的电反射仿真模拟实验结果图。
【具体实施方式】
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在本发明的描述中，术语“内”、“外”、“纵向”、“横向”、“上”、“下”、“顶”、“底”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明而不是要求本发明必须以特定的方位构造和操作，因此不应当理解为对本发明的限制。
在本发明各实施例中，符号“/”表示同时具有两种功能的含义，例如“第二进/出光口”表明该端口既可以进光也可以出光。而对于符号“A和/或B”则表明由该符号连接的前后对象之间的组合包括“A”、“B”、“A和B”三种情况，例如“背向散射光和/或反射光”，则表明其可以表达单独的“背向散射光”，单独的“反射光”，以及“背向散射光和反射光”三种含义中的任意之一。
此外，下面所描述的本发明各个实施方式中所涉及到的技术特征只要彼此之间未构成冲突就可以相互组合。
实施例1:
本发明实施例1提供了一种高速DML发射组件，如图1和图2所示，包括金属底座001、DML芯片002、MPD芯片003、陶瓷基板004、热沉005、热敏电阻006和TEC 007，所述陶瓷基板004为倒凹形结构(如图2所示，相对于金属底座001而言，陶瓷基板004为倒立放置的凹形结构，简称为倒凹形结构)，所述金属底座001上位于两极管脚009相邻处，分别设置有一导电凸台008，所述陶瓷基板004的两臂(如图2中所标识的041和042)各嵌在金属底座001上，且位于相应导电凸台008和两极管脚009之间，陶瓷基板004的背面镀有接地导电层(图2中未示出)，并分别与所述两极相邻处的导电凸台008导电连接，所述陶瓷基板004的两臂的正面分别与所述两极管脚009的导电连接；其中，所述陶瓷基板004的正面对应两臂分别镀有导电层，所述两臂的导电层分别用于耦合DML芯片002的供电接口，使得所述两极管脚009与DML芯片002完成电器连接；
所述TEC007设置在金属底座001上，且嵌入在所述陶瓷基板004的凹槽部位，所述MPD芯片003设置在TEC007上且位于DML芯片002的背光处；所述热沉005贴合于所述TEC007和陶瓷基板背面，并且，所述热敏电阻006设置在所 述热沉005表面。
本发明实施例在金属底座上的两极管脚边上引入两个导电凸台，并且在之间插入带有薄膜电路的陶瓷基板，用于传输DML芯片的差分驱动信号；采用整块陶瓷基板，并设计薄膜金属电路，作为阻抗传输线；所述TEC设置在金属底座上，且嵌入在所述陶瓷基板的凹槽部位，从而使得DML在满足基本的TEC温度控制情况下，能够优化差分输入信号，提高差分信号完整性。与两极管脚对齐并焊接在一起，同分块陶瓷基板分别贴装，再金丝键合连接的方案相比(如图3所示，其中虚线平面为GND回路，标注虚线框的为对应等式)，由于GND回路(图4中虚线平面为本发明的GND回路)更完整，电反射更小，高频信号衰减更低，信号完整性更好。
本发明实施例适用于工业级超高温或超低温要求，特别适用于如50G PAM4对发射性能要求较高的产品。
如图2所示，其中陶瓷基板004的两臂041和042上分别通过溅射生长有导电层，用于为固定在陶瓷基板004正面顶部的DML芯片002提供驱动信号的导通路径。其中，陶瓷基板004优选的采用散热系数较高的氮化铝AlN材料制作，陶瓷基板004正面和背面均预溅射焊料设计，其中正面焊料熔点高于背面焊料；通常情况下，先将DML芯片002通过钎焊和金丝键合邦定在陶瓷基板004上组成CoC(Chip on Carrier)，然后通过CoC老化后，再将合格CoC进行固定在两极管脚009和导电凸台008的操作。
如图5和图6所示，所述导电凸台008和两极管脚009都是对称分布，其中，导电凸台008还起到为DML芯片002提供对地回路，以及固定的作用。因此，所述导电凸台008与金属底座001之间可以使用导电胶或者直接用焊料完成固定。如图6所示，所述陶瓷基板004制作的厚度正好满足嵌入在由单一管脚009和单一导电凸台008构成的空间区域，这是因为陶瓷基板004需要分别与两极管脚009和导电凸台008完成电器连接(例如：陶瓷基板004的两臂041和042上的导电层通过焊接方式与两极管脚009实现电器连接；陶瓷基板004的背面通过导电胶与所述导电凸台008实现电器连接)。
结合本发明实施例，存在一种优选的实现方式，其中，所述热沉005具体为L型热沉，具体的：
热沉005背靠陶瓷基板004，并且贴装在TEC 007的上表面。其中，为了进一步提高L型热沉005对于DML芯片002工作温度的监测准确度，可以将所述L型热诚005制作成不对等模型，即与所述TEC007贴合的热沉005底部的厚度(如图7中标注的d1所示)制作的相对于与陶瓷基板004贴合的热沉005的侧壁的厚度(如图7中标注的d2所示)更厚一些(即d1>d2)，从而使得热敏电阻006在设置在热沉005上之后(优选的是设置在如图7所示的L型热沉005的侧壁上，即位于陶瓷基板004的背面的热沉区域)，对于陶瓷基板004的温度监测敏感度更高，使其对于TEC007的温度监测敏感度相对降低。除此之外，所述热沉007还起到提高TEC007温控效果的作用，提高了TEC007对于DML芯片002的热传导效率，温控灵敏度更高。
结合本发明实施例，存在一种优选的实现方式，其中，所述热沉005与陶瓷基板004的耦合面之间填充有导热胶。除了所述导热胶外，一般的金锡焊料或者导电银胶也可以被应用于固定热沉005与陶瓷基板004的耦合面。在可选的方案中，热沉005与陶瓷基板004的耦合面还可以是空置的方式，及无需设置填充料，而通过紧密靠拢的形式，经由空气完成热传导，这种可选的方式的劣势就在于热传导效果没有其它几种方式好，但是其优势也很明显，即避免了因为热沉005的热形变对陶瓷基板004上固定的DML芯片002的工作稳定性产生影响。
结合本发明实施例，存在一种优选的实现方式，其中，所述热沉005与TEC007的耦合面之间填充有金锡焊料或者导电银胶。这是为了起到更好的导热效果。
如图8所示，为本发明实施例提供的一种发射组件中各模块组件与金属底座001中管脚连接的示意图。其中，TEC007通过一对管脚011实现TEC+和TEC-驱动信号的连接；DML芯片002通过固定在通过陶瓷基板004上，间接的与两极管脚009实现连接，所述两极管脚009用于为DML芯片002提供激光驱动信号；热敏电阻006通过管脚010实现自身监测信号的输出；而MPD芯片003则通过 管脚012完成其监测信号的输出。其中，热敏电阻的接地极则是通过热沉005-陶瓷基板004背面-导电凸台008-金属底座001的导电通路完成，并配合其连接的管脚010实现温度监测信号的传输；而MPD芯片003的接地则是通过TEC007表面的导电层-热沉003-陶瓷基板004背面-导电凸台008-金属底座001的导电通路完成，并配合其连接的管脚012实现激光探测信号的传递。
结合本发明实施例，存在一种优选的实现方式，其中，所述高速DML发射组件适用于TO封装，如图9所示，还包括盖帽013，其中，盖帽013与所述金属底座001耦合，并且盖帽013的出光口处设置有透镜。
结合本发明实施例，存在一种优选的实现方式，其中，所述高速DML发射组件适用于TO封装，如图10所示，则还包括第一金属件014、隔离器015、第二金属件016、光纤插针组件017和柔性电路板018，具体的：
所述第一金属件014的底部与所述盖帽013耦合，所述隔离器015设置在第一金属件014顶部与所述第二金属件016底部的连接接口处，所述光纤插针组件017的底部与所述第二金属的顶部耦合；
其中，所述耦合处通过胶合或者激光焊接完成固定。如图11所示，为完成TO封装的DML组件的外形结构示意图。
其中，隔离器015除了可以采用如图10所示的自由空间隔离器外，还可以采用贴在光纤插针的内端面上方式，形成光纤插针隔离器集成组件。所述隔离器015可以为单极或双极隔离器。
结合本发明实施例，存在一种优选的实现方式，其中，所述光纤插针组件013为LC或SC光口类型，光接口封装为SFP(Small Form-factor Pluggables)或XMD；
结合本发明实施例，存在一种优选的实现方式，其中，所述柔性电路板018具体为PI、LCP(Liquid Crystal Polymer)或者TK低介电常数的基材制作。
结合本发明实施例，存在一种优选的实现方式，其中，所述热沉005由导热系数较高的钨铜制作。
根据仿真模拟，如图13所示为本发明实施例的电反射S11为-20dB@20GHZ (采用如图4所示结构)，如图12所示为分块陶瓷板方案的电反射S11为-10dB@20GHZ(采用如图3所示结构)，本发明实施例电反射明显优于分块陶瓷板方案。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种高速DML发射组件，包括金属底座(001)、DML芯片(002)、MPD芯片(003)、陶瓷基板(004)、热沉(005)、热敏电阻(006)和TEC(007)，其特征在于，所述陶瓷基板(004)为倒凹形结构，所述金属底座(001)上位于两极管脚(009)相邻处，分别设置有一导电凸台(008)，所述陶瓷基板(004)的两臂分别固定在金属底座(001)上，且位于相应导电凸台(008)和两极管脚(009)之间，陶瓷基板(004)的背面镀有接地导电层，并分别与所述两极相邻处的导电凸台(008)导电连接，所述陶瓷基板(004)的两臂的正面分别与所述两极管脚(009)的导电连接；其中，所述陶瓷基板(004)的正面对应两臂分别镀有导电层，所述两臂的导电层分别用于耦合DML芯片(002)的供电接口，使得所述两极管脚(009)与DML芯片(002)完成电器连接；
    所述TEC(007)设置在金属底座(001)上，且嵌入在所述陶瓷基板(004)的凹槽部位，所述MPD芯片(003)设置在TEC(007)上且位于DML芯片(002)的背光处；所述热沉(005)贴合于所述TEC(007)和陶瓷基板背面，并且，所述热敏电阻(006)设置在所述热沉(005)表面。
  2. 根据权利要求1所述的高速DML发射组件，其特征在于，所述热沉(005)具体为L型热沉，具体的：
    热沉(005)背靠陶瓷基板(004)，并且贴装在TEC(007)的上表面。
  3. 根据权利要求2所述的高速DML发射组件，其特征在于，所述热沉(005)与陶瓷基板(004)的耦合面之间填充有导热胶。
  4. 根据权利要求2所述的高速DML发射组件，其特征在于，所述热沉(005)与TEC(007)的耦合面之间填充有金锡焊料或者导电银胶。
  5. 根据权利要求1所述的高速DML发射组件，其特征在于，所述高速DML 发射组件适用于TO封装，则还包括盖帽(013)，其中，盖帽(013)与所述金属底座(001)耦合，并且盖帽(013)的出光口处设置有透镜。
  6. 根据权利要求5所述的高速DML发射组件，其特征在于，所述高速DML发射组件适用于TO封装，则还包括第一金属件(014)、隔离器(015)、第二金属件(016)、光纤插针组件(017)和柔性电路板(018)，具体的：
    所述第一金属件(014)的底部与所述盖帽(013)耦合，所述隔离器(015)设置在第一金属件(014)顶部与所述第二金属件(016)底部的连接接口处，所述光纤插针组件(017)的底部与所述第二金属的顶部耦合；
    其中，所述耦合处通过胶合或者激光焊接完成固定。
  7. 根据权利要求6所述的高速DML发射组件，其特征在于，所述隔离器(015)为单极或双极隔离器。
  8. 根据权利要求6所述的高速DML发射组件，其特征在于，所述光纤插针组件013为LC或SC光口类型，光接口封装为SFP或XMD。
  9. 根据权利要求6所述的高速DML发射组件，其特征在于，所述柔性电路板(018)具体为PI、LCP或者TK低介电常数的基材制作。
  10. 根据权利要求1-9任一所述的高速DML发射组件，其特征在于，所述热沉(005)由导热系数较高的钨铜制作。
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