WO2019080596A1 - 阵列基板及显示装置 - Google Patents

阵列基板及显示装置

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Publication number
WO2019080596A1
WO2019080596A1 PCT/CN2018/100076 CN2018100076W WO2019080596A1 WO 2019080596 A1 WO2019080596 A1 WO 2019080596A1 CN 2018100076 W CN2018100076 W CN 2018100076W WO 2019080596 A1 WO2019080596 A1 WO 2019080596A1
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WO
WIPO (PCT)
Prior art keywords
sub
array substrate
electrode
common electrode
common
Prior art date
Application number
PCT/CN2018/100076
Other languages
English (en)
French (fr)
Inventor
李盼
吴新银
乔勇
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/329,796 priority Critical patent/US11527556B2/en
Priority to EP18869964.9A priority patent/EP3702834A4/en
Publication of WO2019080596A1 publication Critical patent/WO2019080596A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136218—Shield electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133707—Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/124—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode interdigital

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate and a display device.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the arrangement of the common electrode and the pixel electrode in the array substrate, the resistance of the common electrode is not uniform, thereby affecting the display effect of the entire display panel.
  • An embodiment of the present disclosure provides an array substrate, including: a plurality of sub-pixel units arranged in an array;
  • Each sub-pixel unit of each row has a common electrode
  • the common electrode includes a plurality of sub-common electrodes, and each of the sub-common electrodes corresponds to one of the sub-pixel units;
  • the sub-common electrode includes a body connecting portion, a plurality of first comb-tooth branches connected to the body connecting portion, and a shielding portion connected to the body connecting portion; the first comb-tooth branch and the shielding portion Located on the same side of the body connecting portion, and the shielding portion is located at an outermost side of the first comb tooth branch;
  • the main body connecting portions of two adjacent sub-common electrodes are located on opposite sides.
  • two adjacent sub-common electrodes of each of the common electrodes share one of the shielding portions.
  • each of the sub-pixel units has a pixel electrode
  • the pixel electrode includes a protruding connection portion and an electrode portion
  • a protruding connection portion of the pixel electrode and a body connection portion of the sub-common electrode are located on opposite sides.
  • the array substrate further includes: a data line and a gate line;
  • the data line and the shielding portion of the sub-common electrode extend in the same direction; the orthogonal projection of the data line in a direction perpendicular to the array substrate and the shielding portion of the sub-common electrode are perpendicular to the array substrate
  • the orthographic projection on the top has an overlapping area;
  • the gate line extends in a direction crossing the data line.
  • two adjacent sub-pixel units connected to each of the gate lines belong to different rows.
  • the gate line is a bending line; and the protruding connection portions of each of the pixel electrodes are alternately arranged in parallel in the sub-pixel unit connected to the same gate line.
  • the pixel electrode is disposed in the same layer as the common electrode; and the orthographic projection of the pixel electrode in a direction perpendicular to the array substrate and the positive electrode are positive in a direction perpendicular to the array substrate The projections do not overlap each other.
  • the electrode portion of the pixel electrode includes a plurality of second comb-shaped branches connected to the protruding connecting portion;
  • the second comb-tooth branch and the first comb-tooth branch are alternately arranged in a direction parallel to the gate line.
  • the pixel electrode is disposed in a different layer from the common electrode; and the electrode portion of the pixel electrode is in a plate shape.
  • the electrode portion of the pixel electrode has a structure having a straight edge, and the first comb tooth branch of the common electrode is a straight line.
  • the electrode portion of the pixel electrode is a structure having a polygonal line edge, and the first comb tooth branch of the common electrode is a fold line type; a bending angle of the electrode portion fold line and the first comb tooth branch The bend angle of the fold line is the same.
  • the sub-common electrodes of the two adjacent common electrodes are electrically connected by a connection line.
  • the embodiment of the present disclosure further provides a display device including the above array substrate provided by an embodiment of the present disclosure.
  • FIG. 1 is a schematic structural view showing a manner of arrangement of a common electrode and a pixel electrode in the related art
  • FIG. 2 is a schematic top plan view of an array substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic top plan view of a common electrode according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic top plan view of another array substrate according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic top plan view of another array substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic top plan view of another array substrate according to an embodiment of the present disclosure.
  • the arrangement of the common electrode 1 and the pixel electrode 2 is generally as shown in FIG. 1, and the pattern of the common electrode 1 is comb-toothed, and since the width of the main body connecting portion 1a of the common electrode 1 is wide, The electric resistance at the position where the main body connecting portion 1a is located is small, and the electric resistance of the comb-shaped branch 1b is large, which causes uneven resistance of the entire common electrode 1, affecting the overall display effect.
  • the present disclosure provides an array substrate and a display device for solving the arrangement of the common electrode and the pixel electrode in the conventional array substrate, wherein the resistance of the common electrode is uneven, thereby affecting the display of the entire display panel.
  • the problem of the effect is a problem of the effect.
  • the array substrate provided by the embodiment of the present disclosure mainly changes the arrangement manner of the common electrodes on the basis of the current array substrate, and the main body connecting portions of two adjacent sub-common electrodes in each common electrode are disposed on opposite sides. That is, the adjacent main connecting portions of the common electrodes in each common electrode are scattered on both sides, which can improve the uniformity of the common electrode resistance, thereby improving the overall display effect.
  • the specific structure of the array substrate will be described in detail below.
  • FIG. 2 is a schematic top plan view of an array substrate according to an embodiment of the present disclosure; for convenience of description, only 3 ⁇ 2 sub-pixel units are drawn in the embodiment of the present disclosure, and FIG. 2 is only a simple schematic diagram. The actual production is not limited to 3 ⁇ 2 sub-pixel units, and the sub-pixel units may have other different arrangement manners.
  • the present disclosure is described by taking a common matrix arrangement as an example.
  • the array substrate provided by the embodiment of the present disclosure may have a plurality of different structures, and the array substrate shown in FIG. 2 is only one of the feasible structures, which is only for convenience of description, and is not intended to limit the present disclosure. Several other array substrates are described.
  • an array substrate provided by an embodiment of the present disclosure includes:
  • Each row of sub-pixel units P has a common electrode 101;
  • FIG. 3 is a schematic top view of the common electrode 101 provided by the embodiment of the present disclosure.
  • Each of the common electrodes 101 includes a plurality of sub-common electrodes G, and each sub-common electrode G corresponds to one sub-pixel unit P;
  • the sub common electrode G includes a main body connecting portion 101a, a plurality of first comb tooth branches 101b connected to the main body connecting portion 101a, and a shield portion 101c connected to the main body connecting portion 101a; the first comb tooth branch 101b and the shielding portion 101c are located at the main body The same side of the connecting portion 101a, and the shielding portion 101c is located at the outermost side of the first comb-tooth branch 101b;
  • the body connecting portions 101a of the adjacent two sub-common electrodes G in the common electrode 101 are located on opposite sides.
  • the first comb-tooth branch 101b and the shielding portion 101c may be disposed perpendicular to the main body connecting portion 101a, and of course, may be set to other relatives.
  • the structure, and the main body connecting portion 101a, the first comb tooth branch 101b, and the shielding portion 101c are not necessarily arranged in a regular rectangular shape, and may be provided as other structures as needed, and the drawings in the embodiments of the present disclosure are only feasible.
  • the structural diagram is not intended to limit the disclosure.
  • the main body connecting portion 101a of two adjacent sub-common electrodes G in each common electrode 101 is disposed in a relative manner.
  • the body connecting portions 101a of the first sub-common electrode G and the second sub-common electrode G from left to right are disposed in opposite directions, and the second sub-common electrode G
  • the body connecting portion 101a of the third sub-common electrode G is also disposed in the opposite direction, and the plurality of sub-common electrodes G are alternately arranged in this manner.
  • each of the sub-common electrodes G includes a body connecting portion 101a having a wide width and a small electric resistance.
  • the main body connecting portions 101a of two adjacent sub-common electrodes G in each common electrode 101 are disposed in opposite directions. On both sides, it is possible to disperse adjacent main body connecting portions 101a having a small electric resistance in each common electrode 101 on both sides, thereby improving the uniformity of the resistance of the common electrode 101, thereby improving the overall display effect.
  • the layout space is saved.
  • two adjacent ones of the common electrodes 101 are provided.
  • the sub-common electrodes G may share one shield portion 101c, and the two sub-common electrodes G are connected to each other through the shield portion 101c.
  • the arrangement of the sub-common electrodes G of the adjacent two rows may be set to be the same.
  • each sub-pixel unit P has a pixel electrode 102; the pixel electrode 102 includes a protruding connection portion 102a and an electrode portion 102b; In the pixel unit P, the protruding connection portion 102a of the pixel electrode 102 and the body connecting portion 101a of the sub-common electrode G may be located on opposite sides to save layout space.
  • the bump connecting portion 102a is a channel in which the pixel electrode 102 is loaded with a display signal, and the electrode portion 102b of the pixel electrode 102 and the first comb tooth branch 101b of the sub-common electrode G cooperate to form an electric field for controlling the rotation of the liquid crystal.
  • the shape of the specific electrode portion 102b may be set as needed.
  • the electrode portion 102b of the pixel electrode 102 may be provided in a plate-like structure or have a branched structure, which will be described later with reference to the drawings, and will not be described in detail herein.
  • the array substrate may further include: a data line 103 and a gate line 104; the data line 103 generally extends with the shielding portion 101c of the sub-common electrode G.
  • the directions are the same; the orthogonal projection of the data line 103 in the direction perpendicular to the array substrate and the mask portion 101c of the sub-common electrode G have an overlapping area in the orthographic projection perpendicular to the direction of the array substrate; the gate line 104 generally crosses the data line 103 The direction extends.
  • a thin film transistor is generally disposed in the sub-pixel unit P.
  • the source 105a of the thin film transistor is connected to the data line 103, and the drain 105b is connected to the protruding connection portion 102a of the pixel electrode 102.
  • the pole 105c is connected to the gate line 104.
  • the data line 103 and the shield portion 101c are generally arranged to be arranged in the column direction (i.e., along the y-axis direction), and specifically may be disposed in a straight line form as shown in FIG. Since the main function of the shielding portion 101c is to shield the influence of the data signal loaded by the data line 103 on the pixel electrode 102, substantially, the shielding portion 101c is also a part of the sub-common electrode G, and therefore, the partial data line 103 is required to be sub-common electrode G. The shield portion 101c is blocked.
  • the data line 103 may also be disposed as a bending line disposed along the extending direction of the shielding portion 101c of the sub-common electrode G.
  • the corresponding data The line 103 can also be set as a bending line having the same bending angle as the shielding portion 101c.
  • the common electrode 101 and the pixel electrode 102 are both bent structures, and correspondingly, the data line 103 is also set as a bending line, wherein
  • the data line 103 shown in Fig. 4 is only for the purpose of illustrating the bending thereof, and does not represent the true shape and width of the data line at the time of actual production.
  • the gate lines 104 are generally arranged in a row direction (ie, along the x-axis direction), and may be specifically arranged in a straight line form, or may be set as a bent line, that is, a structure as shown in FIG. 2 is formed to make sub-pixels.
  • the arrangement between the units P is more compact, saving layout space.
  • the protruding connection portions 102a of the respective pixel electrodes 102 are alternately arranged in parallel.
  • the body connecting portions 101a of the adjacent two sub-common electrodes G of each common electrode 101 are located on opposite sides, and the body connecting portion 101a and the pixels of the sub-common electrode G are
  • the protruding connecting portions 102a of the electrodes 102 are located on opposite sides. Therefore, as shown in FIG. 2, in fact, the protruding connecting portions 102a of the adjacent pixel electrodes 102 are also located on opposite sides, and therefore, generally connected to the same gate line.
  • the pixel electrodes 102 of the 104 also belong to the two rows of sub-pixel units P, respectively, and optionally, the adjacent two sub-pixel units P connected to each of the gate lines 104 belong to different rows.
  • the bump connection portion 102a of the pixel electrode 102 connected to the same gate line 104 may be alternately arranged in parallel so as to be connected to the same gate line 104 and located in the phase.
  • the protruding connecting portions 102a of the pixel electrodes 102 in the adjacent two rows of sub-pixel units P are in the same straight line as possible, so that the protruding connecting portions 102a of the respective pixel electrodes 102 are alternately arranged in parallel, so that the arrangement between the sub-pixel units P can be made. More closely, the structure shown in Fig. 2 is formed.
  • the pixel electrode 102 and the common electrode 101 have different structures and fabrication manners, for example, the two layers may be fabricated together, or may be separately disposed in different layers.
  • the film layer several specific structures are described below.
  • the pixel electrode 102 and the common electrode 101 may be disposed in the same layer; and the orthographic projection of the pixel electrode 102 in the direction perpendicular to the array substrate and the common electrode 101 are perpendicular to the array.
  • the orthographic projections in the direction of the substrate do not overlap each other.
  • the pixel electrode 102 when the pixel electrode 102 is formed in the same layer as the common electrode 101, it is generally formed of a material such as a transparent conductive material or a metal. Since the pixel electrode 102 and the common electrode 101 are disposed in the same layer, and each of the sub-pixel units P corresponds to one pixel electrode 102 and a part of the common electrode 101 (for example, one sub-common electrode G in FIG. 2), each common electrode The sub-common electrode G in 101 is a comb-shaped interdigital electrode, and accordingly, the pixel electrode 102 can also be provided as a comb-shaped interdigital electrode.
  • the electrode portion 102b of the pixel electrode 102 generally includes a plurality of second comb-tooth branches 102b1 connected to the protruding connecting portion 102a;
  • the second comb-tooth branch 102b1 and the first comb-tooth branch 101b of the common electrode are both branched structures, which may be arranged in a crosswise manner, that is, the second comb-tooth branch 102b1 and the first comb-tooth branch 101b are parallel to the gate line 104.
  • the direction of the extension is alternately arranged, that is, it can be considered that the second comb-tooth branch 102b1 of the pixel electrode 102 is inserted into the first comb-tooth branch 101b of the sub-common electrode G.
  • the pixel electrode 102 and the common electrode 101 may also be disposed in different layers; in this case, the electrode portion 102b of the pixel electrode 102 may be Plate electrode.
  • the pixel electrode 102 and the common electrode 101 are not formed in the same layer, they are generally formed of a material such as ITO (Indium Tin Oxide) or metal. At this time, since the pixel electrode 102 is separately fabricated, it can be set as a plate electrode.
  • ITO Indium Tin Oxide
  • the pixel electrode 102 and the common electrode 101 may have a linear edge structure, and may also be configured to have a polygonal line edge to realize multi-domain display.
  • the pixel electrode 102 and the common electrode 101 may be disposed in a linear structure, that is, the pixel electrode 102, regardless of whether the pixel electrode 102 and the common electrode 101 are disposed in the same layer or in different layers.
  • the electrode portion 102b has a structure having a straight edge, and the first comb-tooth branch 101a of the common electrode 101 is linear; specifically, when the pixel electrode 102 and the common electrode 101 are disposed in the same layer, a structure as shown in FIG. 2 is formed.
  • a structure as shown in FIG. 5 is formed.
  • the pixel electrode 102 and the common electrode 101 may be disposed in a fold line structure, that is, the pixel electrode 102, regardless of whether the pixel electrode 102 and the common electrode 101 are disposed in the same layer or in different layers.
  • the electrode portion 102b has a structure having a polygonal line edge, and the first comb-tooth branch 101b of the common electrode 101 is of a polygonal line type; and the bending angle of the polygonal portion of the electrode portion 102b is the same as the bending angle of the polygonal line of the first comb-shaped branch 101b, Achieve multi-domain display and increase viewing angle.
  • the first comb branch 101b and the shield portion 101c of the common electrode 101 need to be bent at a specific angle in the middle portion, and correspondingly, the plate-like pixel electrode 102 is also adaptively deformed in the middle portion of the electrode portion 102b.
  • the angle of the specific bending can be set as needed, for example, the bending angle can be set between 160 degrees and 180 degrees, or between 10 degrees and 20 degrees.
  • a plurality of common electrodes 101 may be connected. Based on this, optionally, in the above array substrate provided by the embodiment of the present disclosure, as shown in FIG. 2 to FIG. 6 , the sub-common electrodes G of the adjacent two common electrodes 101 may be electrically connected through a connection line, for example, for example. The shield portions 101c of the opposite two sub-common electrodes G can be connected. In order to reduce the manufacturing process, when the respective common electrodes 101 are formed, the connection lines can be directly produced together.
  • the pixel electrodes 102 in FIGS. 5 and 6 are transparently processed in the drawing, which is only for explaining the effect, and does not represent the actual production, and is not used to limit the present. public.
  • an embodiment of the present disclosure further provides a display device, including the above array substrate provided by the embodiment of the present disclosure.
  • a display device including the above array substrate provided by the embodiment of the present disclosure.
  • the display device refer to the embodiments of any of the above array substrates, and the repeated description is omitted.
  • each common electrode includes a plurality of sub-common electrodes, and generally each sub-common electrode includes a body connecting portion having a wider width and a smaller resistance.
  • a comb tooth branch is narrower and has a larger resistance; in the present disclosure, the body connecting portions of two adjacent sub-common electrodes in each common electrode are disposed in opposite directions, and correspondingly, adjacent resistors in each common electrode may be The smaller body connecting portions are disposed on both sides, which improves the uniformity of the common electrode resistance, thereby improving the overall display effect.

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Abstract

一种阵列基板及显示装置。阵列基板，包括：若干个亚像素单元，每个亚像素单元对应一个像素电极，每行亚像素单元共用一条公共电极；每条公共电极包括多个子公共电极；子公共电极为梳状的叉指电极；子公共电极包括主体连接部，第一梳齿分支以及屏蔽部；第一梳齿分支和屏蔽部位于主体连接部的同一侧；每条公共电极中相邻两个子公共电极的主体连接部位于相对的方向。将每条公共电极中相邻两个子公共电极的主体连接部设置在相对的方向，提高公共电极电阻的均匀性，从而提高整体的显示效果。

Description

阵列基板及显示装置
相关申请的交叉引用
本公开要求在2017年10月24日提交中国专利局、申请号为201721381384.1、发明名称为“一种阵列基板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域，尤其涉及一种阵列基板及显示装置。
背景技术
薄膜晶体管液晶显示面板(Thin Film Transistor Liquid Crystal Display，TFT-LCD)是目前常用的平板显示器，液晶显示面板以其体积小、功耗低、无辐射、分辨率高等优点，被广泛地应用于现代数字信息化设备中。
目前阵列基板中的公共电极和像素电极的排布方式，公共电极的电阻不均匀，从而影响显示面板整体的显示效果的问题。
发明内容
本公开实施例提供了一种阵列基板，包括：呈阵列排布的多个亚像素单元；
每行所述亚像素单元具有一条公共电极；
所述公共电极包括多个子公共电极，每个所述子公共电极对应一个所述亚像素单元；
所述子公共电极包括主体连接部，与所述主体连接部连接的多个第一梳齿分支，以及与所述主体连接部连接的屏蔽部；所述第一梳齿分支和所述屏蔽部位于所述主体连接部的同一侧，且所述屏蔽部位于所述第一梳齿分支的最外侧；
所述公共电极中，相邻的两个所述子公共电极的所述主体连接部位于相对的两侧。
可选地，每条所述公共电极中相邻的两个所述子公共电极共用一个所述屏蔽部。
可选地，每个所述亚像素单元具有像素电极；
所述像素电极包括凸出连接部和电极部；
每个所述亚像素单元中，所述像素电极的凸出连接部和所述子公共电极的主体连接部位于相对的两侧。
可选地，所述阵列基板还包括：数据线和栅线；
所述数据线与所述子公共电极的屏蔽部延伸方向相同；所述数据线在垂直于所述阵列基板方向上的正投影与所述子公共电极的屏蔽部在垂直于所述阵列基板方向上的正投影具有重叠区域；
所述栅线沿着与所述数据线交叉的方向延伸。
可选地，每条所述栅线连接的相邻两个所述亚像素单元分别属于不同行。
可选地，所述栅线为弯折线；连接到同一所述栅线的所述亚像素单元中，各所述像素电极的凸出连接部交替平行排列。
可选地，所述像素电极与所述公共电极同层设置；且所述像素电极在垂直于所述阵列基板方向上的正投影与所述公共电极在垂直于所述阵列基板方向上的正投影互不交叠。
可选地，所述像素电极的电极部包括与所述凸出连接部连接的多个第二梳齿分支；
所述第二梳齿分支与所述第一梳齿分支在平行于所述栅线延伸的方向上交替排列。
可选地，所述像素电极与所述公共电极异层设置；所述像素电极的电极部为板状。
所述像素电极的电极部为具有直线边缘的结构，且所述公共电极的第一梳齿分支为直线型。
可选地，所述像素电极的电极部为具有折线边缘的结构，且所述公共电极的第一梳齿分支为折线型；所述电极部折线的弯折角度与所述第一梳齿分支折线的弯折角度相同。
可选地，相邻两条所述公共电极中的子公共电极通过连接线电连接。
本公开实施例还一种显示装置，该显示装置包括如本公开实施例提供的上述阵列基板。
附图说明
图1为相关技术中公共电极和像素电极的排布方式的结构示意图；
图2为本公开实施例提供的一种阵列基板的俯视结构示意图；
图3为本公开实施例提供的公共电极的俯视结构示意图；
图4为本公开实施例提供的另一种阵列基板的俯视结构示意图；
图5为本公开实施例提供的另一种阵列基板的俯视结构示意图；
图6为本公开实施例提供的另一种阵列基板的俯视结构示意图。
具体实施方式
相关技术的阵列基板中，公共电极1和像素电极2的排布方式一般如图1所示，公共电极1的图案为梳齿状，由于公共电极1的主体连接部1a的宽度较宽，因而主体连接部1a所在位置处的电阻较小，而梳齿状的分支1b的电阻较大，会导致整体公共电极1的电阻不均匀，影响整体的显示效果。
基于此，本公开提供可一种阵列基板及显示装置，用以解决现有的阵列基板中，公共电极和像素电极的排布方式中，公共电极的电阻不均匀，从而影响显示面板整体的显示效果的问题。
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本公开一部分实施例，并不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
其中，附图中各个膜层图案的大小和区域形状不反映其真实比例，目的只是示意说明本公开的内容。本公开实施例提供的阵列基板，主要是在目前阵列基板的基础上，改变了公共电极的排布方式，将每条公共电极中相邻两个子公共电极的主体连接部设置在相对的两侧，即将每条公共电极中相邻的电阻较小的主体连接部分散设置在两侧，可以提高公共电极电阻的均匀性，从而提高整体的显示效果。下面对阵列基板的具体结构进行详细的说明。
如图2所示，为本公开实施例提供的一种阵列基板的俯视结构示意图；为了方便说明，本公开实施例中仅画了3×2个亚像素单元，图2仅是简单的示意图，实际制作中并不仅限于3×2个亚像素单元，且亚像素单元也可以有其它不同的排列方式，本公开仅是以常见的矩阵排列方式作为例子进行说明。另外，本公开实施例提供的阵列基板可以有多种不同的结构，图2所示的阵列基板只是其中一种可行的结构，仅是为了方便说明，并不用于限定本公开，后面本公开还会介绍几种其它结构的阵列基板。
如图2所示，本公开实施例提供的一种阵列基板包括：
呈阵列排布的多个亚像素单元P；
每行亚像素单元P具有一条公共电极101；
为了清楚的说明公共电极的具体结构，本公开实施例提供了一个单独的与图2对应的公共电极101的示意图，如图3所示，为本公开实施例提供的公共电极101的俯视结构示意图；每条公共电极101包括多个子公共电极G，每个子公共电极G对应一个亚像素单元P；
子公共电极G包括主体连接部101a，与主体连接部101a连接的多个第一梳齿分支101b，以及与主体连接部101a连接的屏蔽部101c；第一梳齿分支101b和屏蔽部101c位于主体连接部101a的同一侧，且屏蔽部101c位于第一梳齿分支101b的最外侧；
公共电极101中相邻两个子公共电极G的主体连接部101a位于相对的两侧。
具体地，在本公开实施例提供的上述阵列基板中，为了便于排布，可以 将第一梳齿分支101b和屏蔽部101c均与主体连接部101a垂直设置，当然，也可以设置为其它的相对结构，而且主体连接部101a、第一梳齿分支101b和屏蔽部101c也不一定设置为规则的矩形形状，可以根据需要设置为其它结构，本公开实施例中的附图仅是一种可行的结构示意图，并不用于限定本公开。
具体地，在本公开实施例提供的上述阵列基板中，为了解决相关技术中公共电极电阻不均匀的问题，将每条公共电极101中相邻两个子公共电极G的主体连接部101a设置在相对的两侧，即如图2和图3所示，从左到右第一个子公共电极G和第二个子公共电极G的主体连接部101a设置在相对的方向，而且第二个子公共电极G和第三个子公共电极G的主体连接部101a也设置在相对的方向，多个子公共电极G如此交替排列。
具体地，一般每个子公共电极G包括的主体连接部101a的宽度较宽且电阻较小，本公开中将每条公共电极101中相邻两个子公共电极G的主体连接部101a设置在相对的两侧，从而可以在每条公共电极101中将相邻的电阻较小的主体连接部101a分散设置在两侧，提高公共电极101电阻的均匀性，从而提高整体的显示效果。
为了使各子公共电极G排列更加紧密，节省布局空间，可选地，在本公开实施例提供的上述阵列基板中，如图2和图3所示，每条公共电极101中相邻的两个子公共电极G可以共用一个屏蔽部101c，使两个子公共电极G之间通过屏蔽部101c相互连接。并且，为了简化制作工艺，还可以将相邻两行的子公共电极G的排列方式设置为相同。
由于本公开实施例中将每条公共电极101中相邻的两个子公共电极G的主体连接部101a设置在相对的两侧，因此，也需要相应的改变像素电极的设置方式。可选地，在本公开实施例提供的上述阵列基板中，如图2所示，每个亚像素单元P具有像素电极102；像素电极102包括凸出连接部102a和电极部102b；每个亚像素单元P中，像素电极102的凸出连接部102a和子公共电极G的主体连接部101a可以位于相对的两侧，以节省布局空间。其中，凸出连接部102a是像素电极102加载显示信号的通道，像素电极102的电极部 102b与子公共电极G的第一梳齿分支101b相互配合形成控制液晶旋转的电场。具体电极部102b的形状可以根据需要进行设置，例如，像素电极102的电极部102b可以设置为板状结构，或者具有分支的结构，后面会结合附图进行说明，在此不作详述。
在具体实施时，在本公开实施例提供的上述阵列基板中，除了包括上述介绍的像素电极102和公共电极101之外，还会包括其它的膜层或者结构，例如，还包括薄膜晶体管、数据线和栅线等。这些结构都可以根据需要进行设置，在此可以不作具体限定。
可选地，在本公开实施例提供的上述阵列基板中，如图2所示，阵列基板还可以包括：数据线103和栅线104；数据线103一般与子公共电极G的屏蔽部101c延伸方向相同；数据线103在垂直于阵列基板方向上的正投影与子公共电极G的屏蔽部101c在垂直于阵列基板方向上的正投影具有重叠区域；栅线104一般沿着与数据线103交叉的方向延伸。
具体地，如图2所示，在亚像素单元P中一般会设置薄膜晶体管，薄膜晶体管的源极105a与数据线103相连，漏极105b与像素电极102的凸出连接部102a的相连，栅极105c与栅线104相连。
具体地，一般将数据线103和屏蔽部101c设置为沿列方向(即沿着y轴方向)排布，具体的可以设置为如图2所示的直线形式。由于屏蔽部101c的主要作用是为了屏蔽数据线103加载的数据信号对像素电极102的影响，实质上，屏蔽部101c也是子公共电极G的一部分，因此，需要部分数据线103被子公共电极G的屏蔽部101c所遮挡。
或者，数据线103也可以设置为沿子公共电极G的屏蔽部101c延伸方向设置的弯折线，具体地，如图4所示，当子公共电极G的设置为弯折的结构，那相应数据线103也可以设置为与屏蔽部101c具有相同弯折角度的弯折线，图4中公共电极101和像素电极102均为弯折结构，相应的，数据线103也设置为弯折线，其中，图4中所示的数据线103只是为了示意其弯折的情况，并不代表实际制作时数据线的真实形状和宽度等。
具体地，栅线104一般设置为行方向(即沿着x轴方向)排布，具体的可以设置为直线形式，也可以设置为弯折线，即形成如图2所示的结构，使亚像素单元P之间的排列更加紧密，节省布局空间。此时，连接到同一栅线104的亚像素单元P中，各像素电极102的凸出连接部102a交替平行排列。
具体地，由于本公开实施例提供的阵列基板中，每条公共电极101中相邻两个子公共电极G的主体连接部101a位于相对的两侧，而且子公共电极G的主体连接部101a和像素电极102的凸出连接部102a位于相对的两侧，因此如图2所示，实际上相邻像素电极102的凸出连接部102a也位于相对的两侧，因此，一般连接到同一条栅线104的像素电极102也分别属于两行亚像素单元P，可选地，每条栅线104连接的相邻两个亚像素单元P分别属于不同行。
具体地，在将栅线104设置为弯折线时，可以通过将连接到同一栅线104的像素电极102的凸出连接部102a交替平行排列的方式，使连接到同一条栅线104且位于相邻的两列亚像素单元P中的像素电极102的凸出连接部102a尽量处于同一直线，使各个像素电极102的凸出连接部102a交替平行排列，进而可以使亚像素单元P之间的排列更加紧密，即形成图2所示的结构。
在具体实施时，在本公开实施例提供的上述阵列基板中，像素电极102和公共电极101具有多种不同的结构和制作方式，例如两者可以同层一起制作，也可以分开设置在不同的膜层中，下面分别介绍几种具体的结构。
可选地，在本公开实施例提供的上述阵列基板中，像素电极102与公共电极101可以同层设置；且像素电极102在垂直于阵列基板方向上的正投影与公共电极101在垂直于阵列基板方向上的正投影互不交叠。
在具体实施时，像素电极102与公共电极101同层形成时，一般采用透明导电材料或金属等材料形成。由于像素电极102和公共电极101设置在同一层，而且每个亚像素单元P均对应一个像素电极102和一部分公共电极101(例如，图2中的一个子公共电极G)，而每条公共电极101中的子公共电极G为梳状的叉指电极，因此，相应的，像素电极102也可以设置为梳状的叉指电极。
可选地，当像素电极102设置为梳状的叉指电极时，如图2所示，像素电极102的电极部102b一般包括多个与凸出连接部102a连接的第二梳齿分支102b1；其中，第二梳齿分支102b1与公共电极的第一梳齿分支101b均是分支结构，可以将其交叉排布，即第二梳齿分支102b1与第一梳齿分支101b在平行于栅线104延伸的方向上交替排列，即可以认为是像素电极102的第二梳齿分支102b1穿插到子公共电极G的第一梳齿分支101b之中。
可选地，在本公开实施例提供的上述阵列基板中，如图5和图6所示，像素电极102与公共电极101也可以异层设置；此时，像素电极102的电极部102b可以为板状电极。
在具体实施时，像素电极102与公共电极101不在同一层形成时，一般采用ITO(Indium tin oxide，氧化铟锡)或金属等材料形成。此时，由于像素电极102单独制作，可以将其设置为板状电极。
可选地，在本公开实施例提供的上述阵列基板中，像素电极102与公共电极101可以具有直线边缘的结构，还可以设置为具有折线边缘的结构，以实现多畴显示。
可选地，在本公开实施例提供的上述阵列基板中，不管像素电极102和公共电极101是同层还是异层设置，像素电极102和公共电极101均可以设置为直线结构，即像素电极102的电极部102b为具有直线边缘的结构，且公共电极101的第一梳齿分支101a为直线型；具体地，当像素电极102和公共电极101同层设置时，形成如图2所示的结构；而当像素电极102和公共电极101异层设置时，形成如图5所示的结构。
可选地，在本公开实施例提供的上述阵列基板中，不管像素电极102和公共电极101是同层还是异层设置，像素电极102和公共电极101也可以设置为折线结构，即像素电极102的电极部102b为具有折线边缘的结构，且公共电极101的第一梳齿分支101b为折线型；且电极部102b折线的弯折角度与第一梳齿分支101b折线的弯折角度相同，以实现多畴显示，增大视角。通常，公共电极101的第一梳分支101b和屏蔽部101c在中部需要弯折为特定 角度，相应的，板状的像素电极102在电极部102b的中部也做适应性变形。具体弯折的角度可以根据需要进行设置，例如，可以设置为弯折角度在160度-180度之间，或者是10度-20度之间等。当像素电极102和公共电极101同层设置时，形成如图4所示的结构；而当像素电极102和公共电极101异层设置时，形成如图6所示的结构。
值得注意的是，为了方便视图，在图3和图6中除了公共电极101和像素电极102的排布方式，并未过多示出其它结构，其它的结构(例如，数据线、栅线、薄膜晶体管等)均可以参见图2。
在具体实施时，为了使公共电极101加载的信号更均匀，尤其针对尺寸较大的阵列基板，可以将多条公共电极101连接起来。基于此，可选地，在本公开实施例提供的上述阵列基板中，如图2至图6所示，相邻两条公共电极101中的子公共电极G可以通过连接线进行电连接，例如，可以将相对的两个子公共电极G中的屏蔽部101c连接起来。为了减少制作工艺，在形成各个公共电极101时，可以直接将连接线一同制作出来。另外，为了图示清楚，图5和图6中的像素电极102在画图时都做了透明处理，这只是为了用于说明所做的效果，并不代表真实制作的情况，更不用于限定本公开。
基于同一公开构思，本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述阵列基板。该显示装置的实施可以参见上述任一阵列基板的实施例，重复之处不再赘述。
综上所述，本公开实施例提供的阵列基板及显示装置中，每条公共电极包括多个子公共电极，而一般每个子公共电极包括的主体连接部的宽度较宽且电阻较小，而第一梳齿分支较窄且电阻较大；本公开中将每条公共电极中相邻两个子公共电极的主体连接部设置在相对的方向，相应的，可以将每条公共电极中相邻的电阻较小的主体连接部分散设置在两侧，提高了公共电极电阻的均匀性，从而提高整体的显示效果。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要 求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (13)

  1. 一种阵列基板，其中，包括：
    呈阵列排布的多个亚像素单元；
    每行所述亚像素单元具有一条公共电极；
    所述公共电极包括多个子公共电极，每个所述子公共电极对应一个所述亚像素单元；
    所述子公共电极包括主体连接部，与所述主体连接部连接的多个第一梳齿分支，以及与所述主体连接部连接的屏蔽部；所述第一梳齿分支和所述屏蔽部位于所述主体连接部的同一侧，且所述屏蔽部位于所述第一梳齿分支的最外侧；
    所述公共电极中，相邻的两个所述子公共电极的所述主体连接部位于相对的两侧。
  2. 如权利要求1所述的阵列基板，其中，每条所述公共电极中相邻的两个所述子公共电极共用一个所述屏蔽部。
  3. 如权利要求1所述的阵列基板，其中，每个所述亚像素单元具有像素电极；
    所述像素电极包括凸出连接部和电极部；
    每个所述亚像素单元中，所述像素电极的凸出连接部和所述子公共电极的主体连接部位于相对的两侧。
  4. 如权利要求3所述的阵列基板，其中，所述阵列基板还包括：数据线和栅线；
    所述数据线与所述子公共电极的屏蔽部延伸方向相同；所述数据线在垂直于所述阵列基板方向上的正投影与所述子公共电极的屏蔽部在垂直于所述阵列基板方向上的正投影具有重叠区域；
    所述栅线沿着与所述数据线交叉的方向延伸。
  5. 如权利要求4所述的阵列基板，其中，每条所述栅线连接的相邻两个 所述亚像素单元分别属于不同行。
  6. 如权利要求5所述的阵列基板，其中，所述栅线为弯折线；连接到同一所述栅线的所述亚像素单元中，各所述像素电极的凸出连接部交替平行排列。
  7. 如权利要求4所述的阵列基板，其中，所述像素电极与所述公共电极同层设置；且所述像素电极在垂直于所述阵列基板方向上的正投影与所述公共电极在垂直于所述阵列基板方向上的正投影互不交叠。
  8. 如权利要求7所述的阵列基板，其中，所述像素电极的电极部包括与所述凸出连接部连接的多个第二梳齿分支；
    所述第二梳齿分支与所述第一梳齿分支在平行于所述栅线延伸的方向上交替排列。
  9. 如权利要求3所述的阵列基板，其中，所述像素电极与所述公共电极异层设置；所述像素电极的电极部为板状。
  10. 如权利要求3-9任一项所述的阵列基板，其中，所述像素电极的电极部为具有直线边缘的结构，且所述公共电极的第一梳齿分支为直线型。
  11. 如权利要求3-9任一项所述的阵列基板，其中，所述像素电极的电极部为具有折线边缘的结构，且所述公共电极的第一梳齿分支为折线型；所述电极部折线的弯折角度与所述第一梳齿分支折线的弯折角度相同。
  12. 如权利要求1-9任一项所述的阵列基板，其中，相邻两条所述公共电极中的子公共电极通过连接线电连接。
  13. 一种显示装置，其中，包括如权利要求1-12任一项所述的阵列基板。
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