WO2019061874A1 - 阵列基板及其制作方法、触控显示面板 - Google Patents

阵列基板及其制作方法、触控显示面板 Download PDF

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Publication number
WO2019061874A1
WO2019061874A1 PCT/CN2017/116962 CN2017116962W WO2019061874A1 WO 2019061874 A1 WO2019061874 A1 WO 2019061874A1 CN 2017116962 W CN2017116962 W CN 2017116962W WO 2019061874 A1 WO2019061874 A1 WO 2019061874A1
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Prior art keywords
touch
layer
electrodes
touch electrodes
thin film
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PCT/CN2017/116962
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English (en)
French (fr)
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石腾腾
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武汉华星光电技术有限公司
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Priority to US15/744,788 priority Critical patent/US10606388B2/en
Publication of WO2019061874A1 publication Critical patent/WO2019061874A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate and a method for fabricating the same, and a touch display panel.
  • the terminal puts forward higher requirements on the touch display device, and the touch display device is required to be thinner. Therefore, in the prior art, the touch panel function is embedded in the liquid crystal pixel (in-cell). The way to achieve thinning of the touch display device.
  • each touch electrode in the touch layer needs to be connected to the touch chip through a touch line.
  • each of the touch electrodes is connected to a touch line. , you need to use a lot of touch lines.
  • Such a large number of touch traces require a large number of trace areas, which is contrary to the requirement that the width of the non-display area of the touch screen is required to be narrower and better.
  • the invention provides an array substrate and a manufacturing method thereof, and a touch display panel, which reduces touch lines in the touch display device and reduces the width of the non-display area of the touch display panel.
  • the array substrate includes a substrate, a thin film transistor disposed on the substrate, and a flat layer covering the thin film transistor, wherein a side of the flat layer away from the thin film transistor is provided with a touch layer;
  • the touch layer includes a plurality of first touch electrodes disposed in an array and a plurality of second touch electrodes disposed in the array, and the plurality of first touch electrodes and the plurality of second touch electrodes are alternately spaced and insulated
  • the two first touch electrodes adjacent to each row are electrically connected by a connection line, and the plurality of the second touch electrodes of each column are electrically connected, the connection line and the source and drain of the thin film transistor Extremely located on the same layer and obtained through the same process.
  • Each of the first touch electrodes is connected to a first touch trace, and each of the second touch electrodes is connected to a second touch trace, and each of the first touch traces is The line and each of the second touch lines are electrically connected to a touch chip.
  • Each of the first touch traces is electrically connected to at least one thin film transistor, and each of the The thin film transistors electrically connected to the first touch traces are all connected to a main trace, and each of the main traces is electrically connected to a touch chip.
  • the connecting line and the touch layer are in different layers, and the two adjacent first touch electrodes are connected to the connecting line through via holes.
  • the connecting line and the touch layer are all formed of a metal material.
  • the second insulating layer and the pixel electrode are sequentially stacked on the touch layer, and the pixel electrode is electrically connected to the source/drain of the thin film transistor through a via.
  • a common electrode layer and a first insulating layer are sequentially stacked between the flat layer and the touch layer, and the common electrode layer is laminated on the flat layer; And a buffer layer, wherein the thin film transistor is disposed on the buffer layer.
  • the two adjacent second touch electrodes of each column are connected by a connecting portion, and the connecting portion is the same as the second touch electrode material and is located in the same layer, and the connecting portion will be more than each column.
  • the second touch electrodes are connected to form one elongated electrode, and the first touch electrodes are respectively located on two sides of the long electrode.
  • the method for fabricating the array substrate comprises the steps of:
  • the thin film transistor including a semiconductor layer, a gate insulating layer, a gate electrode, a third insulating layer and a source and a drain, wherein the source and the drain are electrically connected to the semiconductor layer, and a source line and a drain are formed by a patterning process to form a connection line;
  • the touch layer includes a plurality of first touch electrodes disposed in an array and a plurality of second touch electrodes disposed in an array, and the plurality of first The touch electrodes are alternately spaced and insulated from the plurality of second touch electrodes, and two adjacent first touch electrodes of each row are electrically connected to the connecting lines through via holes to realize phase of each row. Electrically connecting between the two first touch electrodes, and electrically connecting each of the second touch electrodes;
  • a second insulating layer and a pixel electrode are sequentially formed on the touch layer by a patterning process, and the pixel electrode is electrically connected to the source/drain through a via.
  • the touch display panel includes a color filter substrate and the array substrate, the color film substrate is disposed opposite to the array substrate, the color film substrate includes a black matrix, and the black matrix
  • the projection on the touch layer covers the first touch electrode and the second touch electrode.
  • the array substrate provided by the present invention is electrically connected by connecting two adjacent first touch electrodes in each row through a connection line, and electrically connecting two adjacent second touch electrodes in each column.
  • the first touch electrodes of each row need only be connected to a first touch trace, and each of the second touch electrodes only needs to be connected to a second touch trace, thereby enabling touch control.
  • the number of touch traces can be greatly reduced, and the width of the non-display area of the touch screen can be greatly reduced.
  • the connection line electrically connecting the two adjacent first touch electrodes is located in the same layer as the source and drain of the thin film transistor and is obtained by the same process, thereby eliminating the need to add a new process and reducing the production cost. .
  • 1 is a schematic diagram of connection between the touch screen and the touch chip according to an embodiment of the invention
  • FIG. 2 is a schematic diagram of connection between the touch screen and the touch chip according to another embodiment of the present invention.
  • FIG. 3 is a schematic cross-sectional view of an array substrate of the embodiment of FIG. 1 according to the present invention.
  • FIG. 4 is a flow chart of a method for fabricating the array substrate according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of the touch display panel according to the embodiment of the present invention.
  • the present invention provides an array substrate 100.
  • the array substrate 100 includes a substrate 10, a thin film transistor disposed on the substrate, and a flat layer 30 covering the thin film transistor.
  • a touch layer 60 is disposed on a side of the flat layer 30 away from the thin film transistor.
  • the touch layer 60 includes a plurality of touch electrodes, and the plurality of touch electrodes are electrically connected to a touch chip 70.
  • the touch function of the touch layer 60 is implemented by the touch layer 60 and the touch chip 70.
  • the array substrate 10 includes a non-display area in which a display area is connected to the display area and surrounds the display area.
  • the types of the thin film transistors may be various, such as amorphous silicon thin film transistors, polysilicon thin film transistors, organic thin film transistors, oxide thin film transistors, and the like.
  • the thin film transistor is a low temperature polysilicon thin film transistor.
  • the thin film transistor specifically includes a semiconductor layer 21, and a gate insulating layer 22, a gate electrode 23, a third insulating layer 24, and a source and drain layer 25, which are sequentially stacked on the semiconductor layer 21, and the source and drain layers 25 Includes source and drain settings for the interval.
  • the source and the drain are electrically connected to the semiconductor layer 21 through via holes.
  • the touch layer 60 includes a plurality of first touch electrodes 61 arranged in an array and a plurality of second touch electrodes 62 disposed in an array.
  • the first touch electrode 61 and the second touch electrode 62 are formed by the same process. Specifically, the first touch electrode 61 and the second touch electrode 62 are simultaneously formed by patterning by forming a layer of a metal material on the first insulating layer 50.
  • the first touch electrode 61 may be a driving electrode (Tx) / a sensing electrode (Rx)
  • the second touch electrode 62 may be a sensing electrode (Rx) / a driving electrode (Tx).
  • the first touch electrode 61 and the second touch electrode 62 are all diamond-shaped.
  • first touch electrode 61 and the second touch electrode 62 can have other shapes, such as a square, a rectangle, etc., the first touch electrode 61 and the second touch electrode.
  • the shape of 62 may be the same or different.
  • the plurality of first touch electrodes 61 and the plurality of second touch electrodes 62 are alternately spaced apart from each other, and the first touch electrodes 61 and the second touch electrodes 62 are insulated from each other.
  • the first touch electrode 61 and the second touch electrode 62 adjacent thereto and the insulating layer between the two form a capacitor.
  • the first touch electrodes 61 of each row are electrically connected to each other, and the plurality of the second touch electrodes 62 of each column are electrically connected. It can be understood that, according to the direction of the array substrate 100, the first touch electrodes 61 of each column may be electrically connected to each other, and the plurality of the second touch electrodes 62 of each row are electrically connected. connection.
  • connection line 63 is electrically connected to the connection line 63.
  • the connection line 63 is located in the source and drain layer 25 and is obtained by the same process as the source and the drain.
  • the connection line 63 is the same as the material of the first touch electrode 61 and the second touch electrode 62.
  • the connection line 63 and the first touch electrode 61 and the The second touch electrodes 62 are all made of a metal material.
  • the first touch electrode 61 and the second touch electrode 62 are both made of a metal material, and the connecting line is the same ITO material as the common electrode layer, and the present invention
  • the contact impedance between the connecting line and the first touch electrode 61 and the second touch electrode 62 is smaller than that of the prior art, thereby achieving a better touch effect.
  • the contact resistance between the connecting line 63 and the first touch electrode 61 and the second touch electrode 62 is 0.61 ⁇ .
  • the ITO The contact resistance between the connecting line formed by the material and the first touch electrode 61 and the second touch electrode 62 is 28.52 ⁇ .
  • the two adjacent touch electrodes 62 in each row are connected by a connecting portion 65.
  • the connecting portion 65 is electrically connected, and the connecting portion 65 and the material of the second touch electrode 62 are electrically connected. Same and on the same floor. That is, the connecting portion 65 in the present invention may be formed in the same process as the second touch electrode, so that the plurality of the second touch electrodes 62 of each column are connected to form a long strip through the connecting portion 65.
  • the electrodes, the first touch electrodes 61 are respectively located on two sides of the elongated electrodes. In this embodiment, the first touch electrodes 61 and the second touch electrodes 62 are all diamond-shaped, and the plurality of the second touch electrodes 62 of each column are connected to form two of the long electrodes.
  • the long side of the strip is a undulating wavy structure.
  • the first touch electrode 61 and the second touch electrode 62 are square or rectangular, and the plurality of the second touch electrodes 62 of each column are connected to form the long length.
  • the strip electrodes may be in the form of a strip of a rectangle, that is, the two long sides of the strip electrode are straight lines. It can be understood that, according to the different shapes of the second touch electrodes 62, the strip electrodes formed by connecting the plurality of the second touch electrodes 62 may also have other various shapes, such as a long side. Arc shape, etc.
  • the first touch electrode 61 and the second touch electrode 62 are connected to the touch chip 70 through touch lines.
  • the touch line includes a first touch line 81 and a second touch line 82.
  • each of the plurality of first touch electrodes 61 is connected to a first touch trace 81, and each of the plurality of second touch electrodes 62 and each of the columns
  • the second touch traces 82 are connected.
  • by electrically connecting a plurality of the first touch electrodes 61 in each row a plurality of the second touch electrodes 62 in each column are electrically connected, and then each of the plurality of rows is connected.
  • the first touch electrodes 61 are all associated with one
  • the first touch lines 81 are connected to each other, and the plurality of second touch electrodes 62 of each column are connected to a second touch line 82.
  • the plurality of the first touch electrodes 61 of each row only need to be connected to one touch trace, and the plurality of the second touch electrodes 62 of each column are only required to be implemented. It is required to be connected to one of the touch traces, thereby greatly reducing the number of touch traces, thereby reducing the width of the non-display area of the touch screen.
  • the first touch electrode 61 and the second touch electrode 62 are specifically connected to the touch chip 70 through the touch line.
  • the touch chip 70 is provided on the touch chip 70.
  • each of the touch traces is connected to a connection terminal 71 of the touch chip 70.
  • the number of the connection terminals on the touch chip 70 in the present invention may be correspondingly small, so that the size of the touch chip 70 can be reduced, or the number of the touch chips 70 can be reduced.
  • the area of the connection terminal is large, thereby reducing the difficulty in manufacturing the connection terminal, thereby improving the production yield of the touch chip 70.
  • the touch chip 70 can be disposed on the array substrate 10 and located in the non-display area of the array substrate 10, thereby avoiding the display effect on the touch display panel including the array substrate 10. Impact.
  • the touch chip 70 is carried on a flexible substrate circuit (PFC board) by COF (chip on film) technology, so that the width of the non-display area including the array substrate 10 can be further reduced.
  • the touch chip 70 is carried on a flexible substrate circuit (PFC board) by COF technology.
  • the present invention further provides another embodiment of the array substrate 100.
  • the embodiment is different from the above embodiment in that the array substrate 100 further includes a plurality of thin film transistors 84, each of which is first.
  • the touch traces 81 are electrically connected to the at least one thin film transistor 84
  • the thin film transistors 84 electrically connected to each of the first touch traces 61 are electrically connected to the touch control chip 70 . That is, the first touch electrode 61 and the touch chip 70 are electrically connected through the thin film transistor 84 in each row.
  • each of the first touch traces 81 is electrically connected to a thin film transistor 84.
  • the thin film transistor 84 is located on one side of the first touch electrode 61 corresponding to the thin film transistor 84, and a plurality of the thin film transistors 84 are connected to a main touch trace 83, and then passed through The main touch trace 83 is connected to the touch chip 70 to further reduce the number of touch traces in the non-display area of the array substrate 10 and, due to the occupied area of the transistor It is small so that the width of the non-display area can be further reduced.
  • each of the first touch traces 81 can be electrically connected to the two thin film transistors 84.
  • two The thin film transistors 84 are disposed on two sides of each of the first touch traces 81, so that the touch signals are transmitted through the two thin film transistors 84 for each row of the touch electrodes, thereby improving The response speed of the touch layer 60.
  • the array substrate 10 further includes a second insulating layer 91 covering the touch layer 60 and a pixel electrode 92 disposed on the second insulating layer 91.
  • the pixel electrode 92 is electrically connected to a source or a drain of a thin film transistor on the substrate 10 through a via.
  • the liquid crystal display panel made of the array substrate 100 is an FFS type liquid crystal display panel. That is, the common electrode layer and the pixel electrode of the liquid crystal display panel are all located on the array substrate 100.
  • the common electrode layer 40 and the first insulating layer 50 are sequentially stacked between the flat layer 30 of the array substrate 100 and the touch layer 60, and the common electrode layer 40 is laminated. On the flat layer 30.
  • the liquid crystal display panel made of the array substrate is a VA liquid crystal display panel, and the common electrode layer 40 and the array substrate 100 may not be disposed on the array substrate 100.
  • the first insulating layer 50 is described.
  • the light shielding layer 11 and the buffer layer 12 are sequentially laminated on the substrate 10, thereby ensuring the tight bonding of the thin film transistor and the substrate 10, and ensuring the effectiveness of the thin film transistor. jobs.
  • each row of the first touch electrodes 61 is electrically connected between each row of the first touch electrodes 61, so that each row of the first touch electrodes 6 only needs to be
  • the first touch traces 81 are connected to each other, and each of the second touch electrodes 62 only needs to be connected to a second touch trace 82 to implement a touch operation, thereby greatly reducing touch. Controlling the number of traces, in turn, can reduce the width of the non-display area of the touch screen. Further, by electrically connecting each row of the first touch electrodes 61 to the touch chip 70 through the thin film transistor 84, the number of touch traces can be further reduced, thereby further reducing the non-display of the touch screen. The width of the area.
  • the size of the touch chip 70 can be reduced or the size of the connection terminal of the touch chip 70 can be increased, thereby improving the yield of the touch chip 70.
  • the connection lines 63 connecting the two adjacent first touch electrodes 61 are all made of a metal material, and the first touch electrode 61 is made of a metal material.
  • the contact line between the first touch electrode 61 and the second touch electrode 62 is smaller than that of the prior art, so that the connection line is an ITO material. Better touch effects.
  • the connection line 63 is in the same layer as the source and drain layer 25, and is formed in the same process as the source and drain layer 25, It is necessary to increase the process of the array substrate 100.
  • the present invention further provides a method for fabricating the array substrate 100, including:
  • a light shielding layer and a buffer layer are sequentially stacked on the substrate 10, and a thin film transistor is formed on the buffer layer by a patterning process.
  • the thin film transistor includes a semiconductor layer 21 and a gate insulating layer 22, a gate electrode 23, a third insulating layer 24, and a source/drain layer 25 which are sequentially stacked on the semiconductor layer 21.
  • the source and drain layers 25 include spaced apart sources and drains.
  • the source/drain layer 25 further includes a connection line 63.
  • the connection line 63 is located in the same layer as the source and the drain, and is exposed, developed, and etched through the same mask. That is, the source and the drain are obtained through the same process, and the connection line 63 can be formed without increasing the process, thereby saving production cost.
  • Step 402 sequentially forming a flat layer 30, a common electrode layer 40, and a first insulating layer 50 on the thin film transistor.
  • the touch layer 60 includes a plurality of first touch electrodes 61 arranged in an array and a plurality of second touch electrodes 62 disposed in an array.
  • a plurality of the first touch electrodes 61 and a plurality of the second touch electrodes 62 are alternately spaced and insulated, and a plurality of the first touch electrodes 61 in each row are electrically connected to each other.
  • the second touch electrodes 62 are electrically connected to each other.
  • two adjacent first touch electrodes 61 are connected to the connecting line 63 through via holes, so that two adjacent first touch electrodes 61 are electrically connected, and the same manner is adopted.
  • a plurality of the first touch electrodes 61 of each row are electrically connected. Further, in the present invention, the plurality of the second touch electrodes 62 in each column are connected by a connection portion 65.
  • the connecting portion 65 is formed simultaneously with the first touch electrode 61 and the second touch electrode 62. Specifically, a touch material layer is formed on the first insulating layer 50, and the touch material layer is patterned to obtain the connecting portion 65, the first touch electrode 61, and the The touch layer 60 of the second touch electrode 62 is described.
  • Step 404 sequentially forming a second insulating layer 91 and a pixel electrode layer 92 on the touch layer 60 by a patterning process, and connecting the pixel electrode layer 92 to the connection layer 21 through via holes.
  • the pixel electrode layer 92 is electrically connected to the source or the drain 21 of the thin film transistor through the connection layer 21, thereby avoiding the pixel electrode layer 92 and the connection layer which may be generated if the via hole is too deep. 21 bad contact problems.
  • the method for fabricating the array substrate 100 provided by the present invention is to fabricate the array substrate 100 When there is no need to increase the process, the production cost is reduced.
  • the present invention further provides a touch display panel 200 .
  • the touch display panel 200 includes a color filter substrate 210 and the array substrate 100.
  • the color film substrate 210 is disposed opposite to the array substrate 100, and one side of the substrate 10 on which the thin film transistor is disposed faces the color Film substrate 210.
  • a liquid crystal layer 220 is disposed between the array substrate 100 and the color filter substrate 210.
  • the color filter substrate 210 includes a black matrix (BM), and the projection of the black matrix on the touch layer covers the first touch electrode 61 and the second touch electrode 62.
  • BM black matrix
  • the black matrix includes a plurality of rows of first frame lines disposed in parallel, and a plurality of columns of second frame lines disposed in parallel with the first frame lines.
  • the adjacent two rows of the first frame line and the adjacent two columns of the second frame line enclose a pixel area, and the pixel area is filled with photoresist materials of different colors, thereby realizing display of the touch display panel 200.
  • the projection of the first frame line on the touch layer of each row covers a row of the first electrodes 61
  • the projection of the second frame lines on the touch layer of each column covers a row of the second electrodes
  • the first touch electrode 61 and the second touch electrode 62 of the touch layer 60 do not affect the display effect of the touch display panel 200.
  • the touch display panel 200 of the present invention is mounted on the surface of the display panel by embedding the touch layer 60 in the array substrate 100 compared to the touch substrate including the touch layer 60.
  • the thickness of one touch substrate can be reduced, thereby achieving thinning of the touch display panel.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

一种阵列基板(100)及其制作方法及一种触控显示面板(200),通过将触控层(60)的每行的多个第一触控电极(61)之间电连接,每列的多个第二触控电极(62)之间电连接,再将每行的多个第一触控电极(61)均与一第一触控走线(81)相连接,每列的多个第二触控电极(62)与一第二触控走线(82)相连,再将第一触控走线(81)及第二触控走线(82)与触控芯片(70)相连接,从而使得在实现触控效果的同时,每行的多个第一触控电极(61)只需要与一根触控走线(81)相连接,每列的多个第二触控电极(62)只需要与一根触控走线(82)相连,从而大大减少了触控走线的数量,进而能够大大的缩小触摸屏的非显示区域的宽度。

Description

阵列基板及其制作方法、触控显示面板 技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法,以及一种触控显示面板。
背景技术
随着触摸显示技术的发展,终端对触摸显示装置提出更高的要求,需要触摸显示装置做的更薄,因此,现有技术中通过将触控面板功能嵌入到液晶像素中(in-cell)的方式,实现触控显示装置的薄型化。现有技术中,所述触控层内的每个触控电极均需通过一触控走线与触控芯片进行连接,但是,每个所述触控电极均与一触控走线进行连接,则需要用到大量的触控走线。如此多的触控走线需要占用大量的走线区域,从而与现在要求触摸屏的非显示区域的宽度也要求越窄越好的要求相违背。
发明内容
本发明的提供一种阵列基板及其制作方法,以及触控显示面板,减少所述触控显示装置中的触控走线,减小所述触控显示面板的非显示区的宽度。
所述阵列基板,包括衬底,设置于所述衬底上的薄膜晶体管,及覆盖所述薄膜晶体管的平坦层,所述平坦层远离所述薄膜晶体管的一侧设有触控层;所述触控层包括阵列设置的多个第一触控电极及阵列设置的多个第二触控电极,多个所述第一触控电极与多个所述第二触控电极交替间隔设置并绝缘;每行相邻的两个所述第一触控电极通过连接线电连接,每列的多个所述第二触控电极之间电连接,所述连接线与所述薄膜晶体管的源漏极位于同一层并通过同一制程得到。
其中,每行所述第一触控电极与一第一触控走线相连接,每列所述第二触控电极与一第二触控走线相连,每条所述第一触控走线及每条所述第二触控走线均与一触控芯片电连接。
其中,每条所述第一触控走线均与至少一薄膜晶体管电连接,与每条所述 第一触控走线电连接的薄膜晶体管均连接至一主走线,每条所述主走线均与一触控芯片电连接。
其中,所述连接线与所述触控层在不同层,相邻的两个所述第一触控电极均通过过孔连接至所述连接线。
其中,所述连接线及所述触控层均为金属材料形成。
其中,所述触控层上还依次层叠有第二绝缘层及像素电极,所述像素电极通过过孔与所述薄膜晶体管的源/漏极电连接。
其中,所述平坦层与所述触控层之间还依次层叠有公共电极层及第一绝缘层,所述公共电极层层叠于所述平坦层上;所述衬底上还依次层叠有遮光层及缓冲层,所述薄膜晶体管设于所述缓冲层上。
其中,每列的相邻两个所述第二触控电极通过连接部进行连接,所述连接部与所述第二触控电极材料相同且位于同一层,所述连接部将每列的多个所述第二触控电极连接形成一个长条电极,所述第一触控电极分别位于所述长条电极的两侧。
所述阵列基板的制作方法,包括步骤:
在衬底上依次层叠遮光层及缓冲层,并在所述缓冲层上通过构图工艺形成薄膜晶体管,所述薄膜晶体管包括依次层叠的半导体层、栅极绝缘层、栅极、第三绝缘层及源极、漏极,所述源极及漏极均通过与所述半导体层电连接,并且,通过构图工艺形成所述源极及漏极的同时,形成一连接线;
在所述薄膜晶体管上依次形成平坦层、公共电极层及第一绝缘层;
在所述第一绝缘层上通过构图工艺形成触控层,所述触控层包括阵列设置的多个第一触控电极及阵列设置的多个第二触控电极,多个所述第一触控电极与多个所述第二触控电极交替间隔设置并绝缘,每行的相邻两个所述第一触控电极通过过孔与所述连接线电连接,以实现每行的相邻两个所述第一触控电极之间的电连接,每列所述第二触控电极之间电连接;
在所述触控层上通过构图工艺依次形成第二绝缘层及像素电极,并使所述像素电极通过过孔与所述源极/漏极电连接。
所述触控显示面板,所述触控显示面板包括彩膜基板及上述的阵列基板,所述彩膜基板与所述阵列基板相对设置,所述彩膜基板包括黑矩阵,所述黑矩 阵在所述触控层上的投影覆盖所述第一触控电极及所述第二触控电极。
本发明提供的所述阵列基板,通过将每行相邻的两个所述第一触控电极通过连接线电连接,每列相邻的两个所述第二触控电极之间电连接,使得每行所述第一触控电极只需与一第一触控走线相连接,每列所述第二触控电极只需与一第二触控走线相连,从而使得在实现触控效果的同时,能大大减少了触控走线的数量,进而能够大大的缩小所述触摸屏的非显示区域的宽度。并且,电连接相邻的两个所述第一触控电极的所述连接线与所述薄膜晶体管的源漏极位于同一层并通过同一制程得到,从而不需要增加新的制程,降低生产成本。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本发明一实施例的所述触控屏与所述触控芯片的连接示意图;
图2是本发明另一实施例的所述触控屏与所述触控芯片的连接示意图;
图3是本发明图1所述实施例的阵列基板的截面示意图;
图4是本发明图实施例的所述阵列基板的制作方法流程图;
图5是本发明图实施例的所述触控显示面板的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
请参阅图1及图3,本发明提供一种阵列基板100。所述阵列基板100包括衬底10,设置于所述衬底上的薄膜晶体管,及覆盖所述薄膜晶体管的平坦层30。所述平坦层30上远离所述薄膜晶体管的一侧上设有触控层60。所述触控层60包括多个触控电极,多个所述触控电极均与一触控芯片70进行电连接, 从而通过所述触控层60及所述触控芯片70实现所述触控层60的触控功能。并且,所述阵列基板10包括显示区域与所述显示区连接并围绕所述显示区的非显示区。
本发明中,所述薄膜晶体管的类型可以有很多种,如非晶硅薄膜晶体管、多晶硅薄膜晶体管、有机薄膜晶体管、氧化物薄膜晶体管等。本实施例中,所述薄膜晶体管为低温多晶硅薄膜晶体管。所述薄膜晶体管具体包括半导体层21,及依次层叠于所述半导体层21上的栅极绝缘层22、栅极23、第三绝缘层24及源漏极层25,所述源漏极层25包括间隔设置的源极及漏极。所述源极及漏极均通过过孔与所述半导体层21电连接。所述触控层60包括阵列设置的多个第一触控电极61及阵列设置的多个第二触控电极62。本发明中,所述第一触控电极61及所述第二触控电极62通过同一制程形成。具体的,通过在所述第一绝缘层50上形成一层金属材料层,通过图案化同时形成所述第一触控电极61及所述第二触控电极62。所述第一触控电极61可以为驱动电极(Tx)/感应电极(Rx),所述第二触控电极62可以为感应电极(Rx)/驱动电极(Tx)。本实施例中,所述第一触控电极61及所述第二触控电极62均为菱形。可以理解的是,所述第一触控电极61及所述第二触控电极62可以为其它的形状,如正方形、长方形等,所述第一触控电极61与所述第二触控电极62的形状可以相同也可以不同。多个所述第一触控电极61与多个所述第二触控电极62交替间隔设置,且所述第一触控电极61与所述第二触控电极62之间相互绝缘。所述第一触控电极61及与其相邻的第二触控电极62及二者之间的绝缘层形成一电容。当触控所述触控层60的任意位置时,触控位置的电容会发生改变,通过检测电容的改变从而获取实施的触控位置,从而实现触控动能。
本发明中,每一行的所述第一触控电极61之间电连接,每列的多个所述第二触控电极62之间电连接。可以理解的是,根据所述阵列基板100的方向不同,也可以为每列的所述第一触控电极61之间电连接,每行的多个所述第二触控电极62之间电连接。
具体的,每一行的相邻的两个所述第一触控电极61之间通过一连接线63进行电连接,从而完成每一行的所述第一触控电极61之间的电连接。所述连接线63与所述触控层60在不同层,相邻的两个所述第一触控电极61均通过 过孔64与所述连接线63电连接。所述连接线63位于所述源漏极层25,并与所述源极及漏极通过同一制程得到。并且,所述连接线63与所述第一触控电极61及所述第二触控电极62的材料相同,本实施例中,所述连接线63与所述第一触控电极61及所述第二触控电极62均为金属材料。相比于现有技术中,所述第一触控电极61及所述第二触控电极62均为金属材料,所述连接线为与所述公共电极层相同的ITO材料来说,本发明中的连接线与所述第一触控电极61及所述第二触控电极62之间的接触阻抗相较于现有技术更小,从而实现有更好的触控效果。通过实际检测发现,本发明中,所述连接线63与所述第一触控电极61及所述第二触控电极62之间的接触阻抗为0.61Ω,而现有技术中,所述ITO材料形成的连接线与所述所述第一触控电极61及所述第二触控电极62之间的接触阻抗为28.52Ω。
每一列相邻的两个所述第二触控电极62之间通过连接部65进行连接,所述连接部65进行电连接,且所述连接部65与所述第二触控电极62的材料相同且位于同一层。即本发明中的所述连接部65可以与所述第二触控电极通过同一制程形成,从而通过所述连接部65将每列的多个所述第二触控电极62连接形成一长条电极,所述第一触控电极61分别位于所述长条电极的两侧。本实施例中,由于所述第一触控电极61及所述第二触控电极62均为菱形,每列的多个所述第二触控电极62连接形成的所述长条电极的两条长边为凹凸的波浪形结构。在本发明的其它实施例中,所述第一触控电极61及所述第二触控电极62为方形或长方形,每列的多个所述第二触控电极62连接形成的所述长条电极可以为长方形的条状,即长条电极的两条长边为直线。可以理解的是,根据所述第二触控电极62的不同的形状,多个所述第二触控电极62连接形成的所述长条电极还可以为其它的各种形状,如长边为圆弧形等。
所述第一触控电极61及所述第二触控电极62通过触控走线实现与所述触控芯片70的连接。所述触控走线包括第一触控走线81及第二触控走线82。本实施例中,每行的多个所述第一触控电极61均与一所述第一触控走线81相连接,每列的多个所述第二触控电极62与一所述第二触控走线82相连。本发明中,通过将每行的多个所述第一触控电极61之间电连接,每列的多个所述第二触控电极62之间电连接,再将每行的多个所述第一触控电极61均与一 所述第一触控走线81相连接,每列的多个所述第二触控电极62与一所述第二触控走线82相连。使得在实现触控效果的同时,每行的多个所述第一触控电极61只需要与一根所述触控走线相连接,每列的多个所述第二触控电极62只需要与一根所述触控走线相连,从而大大减少了触控走线的数量,进而能够缩小所述触摸屏的非显示区域的宽度。
本发明中,所述第一触控电极61及所述第二触控电极62通过所述触控走线实现与所述触控芯片70的连接具体的,所述触控芯片70上设有多个连接端子71。本实施例中,每条所述触控走线与所述触控芯片70的一个连接端子71相连。由于所述触控走线的数量大大减少,因此,本发明中的所述触控芯片70上连接端子的数量相应的可以较少,从而能够缩小所述触控芯片70的大小,或者将增大所述连接端子的面积,从而减低连接端子的制成难度,进而提升所述触控芯片70的生产良率。本发明中,所述触控芯片70可以设于所述阵列基板10上,并位于所述阵列基板10的非显示区内,从而避免对包括所述阵列基板10的触控显示面板的显示效果的影响。或者,所述触控芯片70通过COF(chip on film)技术将承载于一柔性基板电路(PFC板)上,从而能够进一步缩小包含所述阵列基板10的所述非显示区的宽度。本实施例中,所述触控芯片70通过COF技术将承载于一柔性基板电路(PFC板)上。
请参阅图3,本发明还提供所述阵列基板100的另一实施例,该实施例与上述实施例的区别在于,所述阵列基板100还包括多个薄膜晶体管84,每条所述第一触控走线81均与至少一薄膜晶体管84电连接,且与每条所述第一触控走线61电连接的薄膜晶体管84均与所述触控芯片70电连接。即每行所述第一触控电极61与所述触控芯片70通过所述薄膜晶体管84进行电连接。本实施例中,每条所述第一触控走线81均与一个薄膜晶体管84进行电连接。所述薄膜晶体管84位于与所述薄膜晶体管84对应的一行所述第一触控电极61的任一侧,且多个所述薄膜晶体管84均与一主触控走线83进行连接,再通过所述主触控走线83连接至所述触控芯片70,从而进一步减少所述阵列基板10的所述非显示区内的触控走线的数量,并且,由于所述晶体管的占用的面积很小,从而能够进一步缩小所述非显示区的宽度。可以理解的是,在其它的实施例中,每条所述第一触控走线81可以与两个薄膜晶体管84进行电连接。且两 个所述薄膜晶体管84分置于每条所述第一触控走线81的两侧,从而通过两个所述薄膜晶体管84为每一行的所述触控电极传输触控信号,从而能够提高所述触控层60的响应速度。
所述阵列基板10还包括覆盖所述触控层60的第二绝缘层91及设于所述第二绝缘层91上的像素电极92。所述像素电极92通过过孔与所述衬底10上的薄膜晶体管的源极或漏极电连接。并且,本实施例中,所述阵列基板100制成的液晶显示面板为FFS型液晶显示面板。即液晶显示面板的公共电极层及像素电极均位于所述阵列基板100上。具体的,本实施例中,所述阵列基板100的所述平坦层30与所述触控层60之间还依次层叠有公共电极层40及第一绝缘层50,所述公共电极层40层叠于所述平坦层30上。可以理解的是,在本发明的其它实施例中,如所述阵列基板制成的液晶显示面板为VA型液晶显示面板是,所述阵列基板100上可以不设所述公共电极层40及所述第一绝缘层50。进一步的,本实施例中,所述衬底10上还依次层叠有遮光层11及缓冲层12,从而保证所述薄膜晶体管与所述衬底10的紧密结合,并保证所述薄膜晶体管的有效工作。
本发明中,通过将每行所述第一触控电极61之间电连接,每列所述第二触控电极62之间电连接,使得每行所述第一触控电极6仅需与一所述第一触控走线81相连接,每列所述第二触控电极62仅需与一所述第二触控走线82相连,即可实现触控操作,从而大大减少了触控走线的数量,进而能够缩小所述触摸屏的非显示区域的宽度。进一步的,通过将每行所述第一触控电极61通过薄膜晶体管84与所述触控芯片70进行电连接,能够进一步减少触控走线的数量,从而进一步的缩小所述触摸屏的非显示区域的宽度。并且,由于所述触控走线的减少,能够缩小所述触控芯片70的大小,或者增大所述触控芯片70连接端子的大小,从而提高所述触控芯片70的良率。进一步的,本发明中,连接相邻的两个所述第一触控电极61的连接线63均为金属材料,相对于现有技术中,所述第一触控电极61为金属材料,所述连接线为ITO材料来说,本发明中的连接线与所述第一触控电极61及所述第二触控电极62之间的接触阻抗相较于现有技术更小,从而能实现更好的触控效果。并且,所述连接线63与所述源漏极层25位于同一层,并与所述源漏极层25经过同一制程形成,不 需要增加所述阵列基板100的制程。
请参阅图4,本发明还提供一种所述阵列基板100的制作方法,包括:
步骤401,在衬底10上依次层叠遮光层及缓冲层,并在所述缓冲层上通过构图工艺形成薄膜晶体管。所述薄膜晶体管包括半导体层21及依次层叠于所述半导体层21上的栅极绝缘层22、栅极23、第三绝缘层24及源漏极层25。所述源漏极层25包括间隔设置的源极及漏极。并且,本发明中,形成所述源漏极层25还包括连接线63,所述连接线63与所述源极及漏极位于同一层,并通过同一光罩经曝光、显影、蚀刻得到,即与所述源极及漏极通过同一制程得到,=可以在不增加制程的情况下形成所述连接线63,从而节省生产成本。
步骤402,在所述薄膜晶体管上依次形成平坦层30、公共电极层40及第一绝缘层50。
步骤403,在所述第一绝缘层50上通过构图工艺形成触控层60。所述触控层60包括阵列设置的多个第一触控电极61及阵列设置的多个第二触控电极62。多个所述第一触控电极61与多个所述第二触控电极62交替间隔设置并绝缘,每行的多个所述第一触控电极61之间电连接,每列的多个所述第二触控电极62之间电连接。具体的,相邻的两个所述第一触控电极61通过过孔连接至所述连接线63,使得相邻的两个所述第一触控电极61电连接,并通过同样的方式使得每行的多个所述第一触控电极61之间电连接。并且,本发明中,每列的多个所述第二触控电极62之间通过连接部65进行连接。本实施例中,通过构图工艺形成所述触控层60时,所述连接部65与所述第一触控电极61及所述第二触控电极62同时形成。具体的,先在所述所述第一绝缘层50上形成触控材料层,再图案化所述触控材料层,以得到包括所述连接部65、所述第一触控电极61及所述第二触控电极62的触控层60。
步骤404,在所述触控层60上通过构图工艺依次形成第二绝缘层91及像素电极层92,并使所述像素电极层92通过过孔与所述连接层21相连接。通过所述连接层21将所述像素电极层92与所述薄膜晶体管的源极或漏极21进行电连接,从而避免过孔过深而可能产生的所述像素电极层92与所述连接层21接触不良的问题。
本发明提供的所述阵列基板100的制作方法,在制作所述阵列基板100 时,不需要增加制程,从而降低生产成本。
请参阅图5,本发明还提供一种触控显示面板200。所述触控显示面板200包括彩膜基板210与上述阵列基板100,所述彩膜基板210与所述阵列基板100相对设置,且所述衬底10上设有薄膜晶体管的一面朝向所述彩膜基板210。所述阵列基板100与所述彩膜基板210之间设有液晶层220。本发明中,所述彩膜基板210包括黑矩阵(BM),所述黑矩阵在所述触控层上的投影覆盖所述第一触控电极61及所述第二触控电极62。具体的,本实施例中,所述黑矩阵包括平行设置的多行第一框线,及与所述第一框线交叉的平行设置的多列第二框线。相邻的两行第一框线及相邻的两列第二框线围成一像素区,所述像素区内填充不同颜色的光阻材料,从而实现所述触控显示面板200的显示。每行所述第一框线在所述触控层上的投影覆盖一行所述第一电极61,每列所述第二框线在所述触控层上的投影覆盖一行所述第二电极62,从而使得所述触控层60的所述第一触控电极61及所述第二触控电极62不会影响所述触控显示面板200的显示效果。本发明的所述触控显示面板200,通过将所述触控层60嵌入于所述阵列基板100中,相比于将包含所述触控层60的触控基板贴设于显示面板表面的现有方式来说,能够减少一层触控基板的厚度,从而实现触控显示面板的薄型化。
以上所揭露的仅为本发明一种较佳实施例而已,当然不能以此来限定本发明之权利范围,本领域普通技术人员可以理解实现上述实施例的全部或部分流程,并依本发明权利要求所作的等同变化,仍属于发明所涵盖的范围。

Claims (17)

  1. 一种阵列基板,其特征在于,包括衬底,设置于所述衬底上的薄膜晶体管,及覆盖所述薄膜晶体管的平坦层,所述平坦层远离所述薄膜晶体管的一侧设有触控层;所述触控层包括阵列设置的多个第一触控电极及阵列设置的多个第二触控电极,多个所述第一触控电极与多个所述第二触控电极交替间隔设置并绝缘;每行相邻的两个所述第一触控电极通过连接线电连接,每列的多个所述第二触控电极之间电连接,所述连接线与所述薄膜晶体管的源漏极位于同一层并通过同一制程得到。
  2. 如权利要求1所述的阵列基板,其特征在于,每行所述第一触控电极与一第一触控走线相连接,每列所述第二触控电极与一第二触控走线相连,每条所述第一触控走线及每条所述第二触控走线均与一触控芯片电连接。
  3. 如权利要求1所述的阵列基板,其特征在于,每条所述第一触控走线均与至少一薄膜晶体管电连接,与每条所述第一触控走线电连接的薄膜晶体管均连接至一主走线,每条所述主走线均与一触控芯片电连接。
  4. 如权利要求1所述的阵列基板,其特征在于,所述连接线与所述触控层在不同层,相邻的两个所述第一触控电极均通过过孔连接至所述连接线。
  5. 如权利要求1所述的阵列基板,其特征在于,所述连接线及所述触控层均为金属材料形成。
  6. 如权利要求1所述的阵列基板,其特征在于,所述触控层上还依次层叠有第二绝缘层及像素电极,所述像素电极通过过孔与所述薄膜晶体管的源/漏极电连接。
  7. 如权利要求6所述的阵列基板,其特征在于,所述平坦层与所述触控层之间还依次层叠有公共电极层及第一绝缘层,所述公共电极层层叠于所述平坦层上;所述衬底上还依次层叠有遮光层及缓冲层,所述薄膜晶体管设于所述缓冲层上。
  8. 如权利要求1所述的阵列基板,其特征在于,每列的相邻两个所述第二触控电极通过连接部进行连接,所述连接部与所述第二触控电极材料相同且位于同一层,所述连接部将每列的多个所述第二触控电极连接形成一个长条电 极,所述第一触控电极分别位于所述长条电极的两侧。
  9. 一种阵列基板的制作方法,其特征在于,包括步骤:
    在衬底上依次层叠遮光层及缓冲层,并在所述缓冲层上通过构图工艺形成薄膜晶体管,所述薄膜晶体管包括依次层叠的半导体层、栅极绝缘层、栅极、第三绝缘层及源极、漏极,所述源极及漏极均通过过孔与所述半导体层电连接,并且,通过构图工艺形成所述源极及漏极的同时,形成一连接线;
    在所述薄膜晶体管上依次形成平坦层、公共电极层及第一绝缘层;
    在所述第一绝缘层上通过构图工艺形成触控层,所述触控层包括阵列设置的多个第一触控电极及阵列设置的多个第二触控电极,多个所述第一触控电极与多个所述第二触控电极交替间隔设置并绝缘,每行的相邻两个所述第一触控电极通过过孔与所述连接线电连接,以实现每行的相邻两个所述第一触控电极之间的电连接,每列所述第二触控电极之间电连接;
    在所述触控层上通过构图工艺依次形成第二绝缘层及像素电极,并使所述像素电极通过过孔与所述源极/漏极电连接。
  10. 一种触控显示面板,其特征在于,所述触控显示面板包括彩膜基板与阵列基板,所述彩膜基板与所述阵列基板相对设置,所述彩膜基板包括黑矩阵,所述黑矩阵在所述触控层上的投影覆盖所述第一触控电极及所述第二触控电极;所述阵列基板包括衬底,设置于所述衬底上的薄膜晶体管,及覆盖所述薄膜晶体管的平坦层,所述平坦层远离所述薄膜晶体管的一侧设有触控层;所述触控层包括阵列设置的多个第一触控电极及阵列设置的多个第二触控电极,多个所述第一触控电极与多个所述第二触控电极交替间隔设置并绝缘;每行相邻的两个所述第一触控电极通过连接线电连接,每列的多个所述第二触控电极之间电连接,所述连接线与所述薄膜晶体管的源漏极位于同一层并通过同一制程得到。
  11. 如权利要求10所述的触控显示面板,其特征在于,每行所述第一触控电极与一第一触控走线相连接,每列所述第二触控电极与一第二触控走线相连,每条所述第一触控走线及每条所述第二触控走线均与一触控芯片电连接。
  12. 如权利要求10所述的触控显示面板,其特征在于,每条所述第一触控走线均与至少一薄膜晶体管电连接,与每条所述第一触控走线电连接的薄膜 晶体管均连接至一主走线,每条所述主走线均与一触控芯片电连接。
  13. 如权利要求10所述的触控显示面板,其特征在于,所述连接线与所述触控层在不同层,相邻的两个所述第一触控电极均通过过孔连接至所述连接线。
  14. 如权利要求10所述的触控显示面板,其特征在于,所述连接线及所述触控层均为金属材料形成。
  15. 如权利要求10所述的触控显示面板,其特征在于,所述触控层上还依次层叠有第二绝缘层及像素电极,所述像素电极通过过孔与所述薄膜晶体管的源/漏极电连接。
  16. 如权利要求15所述的触控显示面板,其特征在于,所述平坦层与所述触控层之间还依次层叠有公共电极层及第一绝缘层,所述公共电极层层叠于所述平坦层上;所述衬底上还依次层叠有遮光层及缓冲层,所述薄膜晶体管设于所述缓冲层上。
  17. 如权利要求10所述的触控显示面板,其特征在于,每列的相邻两个所述第二触控电极通过连接部进行连接,所述连接部与所述第二触控电极材料相同且位于同一层,所述连接部将每列的多个所述第二触控电极连接形成一个长条电极,所述第一触控电极分别位于所述长条电极的两侧。
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