WO2019061724A1 - Bps型阵列基板及其制作方法 - Google Patents

Bps型阵列基板及其制作方法 Download PDF

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Publication number
WO2019061724A1
WO2019061724A1 PCT/CN2017/110979 CN2017110979W WO2019061724A1 WO 2019061724 A1 WO2019061724 A1 WO 2019061724A1 CN 2017110979 W CN2017110979 W CN 2017110979W WO 2019061724 A1 WO2019061724 A1 WO 2019061724A1
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layer
region
color
spacer
black matrix
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PCT/CN2017/110979
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English (en)
French (fr)
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于承忠
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深圳市华星光电半导体显示技术有限公司
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Priority to US15/578,163 priority Critical patent/US20190219865A1/en
Publication of WO2019061724A1 publication Critical patent/WO2019061724A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13392—Gaskets; Spacers; Sealing of cells spacers dispersed on the cell substrate, e.g. spherical particles, microfibres
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13396—Spacers having different sizes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G02F1/13398—Spacer materials; Spacer properties
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a BPS type array substrate and a method of fabricating the same.
  • LCDs liquid crystal displays
  • LCDs liquid crystal displays
  • consumer electronics such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, desktop computers.
  • liquid crystal display devices which include a backlight module, a liquid crystal panel coupled to the backlight module, and a front frame for fixing the liquid crystal panel and the backlight module.
  • the working principle of the liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates. There are many vertical and horizontal small wires between the two glass substrates. The liquid crystal molecules are redirected by energization or not, and the light of the backlight module is refracted. Come out to produce the picture.
  • a liquid crystal display panel comprises a CF (Color Filter) substrate, a thin film transistor (TFT) substrate, a liquid crystal (LC) sandwiched between the color filter substrate and the thin film transistor substrate, and a sealant frame ( Sealant),
  • the molding process generally includes: front array (Array) process (film, yellow, etching and stripping), middle cell (Cell) process (TFT substrate and CF substrate bonding) and rear module assembly Process (drive IC and printed circuit board is pressed).
  • the front Array process mainly forms a TFT substrate to control the movement of liquid crystal molecules;
  • the middle Cell process mainly adds liquid crystal between the TFT substrate and the CF substrate;
  • the rear module assembly process is mainly to drive the IC to press and print the circuit.
  • the integration of the plates drives the liquid crystal molecules to rotate and display images.
  • the BPS Black Photo Spacer
  • BM black matrix
  • PS spacer
  • the halftone mask is a mask with three transmittances, through three different Light transmittance forms three different film thickness regions on the BPS material, functioning as a main spacer (Sub PS), a secondary spacer (Sub PS), and a black matrix (BM), respectively;
  • the transmittance of the region corresponding to the Main PS is the largest, usually 100%; the transmittance of the region corresponding to the Sub PS is second, generally 20% to 40%.
  • the area corresponding to the BM formation has the lowest transmittance, generally 10% to 30%.
  • An object of the present invention is to provide a method for fabricating a BPS type array substrate, which can make the height of the main spacer and the auxiliary spacer easier to control, and ensure uniformity of film thickness uniformity of the black matrix.
  • the present invention provides a method for fabricating a BPS type array substrate, comprising the following steps:
  • Step S1 providing a substrate, forming a thin film transistor array layer on the substrate, and forming a protective layer covering the thin film transistor array layer on the substrate;
  • Step S2 forming a color photoresist layer on the protective layer, the color photoresist layer comprising a plurality of color resisting units arranged in an array, each color resisting unit comprising a first pixel region, a second pixel region and a connection region between the first pixel region and the second pixel region;
  • Step S3 forming an organic insulating layer covering the color photoresist layer on the protective layer, and depositing a black light shielding film layer on the organic insulating layer;
  • Step S4 performing ultraviolet exposure on the black light shielding film layer by using a mask plate;
  • the mask plate is provided with a semi-transmissive region corresponding to the plurality of sub-spacer patterns, and corresponding to the plurality of main spacer patterns a fully transparent region with a black matrix pattern;
  • Step S5 developing the black light-shielding film layer to obtain a plurality of main spacers above the connection region corresponding to the plurality of color-resistance units, a plurality of sub-spacers above the connection region corresponding to the plurality of color-resistance units, And a black matrix corresponding to the spacing region between the plurality of color resisting units and the peripheral region of the plurality of color resisting units;
  • the height of the main spacer is greater than the height of the secondary spacer, and the height of the secondary spacer is greater than the height of the black matrix.
  • the width of the connection region is smaller than the width of the first pixel region and the second pixel region; the height difference between the main spacer and the black matrix is the thickness of the connection region of the color resist unit.
  • the height difference between the main spacer and the auxiliary spacer is 0.3 ⁇ m to 0.8 ⁇ m; and the material of the black light shielding layer includes a negative photoresist material.
  • the light transmittance of the semi-transmissive region is 20% to 40%; and the light transmittance of the fully transparent region is 100%.
  • the thin film transistor array layer includes a gate electrode disposed on the substrate substrate, a gate insulating layer disposed on the substrate substrate and covering the gate electrode, and disposed on the gate insulating layer and corresponding to the gate An active layer above the pole, and a source and a drain disposed on the active layer and the gate insulating layer and respectively contacting the two sides of the active layer;
  • the step S3 further includes a pixel electrode process, the pixel electrode process occurs before the black light shielding film layer is deposited, the pixel electrode process includes: forming a via hole corresponding to the source electrode on the organic insulating layer and the protective layer Forming a pixel electrode on the organic insulating layer, the pixel An electrode is in contact with the source via the via.
  • the present invention also provides a BPS type array substrate, comprising: a base substrate, a thin film transistor array layer disposed on the base substrate, a protective layer disposed on the base substrate and covering the thin film transistor array layer, and a color photoresist layer on the protective layer, an organic insulating layer disposed on the protective layer and covering the color photoresist layer, and a plurality of main spacers and a plurality of sub-substations disposed on the organic insulating layer Spacer, and black matrix;
  • the color photoresist layer includes a plurality of color resisting units arranged in an array, each color resisting unit including a first pixel region, a second pixel region, and a first pixel region and a second pixel region. Connection area
  • the plurality of main spacers are disposed above the connection region of the plurality of color resist units, and the plurality of sub spacers are disposed above the connection region of the plurality of color resist units, wherein the black matrix corresponds to the a spacing area between the plurality of color resisting units and a peripheral area of the plurality of color resisting units;
  • the height of the main spacer is greater than the height of the secondary spacer, and the height of the secondary spacer is greater than the height of the black matrix.
  • the material of the black light shielding film layer comprises a negative photoresist material; the height difference between the main spacer and the black matrix is the thickness of the connection region of the color resist unit.
  • the height difference between the main spacer and the secondary spacer is 0.3 ⁇ m to 0.8 ⁇ m; and the material of the black matrix includes a negative photoresist material.
  • the thin film transistor array layer includes a gate electrode disposed on the substrate substrate, a gate insulating layer disposed on the substrate substrate and covering the gate electrode, and disposed on the gate insulating layer and corresponding to the gate An active layer above the pole, and a source and a drain disposed on the active layer and the gate insulating layer and respectively in contact with both sides of the active layer.
  • the BPS-type array substrate further includes: a via hole disposed on the organic insulating layer and the protective layer and corresponding to the source electrode, and a pixel electrode disposed on the organic insulating layer, wherein the pixel electrode is The via is in contact with the source.
  • the invention also provides a method for manufacturing a BPS type array substrate, comprising the following steps:
  • Step S1 providing a substrate, forming a thin film transistor array layer on the substrate, and forming a protective layer covering the thin film transistor array layer on the substrate;
  • Step S2 forming a color photoresist layer on the protective layer, the color photoresist layer comprising a plurality of color resisting units arranged in an array, each color resisting unit comprising a first pixel region, a second pixel region and a connection region between the first pixel region and the second pixel region;
  • Step S3 forming an organic insulating layer covering the color photoresist layer on the protective layer, and depositing a black light shielding film layer on the organic insulating layer;
  • Step S4 performing ultraviolet exposure on the black light shielding film layer by using a mask plate;
  • the mask plate is provided with a semi-transmissive region corresponding to the plurality of sub-spacer patterns and corresponding to the plurality of main spacer patterns and a fully transparent region of the black matrix pattern;
  • Step S5 developing the black light-shielding film layer to obtain a plurality of main spacers above the connection region corresponding to the plurality of color-resistance units, a plurality of sub-spacers above the connection region corresponding to the plurality of color-resistance units, And a black matrix corresponding to the spacing region between the plurality of color resisting units and the peripheral region of the plurality of color resisting units;
  • the height of the main spacer is greater than the height of the secondary spacer, and the height of the secondary spacer is greater than the height of the black matrix;
  • connection region is smaller than the width of the first pixel region and the second pixel region; the height difference between the main spacer and the black matrix is the thickness of the connection region of the color resistance unit;
  • the height difference between the main spacer and the auxiliary spacer is 0.3 ⁇ m to 0.8 ⁇ m;
  • the material of the black light shielding layer comprises a negative photoresist material;
  • the light transmittance of the semi-transmissive region is 20% to 40%; and the light transmittance of the fully transparent region is 100%;
  • the thin film transistor array layer includes a gate electrode disposed on the substrate substrate, a gate insulating layer disposed on the substrate substrate and covering the gate electrode, and disposed on the gate insulating layer and corresponding to An active layer above the gate, and a source and a drain disposed on the active layer and the gate insulating layer and respectively contacting the two sides of the active layer;
  • the step S3 further includes a pixel electrode process, the pixel electrode process occurs before the black light shielding film layer is deposited, the pixel electrode process includes: forming a via hole corresponding to the source electrode on the organic insulating layer and the protective layer Forming a pixel electrode on the organic insulating layer, the pixel electrode being in contact with the source via the via.
  • the invention has the beneficial effects that the manufacturing method of the BPS type array substrate of the invention has the black matrix, the main spacer and the auxiliary spacers all disposed on the array substrate and is realized in the same process, which can reduce the production time and reduce the production cost.
  • To improve the competitiveness of the product to realize the height difference between the main spacer and the black matrix by using the thickness of the color resisting unit, and to realize the auxiliary spacer and black by controlling the thickness of the color resisting unit and controlling the light transmittance of the mask
  • the height difference of the matrix makes the height of the main spacer and the sub-spacer easier to control; the area corresponding to the black matrix on the black light-shielding film layer is a full light-transmissive area during the exposure process, and is exposed during exposure.
  • the ultraviolet radiation dose is sufficient, the crosslinking reaction is complete, and the stability is high, and the influence of the developer is small during the development process, and it is not It is dissolved to ensure a uniform film thickness uniformity of the black matrix.
  • the BPS type array substrate of the invention has the black matrix, the main spacer and the auxiliary spacers all disposed on the array substrate and is realized in the same process, has low production cost and strong product competitiveness; and utilizes the thickness of the color resisting unit Full control of the height difference between the main spacer and the black matrix, and to some extent control the height difference between the secondary spacer and the black matrix, so that the height of the main spacer and the secondary spacer are easier to control; in addition, the black matrix
  • the stability is strong and the film thickness uniformity is good.
  • FIG. 1 is a schematic diagram showing different degrees of crosslinking reaction of BPS materials under different light transmittance exposures
  • FIG. 2 is a schematic view showing a dissolution rate of a BPS material during development after exposure to different light transmittances
  • FIG. 3 is a flow chart showing a method of fabricating a BPS type array substrate of the present invention
  • FIG. 4 and FIG. 5 are schematic diagrams showing the step S1 of the method for fabricating the BPS type array substrate of the present invention.
  • FIG. 8 are schematic diagrams showing the step S2 of the method for fabricating the BPS type array substrate of the present invention.
  • FIG. 9 and FIG. 10 are schematic diagrams showing the step S3 of the method for fabricating the BPS type array substrate of the present invention.
  • step S4 of the method for fabricating a BPS type array substrate of the present invention
  • FIG. 12 to FIG. 14 are schematic views showing a step S5 of the method for fabricating the BPS type array substrate of the present invention and a schematic structural view of the BPS type array substrate of the present invention.
  • the idea of the present invention is to combine the BPS technology with the COA (Color Filter on Array) technology, and not only the black matrix 83, the main spacer 81, and the sub-spacer 82 are formed on the array substrate, but also the colored light.
  • the resist layer 40 is formed on the array substrate, and the height difference between the main spacer 81 and the black matrix 83 is realized by the height of the color resist unit 41, and the thickness of the color resist unit 41 is utilized.
  • the height difference between the sub-spacer 82 and the black matrix 83 is achieved by controlling the light transmittance of the mask 70.
  • the present invention provides a method for fabricating a BPS type array substrate, which includes the following steps:
  • Step S1 as shown in FIG. 4 and FIG. 5, a base substrate 10 is provided, a thin film transistor array layer 20 is formed on the base substrate 10, and protection of the thin film transistor array layer 20 is formed on the base substrate 10.
  • Layer 30 As shown in FIG. 4 and FIG. 5, a base substrate 10 is provided, a thin film transistor array layer 20 is formed on the base substrate 10, and protection of the thin film transistor array layer 20 is formed on the base substrate 10.
  • Layer 30 As shown in FIG. 4 and FIG. 5, a base substrate 10 is provided, a thin film transistor array layer 20 is formed on the base substrate 10, and protection of the thin film transistor array layer 20 is formed on the base substrate 10.
  • the thin film transistor array layer 20 includes a gate electrode 21 disposed on the base substrate 10, and a gate insulating layer disposed on the base substrate 10 and covering the gate electrode 21.
  • An active layer 23 disposed on the gate insulating layer 22 and corresponding to the gate electrode 21, and disposed on the active layer 23 and the gate insulating layer 22 and respectively opposite to the active layer 23
  • the source 24 and the drain 25 are in contact with each other.
  • Step S2 as shown in FIG. 6 to FIG. 8, a color photoresist layer 40 is formed on the protective layer 30, and the color photoresist layer 40 includes a plurality of color resist units 41 arranged in an array, each color resist
  • the unit 41 includes a first pixel region 401, a second pixel region 402, and a connection region 403 disposed between the first pixel region 401 and the second pixel region 402.
  • the width of the connection region 403 is smaller than the width of the first pixel region 401 and the second pixel region 402 .
  • the plurality of color resist units 41 include a plurality of red color resist units 413 , a plurality of green color resist units 414 , and a plurality of blue color resist units 415 .
  • Step S3 as shown in FIG. 9 and FIG. 10, an organic insulating layer 50 covering the color photoresist layer 40 is formed on the protective layer 30, and a black light shielding film layer 60 is deposited on the organic insulating layer 50;
  • a plurality of main spacer patterns 61 corresponding to the connection regions 403 of the plurality of color resist units 41 and a plurality of upper regions corresponding to the plurality of color resist units 41 are defined on the black light shielding film layer 60.
  • the material of the black light shielding film layer 60 includes a negative photoresist material.
  • the step S3 further includes a pixel electrode process, the pixel electrode process occurs before the black light shielding film layer 60 is deposited, and the pixel electrode process includes: the organic insulating layer 50 and the protection A via 51 corresponding to the upper side of the source electrode 24 is formed on the layer 30, and a pixel electrode 52 is formed on the organic insulating layer 50, and the pixel electrode 52 is in contact with the source electrode 24 via the via 51.
  • Step S4 the black light-shielding film layer 60 is exposed to ultraviolet light by using a mask 70; the mask plate 70 is provided with a semi-transmissive region 71 corresponding to the plurality of sub-spacer patterns 62. And an all-transmissive region 72 corresponding to the plurality of main spacer patterns 61 and the black matrix pattern 63.
  • a region of the black light-shielding film layer 60 corresponding to the fully transparent region 72 undergoes a complete crosslinking reaction under ultraviolet irradiation; the black light-shielding film layer 60 corresponds to a semi-transmissive region.
  • the region of 71 undergoes a weak cross-linking reaction under ultraviolet irradiation.
  • the light transmittance of the semi-transmissive region 71 is 0 to 100%, preferably 20% to 40%; and the light transmittance of the all-transmissive region 72 is 100%.
  • Step S5 as shown in FIG. 12 to FIG. 14, the black light shielding film layer 60 is developed to obtain a plurality of main spacers 81 corresponding to the connection regions 403 of the plurality of color resist units 41, corresponding to the plurality of color resists. a plurality of sub-pads 82 above the connection region 403 of the unit 41, and a black matrix 83 corresponding to the space between the plurality of color-blocking units 41 and the peripheral regions of the plurality of color-blocking units 41;
  • the height of the main spacer 81 is greater than the height of the secondary spacer 82, and the height of the secondary spacer 82 is greater than the height of the black matrix 83.
  • the height difference between the main spacer 81 and the black matrix 83 is the thickness of the connection region 403 of the color resist unit 41.
  • the height difference between the main spacer 81 and the sub spacer 82 is 0.3 ⁇ m to 0.8 ⁇ m, preferably 0.4 ⁇ m to 0.6 ⁇ m.
  • the area corresponding to the fully transparent region 72 on the black light-shielding film layer 60 is not dissolved by the developer due to the complete crosslinking reaction, and the main spacer 81 and the black matrix 83 are formed;
  • the region corresponding to the semi-transmissive region 71 on the black light-shielding film layer 60 is partially dissolved in the developer due to the weak cross-linking reaction, and the sub-spacer 82 is formed.
  • the portion of the black light-shielding film layer 60 which is dissolved in the region corresponding to the formation of the sub-spacer 82 is a portion where the upper surface layer of the black light-shielding film layer 60 is weakly cross-linked, and the dissolution rate of the weakly cross-linked portion is dissolved. It is slower, so stability is also better.
  • the main spacer 81 and the sub spacer 82 can function to support the thickness of the liquid crystal cell, and the black matrix 83 functions from To the shading effect, prevent red, green and blue from mixing colors.
  • the existing BPS technology exposes a region corresponding to a black matrix formed on a BPS material by using a mask region having a light transmittance of 10% to 30%. Since the material is incompletely crosslinked, it is highly susceptible during development. The influence of various factors in the developing environment leads to poor uniformity of the film thickness of the black matrix.
  • the area corresponding to the black matrix 83 on the black light-shielding film layer 60 is the total light-transmissive area 72 during the exposure process, and the crosslinking reaction is complete due to the sufficient dose of ultraviolet radiation received during exposure. Therefore, the stability is high, and it is less affected by the developer during the development process, and is not dissolved, thereby ensuring a uniform film thickness uniformity of the black matrix 83.
  • the method for fabricating the BPS type array substrate of the present invention comprises a black matrix 83, a main spacer 81, and a sub
  • the spacers 82 are all disposed on the array substrate and implemented in the same process, which can reduce the production time, reduce the production cost, and improve the competitiveness of the product.
  • the thickness of the color resisting unit 41 is used to realize the main spacer 81 and the black matrix 83.
  • the height difference is achieved by using the thickness of the color resisting unit 41 and controlling the light transmittance of the masking plate 70 to achieve a height difference between the sub-spacer 82 and the black matrix 83, so that the main spacer 81 and the secondary spacer 82 are
  • the height is more controllable; the area corresponding to the black matrix 83 on the black light-shielding film layer 60 is the total light-transmissive area 72 during the exposure process, and the ultraviolet irradiation dose is sufficient when exposed, and the crosslinking reaction is complete.
  • the stability is high, and is less affected by the developer during the development process, and is not dissolved, thereby ensuring a uniform film thickness uniformity of the black matrix 83.
  • the present invention further provides a BPS type array substrate, comprising: a base substrate 10 disposed on the base substrate 10 , according to the method for fabricating the BPS type array substrate.
  • the thin film transistor array layer 20, the protective layer 30 disposed on the base substrate 10 and covering the thin film transistor array layer 20, the color photoresist layer 40 disposed on the protective layer 30, and the protective layer 30 are disposed on the protective layer 30.
  • the color resist layer 40 includes a plurality of color resist units 41 arranged in an array, and each color resist unit 41 includes a first pixel region 401 and a second pixel region 402 and is disposed in the first a connection area 403 between a pixel area 401 and a second pixel area 402;
  • the plurality of main spacers 81 are disposed above the connection region 403 of the plurality of color resist units 41, and the plurality of sub spacers 82 are disposed above the connection region 403 of the plurality of color resist units 41.
  • the black matrix 83 corresponds to an interval region between the plurality of color resist units 41 and a peripheral region of the plurality of color resist units 41;
  • the height of the main spacer 81 is greater than the height of the secondary spacer 82, and the height of the secondary spacer 82 is greater than the height of the black matrix 83.
  • the width of the connection region 403 is smaller than the width of the first pixel region 401 and the second pixel region 402 .
  • the material of the black matrix 83 includes a negative photoresist material.
  • the height difference between the main spacer 81 and the black matrix 83 is the thickness of the connection region 403 of the color resist unit 41.
  • the height difference between the main spacer 81 and the sub spacer 82 is 0.3 ⁇ m to 0.8 ⁇ m, preferably 0.4 ⁇ m to 0.6 ⁇ m.
  • the plurality of color resist units 41 include a plurality of red color resist units 413 , a plurality of green color resist units 414 , and a plurality of blue color resist units 415 .
  • the thin film transistor array layer 20 includes a gate electrode 21 disposed on the base substrate 10, a gate insulating layer 22 disposed on the base substrate 10 and covering the gate electrode 21, and disposed on the An active layer 23 on the gate insulating layer 22 and corresponding to the upper surface of the gate layer 21, and the active layer 23 and the gate insulating layer 22 are respectively in contact with the two sides of the active layer 23 Source 24 and drain 25.
  • the BPS type array substrate of the present invention further includes: a via hole 51 disposed on the organic insulating layer 50 and the protective layer 30 and corresponding to the source electrode 24, and a pixel electrode disposed on the organic insulating layer 50. 52.
  • the pixel electrode 52 is in contact with the source electrode 24 via the via 51.
  • the present invention designs the black matrix (BM), the spacer (PS), and the red, green and blue (RGB) color resistance on the Array substrate side, and on the array substrate. Only one transparent oxide (ITO) electrode is disposed in the corresponding upper substrate, so that not only the exposure due to the accuracy of the group precision or the translation caused by the bending of the panel in the curved display technology in the group process can be avoided, but more importantly, Save one material and one process, shorten production time (tact time) and reduce product cost.
  • ITO transparent oxide
  • the BPS type array substrate of the present invention has the black matrix 83, the main spacer 81, and the auxiliary spacer 82 all disposed on the array substrate and realized in the same process, and has low production cost and strong product competitiveness;
  • the thickness of 41 completely controls the height difference between the main spacer 81 and the black matrix 83, and controls the height difference between the secondary spacer 82 and the black matrix 83 to some extent, so that the main spacer 81 and the secondary spacer 82
  • the height of the black matrix 83 is more stable and the film thickness uniformity is better.
  • the present invention provides a BPS type array substrate and a method of fabricating the same.
  • the manufacturing method of the BPS type array substrate of the invention has the black matrix, the main spacer and the auxiliary spacers all disposed on the array substrate and is realized in the same process, which can reduce the production time, reduce the production cost, and improve the product competitiveness;
  • Using the thickness of the color resisting unit to achieve the height difference between the main spacer and the black matrix, and using the thickness of the color resisting unit and controlling the light transmittance of the mask to achieve the height difference between the sub spacer and the black matrix The height of the main spacer and the sub-spacer are easier to control; the area corresponding to the black matrix on the black light-shielding layer is a fully transparent area during the exposure process, and the ultraviolet radiation dose is sufficient when exposed.
  • the cross-linking reaction is complete, and thus the stability is high, and is less affected by the developer during the development process, and is not dissolved, thereby ensuring a uniform film thickness uniformity of the black matrix.
  • the BPS type array substrate of the invention has the black matrix, the main spacer and the auxiliary spacers all disposed on the array substrate and is realized in the same process, has low production cost and strong product competitiveness; and utilizes the thickness of the color resisting unit Full control of the height difference between the main spacer and the black matrix, and to some extent control the height difference between the secondary spacer and the black matrix, so that the height of the main spacer and the secondary spacer are easier to control; in addition, the black matrix
  • the stability is strong and the film thickness uniformity is good.

Abstract

一种BPS型阵列基板及其制作方法。BPS型阵列基板的制作方法将黑色矩阵（83）、主隔垫物（81）、副隔垫物（82）均设于阵列基板上并在同一制程中实现，能够缩减生产时间，降低生产成本，提高产品竞争力；利用色阻单元（41）的厚度来实现主隔垫物（81）与黑色矩阵（83）的高度差，同时利用色阻单元（41）的厚度并通过控制掩膜板的透光率来实现副隔垫物（82）与黑色矩阵（83）的高度差，使主隔垫物（81）与副隔垫物（82）的高度更易于控制；黑色遮光膜层（60）上对应形成黑色矩阵（83）的区域在曝光过程中对应的掩膜板区域为全透光区（72），曝光时受到的紫外线照射剂量充足，交联反应完全，因而稳定性较高，在显影过程中受到显影液的影响较小，不会被溶解，从而保证黑色矩阵（83）的膜厚均匀性较好。

Description

BPS型阵列基板及其制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种BPS型阵列基板及其制作方法。
背景技术
随着显示技术的发展，液晶显示器(Liquid Crystal Display，LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，成为显示装置中的主流而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品。
现有市场上的液晶显示装置大部分为背光型液晶显示装置，其包括背光模组(Backlight module)、结合于背光模组上的液晶面板与固定该液晶面板与背光模组的前框。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，两片玻璃基板中间有许多垂直和水平的细小电线，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。
通常液晶显示面板由彩膜(CF，Color Filter)基板、薄膜晶体管(TFT，Thin Film Transistor)基板、夹于彩膜基板与薄膜晶体管基板之间的液晶(LC，Liquid Crystal)及密封胶框(Sealant)组成，其成型工艺一般包括：前段阵列(Array)制程(薄膜、黄光、蚀刻及剥膜)、中段成盒(Cell)制程(TFT基板与CF基板贴合)及后段模组组装制程(驱动IC与印刷电路板压合)。其中，前段Array制程主要是形成TFT基板，以便于控制液晶分子的运动；中段Cell制程主要是在TFT基板与CF基板之间添加液晶；后段模组组装制程主要是驱动IC压合与印刷电路板的整合，进而驱动液晶分子转动，显示图像。
如何制作观影效果更好的液晶显示面板(如曲面显示器)以及如何降低液晶显示面板的生产成本已成为技术开发人员持之以恒的研究课题。BPS(Black Photo Spacer)技术是将黑色矩阵(BM)与隔垫物(PS)集合于同一材料且同一制程完成并设计在阵列(Array)基板上的一种技术。传统的BPS技术包括：采用半色调掩膜板(Multi-Tone Mask)技术对BPS材料进行曝光，其中半色调掩膜板为一张拥有三种透光率的掩膜板，通过三种不同的透光率在BPS材料上形成三种不同膜厚的区域，分别起到主隔垫物(Main PS)、副隔垫物(Sub PS)、及黑色矩阵(BM)的功能；所述半色 调掩膜板的三种透光率(Tr)中，形成Main PS对应的区域透光率最大，通常为100％；形成Sub PS对应的区域透光率其次，一般为20％～40％，而形成BM对应的区域透光率最低，一般为10％～30％。
图1为BPS材料在不同透光率的曝光作用下发生不同程度的交联反应的示意图，从图1中可见，采用半色调掩膜板对BPS材料进行曝光的过程中，BPS材料由于受到UV光照的剂量不同而发生不同程度的交联反应：对于Tr1＝0％对应的区域，由于在曝光过程中没有受到UV光照，BPS材料没有发生任何交联反应；对于Tr3＝100％对应的区域，由于在曝光过程中受到了足够的UV光照能量，BPS材料发生了较深层的交联反应；对于Tr2＝0％～100％对应的区域，由于受到部分UV光照，发生了部分交联反应，即上表层发生了较浅的交联反应。
图2为BPS材料经过不同透光率的曝光后在显影过程中的溶解速率示意图，从图2中可以看出：对于Tr1＝0％对应的区域，由于在曝光过程中没有受到UV光照，BPS材料没有发任何的交联反应，其膜厚与显影时间呈线性关系，即膜厚随显影时间的延长而均匀的下降直到消失时，对应的显影时间为破膜时间(Break Time)；对于Tr3＝100％对应的区域，由于在曝光过程中受到了足够的UV光照能量，BPS材料发生了较深层的交联反应，对显影液的抗溶解性较长，在整个显影过程中，膜厚几乎不会受到显影；对于Tr2＝0％～100％对应的区域，由于受到部分UV光照，发生了部分交联反应，即上表层发生了较浅的交联反应，在显影过程中，上表层虽然也会被显影液溶解，但溶解速率较小，但待上表层被溶解后，下层开始被溶解，其溶解速率与Tr1对应的区域相同，也即是说显影过程中会呈现出两个不同的溶解速率。
现有的BPS技术中，Main PS对应的区域(Tr3＝100％)由于受到了足够剂量的UV光照，交联反应比较完全，因而膜厚基本不会变化；而Sub PS与BM对应的区域(Tr2＝0％～100％)由于受到的UV光照剂量不足，交联反应不完全，因而在显影过程中极易受显影环境中各因素的影响，导致SubPS与BM的膜厚均匀性较差。
发明内容
本发明的目的在于提供一种BPS型阵列基板的制作方法，能够使主隔垫物与副隔垫物的高度更易于控制，并且保证黑色矩阵的膜厚均匀性较好。
本发明的目的还在于提供一种BPS型阵列基板，其中，主隔垫物与副隔垫物的高度更易于控制；另外，黑色矩阵的膜厚均匀性较好。
为实现上述目的，本发明提供一种BPS型阵列基板的制作方法，包括如下步骤：
步骤S1、提供衬底基板，在所述衬底基板上制作薄膜晶体管阵列层，在所述衬底基板上形成覆盖薄膜晶体管阵列层的保护层；
步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上沉积黑色遮光膜层；
在所述黑色遮光膜层上定义出对应于多个色阻单元的连接区上方的多个主隔垫物图案、对应于多个色阻单元的连接区上方的多个副隔垫物图案、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵图案；
步骤S4、采用一道掩膜板对黑色遮光膜层进行紫外线曝光；所述掩膜板上设有对应于多个副隔垫物图案的半透光区、以及对应于多个主隔垫物图案与黑色矩阵图案的全透光区；
步骤S5、对黑色遮光膜层进行显影，得到对应于多个色阻单元的连接区上方的多个主隔垫物、对应于多个色阻单元的连接区上方的多个副隔垫物、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵；
所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
所述连接区的宽度小于所述第一像素区与第二像素区的宽度；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度。
所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色遮光膜层的材料包括负性光阻材料。
所述半透光区的透光率为20％～40％；所述全透光区的透光率为100％。
所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极；
所述步骤S3还包括像素电极制程，所述像素电极制程发生在沉积黑色遮光膜层之前，所述像素电极制程包括：在所述有机绝缘层与保护层上形成对应于源极上方的过孔，在所述有机绝缘层上形成像素电极，所述像素 电极经由所述过孔与源极相接触。
本发明还提供一种BPS型阵列基板，包括：衬底基板、设于所述衬底基板上的薄膜晶体管阵列层、设于所述衬底基板上且覆盖薄膜晶体管阵列层的保护层、设于所述保护层上的彩色光阻层、设于所述保护层上且覆盖所述彩色光阻层的有机绝缘层、以及设于有机绝缘层上的多个主隔垫物、多个副隔垫物、及黑色矩阵；
所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
所述多个主隔垫物对应于多个色阻单元的连接区上方设置，所述多个副隔垫物对应于多个色阻单元的连接区上方设置，所述黑色矩阵对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域设置；
所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
所述黑色遮光膜层的材料包括负性光阻材料；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度。
所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色矩阵的材料包括负性光阻材料。
所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极。
所述BPS型阵列基板还包括：设于所述有机绝缘层与保护层上且对应于源极上方的过孔、以及设于所述有机绝缘层上的像素电极，所述像素电极经由所述过孔与源极相接触。
本发明还提供一种BPS型阵列基板的制作方法，包括如下步骤：
步骤S1、提供衬底基板，在所述衬底基板上制作薄膜晶体管阵列层，在所述衬底基板上形成覆盖薄膜晶体管阵列层的保护层；
步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上沉积黑色遮光膜层；
在所述黑色遮光膜层上定义出对应于多个色阻单元的连接区上方的多 个主隔垫物图案、对应于多个色阻单元的连接区上方的多个副隔垫物图案、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵图案；
步骤S4、采用一道掩膜板对黑色遮光膜层进行紫外线曝光；所述掩膜板上设有对应于多个副隔垫物图案的半透光区以及对应于多个主隔垫物图案与黑色矩阵图案的全透光区；
步骤S5、对黑色遮光膜层进行显影，得到对应于多个色阻单元的连接区上方的多个主隔垫物、对应于多个色阻单元的连接区上方的多个副隔垫物、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵；
所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度；
其中，所述连接区的宽度小于所述第一像素区与第二像素区的宽度；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度；
其中，所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色遮光膜层的材料包括负性光阻材料；
其中，所述半透光区的透光率为20％～40％；所述全透光区的透光率为100％；
其中，所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极；
所述步骤S3还包括像素电极制程，所述像素电极制程发生在沉积黑色遮光膜层之前，所述像素电极制程包括：在所述有机绝缘层与保护层上形成对应于源极上方的过孔，在所述有机绝缘层上形成像素电极，所述像素电极经由所述过孔与源极相接触。
本发明的有益效果：本发明的BPS型阵列基板的制作方法将黑色矩阵、主隔垫物、副隔垫物均设于阵列基板上并在同一制程中实现，能够缩减生产时间，降低生产成本，提高产品竞争力；利用色阻单元的厚度来实现主隔垫物与黑色矩阵的高度差，同时利用色阻单元的厚度并通过控制掩膜板的透光率来实现副隔垫物与黑色矩阵的高度差，使主隔垫物与副隔垫物的高度更易于控制；黑色遮光膜层上对应形成黑色矩阵的区域在曝光过程中对应的掩膜板区域为全透光区，曝光时受到的紫外线照射剂量充足，交联反应完全，因而稳定性较高，在显影过程中受到显影液的影响较小，不会 被溶解，从而保证黑色矩阵的膜厚均匀性较好。本发明的BPS型阵列基板将黑色矩阵、主隔垫物、及副隔垫物均设于阵列基板上并在同一制程中实现，生产成本低，产品竞争力强；利用色阻单元的厚度来完全控制主隔垫物与黑色矩阵的高度差，并在一定程度上控制副隔垫物与黑色矩阵的高度差，使主隔垫物与副隔垫物的高度更易于控制；另外，黑色矩阵的稳定性强，膜厚均匀性较好。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为BPS材料在不同透光率的曝光作用下发生不同程度的交联反应的示意图；
图2为BPS材料经过不同透光率的曝光后在显影过程中的溶解速率示意图；
图3为本发明的BPS型阵列基板的制作方法的流程图；
图4与图5为本发明的BPS型阵列基板的制作方法的步骤S1的示意图；
图6至图8为本发明的BPS型阵列基板的制作方法的步骤S2的示意图；
图9与图10为本发明的BPS型阵列基板的制作方法的步骤S3的示意图；
图11为本发明的BPS型阵列基板的制作方法的步骤S4的示意图；
图12至图14为本发明的BPS型阵列基板的制作方法的步骤S5的示意图及本发明的BPS型阵列基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明的构思在于：将BPS技术与COA(Color Filter on Array)技术相结合，不仅将黑色矩阵83、主隔垫物81、及副隔垫物82均制作于阵列基板上，而且将彩色光阻层40制作于阵列基板上，并利用色阻单元41的高度来实现主隔垫物81与黑色矩阵83的高度差，利用色阻单元41的厚度 并通过控制掩膜板70的透光率来实现副隔垫物82与黑色矩阵83的高度差。
请参阅图3，本发明提供一种BPS型阵列基板的制作方法，包括如下步骤：
步骤S1、如图4与图5所示，提供衬底基板10，在所述衬底基板10上制作薄膜晶体管阵列层20，在所述衬底基板10上形成覆盖薄膜晶体管阵列层20的保护层30。
具体的，如图5所示，所述薄膜晶体管阵列层20包括设于所述衬底基板10上的栅极21、设于所述衬底基板10上且覆盖栅极21的栅极绝缘层22、设于所述栅极绝缘层22上且对应于栅极21上方的有源层23、以及设于所述有源层23与栅极绝缘层22上且分别与所述有源层23的两侧相接触的源极24与漏极25。
步骤S2、如图6至图8所示，在所述保护层30上形成彩色光阻层40，所述彩色光阻层40包括呈阵列排布的数个色阻单元41，每个色阻单元41包括第一像素区401、第二像素区402及设于所述第一像素区401与第二像素区402之间的连接区403。
具体的，如图8所示，所述连接区403的宽度小于所述第一像素区401与第二像素区402的宽度。
具体的，如图8所示，所述数个色阻单元41包括数个红色色阻单元413、数个绿色色阻单元414、及数个蓝色色阻单元415。
步骤S3、如图9与图10所示，在所述保护层30上形成覆盖所述彩色光阻层40的有机绝缘层50，在所述有机绝缘层50上沉积黑色遮光膜层60；
在所述黑色遮光膜层60上定义出对应于多个色阻单元41的连接区403上方的多个主隔垫物图案61、对应于多个色阻单元41的连接区403上方的多个副隔垫物图案62、以及对应于所述数个色阻单元41之间的间隔区域与所述数个色阻单元41的外围区域上方的黑色矩阵图案63。
具体的，所述黑色遮光膜层60的材料包括负性光阻材料。
具体的，如图10所示，所述步骤S3还包括像素电极制程，所述像素电极制程发生在沉积黑色遮光膜层60之前，所述像素电极制程包括：在所述有机绝缘层50与保护层30上形成对应于源极24上方的过孔51，在所述有机绝缘层50上形成像素电极52，所述像素电极52经由所述过孔51与源极24相接触。
步骤S4、如图11所示，采用一道掩膜板70对黑色遮光膜层60进行紫外线曝光；所述掩膜板70上设有对应于多个副隔垫物图案62的半透光区71、以及对应于多个主隔垫物图案61与黑色矩阵图案63的全透光区72。
具体的，所述步骤S4中，所述黑色遮光膜层60上对应于全透光区72的区域在紫外线照射下发生完全交联反应；所述黑色遮光膜层60上对应于半透光区71的区域在紫外线照射下发生弱交联反应。
具体的，所述半透光区71的透光率为0～100％，优选为20％～40％；所述全透光区72的透光率为100％。
步骤S5、如图12至图14所示，对黑色遮光膜层60进行显影，得到对应于多个色阻单元41的连接区403上方的多个主隔垫物81、对应于多个色阻单元41的连接区403上方的多个副隔垫物82、以及对应于所述数个色阻单元41之间的间隔区域与所述数个色阻单元41的外围区域上方的黑色矩阵83；
所述主隔垫物81的高度大于所述副隔垫物82的高度，所述副隔垫物82的高度大于所述黑色矩阵83的高度。
具体的，所述主隔垫物81与黑色矩阵83的高度差为色阻单元41的连接区403的厚度。
具体的，所述主隔垫物81与副隔垫物82的高度差为0.3μm～0.8μm，优选为0.4μm～0.6μm。
具体的，在显影制程中，所述黑色遮光膜层60上对应于全透光区72的区域由于发生完全交联反应，不被显影液溶解，形成主隔垫物81和黑色矩阵83；所述黑色遮光膜层60上对应于半透光区71的区域由于发生弱交联反应，在显影液中发生部分溶解，形成副隔垫物82。
在显影过程中，黑色遮光膜层60上对应形成副隔垫物82的区域中被溶解的是黑色遮光膜层60的上表层发生弱交联反应的部分，此弱交联反应部分的溶解速率较慢，因此稳定性也较佳。
具体的，将本发明制得的BPS型阵列基板应用于液晶显示面板中时，所述主隔垫物81与副隔垫物82能够起到支撑液晶盒厚的作用，所述黑色矩阵83起到遮光效果，防止红绿蓝色阻混色。
现有的BPS技术采用透光率为10％～30％的掩膜板区域对BPS材料上对应形成黑色矩阵的区域进行曝光，由于该部分材料交联不完全，因此在显影过程中极易受显影环境中各因素的影响，导致黑色矩阵的膜厚均匀性较差。而本申请中，黑色遮光膜层60上对应形成黑色矩阵83的区域在曝光过程中对应的掩膜板区域为全透光区72，由于曝光时受到的紫外线照射剂量充足，交联反应完全，因而稳定性较高，在显影过程中受到显影液的影响较小，不会被溶解，从而保证黑色矩阵83的膜厚均匀性较好。
本发明的BPS型阵列基板的制作方法将黑色矩阵83、主隔垫物81、副 隔垫物82均设于阵列基板上并在同一制程中实现，能够缩减生产时间，降低生产成本，提高产品竞争力；利用色阻单元41的厚度来实现主隔垫物81与黑色矩阵83的高度差，同时利用色阻单元41的厚度并通过控制掩膜板70的透光率来实现副隔垫物82与黑色矩阵83的高度差，使主隔垫物81与副隔垫物82的高度更易于控制；黑色遮光膜层60上对应形成黑色矩阵83的区域在曝光过程中对应的掩膜板区域为全透光区72，曝光时受到的紫外线照射剂量充足，交联反应完全，因而稳定性较高，在显影过程中受到显影液的影响较小，不会被溶解，从而保证黑色矩阵83的膜厚均匀性较好。
请参阅图12至图14，同时参阅图8，基于上述BPS型阵列基板的制作方法，本发明还提供一种BPS型阵列基板，包括：衬底基板10、设于所述衬底基板10上的薄膜晶体管阵列层20、设于所述衬底基板10上且覆盖薄膜晶体管阵列层20的保护层30、设于所述保护层30上的彩色光阻层40、设于所述保护层30上且覆盖所述彩色光阻层40的有机绝缘层50、以及设于有机绝缘层50上的多个主隔垫物81、多个副隔垫物82、及黑色矩阵83；
如图8所示，所述彩色光阻层40包括呈阵列排布的数个色阻单元41，每个色阻单元41包括第一像素区401、第二像素区402及设于所述第一像素区401与第二像素区402之间的连接区403；
所述多个主隔垫物81对应于多个色阻单元41的连接区403上方设置，所述多个副隔垫物82对应于多个色阻单元41的连接区403上方设置，所述黑色矩阵83对应于所述数个色阻单元41之间的间隔区域与所述数个色阻单元41的外围区域设置；
所述主隔垫物81的高度大于所述副隔垫物82的高度，所述副隔垫物82的高度大于所述黑色矩阵83的高度。
具体的，如图8所示，所述连接区403的宽度小于所述第一像素区401与第二像素区402的宽度。
具体的，所述黑色矩阵83的材料包括负性光阻材料。
具体的，所述主隔垫物81与黑色矩阵83的高度差为色阻单元41的连接区403的厚度。
具体的，所述主隔垫物81与副隔垫物82的高度差为0.3μm～0.8μm，优选为0.4μm～0.6μm。
具体的，如图14所示，所述数个色阻单元41包括数个红色色阻单元413、数个绿色色阻单元414、及数个蓝色色阻单元415。
具体的，所述薄膜晶体管阵列层20包括设于所述衬底基板10上的栅极21、设于所述衬底基板10上且覆盖栅极21的栅极绝缘层22、设于所述 栅极绝缘层22上且对应于栅极21上方的有源层23、以及设于所述有源层23与栅极绝缘层22上且分别与所述有源层23的两侧相接触的源极24与漏极25。
具体的，本发明的BPS型阵列基板还包括：设于所述有机绝缘层50与保护层30上且对应于源极24上方的过孔51以及设于所述有机绝缘层50上的像素电极52，所述像素电极52经由所述过孔51与源极24相接触。
与传统的液晶显示技术相比，本发明通过将黑色矩阵(BM)、隔垫物(PS)、及红绿蓝(RGB)色阻全部设计在阵列(Array)基板侧，而在与阵列基板对应的上基板中仅设置一道透明氧化物(ITO)电极，这样不仅可以避免对组制程中由于对组精度的误差或者曲面显示技术中由于面板弯曲造成的平移带来的露光，更重要的是节省一种材料及一道制程，缩短生产时间(tact time)，降低产品成本。
本发明的BPS型阵列基板将黑色矩阵83、主隔垫物81、及副隔垫物82均设于阵列基板上并在同一制程中实现，生产成本低，产品竞争力强；利用色阻单元41的厚度来完全控制主隔垫物81与黑色矩阵83的高度差，并在一定程度上控制副隔垫物82与黑色矩阵83的高度差，使主隔垫物81与副隔垫物82的高度更易于控制；另外，黑色矩阵83的稳定性强，膜厚均匀性较好。
综上所述，本发明提供一种BPS型阵列基板及其制作方法。本发明的BPS型阵列基板的制作方法将黑色矩阵、主隔垫物、副隔垫物均设于阵列基板上并在同一制程中实现，能够缩减生产时间，降低生产成本，提高产品竞争力；利用色阻单元的厚度来实现主隔垫物与黑色矩阵的高度差，同时利用色阻单元的厚度并通过控制掩膜板的透光率来实现副隔垫物与黑色矩阵的高度差，使主隔垫物与副隔垫物的高度更易于控制；黑色遮光膜层上对应形成黑色矩阵的区域在曝光过程中对应的掩膜板区域为全透光区，曝光时受到的紫外线照射剂量充足，交联反应完全，因而稳定性较高，在显影过程中受到显影液的影响较小，不会被溶解，从而保证黑色矩阵的膜厚均匀性较好。本发明的BPS型阵列基板将黑色矩阵、主隔垫物、及副隔垫物均设于阵列基板上并在同一制程中实现，生产成本低，产品竞争力强；利用色阻单元的厚度来完全控制主隔垫物与黑色矩阵的高度差，并在一定程度上控制副隔垫物与黑色矩阵的高度差，使主隔垫物与副隔垫物的高度更易于控制；另外，黑色矩阵的稳定性强，膜厚均匀性较好。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形 都应属于本发明权利要求的保护范围。

Claims (11)

  1. 一种BPS型阵列基板的制作方法，包括如下步骤：
    步骤S1、提供衬底基板，在所述衬底基板上制作薄膜晶体管阵列层，在所述衬底基板上形成覆盖薄膜晶体管阵列层的保护层；
    步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
    步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上沉积黑色遮光膜层；
    在所述黑色遮光膜层上定义出对应于多个色阻单元的连接区上方的多个主隔垫物图案、对应于多个色阻单元的连接区上方的多个副隔垫物图案、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵图案；
    步骤S4、采用一道掩膜板对黑色遮光膜层进行紫外线曝光；所述掩膜板上设有对应于多个副隔垫物图案的半透光区以及对应于多个主隔垫物图案与黑色矩阵图案的全透光区；
    步骤S5、对黑色遮光膜层进行显影，得到对应于多个色阻单元的连接区上方的多个主隔垫物、对应于多个色阻单元的连接区上方的多个副隔垫物、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵；
    所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
  2. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述连接区的宽度小于所述第一像素区与第二像素区的宽度；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度。
  3. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色遮光膜层的材料包括负性光阻材料。
  4. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述半透光区的透光率为20％～40％；所述全透光区的透光率为100％。
  5. 如权利要求1所述的BPS型阵列基板的制作方法，其中，所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆 盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极；
    所述步骤S3还包括像素电极制程，所述像素电极制程发生在沉积黑色遮光膜层之前，所述像素电极制程包括：在所述有机绝缘层与保护层上形成对应于源极上方的过孔，在所述有机绝缘层上形成像素电极，所述像素电极经由所述过孔与源极相接触。
  6. 一种BPS型阵列基板，包括：衬底基板、设于所述衬底基板上的薄膜晶体管阵列层、设于所述衬底基板上且覆盖薄膜晶体管阵列层的保护层、设于所述保护层上的彩色光阻层、设于所述保护层上且覆盖所述彩色光阻层的有机绝缘层、以及设于有机绝缘层上的多个主隔垫物、多个副隔垫物、及黑色矩阵；
    所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
    所述多个主隔垫物对应于多个色阻单元的连接区上方设置，所述多个副隔垫物对应于多个色阻单元的连接区上方设置，所述黑色矩阵对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域设置；
    所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度。
  7. 如权利要求6所述的BPS型阵列基板，其中，所述连接区的宽度小于所述第一像素区与第二像素区的宽度；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度。
  8. 如权利要求6所述的BPS型阵列基板，其中，所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色矩阵的材料包括负性光阻材料。
  9. 如权利要求6所述的BPS型阵列基板，其中，所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极。
  10. 如权利要求9所述的BPS型阵列基板，其中，所述BPS型阵列基板还包括：设于所述有机绝缘层与保护层上且对应于源极上方的过孔、以及设于所述有机绝缘层上的像素电极，所述像素电极经由所述过孔与源极相接触。
  11. 一种BPS型阵列基板的制作方法，包括如下步骤：
    步骤S1、提供衬底基板，在所述衬底基板上制作薄膜晶体管阵列层，在所述衬底基板上形成覆盖薄膜晶体管阵列层的保护层；
    步骤S2、在所述保护层上形成彩色光阻层，所述彩色光阻层包括呈阵列排布的数个色阻单元，每个色阻单元包括第一像素区、第二像素区及设于所述第一像素区与第二像素区之间的连接区；
    步骤S3、在所述保护层上形成覆盖所述彩色光阻层的有机绝缘层，在所述有机绝缘层上沉积黑色遮光膜层；
    在所述黑色遮光膜层上定义出对应于多个色阻单元的连接区上方的多个主隔垫物图案、对应于多个色阻单元的连接区上方的多个副隔垫物图案、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵图案；
    步骤S4、采用一道掩膜板对黑色遮光膜层进行紫外线曝光；所述掩膜板上设有对应于多个副隔垫物图案的半透光区以及对应于多个主隔垫物图案与黑色矩阵图案的全透光区；
    步骤S5、对黑色遮光膜层进行显影，得到对应于多个色阻单元的连接区上方的多个主隔垫物、对应于多个色阻单元的连接区上方的多个副隔垫物、以及对应于所述数个色阻单元之间的间隔区域与所述数个色阻单元的外围区域上方的黑色矩阵；
    所述主隔垫物的高度大于所述副隔垫物的高度，所述副隔垫物的高度大于所述黑色矩阵的高度；
    其中，所述连接区的宽度小于所述第一像素区与第二像素区的宽度；所述主隔垫物与黑色矩阵的高度差为色阻单元的连接区的厚度；
    其中，所述主隔垫物与副隔垫物的高度差为0.3μm～0.8μm；所述黑色遮光膜层的材料包括负性光阻材料；
    其中，所述半透光区的透光率为20％～40％；所述全透光区的透光率为100％；
    其中，所述薄膜晶体管阵列层包括设于所述衬底基板上的栅极、设于所述衬底基板上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上且对应于栅极上方的有源层、以及设于所述有源层与栅极绝缘层上且分别与所述有源层的两侧相接触的源极与漏极；
    所述步骤S3还包括像素电极制程，所述像素电极制程发生在沉积黑色遮光膜层之前，所述像素电极制程包括：在所述有机绝缘层与保护层上形成对应于源极上方的过孔，在所述有机绝缘层上形成像素电极，所述像素 电极经由所述过孔与源极相接触。
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