WO2019020033A1 - 无线收发机系统及其混频器电路 - Google Patents

无线收发机系统及其混频器电路 Download PDF

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Publication number
WO2019020033A1
WO2019020033A1 PCT/CN2018/096886 CN2018096886W WO2019020033A1 WO 2019020033 A1 WO2019020033 A1 WO 2019020033A1 CN 2018096886 W CN2018096886 W CN 2018096886W WO 2019020033 A1 WO2019020033 A1 WO 2019020033A1
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intermediate frequency
signal
mixing unit
output
unit
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PCT/CN2018/096886
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English (en)
French (fr)
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吴毅强
缪瑜
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深圳市中兴微电子技术有限公司
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Publication of WO2019020033A1 publication Critical patent/WO2019020033A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits

Definitions

  • This paper relates to a mixer, and more particularly to a mixer circuit with high linearity and a wireless transceiver system having the same.
  • a mixer circuit converts a radio frequency signal and an intermediate frequency signal.
  • SAW surface acoustic wave
  • the transmit signal of the transmitter system is an adjacent channel blocking signal for the receiver system.
  • the blocking signal passes through intermodulation and intermodulation, and the generated nonlinearity is superimposed on the intermediate frequency useful signal, thereby deteriorating the receiver sensitivity.
  • the mixer is the key nonlinear device of the receiver.
  • the third-order intermodulation characteristic (IP3) of the mixer determines the size of the nonlinear product generated by the adjacent channel interference signal, especially in deep sub-micron applications.
  • the IF output amplitude also becomes the linearity of the mixer. Constrained factors, therefore, in low-voltage SAW-free receiver systems, the nonlinear characteristics of the mixer, especially the third-order intermodulation characteristics, have more stringent requirements.
  • a high-mixer mixer circuit can be implemented using a passive mixer structure, and mixer linearity is improved by using class AB transconductance, piecewise linearization, feedback, and current injection.
  • the embodiment of the invention provides a mixer circuit with improved linearity and adaptability of the mixer under the condition of simple structure, ensuring gain and noise of the mixer, and power consumption, and a wireless transceiver system with the mixer circuit. .
  • a mixer circuit the mixer circuit includes a main mixing branch and a feedforward branch connected in parallel with each other, and an input end of the feedforward branch is connected to an input end of the main mixing branch, and an output of the feedforward branch The terminal is connected to the output end of the main mixing branch;
  • the main mixing branch includes a main mixing unit, and the main mixing unit is configured to receive the local oscillator signal and convert the input RF signal to the intermediate frequency and output under the driving of the local oscillator signal a first intermediate frequency signal;
  • the feedforward branch includes a sub-mixing unit and a frequency selective unit, and the differential input end of the sub-mixing unit is connected to the differential input end of the main mixing unit, and is configured to input the RF by the local oscillator signal
  • the signal is converted to the intermediate frequency and outputs the second intermediate frequency signal, and the frequency selection unit is connected to the sub-mixing unit, configured to receive the second intermediate frequency signal output by the sub-mixing unit, and extract the intermediate frequency blocking signal in the second intermediate frequency signal by filtering
  • a wireless transceiver system includes a mixer circuit including a main mixing branch and a feedforward branch connected in parallel with each other, and an input end of the feedforward branch is connected to an input end of the main mixing branch, and feedforward The output end of the branch is connected to the output of the main mixing branch;
  • the main mixing branch includes a main mixing unit, and the main mixing unit is configured to receive the local oscillator signal and convert the input RF signal driven by the local oscillator signal To the intermediate frequency and output the first intermediate frequency signal;
  • the feedforward branch includes a sub-mixing unit and a frequency selective unit, and the differential input end of the sub-mixing unit is connected to the differential input end of the main mixing unit, and is set to be driven by the local oscillator signal Converting the input RF signal to the intermediate frequency and outputting the second intermediate frequency signal,
  • the frequency selection unit is connected to the sub-mixing unit, configured to receive the second intermediate frequency signal output by the sub-mixing unit, and extract the intermediate frequency blocking in the second intermediate frequency signal by filter
  • the mixer circuit and the wireless transceiver system provided by the embodiments of the present invention form two intermediate frequency outputs through a feedforward branch and a main mixing branch in parallel, and the frequency selection unit of the feedforward branch extracts the input RF signal through filtering. Transferring the intermediate frequency blocking signal in the formed intermediate frequency signal, the intermediate frequency output of the main mixing unit of the main mixing branch and the intermediate frequency output of the feedforward branch are superimposed in parallel, thereby coupling the intermediate frequency blocking signal of the feedforward branch output into the main The output of the mixing unit is used to cancel the IF blocking signal.
  • FIG. 1 is a block diagram of a mixer circuit in accordance with an embodiment of the present invention.
  • FIG. 2 is a circuit schematic diagram of a mixer circuit in accordance with an embodiment of the present invention.
  • FIG. 3 is a circuit schematic diagram of a sub-mixing unit of a feedforward branch in an embodiment of the present invention
  • FIG. 4 is a circuit schematic diagram of a mixer circuit in another embodiment of the present invention.
  • FIG. 5 is a circuit schematic diagram of a frequency selection unit of a feedforward branch in an embodiment of the present invention.
  • FIG. 6 is a circuit schematic diagram of an interface unit of a feedforward branch in an embodiment of the present invention.
  • FIG. 7 is a circuit schematic diagram of a mixer circuit in a first mode of operation according to still another embodiment of the present invention.
  • FIG. 8 is a circuit schematic diagram of the mixer circuit of FIG. 7 in a second mode of operation.
  • the transconductance bias circuit is complex and cannot solve the IF linearity limitation problem.
  • the piecewise linearization technique is adopted, the linear optimization is complex, and the power consumption is over. Large; using feedback techniques to improve linearity, gain and noise figure by sacrificing gain and noise characteristics; using current injection techniques, passive mixers cannot be applied, and only the linearity of active mixers can be optimized. The applicability is weak.
  • an embodiment of the present invention provides a mixer circuit with high linearity, and the mixer circuit includes mutual The main mixing branch 10 and the feedforward branch 20 are connected in parallel, the input end of the feedforward branch 20 is connected to the input end of the main mixing branch 10, and the output end of the feedforward branch 20 and the main mixing branch 10 are connected.
  • the main mixing branch 10 includes a main mixing unit 11, and the main mixing unit 11 is configured to receive the local oscillator signal and drive the input RF signal to the intermediate frequency and output the first intermediate frequency signal under the driving of the local oscillator signal.
  • the feedforward branch 20 includes a sub-mixing unit 21 and a frequency selecting unit 22, and the differential input end of the sub-mixing unit 21 is connected to the differential input end of the main mixing unit 11, and is configured to implement an input RF signal driven by the local oscillator signal.
  • the frequency selecting unit 22 is connected to the sub-mixing unit 21, configured to receive the second intermediate frequency signal of the sub-mixing unit 21, and extract the intermediate frequency blocking signal in the second intermediate frequency signal by filtering, IF blocking signal coupling A first intermediate frequency signal output from the mixing unit 11 so that the first intermediate frequency signal to an intermediate frequency signal blocking is canceled.
  • the main mixing unit 11 can be a passive mixing switching circuit or an active mixing switching circuit.
  • the passive mixing switching circuit or the active mixing switching circuit can be a single balanced architecture or double balanced. Architecture.
  • the main mixing unit 11 is arranged to receive the local oscillator signal and drive the input RF signal to the intermediate frequency and output the intermediate frequency signal driven by the local oscillator signal.
  • the local oscillator is a local oscillator, and its function is to generate an intermediate frequency signal whose frequency is mixed with the frequency of the signal received by the receiver to generate a fixed frequency.
  • the local oscillator signal refers to a pre-generation generated by the local oscillator. Set the frequency signal.
  • the input RF signal can be a voltage signal or a current signal.
  • the main mixing unit 11 can be any one that can convert the input RF voltage signal or current signal to the intermediate frequency under the driving of the local oscillator signal, and the corresponding output.
  • the sub-mixing unit 21 in the feedforward branch 20 functions the same as the main mixing unit 11, and is configured to convert the input RF signal to the intermediate frequency and output the intermediate frequency signal driven by the local oscillator signal.
  • the main The intermediate frequency signal output by the mixing unit 11 is named as the first intermediate frequency signal
  • the intermediate frequency signal output by the sub-mixing unit 21 is named as the second intermediate frequency signal.
  • the sub-mixing unit 21 can also be any hybrid switching circuit capable of converting an input RF voltage signal or a current signal to an intermediate frequency and correspondingly outputting an intermediate frequency voltage signal or an intermediate frequency current signal under the driving of the local oscillator signal.
  • the frequency selecting unit 22 is configured to select and separate the intermediate frequency useful signal and the intermediate frequency blocking signal. The frequency of the intermediate frequency useful signal and the frequency range of the intermediate frequency blocking signal are different, and the frequency selecting unit 22 filters the second intermediate frequency signal output by the sub mixing unit 21. Extract the IF blocking signal.
  • the differential input of the main mixing unit 11 is the input of the main mixing branch 10, and the differential output of the main mixing unit 11 is the output of the main mixing branch 10, so that the output of the feedforward branch 20
  • the end is coupled to the differential output end of the main mixing unit 11, the intermediate frequency blocking signal outputted by the frequency selecting unit 22 is superimposed in parallel with the first intermediate frequency signal output by the main mixing unit 11, and the intermediate frequency blocking signal output by the frequency selecting unit 22 is coupled.
  • the first intermediate frequency signal output by the main mixing unit 11 thereby cancels the intermediate frequency blocking signal in the first intermediate frequency signal.
  • the main mixing unit 11 is connected in parallel with the feedforward branch 20.
  • the differential input terminal of the sub-mixing unit 21 is the input end of the feedforward branch 20, and the difference of the sub-mixing unit 21
  • the input terminal is connected to the differential input terminal of the main mixing unit 11, so that the sub-mixing unit 21 and the main mixing unit 11 receive the same input RF signal and down-mix to the intermediate frequency signal, through the feedforward branch 20 and the main mixing
  • the unit 11 is connected in parallel to form two intermediate frequency outputs.
  • the frequency selecting unit 22 of the feedforward branch 20 extracts the intermediate frequency blocking signal in the intermediate frequency signal formed by the input RF signal transfer by filtering, and the intermediate frequency output and the feedforward branch of the main mixing unit 11 The intermediate frequency outputs of the paths are superimposed in parallel, thereby coupling the intermediate frequency blocking signal outputted by the feedforward branch 20 into the output of the main mixing unit 11 for canceling the intermediate frequency blocking signal.
  • the mixer circuit is designed to extract the intermediate frequency blocking signal by filtering.
  • the feedforward branch 20 cancels the intermediate frequency blocking signal after the intermediate frequency output of the main mixing unit 11, and the mixer circuit realizes the suppression of the blocking signal at a low voltage based on the feedforward cancellation compensation of the intermediate frequency signal.
  • the frequency selective unit 22 includes a filter coupled between the output of the sub-mixing unit 21 and the output of the main mixing unit 11.
  • the main mixing unit 11 and the sub-mixing unit 21 respectively mix the radio frequency useful signal and the radio frequency blocking signal of the input radio frequency signal to the intermediate frequency signal, wherein the intermediate frequency signal of the radio frequency useful signal frequency conversion is located at a low frequency, and the relative frequency of the intermediate frequency signal of the radio frequency blocking signal is converted.
  • the input signal of the frequency selection unit 22 is derived from the output of the sub-mixing unit, and the extraction of the intermediate frequency signal for frequency conversion of the radio frequency blocking signal by the sub-mixing unit 21 can be realized by the filter.
  • the frequency selecting unit can be a high-pass filter by setting the cutoff frequency of the high-pass filter. It is to be understood that the filter may be a known active filter or a passive filter, and the embodiment of the present application is not limited herein.
  • the cancellation manner includes: first, the intermediate frequency blocking signal in the intermediate frequency output of the feedforward branch and The intermediate frequency blocking signal in the intermediate frequency output of the main mixing unit is formed as a phase opposite signal and directly superimposed; second, the intermediate frequency blocking signal in the intermediate frequency output of the feedforward branch and the intermediate frequency blocking signal in the intermediate frequency output of the main mixing unit are formed. Signals of the same phase are superimposed by a subtraction unit.
  • the two cancellation methods can be selected according to the single-balanced architecture or double-balanced architecture selected by the main mixing unit and the sub-mixing unit in the actual mixer circuit.
  • the principle of the cancellation mode is further described by taking the main mixing unit and the sub-mixing unit as a double-balanced architecture mixing switch circuit as an example.
  • FIG. 3 is a structural diagram of a sub-mixing unit 21 according to an embodiment.
  • the sub-mixing unit 21 is a typical passive double-balanced architecture mixing switching circuit, including an n-type first transistor M1.
  • the gates of the first transistor M1 and the fourth transistor M4 are coupled to receive the first local oscillation signal LO IP
  • the gates of the second transistor M2 and the third transistor M3 are coupled to receive the second local oscillation signal LO IN .
  • the source of the first transistor M1 and the source of the second transistor are coupled to receive the first input RF signal RF IP
  • the source of the third transistor and the source of the fourth transistor are coupled to receive the second input RF signal RF IN .
  • the drain of the first transistor M1 is coupled to the drain of the third transistor M3, and forms a first output path 211.
  • the drain of the second transistor M2 is coupled to the drain of the fourth transistor M4, and forms a second output path. 212. Therefore, the sub-mixing unit 21 adopts a double-balanced architecture mixing switch circuit to form two positive and negative input and output, respectively receiving input RF signals of the same amplitude, frequency and opposite phase, and correspondingly receiving the same amplitude and frequency respectively.
  • the opposite phase of the local oscillator signal so that two outputs with opposite phases can be obtained, and then the positive and negative two outputs of the main mixing unit 11 are respectively coupled with the signals to be cancelled or the signals to be enhanced having the same phase to be cancelled, Signal cancellation or enhancement can be achieved without increasing the logic operation circuit.
  • the first input RF signal RF IP is positive
  • the first local oscillator signal LO IN is negative
  • the intermediate output IF OP of the first output path 211 is positive
  • the second input RF signal RF IN is negative
  • the second local oscillation signal LO IM is negative
  • the intermediate frequency output IF ON of the second output path 212 is negative.
  • the main mixing unit 11 and the sub-mixing unit 21 have the same structure, and include two positive and negative input and output, respectively, that is, the main mixing unit 11 and the sub-mixing unit 21 respectively include a positive output terminal and a negative output terminal.
  • the frequency selecting unit 22 extracts the intermediate frequency blocking signal of the positive output end of the sub-mixing unit 21 and the negative output end of the main mixing unit 11 by filtering, and extracts the intermediate frequency blocking signal of the negative output end of the sub-mixing unit 21 and the main The positive output of the mixing unit 11 is coupled. Referring again to FIG.
  • the first output path 211 of the sub-mixing unit 21 is a positive output terminal
  • the second output path 212 of the sub-mixing unit 21 is a negative output terminal
  • the frequency selecting unit 22 includes a first output and a first output.
  • the two filters connected by the path 211 and the second output path 212 respectively obtain an intermediate frequency blocking signal IF blk-OP whose output is positive and an intermediate frequency blocking signal IF blk-ON whose output is negative
  • the output is a positive intermediate frequency blocking signal IF blk -OP is directly superimposed with the intermediate frequency signal IF ON whose output of the main mixing unit 11 is negative
  • the intermediate frequency blocking signal IF blk-ON whose output is negative is directly superimposed with the intermediate frequency signal IF OP whose output of the main mixing unit 11 is positive, thereby
  • the intermediate frequency blocking signal in the intermediate frequency output of the feedforward branch 20 is superimposed to the intermediate frequency output of the main mixing unit 11 to form an offset of the intermediate frequency blocking signal.
  • the frequency selection unit 22 is further configured to extract, by filtering, an intermediate frequency useful signal IF SIG in the second intermediate frequency signal, and the intermediate frequency useful signal IF SIG is coupled into the first output of the main mixing unit 11
  • the IF signal is enhanced.
  • the intermediate frequency useful signal IF SIG extraction is the same as the intermediate frequency blocking signal IF blk extraction. According to the description of the foregoing embodiment, the intermediate frequency signal of the radio frequency blocking signal is relatively high in frequency, and the intermediate frequency signal of the radio frequency useful signal is relatively low frequency.
  • the filter and the low-frequency filter are respectively connected to the first output path 211 of the sub-mixing unit 21, and the intermediate - frequency useful signal ⁇ IF SIG-OP and the intermediate-frequency blocking signal ⁇ IF blk-OP having different positive coefficients of the two outputs are obtained.
  • the high frequency filter and the low frequency filter are respectively connected to the second output path 212 of the sub-mixing unit 21 to obtain an intermediate frequency useful signal ⁇ IF SIG-ON and an intermediate frequency blocking signal ⁇ IF blk-ON with two different outputs having negative coefficients.
  • the intermediate frequency useful signal is represented as IF SIG
  • the intermediate frequency blocking signal is represented as IF blk
  • the sub-mixing unit 21 downconverts the input RF signal to the intermediate frequency to obtain the second intermediate frequency signal as IF SIG +IF blk .
  • the positive signal of the intermediate frequency useful signal is represented as IF SIG-OP
  • the negative signal of the intermediate frequency useful signal is represented as IF SIG-ON
  • the positive signal of the intermediate frequency blocking signal is represented as IF blk-OP
  • the negative signal of the intermediate frequency blocking signal is represented as IF blk- ON
  • the positive signal of the second intermediate frequency signal IF SIG +IF blk is represented as IF SIG_OP +IF blk_OP
  • the negative signal of the second intermediate frequency signal IF SIG +IF blk is represented as IF SIG_ON +IF blk_ON
  • the second intermediate frequency signal is selected
  • the input signal of the frequency unit 22, the frequency selecting unit 22 is separated by the high-pass filter HPF and the low-pass filter LPF, respectively, and the intermediate frequency useful signal and the intermediate frequency blocking signal are separated as follows:
  • IF LPF ⁇ IF SIG + ⁇ IF blk (1)
  • the IF LPF is an output signal after the sub-mixing unit 21 passes through the low-pass filter
  • the IF HPF is an output signal of the sub-mixing unit 21 after passing through the high-pass filter
  • ⁇ and ⁇ respectively pass the high-pass filter and the low-pass filter.
  • the coefficient of the intermediate frequency useful signal IF SIG and the intermediate frequency blocking signal IF blk output after filtering is much larger than ⁇ .
  • the cutoff frequency of the high-pass filter and the low-pass filter such that the value of ⁇ is equal to 1 or infinitely approximating 1, according to equations (1) to (3), the high-frequency filter is passed and low.
  • the pass filter is respectively connected to the first output path 211 of the sub-mixing unit 21 to realize separation of the positive intermediate frequency useful signal ⁇ IF SIG-OP and the intermediate frequency blocking signal ⁇ IF blk-OP in the second intermediate frequency signal, and through the high frequency filter and low
  • the pass filter is coupled to the second output path 212 of the sub-mixing unit 21, respectively, to effect separation of the negative intermediate frequency useful signal ⁇ IF SIG-ON and the intermediate frequency blocking signal ⁇ IF blk-ON in the second intermediate frequency signal.
  • the main mixing unit 11 converts the input RF signal to the intermediate frequency to obtain the first intermediate frequency signal, which is represented as I main, sig +I main, blk .
  • the feedforward branch 20 respectively
  • the first intermediate frequency signal obtained by extracting the positive and negative intermediate frequency useful signals and the intermediate frequency blocking signal coupled into the main mixing unit 11 is expressed as follows:
  • IF total represents a superimposed signal of the intermediate frequency output of the feedforward branch 20 and the intermediate frequency output of the main mixing unit 11.
  • the first output path 211 of the sub-mixing unit 21 is coupled to the negative output end of the main mixing unit 11 after passing through the high-frequency filter and after the second output path 212 passes through the low-pass filter, and the intermediate frequency useful signal is enhanced and the intermediate frequency is
  • the blocking signal cancellation obtains the formula (4), and the first output path 211 of the sub-mixing unit 21 is coupled to the positive output terminal of the main mixing unit 11 after passing through the low-pass filter and after the second output path 212 passes through the high-pass filter. Then, the intermediate frequency useful signal is enhanced and the intermediate frequency blocking signal is cancelled to obtain the formula (5).
  • the mixer circuit provided by the above embodiment forms a two-channel intermediate frequency output by the feedforward branch 20 and the main mixing unit 11 in parallel, and the frequency selection unit 22 of the feedforward branch 20 is separately extracted by the input RF signal transfer by filtering.
  • the intermediate frequency blocking signal and the intermediate frequency useful signal in the intermediate frequency signal, the intermediate frequency output of the main mixing unit 11 and the intermediate frequency output of the feedforward branch 20 are superimposed in parallel, thereby coupling the intermediate frequency blocking signal output by the feedforward branch 20 into the main mixing
  • the output of unit 11 is used to cancel the intermediate frequency blocking signal, and the intermediate frequency useful signal is coupled into the output of the main mixing unit 11 to enhance the intermediate frequency useful signal, and the low frequency boosting the mixer to suppress the adjacent channel blocking signal, It can be applied to active mixer switching circuit or passive switching circuit, especially for mixer circuit with limited IF output under low voltage. It is easy to apply to practical chip design, simple circuit structure and further improve linearity. Strong.
  • the feedforward branch 20 includes a first operational mode and a second operational mode.
  • the intermediate frequency blocking signal is coupled to the first intermediate frequency signal for cancellation
  • the intermediate frequency blocking signal is used in the second operational mode.
  • the first intermediate frequency signal is coupled to cancel
  • the intermediate frequency useful signal is coupled into the first intermediate frequency signal for enhancement.
  • the feedforward branch 20 further includes an interface unit 23 connected between the frequency selective unit 22 and the differential output terminal of the main mixing unit 11, and the interface unit 23 implements feedforward by switching between opening and closing. Switching of the first mode of operation and the second mode of operation of the branch 20.
  • the frequency selection unit 20 includes a high pass filter and a low pass filter connected in parallel with the positive output terminal of the sub-mixing unit 21, and a Qualcomm connected in parallel with the negative output terminal of the sub-mixing unit 20.
  • the filter and the low pass filter, the interface unit 22 realizes the connection or disconnection between the output path of the intermediate frequency useful signal of the feedforward branch 20 and the differential output end of the main mixing unit 11 by switching between opening and closing. Thereby switching of the first working mode and the second working mode of the feedforward branch is realized.
  • the working principle of the feedforward branch 20 in the first working mode is the same as that of the embodiment shown in FIG. 2, as shown in FIG. 8, the working principle in the second working mode is as shown in FIG. 4 above.
  • the examples are the same.
  • the main mixing unit 11 and the sub-mixing unit 21 are both passive double-balanced architecture hybrid switching circuits as an example.
  • the main mixing unit 11 and the sub-mixing unit 21 respectively include a positive output terminal and a negative output terminal, wherein the positive output terminal of the sub-mixing unit 21 is the first output path 211 whose output is positive, and the negative of the sub-mixing unit 21 The output is the second output path 212 whose output is negative.
  • the second intermediate frequency signal obtained by down-converting the input RF signals RF IP and RF IN to the intermediate frequency by the sub-mixing unit 21 is represented as IF SIG +IF blk
  • the first output of the sub-mixing unit is
  • the intermediate frequency signal outputted by the path 211 is IF SIG-OP +IF blk-OP
  • the intermediate frequency signal output by the second output path 212 of the sub-mixing unit 21 is IF SIG-ON +IF blk-ON .
  • the frequency selecting unit 22 extracts the intermediate frequency useful signal and the intermediate frequency blocking signal of the sub-mixing unit 21 by filtering, respectively.
  • the frequency selecting unit 22 extracts the intermediate frequency of the positive output terminal of the sub-mixing unit 21 through the low-pass filter LPF.
  • the signal is used as the first output ⁇ IF SIG-OP + ⁇ IF blk-OP
  • the intermediate frequency blocking signal of the positive output terminal of the sub-mixing unit 21 is extracted by the high-pass filter HPF as the second output ⁇ IF blk-OP + ⁇ IF SIG-OP , through the low pass
  • the filter LPF extracts the intermediate frequency useful signal of the negative output terminal of the sub-mixing unit 21 as the third output ⁇ IF SIG-ON + ⁇ IF blk-ON , and extracts the intermediate frequency blocking signal of the negative output terminal of the sub-mixing unit through the high-pass filter as the fourth output.
  • the first output can be regarded as ⁇ IF SIG-OP
  • the second output can be regarded as ⁇ IF blk-OP
  • the third output can be regarded as ⁇ IF SIG-
  • the ON and fourth outputs can be regarded as ⁇ IF blk-ON .
  • the interface unit 23 includes a first switch SW1 and a second switch SW2 that switch between the first output and the positive output of the main mixing unit 11, and is connected to the second output and the main mix.
  • a third switch SW3 between the positive output terminals of the frequency unit 11, a fourth switch SW4 connected between the fourth output and the negative output terminal of the main mixing unit 11, and a third output and main mixing unit 11
  • the fifth switch SW5 and the sixth switch SW6 connected or disconnected between the negative output terminals.
  • the first switch SW1 is connected between the low-pass filter connected to the first output path 211 of the sub-mixing unit 21 and the ground
  • the second switch SW2 is connected to the first output path 211 connected to the sub-mixing unit 21.
  • the third switch SW3 is connected to the high-pass filter connected to the first output path 211 of the sub-mixing unit 21 and the negative output of the main mixing unit.
  • the fourth switch SW4 is connected between the high-pass filter connected to the second output path 212 of the sub-mixing unit 21 and the positive output terminal of the main mixing unit, and the fifth switch SW5 is connected to the sub-mixing unit 21
  • the sixth switch SW6 is connected to the low pass filter connected to the second output path 212 of the submixing unit 21 and the ground. between.
  • the feedforward branch 20 is at The first mode of operation shown in FIG. 7 is equivalent to the operating state of the embodiment shown in FIG. 2.
  • the feedforward branch 20 is in FIG.
  • the second mode of operation is shown and is equivalent to the operational state of the embodiment shown in FIG.
  • the feedforward branch of the interface unit 23 is operated, the second switch SW2, the third switch SW3, the fourth switch SW4, and the fifth switch SW5 remain closed, and the feedforward is performed by closing the first switch SW1 and the sixth switch SW6.
  • the branch circuit 20 is switched to a first operating mode for suppressing the blocking signal, and the first switch SW1 and the sixth switch SW6 are turned on to switch the feedforward branch 20 to a second operating mode for suppressing the blocking signal and enhancing the useful signal, the two working modes Flexible configuration according to actual application requirements, improving applicability.
  • the second switch, the third switch, the fourth switch and the fifth switch in the interface unit 23 may be omitted, and the interface unit 23 only includes the connection to the first output path 211 of the sub-mixing unit 21.
  • the connection or disconnection between the output path of the intermediate frequency useful signal of the feedforward branch 20 and the differential output of the main mixing unit 11 is achieved directly by switching the first switch and the sixth switch between on and off.
  • the mixer circuit further includes a mixer transconductance stage 30 and a transimpedance amplifier 40.
  • the mixer transconductance stage 30 is coupled to the input of the main mixing branch 10 and the input of the feedforward branch 20, and the input of the mixer transconductance stage 30 is an RF voltage input terminal configured to receive an input RF voltage.
  • the signal is converted to an RF current signal and provided to the main mixing unit 11 and the feedforward branch 20.
  • the transimpedance amplifier 40 is connected to the output end of the main mixing branch 10 and the output end of the feedforward branch 20, and the output end of the transimpedance amplifier 40 is an intermediate frequency voltage output terminal, and is arranged to receive the main mixing unit 11 and the feedforward branch.
  • the path 20 downconverts the RF current signal into an intermediate frequency current signal and converts it into an intermediate frequency voltage signal.
  • the frequency selecting unit 22 of the feedforward branch 20 separately extracts the intermediate frequency blocking signal and the intermediate frequency useful signal in the intermediate frequency signal formed by the input RF signal transfer by filtering, and the main mixing unit
  • the intermediate frequency output of 11 and the intermediate frequency output of the feedforward branch 20 are superimposed in parallel, thereby coupling the intermediate frequency blocking signal output by the feedforward branch 20 into the output of the main mixing unit 11 for cancellation of the intermediate frequency blocking signal, and the intermediate frequency useful signal
  • the output of the main mixing unit 11 is coupled to enhance the intermediate frequency useful signal, and the mixer suppresses the adjacent channel blocking signal at a low voltage to form a feedforward compensation low voltage high linear mixer circuit, and the circuit structure is simple.
  • the mixer circuit can further configure the feedforward unit to form a switch between the two modes of operation of canceling the intermediate frequency blocking signal, canceling the intermediate frequency blocking signal, and enhancing the intermediate frequency useful signal, and can be flexibly configured according to actual application requirements, further improving applicability.
  • the mixer circuit provided by the above embodiments is suitable for use in a wireless transceiver system, especially for a MIMO (Multiple-Input Multiple-Output) wireless transceiver system, which can ensure that the mixer is reached in a SAW-free receiver system. Very good linearity function.
  • Another aspect of the present application also provides a wireless transceiver system including the mixer circuit described in the above embodiments.
  • connection In the description of the embodiments of the present invention, the terms “connected”, “directly connected”, “indirectly connected”, “fixedly connected”, “mounted”, “assembled” are to be understood broadly, unless explicitly defined and defined. For example, it may be a fixed connection, a detachable connection, or an integral connection; the terms “installation”, “connection”, “fixed connection” may be directly connected, or may be indirectly connected through an intermediate medium, and may be two elements. Internal connectivity.
  • connection connection
  • fixed connection may be directly connected, or may be indirectly connected through an intermediate medium, and may be two elements. Internal connectivity.

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Abstract

一种混频器电路，包括相互并联的主混频支路(10)及前馈支路(20)，主混频支路(10)的主混频单元(11)设置为在本振信号驱动下实现输入射频信号转换到中频并输出第一中频信号，前馈支路(20)包括子混频单元(21)和选频单元(22)，子混频单元(21)的差分输入端与主混频单元(11)的差分输入端连接，设置为在本振信号驱动下实现输入射频信号转换到中频并输出第二中频信号，选频单元(22)与子混频单元(21)连接，设置为接收子混频单元(21)的第二中频信号，通过滤波提取第二中频信号中的中频阻塞信号，中频阻塞信号耦合入主混频单元(11)输出的第一中频信号进行抵消。

Description

无线收发机系统及其混频器电路 技术领域
本文涉及一种混频器，特别涉及一种具高线性度的混频器电路及具有该混频器电路的无线收发机系统。
背景技术
无线收发机系统中，混频器电路实现射频信号和中频信号的转换。为了降低片外元件和成本，无声表面波(surface acoustic wave,SAW)架构接收机系统成为当前的主流趋势。发射机系统的发射信号对于接收机系统而言是邻道阻塞信号，阻塞信号通过互调和交调，产生的非线性会叠加在中频有用信号上，从而恶化接收机灵敏度。其中混频器是接收机的关键非线性器件。混频器的三阶互调特性(IP3)决定邻道干扰信号产生非线性产物的大小，特别是在深亚微米应用中，由于电源电压持续降低，中频输出幅度也成为混频器的线性度受限因素，因此在低电压无SAW架构接收机系统中，混频器的非线性特性，特别是三阶互调特性会有更为严格的要求。
在一些情况下可以采用无源混频器结构实现高线性混频器电路，并采用AB类跨导、分段线性化、反馈、电流注入等技术提升混频器线性度。
发明概述
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供一种结构简单、保证混频器增益和噪声、节省功耗的情况下提高混频器线性度且适应性强的混频器电路及具有混频器电路的无线收发机系统。
本发明实施例的技术方案是这样实现的：
一种混频器电路，混频器电路包括相互并联的主混频支路及前馈支路， 前馈支路的输入端与主混频支路的输入端连接，前馈支路的输出端与主混频支路的输出端连接；主混频支路包括主混频单元，主混频单元设置为接收本振信号并在本振信号驱动下将输入的射频信号转换到中频并输出第一中频信号；前馈支路包括子混频单元和选频单元，子混频单元的差分输入端与主混频单元的差分输入端连接，设置为在本振信号驱动下将输入的射频信号转换到中频并输出第二中频信号，选频单元与子混频单元连接，设置为接收子混频单元输出的第二中频信号，通过滤波提取第二中频信号中的中频阻塞信号，中频阻塞信号耦合入主混频单元输出的第一中频信号进行抵消。
一种无线收发机系统，包括混频器电路，该电路包括相互并联的主混频支路及前馈支路，前馈支路的输入端与主混频支路的输入端连接，前馈支路的输出端与主混频支路的输出端连接；主混频支路包括主混频单元，主混频单元设置为接收本振信号并在本振信号驱动下将输入的射频信号转换到中频并输出第一中频信号；前馈支路包括子混频单元和选频单元，子混频单元的差分输入端与主混频单元的差分输入端连接，设置为在本振信号驱动下将输入的射频信号转换到中频并输出第二中频信号，选频单元与子混频单元连接，设置为接收子混频单元输出的第二中频信号，通过滤波提取第二中频信号中的中频阻塞信号，中频阻塞信号耦合入主混频单元输出的第一中频信号进行抵消。
本发明实施例所提供的混频器电路及无线收发机系统，通过前馈支路和主混频支路并联形成两路中频输出，前馈支路的选频单元通过滤波提取由输入射频信号转移所形成的中频信号中的中频阻塞信号，主混频支路的主混频单元的中频输出和前馈支路的中频输出并联叠加，从而将前馈支路输出的中频阻塞信号耦合入主混频单元的输出以进行中频阻塞信号的抵消。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
图1为本发明一实施例中混频器电路的架构图；
图2为本发明一实施例中混频器电路的电路原理图；
图3为本发明一实施例中前馈支路的子混频单元的电路原理图；
图4为本发明另一实施例中混频器电路的电路原理图；
图5为本发明一实施例中前馈支路的选频单元的电路原理图；
图6为本发明一实施例中前馈支路的接口单元的电路原理图；
图7为本发明又一实施例中混频器电路于第一工作模式下的电路原理图；
图8为图7所示混频器电路于第二工作模式下的电路原理图。
详述
以下结合说明书附图及具体实施例对本发明技术方案做进一步的详细阐述。
采用AB类跨导技术，虽然能够解决跨导线性度受限问题，然而跨导偏置电路复杂，不能解决中频线性度受限问题；采用分段线性化技术，线性优化复杂，且功耗过大；采用反馈技术，通过牺牲增益和噪声特性来提高线性度，增益和噪声系数恶化；采用电流注入技术，无法适用无源混频器，仅能够针对有源混频器的线性度进行优化，适用性弱。
混频是指将信号从一个频率变换到另外一个频率的过程，其实质是频谱线性搬移的过程。在无线收发机系统中，为了保证接收机获得较高的灵敏度，请参阅图1和图2，本发明实施例提供了一种具备高线性度的混频器电路，该混频器电路包括相互并联的主混频支路10及前馈支路20，前馈支路20的输入端与主混频支路10的输入端连接，前馈支路20的输出端与主混频支路10的输出端连接，主混频支路10包括主混频单元11，主混频单元11设置为接收本振信号并在本振信号驱动下实现输入射频信号转换到中频并输出第一中频信号，前馈支路20包括子混频单元21和选频单元22，子混频单元21的差分输入端与主混频单元11的差分输入端连接，设置为在本振信号驱动下实现输入射频信号转换到中频并输出第二中频信号，选频单元22与子混频单元21连接，设置为接收子混频单元21的第二中频信号，并通过滤波提取第二中频信号中的中频阻塞信号，中频阻塞信号耦合入主混频单元 11输出的第一中频信号从而将第一中频信号中的中频阻塞信号进行抵消。
主混频单元11可以为无源混频开关电路或有源混频开关电路，作为一种实施方式，所述无源混频开关电路或有源混频开关电路可以为单平衡架构或者双平衡架构。主混频单元11设置为接收本振信号并在本振信号驱动下实现输入射频信号转换到中频并输出中频信号。本振是指本地振荡器，其作用是产生一个频率与接收机收到的信号频率混频以产生固定频率的中频信号，本申请实施例中，本振信号即指通过本地振荡器产生的预设频率的信号。其中，输入射频信号可以为电压信号或电流信号，本实施例中，主混频单元11可以为任意一种能够在本振信号的驱动下将输入射频电压信号或电流信号转换到中频，对应输出中频电压信号或中频电流信号的混频开关电路。前馈支路20中的子混频单元21与主混频单元11的作用相同，设置为在本振信号驱动下实现输入射频信号转换到中频并输出中频信号，为了便于描述和理解，将主混频单元11输出的中频信号命名为第一中频信号，将子混频单元21输出的中频信号命名为第二中频信号。子混频单元21同样可以为任意一种能够在本振信号的驱动下将输入射频电压信号或电流信号转换到中频，并对应输出中频电压信号或中频电流信号的混频开关电路。选频单元22设置为选择并分离中频有用信号和中频阻塞信号，中频有用信号的频率和中频阻塞信号的频率范围不同，选频单元22通过对子混频单元21输出的第二中频信号进行滤波提取中频阻塞信号。主混频单元11的差分输入端即为主混频支路10的输入端，主混频单元11的差分输出端即为主混频支路10的输出端，从而前馈支路20的输出端与主混频单元11的差分输出端耦接，选频单元22输出的中频阻塞信号与主混频单元11输出的第一中频信号进行并联叠加，选频单元22输出的中频阻塞信号耦合入主混频单元11输出的第一中频信号从而将第一中频信号中的中频阻塞信号进行抵消。
上述实施例提供的混频器电路，主混频单元11与前馈支路20并联，子混频单元21的差分输入端即为前馈支路20的输入端，子混频单元21的差分输入端与主混频单元11的差分输入端连接，从而子混频单元21和主混频单元11接收相同的输入射频信号并下混频到中频信号，通过前馈支路20和主混频单元11并联形成两路中频输出，前馈支路20的选频单元22通过滤 波提取由输入射频信号转移所形成的中频信号中的中频阻塞信号，主混频单元11的中频输出和前馈支路的中频输出并联叠加，从而将前馈支路20输出的中频阻塞信号耦合入主混频单元11的输出以进行中频阻塞信号的抵消，该混频器电路通过设计采用滤波提取中频阻塞信号的前馈支路20在主混频单元11的中频输出后将中频阻塞信号抵消，该混频器电路基于中频信号的前馈抵消补偿实现低电压下对阻塞信号的抑制，不需要增加复杂的阻塞信号检测和抵消电路，电路结构简单，从而节省芯片面积和功耗；在低电压下提升混频器对邻道阻塞信号的抑制，降低对输出的中频电路的线性度要求，可以适用于有源混频开关电路或无源开关电路，尤其是对于低电压下中频输出受限的混频器电路，易于实际的芯片设计上得到应用，从而在保证增益和噪声的前提下能够有效提升线性度，能够有效应对各种复杂的接收环境，适应性强。
在一实施例中，选频单元22包括滤波器，该滤波器连接于子混频单元21的输出端及主混频单元11的输出端之间。主混频单元11和子混频单元21分别将输入射频信号的射频有用信号和射频阻塞信号下混频到中频信号，其中射频有用信号变频的中频信号位于低频，射频阻塞信号变频的中频信号相对频率更高，选频单元22的输入信号来源于子混频单元的输出，通过滤波器可以实现对子混频单元21将射频阻塞信号变频的中频信号的提取。由于射频阻塞信号变频的中频信号相对频率更高，为有效提取中频阻塞信号，该选频单元可以为高通滤波器，通过设置高通滤波器的截止频率。可以理解的是，滤波器可以为已知的有源滤波器或者无源滤波器，本申请实施例在此不做限制。
为了能够实现将前馈支路20的中频输出中的中频阻塞信号叠加至主混频单元11的中频输出形成抵消，抵消方式包括：第一，前馈支路的中频输出中的中频阻塞信号与主混频单元的中频输出中的中频阻塞信号形成为相位相反的信号并直接叠加；第二，前馈支路中频输出中的中频阻塞信号与主混频单元的中频输出中的中频阻塞信号形成为相位相同的信号并通过减法运算单元叠加。两种抵消方式可根据实际的混频器电路中主混频单元和子混频单元所选用的单平衡架构或者双平衡架构进行选择。以下以主混频单元和 子混频单元为双平衡架构混频开关电路为例对抵消方式的原理进行进一步说明。
请参阅图3，为一实施例提供的子混频单元21的结构图，该子混频单元21为一典型的无源双平衡架构混频开关电路，包括n型的第一晶体管M1、第二晶体管M2、第三晶体管M3及第四晶体管M4。第一晶体管M1和第四晶体管M4的栅极耦接，可接收第一本振信号LO IP，第二晶体管M2和第三晶体管M3的栅极耦接，可接收第二本振信号LO IN。第一晶体管M1的源级和第二晶体管的源级耦接，可接收第一输入射频信号RF IP，第三晶体管的源极和第四晶体管的源极耦接，可接收第二输入射频信号RF IN。第一晶体管M1的漏极和第三晶体管M3的漏极耦接，并形成第一输出路径211，第二晶体管M2的漏极和第四晶体管M4的漏极耦接，并形成第二输出路径212。因此，子混频单元21采用双平衡架构混频开关电路可以形成正、负两路输入和输出，分别接收幅值、频率相同且相位相反的输入射频信号，并对应分别接收幅值、频率相同且相位相反的本振信号，从而可以得到相位相反的两路输出，再通过于主混频单元11的正、负两路输出分别耦接相位相反待抵消信号或相位相同的待增强信号，以在不增加逻辑运算电路的前提下便能够实现信号抵消或增强运算。在本实施例中，第一输入射频信号RF IP为正、第一本振信号LO IN分别为负，第一输出路径211的中频输出IF OP为正，第二输入射频信号RF IN为负、第二本振信号LO IM分别为负，第二输出路径212的中频输出IF ON为负。
作为一实施例，主混频单元11和子混频单元21的结构相同，分别包括正、负两路输入和输出，即主混频单元11和子混频单元21分别包括正输出端和负输出端，选频单元22通过滤波分别提取子混频单元21的正输出端的中频阻塞信号与主混频单元11的负输出端进行耦合、及提取子混频单元21的负输出端的中频阻塞信号与主混频单元11的正输出端进行耦合。请再次参阅图2，子混频单元21的第一输出路径211即为正输出端，子混频单元21的第二输出路径212即为负输出端，选频单元22包括分别与第一输出路径211和第二输出路径212连接的两个滤波器，分别得到输出为正的中频阻塞信号IF blk-OP和输出为负的中频阻塞信号IF blk-ON，输出为正的中频阻塞信 号IF blk-OP与主混频单元11的输出为负的中频信号IF ON直接叠加，输出为负的中频阻塞信号IF blk-ON与主混频单元11的输出为正的中频信号IF OP直接叠加，从而实现前馈支路20的中频输出中的中频阻塞信号叠加至主混频单元11的中频输出形成中频阻塞信号的抵消。通过主混频单元11和子混频单元21分别形成相位相反的两路中频输出并直接叠加，减少逻辑运算电路的使用，进一步简化了电路结构。
在另一个实施例中，请参阅图4，选频单元22还设置为通过滤波提取第二中频信号中的中频有用信号IF SIG，中频有用信号IF SIG耦合入主混频单元11输出的第一中频信号进行增强。中频有用信号IF SIG提取与中频阻塞信号IF blk提取的原理相同，基于前述实施例的描述可知，射频阻塞信号变频的中频信号相对频率更高，射频有用信号变频的中频信号相对低频，通过高频滤波器和低频滤波器分别与子混频单元21的第一输出路径211连接，得到两路输出为正的不同系数比重的中频有用信号αIF SIG-OP和中频阻塞信号αIF blk-OP，同样，通过高频滤波器和低频滤波器分别与子混频单元21的第二输出路径212连接，得到两路输出为负的不同系数比重的中频有用信号αIF SIG-ON和中频阻塞信号αIF blk-ON，通过设置高通滤波器和低通滤波器的截止频率，可以针对不同的应用实现特定比例的中频有用信号和中频阻塞信号的分离和提取。请结合参阅图5，将中频有用信号表示为IF SIG，中频阻塞信号表示为IF blk，子混频单元21将输入射频信号下变频到中频得到的第二中频信号表示为IF SIG+IF blk，中频有用信号的正信号表示为IF SIG-OP，中频有用信号的负信号表示为IF SIG-ON，中频阻塞信号的正信号表示为IF blk-OP，中频阻塞信号的负信号表示为IF blk-ON，则第二中频信号IF SIG+IF blk的正信号表示为IF SIG_OP+IF blk_OP，第二中频信号IF SIG+IF blk的负信号表示为IF SIG_ON+IF blk_ON，第二中频信号即为选频单元22的输入信号，选频单元22分别通过高通滤波器HPF和低通滤波器LPF后中频有用信号和中频阻塞信号分离如下：
IF LPF＝αIF SIG+βIF blk                       (1)
IF HPF＝αIF blk+βIF SIG                       (2)
α+β＝1                                    (3)
其中，IF LPF为子混频单元21通过低通滤波器后的输出信号，IF HPF为子混频单元21通过高通滤波器后的输出信号，α和β分别为通过高通滤波器和低通滤波器滤波后输出的中频有用信号IF SIG和中频阻塞信号IF blk的系数，α远远大于β。为了实现低效效果，通过设置高通滤波器和低通滤波器的截止频率，使得α的值等于1或无限逼近1时，根据公式(1)～(3)，则通过高频滤波器和低通滤波器分别与子混频单元21的第一输出路径211连接实现第二中频信号中正的中频有用信号αIF SIG-OP和中频阻塞信号αIF blk-OP的分离，以及通过高频滤波器和低通滤波器分别与子混频单元21的第二输出路径212连接实现第二中频信号中负的中频有用信号αIF SIG-ON和中频阻塞信号αIF blk-ON的分离。
主混频单元11将输入射频信号下变频到中频得到的第一中频信号表示为I main,sig+I main,blk，根据如前所述的前馈支路的提取原理前馈支路20分别提取正、负中频有用信号、中频阻塞信号耦合入主混频单元11输出的第一中频信号表示如下：
IF total＝I main,sig+αI sig+I main,blk-αI blk   (4)
IF total＝-(I main,sig+αI sig)-I main,blk+αI blk  (5)
其中，IF total表示前馈支路20的中频输出与主混频单元11的中频输出的叠加信号。子混频单元21的第一输出路径211通过高频滤波器后、及第二输出路径212通过低通滤波器后均与主混频单元11的负输出端耦接，中频有用信号增强且中频阻塞信号抵消获得公式(4)，子混频单元21的第一输出路径211通过低通滤波器后、及第二输出路径212通过高通滤波器后均与主混频单元11的正输出端耦接，中频有用信号增强且中频阻塞信号抵消获得公式(5)。
上述实施例提供的混频器电路，通过前馈支路20和主混频单元11并联形成两路中频输出，前馈支路20的选频单元22通过滤波分别提取由输入射频信号转移所形成的中频信号中的中频阻塞信号以及中频有用信号，主混频单元11的中频输出和前馈支路20的中频输出并联叠加，从而将前馈支路20输出的中频阻塞信号耦合入主混频单元11的输出以进行中频阻塞信号的抵消，且将中频有用信号耦合入主混频单元11的输出以进行中频有用信号 的增强，在低电压下提升混频器对邻道阻塞信号的抑制，可以适用于有源混频开关电路或无源开关电路，尤其是对于低电压下中频输出受限的混频器电路，易于实际的芯片设计上得到应用，电路结构简单且进一步提高线性度，适应性强。
在另一个实施例中，前馈支路20包括第一工作模式和第二工作模式，在第一工作模式下中频阻塞信号耦合入第一中频信号进行抵消，在第二工作模式下中频阻塞信号耦合入第一中频信号进行抵消、且中频有用信号耦合入第一中频信号进行增强。如图6所示，前馈支路20还包括连接于选频单元22和主混频单元11的差分输出端之间的接口单元23，接口单元23通过于开启和闭合之间切换实现前馈支路20的第一工作模式和第二工作模式的切换。在一实施例中，选频单元20包括与所述子混频单元21的正输出端并联连接的高通滤波器和低通滤波器，以及与子混频单元20的负输出端并联连接的高通滤波器和低通滤波器，接口单元22通过于开启和闭合之间切换实现前馈支路20的中频有用信号的输出通路与主混频单元11的差分输出端之间的连接或断开，从而实现前馈支路第一工作模式和第二工作模式的切换。如图7所示，前馈支路20在第一工作模式下的工作原理与前述图2所示实施例相同，如图8所示，在第二工作模式的工作原理与前述图4所示实施例相同。
在一实施例中，仍以主混频单元11和子混频单元21均为无源双平衡架构混频开关电路为例进行说明。主混频单元11和子混频单元21分别包括正输出端和负输出端，其中，子混频单元21的正输出端即为输出为正的第一输出路径211，子混频单元21的负输出端即为输出为负的第二输出路径212。结合参阅图4和图5，将子混频单元21将输入射频信号RF IP及RF IN下变频到中频得到的第二中频信号表示为IF SIG+IF blk，则子混频单元的第一输出路径211输出的中频信号为IF SIG-OP+IF blk-OP，子混频单元21的第二输出路径212输出的中频信号为IF SIG-ON+IF blk-ON。选频单元22通过滤波分别提取子混频单元21的中频有用信号和中频阻塞信号，在一实施例中，选频单元22通过低通滤波器LPF提取子混频单元21的正输出端的中频有用信号作为第一输出αIF SIG-OP+βIF blk-OP、通过高通滤波器HPF提取子混频单元21的正输 出端的中频阻塞信号作为第二输出αIF blk-OP+βIF SIG-OP、通过低通滤波器LPF提取子混频单元21的负输出端的中频有用信号作为第三输出αIF SIG-ON+βIF blk-ON、通过高通滤波器提取子混频单元的负输出端的中频阻塞信号作为第四输出αIF blk-ON+βIF blk-ON。设置滤波器的截止频率使得α的值等于1或无限逼近1时，则第一输出可视为αIF SIG-OP、第二输出可视为αIF blk-OP、第三输出可视为αIF SIG-ON、第四输出可视为αIF blk-ON。
在一个实施例中，接口单元23包括切换该第一输出与主混频单元11的正输出端之间连接或断开的第一开关SW1和第二开关SW2、连接于第二输出与主混频单元11的正输出端之间的第三开关SW3、连接于第四输出与主混频单元11的负输出端之间的第四开关SW4、以及切换第三输出与主混频单元11的负输出端之间连接或断开的第五开关SW5和第六开关SW6。其中第一开关SW1连接于与子混频单元21的第一输出路径211连接的低通滤波器与地之间、第二开关SW2连接于与子混频单元21的第一输出路径211连接的低通滤波器与主混频单元11的正输出端之间，第三开关SW3连接于与子混频单元21的第一输出路径211连接的高通滤波器与主混频单元的负输出端之间，第四开关SW4连接于与子混频单元21的第二输出路径212连接的高通滤波器与主混频单元的正输出端之间，第五开关SW5连接于与子混频单元21的第二输出路径212连接的低通滤波器与主混频单元的负输出端之间，第六开关SW6连接于与子混频单元21的第二输出路径212连接的低通滤波器与地之间。可以理解的，当第一开关SW1和第六开关SW6闭合时，则子混频单元21的第一输出路径和第二输出路径经过低通滤波器连接的路径均短路，前馈支路20处于如图7所示的第一工作模式，且等效于如图2所示实施例的工作状态；当第一开关SW1和第六开关SW6断开时，前馈支路20处于如图8所示的第二工作模式，且等效于如图4所示实施例的工作状态。采用该接口单元23的前馈支路工作时，第二开关SW2、第三开关SW3、第四开关SW4及第五开关SW5保持闭合，通过将第一开关SW1和第六开关SW6闭合将前馈支路20切换至抑制阻塞信号的第一工作模式，将第一开关SW1和第六开关SW6开启将前馈支路20切换至抑制阻塞信号且增强有用信号的第二工作模式，两种工作模式可根据实际应用需求灵活配置，提升了适用性。
在一实施例中，接口单元23中的第二开关、第三开关、第四开关及第五开关可以省略，接口单元23仅包括连接于与子混频单元21的第一输出路径211连接的低通滤波器与地之间的第一开关、以及连接于与子混频单元21的第二输出路径212连接的低通滤波器与地之间的第六开关。直接通过将第一开关和第六开关于开启和闭合之间切换实现前馈支路20的中频有用信号的输出通路与主混频单元11的差分输出端之间的连接或断开。
在另一个实施例中，混频器电路还包括混频器跨导级30和跨阻放大器40。混频器跨导级30与主混频支路10的输入端和前馈支路20的输入端连接，混频器跨导级30的输入端为射频电压输入端，设置为接收输入射频电压信号转换为射频电流信号并提供给主混频单元11及前馈支路20。跨阻放大器40与主混频支路10的输出端及前馈支路20的输出端连接，跨阻放大器40的输出端为中频电压输出端，设置为接收主混频单元11及前馈支路20将射频电流信号下变频形成的中频电流信号，并转换为中频电压信号。
本申请实施例所提供的混频器电路，前馈支路20的选频单元22通过滤波分别提取由输入射频信号转移所形成的中频信号中的中频阻塞信号以及中频有用信号，主混频单元11的中频输出和前馈支路20的中频输出并联叠加，从而将前馈支路20输出的中频阻塞信号耦合入主混频单元11的输出以进行中频阻塞信号的抵消，且将中频有用信号耦合入主混频单元11的输出以进行中频有用信号的增强，在低电压下提升混频器对邻道阻塞信号的抑制，形成为前馈补偿低电压高线性混频器电路，电路结构简单，可以适用于有源混频开关电路或无源开关电路，尤其是对于低电压下中频输出受限的混频器电路，易于实际的芯片设计上得到应用，且进一步提高线性度，其中主混频单元和子混频单元不限于有源/无源的单平衡/双平衡架构，适应性强。混频器电路可进一步将前馈单元配置形成将中频阻塞信号抵消、与中频阻塞信号抵消且中频有用信号增强的两种工作模式可选择地的切换，可根据实际应用需求灵活配置，进一步提升了适用性。
上述实施例所提供的混频器电路适用于无线收发机系统中，尤其是针对MIMO(Multiple-Input Multiple-Output)的无线收发机系统中，能够在无SAW接收机系统中保证混频器达到很好的线性度功能。本申请另一方面还提供包 含上述实施例所述混频器电路的无线收发机系统。
在本发明实施例的描述中，除非另有明确的规定和限定，术语“连接”、“直接连接”、“间接连接”、“固定连接”、“安装”、“装配”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；术语“安装”、“连接”、“固定连接”可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本发明中的具体含义。
以上所述仅为本发明的具体实施例，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。本发明的保护范围应以所述权利要求的保护范围以准。

Claims (10)

  1. 一种混频器电路，其中：所述混频器电路包括相互并联的主混频支路(10)及前馈支路(20)，所述前馈支路(20)的输入端与所述主混频支路(10)的输入端连接，所述前馈支路(10)的输出端与所述主混频支路(10)的输出端连接；
    所述主混频支路包括主混频单元(11)，所述主混频单元(11)设置为接收本振信号并在所述本振信号驱动下将输入的射频信号转换到中频并输出第一中频信号；
    所述前馈支路(20)包括子混频单元(21)和选频单元(22)，所述子混频单元(21)的差分输入端与所述主混频单元(11)的差分输入端连接，设置为在本振信号驱动下将输入的射频信号转换到中频并输出第二中频信号，所述选频单元(22)与所述子混频单元(21)连接，设置为接收子混频单元(21)的所述第二中频信号，通过滤波提取所述第二中频信号中的中频阻塞信号，所述中频阻塞信号耦合入所述主混频单元(11)输出的所述第一中频信号进行抵消。
  2. 如权利要求1所述的混频器电路，其中，所述选频单元(22)包括滤波器，所述滤波器连接于所述子混频单元(21)的输出端及所述主混频单元(11)的输出端之间。
  3. 如权利要求1所述的混频器电路，其中，所述主混频单元(11)和所述子混频单元(21)分别包括正输出端和负输出端，所述选频单元(22)通过滤波分别提取所述子混频单元(21)的正输出端的中频阻塞信号与所述主混频单元(11)的负输出端进行耦合、及所述子混频单元(21)的负输出端的中频阻塞信号与所述主混频单元(11)的正输出端进行耦合。
  4. 如权利要求1所述的混频器电路，其中，所述选频单元(22)还设置为通过滤波提取所述第二中频信号中的中频有用信号，所述中频有用信号耦合入所述主混频单元(11)输出的所述第一中频信号进行增强。
  5. 如权利要求4所述的混频器电路，其中，所述前馈支路(20)还包括连接于所述选频单元(22)和所述主混频单元(11)的差分输出端之间的 接口单元(23)，所述接口单元(23)通过于开启和闭合之间切换实现所述前馈支路(20)的第一工作模式和第二工作模式的切换，在第一工作模式下所述中频阻塞信号耦合入所述第一中频信号进行抵消，在第二工作模式下所述中频阻塞信号耦合入所述第一中频信号进行抵消、且所述中频有用信号耦合入所述第一中频信号进行增强。
  6. 如权利要求5所述的混频器电路，其中，所述主混频单元(11)和所述子混频单元(21)分别包括正输出端和负输出端，所述选频单元(22)通过滤波分别提取所述子混频单元(21)的正输出端的中频有用信号作为第一输出、提取所述子混频单元(21)的正输出端的中频阻塞信号作为第二输出、提取所述子混频单元(21)的负输出端的中频阻塞信号作为第三输出、提取所述子混频单元(21)的负输出端的中频有用信号作为第四输出；
    所述接口单元(23)包括切换所述第一输出与所述主混频单元(11)的正输出端之间连接或断开的第一开关和第二开关、连接于所述第二输出与所述主混频单元(11)的正输出端之间的第三开关、连接于所述第三输出与所述主混频单元(11)的负输出端之间的第四开关、以及切换所述第四输出与所述主混频单元(11)的负输出端之间连接或断开的第五开关和第六开关。
  7. 如权利要求5所述的混频器电路，其中，所述主混频单元(11)和所述子混频单元(21)的差分输出端分别包括正输出端和负输出端，所述选频单元(22)包括与所述子混频单元(21)的正输出端并联连接的高通滤波器和低通滤波器、以及与所述子混频单元(21)的负输出端并联连接的高通滤波器和低通滤波器，所述接口单元(23)包括实现所述选频单元(22)的中频有用信号的输出通路与所述主混频单元(11)的差分输出端之间可选择地连通或者断开的开关。
  8. 如权利要求7所述的混频器电路，其中，所述选频单元(22)与所述子混频单元(21)的正输出端并联连接的高通滤波器和低通滤波器分别输出正向的中频有用信号和正向的中频阻塞信号，所述选频单元(22)与所述子混频单元(21)的负输出端并联连接的高通滤波器和低通滤波器分别输出反向的中频有用信号和反向的中频阻塞信号，所述开关包括将所述正向的中频有用信号与所述主混频单元(11)的正输出端可选择地连通或者断开的第 一开关和第二开关、将所述正向的中频阻塞信号与所述主混频单元(11)的负输出端连接的第三开关、将所述反向的中频阻塞信号与所述主混频单元(11)的正输出端连接的第四开关、及将所述反向的中频有用信号与所述主混频单元(11)的负输出端可选择地连通或断开的第五开关和第六开关。
  9. 如权利要求1至8中任意一项所述的混频器电路，所述混频器电路还包括混频器跨导级(30)和跨阻放大器(40)，所述混频器跨导级(30)与所述主混频单元(11)的差分输入端连接，所述跨阻放大器(40)与所述主混频单元(11)的差分输出端连接，所述混频器跨导级(30)输入端为射频电压输入端，设置为将射频电压信号转换为射频电流信号，所述跨阻放大器(40)设置为将中频电流信号转换为中频电压信号。
  10. 一种无线收发机系统，包括如权利要求1至9中任意一项所述的混频器电路。
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Publication number Priority date Publication date Assignee Title
WO2023030712A1 (en) * 2021-09-02 2023-03-09 Panthronics Ag Harmonic suppression for current-driven direct conversion receiver

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114553147B (zh) * 2022-01-12 2024-02-02 中国电子科技集团公司第十研究所 可配置增益的双平衡无源混频器

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1430425A (zh) * 2001-12-31 2003-07-16 深圳市中兴通讯股份有限公司上海第二研究所 前馈式线性功率放大器的自适应跟踪抵消控制方法及装置
WO2003067772A1 (en) * 2002-02-01 2003-08-14 Qualcomm, Incorporated Distortion reduction in a wireless communication device
CN101252366A (zh) * 2008-03-18 2008-08-27 东南大学 零中频无线接收机直流偏差消除装置
CN103973612A (zh) * 2013-01-25 2014-08-06 华为技术有限公司 近区反射自干扰信号抵消方法及装置
CN104617970A (zh) * 2015-02-10 2015-05-13 东南大学 一种全集成抗阻塞射频接收前端架构

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8718588B2 (en) * 2011-08-04 2014-05-06 Mediatek Inc. Signal processing circuit having mixer units using oscillation signals with different phases and frequency-selective combining block for frequency-selectively combining outputs of mixer units and related method thereof
CN103957021A (zh) * 2014-05-15 2014-07-30 电子科技大学 高线性低噪声短波宽带接收机

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1430425A (zh) * 2001-12-31 2003-07-16 深圳市中兴通讯股份有限公司上海第二研究所 前馈式线性功率放大器的自适应跟踪抵消控制方法及装置
WO2003067772A1 (en) * 2002-02-01 2003-08-14 Qualcomm, Incorporated Distortion reduction in a wireless communication device
CN101252366A (zh) * 2008-03-18 2008-08-27 东南大学 零中频无线接收机直流偏差消除装置
CN103973612A (zh) * 2013-01-25 2014-08-06 华为技术有限公司 近区反射自干扰信号抵消方法及装置
CN104617970A (zh) * 2015-02-10 2015-05-13 东南大学 一种全集成抗阻塞射频接收前端架构

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023030712A1 (en) * 2021-09-02 2023-03-09 Panthronics Ag Harmonic suppression for current-driven direct conversion receiver

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