WO2019019339A1 - 一种多功能线路板检测模块及检测方法 - Google Patents

一种多功能线路板检测模块及检测方法 Download PDF

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Publication number
WO2019019339A1
WO2019019339A1 PCT/CN2017/103329 CN2017103329W WO2019019339A1 WO 2019019339 A1 WO2019019339 A1 WO 2019019339A1 CN 2017103329 W CN2017103329 W CN 2017103329W WO 2019019339 A1 WO2019019339 A1 WO 2019019339A1
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copper
test
hole
holes
layer
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PCT/CN2017/103329
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English (en)
French (fr)
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李雄杰
李波
钟招娣
何艳球
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胜宏科技（惠州）股份有限公司
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Priority to KR1020197010197A priority Critical patent/KR102215664B1/ko
Publication of WO2019019339A1 publication Critical patent/WO2019019339A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/166—Alignment or registration; Control of registration

Definitions

  • the invention relates to the field of circuit board technology, in particular to a multifunctional circuit board detecting module and a detecting method.
  • the present invention provides a multi-function circuit board detecting module, including a PCB test board, which is a multi-layer circuit board, including first to Nth copper layers arranged in order from top to bottom, for a total of N a layer of copper, N being an even number greater than 6;
  • the PCB test board is provided with one or more test blocks, the test block includes a first through hole group and a second through hole group, and the first through hole group includes 6 to 12 test holes arranged in 3 rows.
  • the test hole is a through hole having the same aperture;
  • the second through hole group includes a first connection hole to an N-1 connection hole, and a total of N-1 connection holes, wherein the connection holes are through holes having the same aperture;
  • Both the test hole and the connecting hole are provided with hole copper;
  • a first copper plate corresponding to the first through hole group is disposed on the first copper layer; an Nth copper plate corresponding to the first through hole group is disposed on the Nth copper layer; the first and the Nth shop Copper block and all measurements a copper connection in the test hole;
  • the second to N-1th copper layers are respectively provided with second to N-1th copper strips corresponding to the first through hole groups, and a total of N-2 copper strips are disposed on the second copper layer.
  • a second copper strip corresponding to the first through hole group, a third copper strip corresponding to the first through hole group is disposed on the third copper layer, and so on; the width of the narrowest portion of the copper strip in the same test block is the same;
  • the second to N-1th copper strips are all curved around the upper and lower sides of each of the test holes in the first through hole group, and form a ring-shaped copper-free region corresponding to each test hole on the second to N-1th copper layers, respectively.
  • the annular copper-free regions in the same test block have the same width; one ends of the second to N-1th copper strips are connected to the first connection holes, and the other ends are sequentially connected to the second to N-1th connection holes, respectively.
  • the other end of the second copper strip is connected to the second connecting hole, and the other end of the third copper strip is connected to the third connecting hole, and so on.
  • connection holes in the second through hole group on the first and the Nth copper layers are provided with copper hole rings; and the second to N-1th copper layers are respectively provided with copper holes corresponding to the first connection holes.
  • the second to the N-1 copper layers are respectively provided with copper hole rings corresponding to the second to N-1th connection holes, and the second copper layer is provided with a copper hole ring corresponding to the second connection holes, and the third copper layer
  • the corresponding third connecting hole is provided with a copper hole ring, and so on; the copper hole ring is connected with the hole in the corresponding connecting hole; the two ends of the second to N-1th copper strip are respectively corresponding to the corresponding copper layer Set the two copper hole rings to connect.
  • the portions of the second to N-1th copper strips between each row of the test holes in the first through hole group respectively form a copper bridge; the minimum distance between adjacent copper bridges on the same copper strip is greater than or equal to 0.1mm.
  • the multi-function circuit board detecting module according to any one of claims 1 to 3, characterized in that: the hole spacing of the adjacent connecting holes is 1.0 to 1.1 mm; the diameters of the test holes and the connecting holes are both 0.2 mm; The distance between the hole and the connecting hole is greater than 1 mm.
  • the first through hole group includes nine test holes arranged in three rows.
  • test blocks there are six test blocks on the PCB test board.
  • widths of the annular copper-free regions on the six test blocks are 0.075 mm, 0.1 mm, 0.127 mm, 0.15 mm, 0.178 mm, and 0.2 mm, respectively. .
  • widths of the narrowest portions of the copper strips on the six test blocks are 0.075 mm, 0.1 mm, 0.127 mm, 0.15 mm, 0.178 mm, and 0.2 mm, respectively.
  • the invention also provides a detection method using a multi-function circuit board detection module, which comprises the following test items for the completed multi-function circuit board detection module after completing the inner layer, the pressing and the drilling process:
  • Each test block is tested separately, and the second to N-1th copper strips in each test block are sequentially tested for conduction, specifically, whether the first connection hole and the other connection holes are electrically connected, and if not, Passing, determining that the etching is excessive during the inner layer process, and determining the excessive etching amount by combining the test results of different test blocks and the width of the narrowest portion of the copper strip on each test block;
  • test each test block separately, and sequentially test whether the second to N-1 copper layers in each test block are turned on, specifically, whether the second to N-1 connection holes are turned on, and if If there is conduction, it is determined that layer deviation occurs during pressing; if all copper layers are turned on, the hole deviation during drilling is determined, and the test results of different test blocks are combined with the upper ring-free copper area on each test block.
  • the width determines the offset of the hole offset.
  • the layer can be determined.
  • the bias occurs between the two copper layers, and combines the test results of different test blocks and the width of the annular copper-free region on each test block to determine the offset of the layer bias;
  • the invention designs a test block for the process control requirements of the inner layer, the pressing and the drilling, and can conveniently and quickly determine the etching amount in the inner layer process, the layer deviation in the pressing process, and the hole deviation in the drilling process. Therefore, a reliable reference can be provided before the production of the circuit board product, thereby adjusting the engineering data and process implementation, improving the process capability, thereby improving the product quality.
  • FIG. 1 is a schematic structural view of an embodiment of a multi-function circuit board detecting module.
  • FIG. 2 is a schematic diagram of a test block in a first copper layer of an embodiment of a multi-function circuit board detecting module.
  • FIG 3 is a schematic diagram of a test block in a second copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 4 is a schematic diagram of a test block in a third copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 5 is a schematic diagram of a test block in a fourth copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 6 is a schematic diagram of a test block in a fifth copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 7 is a schematic diagram of a test block in a sixth copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 8 is a schematic diagram of a test block in a seventh copper layer of the embodiment of the multi-function circuit board detecting module.
  • FIG. 9 is a schematic diagram of a test block in an eighth copper layer of the embodiment of the multi-function circuit board detecting module.
  • a multi-function circuit board detecting module includes a PCB test board 1 , and the PCB test board is a multi-layer circuit board, and includes a first copper layer L1 and a first layer arranged from top to bottom. Two copper layers L2...eighth copper layer L8, a total of eight copper layers;
  • the PCB test board 1 is provided with six test blocks 2, one of which is shown in FIGS. 2 to 9.
  • Each test block includes a first through hole group A1 and a second through hole group A2, and the first through hole group A1 includes nine test holes B arranged in three rows; the second through hole group A2 includes a first connection hole C1, a second connection hole C2, a seventh connection hole C7, a total of seven connection holes, and a test hole and a connection hole. It is a through hole with the same aperture and a hole copper is provided in the hole.
  • the spacing between the adjacent connecting holes is 1.1 mm; the diameters of the test holes and the connecting holes are both 0.2 mm; the distance between the test holes and the connecting holes is greater than 1 mm.
  • a first copper layer D1 corresponding to the first through hole group A1 is disposed on the first copper layer L1; and an eighth copper plate D8 corresponding to the first through hole group A1 is disposed on the eighth copper layer L8;
  • the eighth copper block is connected to the holes in all the test holes;
  • the second to seventh copper layers are respectively provided with a second copper strip E2 corresponding to the first through hole group, and a third copper strip E3... seventh
  • the copper strip E7, the width of the narrowest portion of the copper strip on the six test blocks is set to 0.075 mm, 0.1 mm, 0.127 mm, 0.15 mm, 0.178 mm, and 0.2 mm, respectively.
  • Different copper strip widths can be designed according to different copper thicknesses in the inner layer, because the width of the copper strip is used to verify the inner layer etching ability, and the inner inner layer is thick and the etching bite amount is different.
  • the portions of the second to seventh copper strips between each row of test holes in the first via group respectively form a copper bridge F; the minimum distance between adjacent copper bridges F on the same copper strip is 0.1 mm.
  • the second to seventh copper strips are all curved around the upper and lower sides of each row of the test holes in the first through hole group, and form a ring-shaped copper-free region G corresponding to each of the test holes on the second to seventh copper layers;
  • the width of the annular copper-free zone on the test block was set to 0.075 mm, 0.1 mm, 0.127 mm, 0.15 mm, 0.178 mm, and 0.2 mm, respectively.
  • One ends of the second to seventh copper strips are connected to the first connecting holes, the other ends are respectively connected to the second to seventh connecting holes, and the other end of the second copper strip is connected with the second connecting holes, the third copper strip is The other end is connected to the third connection hole, and so on.
  • the first and eighth copper layers are provided with copper ring H for all the connecting holes in the second through hole group; the second to seventh copper layers
  • the first connection hole is provided with a copper hole ring H; the second to seventh copper layers are respectively provided with a copper hole ring H corresponding to the second to seventh connection holes, and the second copper layer is corresponding to the second connection hole.
  • There is a copper hole ring a copper hole ring is arranged corresponding to the third connection hole on the third copper layer, and so on; the copper hole ring is connected with the hole in the corresponding connection hole; the two ends of the second to seventh copper bands respectively correspond to Two copper hole rings H disposed in the copper layer are connected.
  • the multi-function circuit board detecting module mentioned in the above embodiment is used for detecting, the following test items are performed on the completed multi-function circuit board detecting module after the inner layer, the pressing, and the drilling process are completed:
  • Each test block is tested separately, and the second to seventh copper strips in each test block are sequentially tested for conduction, specifically, whether the first connection hole and the other connection holes are electrically connected, and if there is no conduction, Then, it is determined that the etching process is excessive during the inner layer process, and the excessive etching amount is determined by combining the test results of the different test blocks and the width of the narrowest portion of the copper strip on each test block;
  • Each test block is tested separately, and the second to seventh copper layers in each test block are sequentially tested for conduction, specifically, whether the second to seventh connection holes are turned on, and if there is conduction, Then, it is determined that a layer bias is generated during the pressing; if any two copper layers in the second to seventh copper layers are turned on, it can be determined that the layer bias occurs between the two copper layers and combined with the test of different test blocks. Results and the width of the annular copper-free zone on each test block If any two copper layers in the second to seventh copper layers are turned on, it can be determined that all copper layers are layer-biased, and the test results of different test blocks are combined with the width of the annular copper-free region on each test block. The offset of each layer is determined.
  • the hole deviation during drilling is determined, and the offset of the hole deviation is determined by combining the test results of different test blocks and the width of the upper annular copper-free region on each test block.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

一种多功能线路板检测模块的检测方法包括分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜带是否导通，具体是检测第一连接孔与其它连接孔之间是否导通，若有不导通，则判定在进行内层工序时蚀刻过度，并结合不同测试块的测试结果及各测试块上铜带最窄处的宽度判定过度蚀刻量；分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜层之间是否导通，具体是检测第二至第N-1连接孔之间是否导通，若有导通，则判定在压合时产生层偏；若所有铜层均出现导通，则判定钻孔时孔偏，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定孔偏的偏移量。针对内层、压合、钻孔的工艺控制要求设计测试块，可对内层工序中的蚀刻量、压合工序中的层偏、钻孔工序中的孔偏进行判断，从而在线路板产品正式制作前提供可靠的参考，进行工程资料和工艺实施的调整，提高制程能力和产品质量。

Description

一种多功能线路板检测模块及检测方法 技术领域
本发明涉及线路板工艺领域，尤其涉及一种多功能线路板检测模块及检测方法。
背景技术
在PCB生产过程中，各个工序的实际工作能力(制程能力)的高低已成为PCB企业的核心竞争力，制程能力的提升也是企业发展的需求；如何有效监控制作过程中各个工序的制程能力，为提升制程能力提供参考依据，成为PCB企业重点解决的问题，尤其是多层板(六层以上)内层涨缩、内层蚀刻能力、压合涨缩、压合层偏、钻孔涨缩、钻孔孔偏等问题，出现不良会直接影响产品功能。
发明内容
针对上述问题，本发明提供一种多功能线路板检测模块，包括PCB测试板，所述PCB测试板为多层线路板，包括从上至下依次设置的第一至第N铜层，共计N层铜层，N为大于6的偶数；
PCB测试板上设有一个或多个测试块，所述测试块包括第一通孔组和第二通孔组，所述第一通孔组包括6～12个排列成3行的测试孔，所述测试孔为孔径相同的通孔；第二通孔组包括第一连接孔至第N-1连接孔，共计N-1个连接孔，所述连接孔为孔径相同的通孔；所述测试孔和连接孔内均设有孔铜；
第一铜层上设有与第一通孔组对应的第一铺铜块；第N铜层上设有与第一通孔组对应的第N铺铜块；所述第一和第N铺铜块与所有测 试孔内的孔铜连接；
所述第二至第N-1铜层上分别依次设有与第一通孔组对应的第二至第N-1铜带，共计N-2个铜带，第二铜层上设有与第一通孔组对应的第二铜带，第三铜层上设有与第一通孔组对应的第三铜带，依次类推；同一测试块内铜带最窄处的宽度相同；所述第二至第N-1铜带均沿第一通孔组内每行测试孔的上下侧弯曲环绕，并分别在第二至第N-1铜层上对应每个测试孔形成环形无铜区；同一测试块内的环形无铜区的宽度相同；所述第二至第N-1铜带的一端均与第一连接孔连接，另一端分别依次与第二至第N-1连接孔连接，第二铜带的另一端与第二连接孔连接，第三铜带的另一端与第三连接孔连接，依次类推。
优选的，第一和第N铜层上对应第二通孔组内的所有连接孔设有铜孔环；所述第二至第N-1铜层上均对应第一连接孔设有铜孔环；第二至第N-1铜层上分别依次对应第二至第N-1连接孔设有铜孔环，第二铜层上对应第二连接孔设有铜孔环，第三铜层上对应第三连接孔设有铜孔环，依次类推；所述铜孔环与相应连接孔内的孔铜连接；所述第二至第N-1铜带的两端分别与对应铜层内设置的两个铜孔环连接。
优选的，所述第二至第N-1铜带上位于第一通孔组内每行测试孔之间的部分分别形成铜桥；同一铜带上相邻铜桥间的最小距离大于或等于0.1mm。
进一步的，依据权利要求1至3任一所述多功能线路板检测模块，其特征在于：相邻连接孔的孔间距为1.0～1.1mm；测试孔和连接孔的孔径均为0.2mm；测试孔和连接孔之间的距离大于1mm。
进一步的，所述第一通孔组包括9个排列成3行的测试孔。
进一步的，PCB测试板上设有六个测试块。
进一步的，所述六个测试块上环形无铜区的宽度分别为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。。
进一步的，所述六个测试块上铜带最窄处的宽度分别为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。
本发明还提供一种使用多功能线路板检测模块的检测方法，包括，对完成内层、压合、钻孔工序后的制成的多功能线路板检测模块，进行下列测试项目：
分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜带是否导通，具体是检测第一连接孔与其它连接孔之间是否导通，若有不导通，则判定进行内层工序时蚀刻过度，并结合不同测试块的测试结果及各测试块上铜带最窄处的宽度判定过度蚀刻量；
分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜层之间是否导通，具体是检测第二至第N-1连接孔之间是否导通，若有导通，则判定在压合时产生层偏；若所有铜层均出现导通，则判定钻孔时孔偏，并结合不同测试块的测试结果及各测试块上上环形无铜区的宽度判定孔偏的偏移量。
优选的，依次测试每个测试块内第二至第N-1铜层之间是否导通时，如果出现第二至第N-1铜层内任意两个铜层导通，则可以判定层偏发生在这两个铜层之间，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定层偏的偏移量；
如果出现第二至第N-1铜层内任意多个铜层导通，则可以判定所有铜层均出现层偏，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定各铜层层偏的偏移量
本发明针对内层、压合、钻孔的工艺控制要求设计测试块，可方便快捷的对内层工序中的蚀刻量、压合工序中的层偏、钻孔工序中的孔偏进行判断，从而在线路板产品正式制作前提供可靠的参考，从而进行工程资料和工艺实施的调整，提高制程能力，从而提高产品质量。
附图说明
图1是多功能线路板检测模块实施例结构示意图。
图2是多功能线路板检测模块实施例第一铜层中测试块示意图。
图3是多功能线路板检测模块实施例第二铜层中测试块示意图。
图4是多功能线路板检测模块实施例第三铜层中测试块示意图。
图5是多功能线路板检测模块实施例第四铜层中测试块示意图。
图6是多功能线路板检测模块实施例第五铜层中测试块示意图。
图7是多功能线路板检测模块实施例第六铜层中测试块示意图。
图8是多功能线路板检测模块实施例第七铜层中测试块示意图。
图9是多功能线路板检测模块实施例第八铜层中测试块示意图。
具体实施方式
为方便本领域的技术人员了解本发明的技术内容，下面结合附图及实施例对本发明做进一步的详细说明。
如图1所示一种多功能线路板检测模块，包括PCB测试板1，所述PCB测试板为多层线路板，包括从上至下依次设置的第一铜层L1、第 二铜层L2…第八铜层L8，共计8层铜层；
PCB测试板1上设有六个测试块2，其中一个测试块如图2至9所示，每个测试块均包括第一通孔组A1和第二通孔组A2，第一通孔组A1包括9个排列成3行的测试孔B；第二通孔组A2包括第一连接孔C1、第二连接孔C2…第七连接孔C7，共计七个连接孔，测试孔和连接孔均为孔径相同的通孔，且孔内均设有孔铜。相邻连接孔的孔间距为1.1mm；测试孔和连接孔的孔径均为0.2mm；测试孔和连接孔之间的距离大于1mm。
第一铜层L1上设有与第一通孔组A1对应的第一铺铜块D1；第八铜层L8上设有与第一通孔组A1对应的第八铺铜块D8；第一和第八铺铜块与所有测试孔内的孔铜连接；第二至第七铜层上分别依次设有与第一通孔组对应的第二铜带E2、第三铜带E3…第七铜带E7，六个测试块上铜带最窄处的宽度分别设置为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。可依据内层不同铜厚，设计不同的铜带宽度，因为铜带的宽度是用于验证内层蚀刻的能力，不同内层铜厚，蚀刻咬蚀量不一样。
第二至第七铜带上位于第一通孔组内每行测试孔之间的部分分别形成铜桥F；同一铜带上相邻铜桥F间的最小距离为0.1mm。
第二至第七铜带均沿第一通孔组内每行测试孔的上下侧弯曲环绕，并分别在第二至第七铜层上对应每个测试孔形成环形无铜区G；六个测试块上环形无铜区的宽度分别设置为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。
第二至第七铜带的一端均与第一连接孔连接，另一端分别依次与第二至第七连接孔连接，第二铜带的另一端与第二连接孔连接，第三铜带的另一端与第三连接孔连接，依次类推。
为便于铜带和相应连接孔的连接可靠及测试时方便快捷，第一和第八铜层上对应第二通孔组内的所有连接孔设有铜孔环H；第二至第七铜层上均对应第一连接孔设有铜孔环H；第二至第七铜层上分别依次对应第二至第七连接孔设有铜孔环H，第二铜层上对应第二连接孔设有铜孔环，第三铜层上对应第三连接孔设有铜孔环，依次类推；铜孔环与相应连接孔内的孔铜连接；第二至第七铜带的两端分别与对应铜层内设置的两个铜孔环H连接。
在利用上述实施例中提及的多功能线路板检测模块进行检测时，对完成内层、压合、钻孔工序后的制成的多功能线路板检测模块，进行下列测试项目：
分别对每个测试块进行测试，依次测试每个测试块内第二至第七铜带是否导通，具体是检测第一连接孔与其它连接孔之间是否导通，若有不导通，则判定进行内层工序时蚀刻过度，并结合不同测试块的测试结果及各测试块上铜带最窄处的宽度判定过度蚀刻量；
分别对每个测试块进行测试，依次测试每个测试块内第二至第七铜层之间是否导通，具体是检测第二至第七连接孔之间是否导通，若有导通，则判定在压合时产生层偏；如果出现第二至第七铜层内任意两个铜层导通，则可以判定层偏发生在这两个铜层之间，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定层偏的偏移 量；如果出现第二至第七铜层内任意多个铜层导通，则可以判定所有铜层均出现层偏，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定各层层偏的偏移量。
若所有铜层均出现导通，则判定钻孔时孔偏，并结合不同测试块的测试结果及各测试块上上环形无铜区的宽度判定孔偏的偏移量。
以上为本发明的具体实现方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些显而易见的替换形式均属于本发明的保护范围。

Claims (8)

  1. 一种多功能线路板检测模块，其特征在于：
    包括PCB测试板，所述PCB测试板为多层线路板，包括从上至下依次设置的第一至第N铜层，共计N层铜层，N为大于6的偶数；PCB测试板上设有一个或多个测试块，所述测试块包括第一通孔组和第二通孔组，所述第一通孔组包括6～12个排列成3行的测试孔，所述测试孔为孔径相同的通孔；第二通孔组包括第一连接孔至第N-1连接孔，共计N-1个连接孔，所述连接孔为孔径相同的通孔；所述测试孔和连接孔内均设有孔铜；
    第一铜层上设有与第一通孔组对应的第一铺铜块；第N铜层上设有与第一通孔组对应的第N铺铜块；所述第一和第N铺铜块与所有测试孔内的孔铜连接；
    所述第二至第N-1铜层上分别依次设有与第一通孔组对应的第二至第N-1铜带，共计N-2个铜带，第二铜层上设有与第一通孔组对应的第二铜带，第三铜层上设有与第一通孔组对应的第三铜带，依次类推；同一测试块内铜带最窄处的宽度相同；所述第二至第N-1铜带均沿第一通孔组内每行测试孔的上下侧弯曲环绕，并分别在第二至第N-1铜层上对应每个测试孔形成环形无铜区；同一测试块内的环形无铜区的宽度相同；所述第二至第N-1铜带的一端均与第一连接孔连接，另一端分别依次与第二至第N-1连接孔连接，第二铜带的另一端与第二连接孔连接，第三铜带的另一端与第三连接孔连接，依次类推。
  2. 依据权利要求1所述多功能线路板检测模块，其特征在于：第一和第N铜层上对应第二通孔组内的所有连接孔设有铜孔环；所述第二 至第N-1铜层上均对应第一连接孔设有铜孔环；第二至第N-1铜层上分别依次对应第二至第N-1连接孔设有铜孔环，第二铜层上对应第二连接孔设有铜孔环，第三铜层上对应第三连接孔设有铜孔环，依次类推；所述铜孔环与相应连接孔内的孔铜连接；所述第二至第N-1铜带的两端分别与对应铜层内设置的两个铜孔环连接。
  3. 依据权利要求1所述多功能线路板检测模块，其特征在于：所述第二至第N-1铜带上位于第一通孔组内每行测试孔之间的部分分别形成铜桥；同一铜带上相邻铜桥间的最小距离大于或等于0.1mm。
  4. 依据权利要求1至3任一所述多功能线路板检测模块，其特征在于：相邻连接孔的孔间距为1.0～1.1mm；测试孔和连接孔的孔径均为0.2mm；测试孔和连接孔之间的距离大于1mm。
  5. 依据权利要求1至3任一所述多功能线路板检测模块，其特征在于：所述第一通孔组包括9个排列成3行的测试孔。
  6. 依据权利要求1至3任一所述多功能线路板检测模块，其特征在于：PCB测试板上设有六个测试块。
  7. 依据权利要求6所述多功能线路板检测模块，其特征在于：所述六个测试块上环形无铜区的宽度分别为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。8.依据权利要求6所述多功能线路板检测模块，其特征在于：所述六个测试块上铜带最窄处的宽度分别为0.075mm、0.1mm、0.127mm、0.15mm、0.178mm、0.2mm。9.一种使用多功能线路板检测模块的检测方法，包括，
    对完成内层、压合、钻孔工序后的制成的多功能线路板检测模块，进 行下列测试项目：
    分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜带是否导通，具体是检测第一连接孔与其它连接孔之间是否导通，若有不导通，则判定在进行内层工序时蚀刻过度，并结合不同测试块的测试结果及各测试块上铜带最窄处的宽度判定过度蚀刻量；
    分别对每个测试块进行测试，依次测试每个测试块内第二至第N-1铜层之间是否导通，具体是检测第二至第N-1连接孔之间是否导通，若有导通，则判定在压合时产生层偏；若所有铜层均出现导通，则判定钻孔时孔偏，并结合不同测试块的测试结果及各测试块上上环形无铜区的宽度判定孔偏的偏移量。
  8. 依据权利要求9所述使用多功能线路板检测模块的检测方法，其特征在于：
    依次测试每个测试块内第二至第N-1铜层之间是否导通时，如果出现第二至第N-1铜层内任意两个铜层导通，则可以判定层偏发生在这两个铜层之间，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定层偏的偏移量；
    如果出现第二至第N-1铜层内任意多个铜层导通，则可以判定所有铜层均出现层偏，并结合不同测试块的测试结果及各测试块上环形无铜区的宽度判定各铜层层偏的偏移量。
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