WO2019000761A1 - Power component having stable switching performance - Google Patents

Power component having stable switching performance Download PDF

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Publication number
WO2019000761A1
WO2019000761A1 PCT/CN2017/108954 CN2017108954W WO2019000761A1 WO 2019000761 A1 WO2019000761 A1 WO 2019000761A1 CN 2017108954 W CN2017108954 W CN 2017108954W WO 2019000761 A1 WO2019000761 A1 WO 2019000761A1
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gate
region
disposed
conductivity type
metal
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PCT/CN2017/108954
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French (fr)
Chinese (zh)
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曹峰
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苏州美天网络科技有限公司
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Publication of WO2019000761A1 publication Critical patent/WO2019000761A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Definitions

  • the invention belongs to the field of semiconductor technology, and in particular relates to a power device with stable switching performance.
  • Power devices include power ICs and power discrete devices.
  • Power discrete devices mainly include semiconductor devices such as power MOSFETs, high-power transistors, and IGBTs.
  • Power devices are used in almost all electronic manufacturing industries, including notebooks and PCs in the computer field. , servers, displays and various peripherals; mobile phones, telephones and other various terminal and central office equipment in the field of network communication; traditional black and white household appliances and various digital products in the field of consumer electronics; industrial PCs in industrial control, various types Instrumentation and various control equipment.
  • power devices can also effectively save energy. Due to the demand for electronic products and the continuous improvement of energy efficiency requirements, the Chinese power device market has maintained a relatively fast development speed.
  • Power semiconductor devices are an important part of power electronic circuits.
  • An ideal power semiconductor device should have good static and dynamic characteristics. It can withstand high voltage and leakage current in the off state, and can flow through in the on state. High current and very low tube voltage drop have short on and off times during switching, and on-state loss, off-state loss and switching loss are small. At the same time, it can withstand high di/dt and du/dt and has full control function.
  • the existing power devices have extremely fast switching characteristics to achieve higher power conversion efficiency, but during the disconnection and closing of the power device, the gate is prone to oscillation, which causes the switching state of the power device to be instantaneously uncontrollable, and the power device is prone to error.
  • the action reduces the switching stability of the power device.
  • the present invention proposes a power device with stable switching performance, and a shunt circuit is arranged at the gate of the device.
  • a shunt circuit is arranged at the gate of the device.
  • a power device having stable switching performance including:
  • a substrate of a first conductivity type having a drain of a device of a MOS power device at a bottom end thereof, and an epitaxial layer of a first conductivity type disposed at an upper end of the substrate;
  • a body region of a second conductivity type disposed at an upper portion of the channel and the epitaxial layer, wherein the body region covers at least an upper end of two adjacent channels to form an adjacent body region, wherein the body region a device source of a first conductivity type is disposed, and an upper end of the adjacent body region is configured with a device gate;
  • first independent channels, second independent channels and third independent channels not covered by the body regions are present in the channel, and the first independent channel is disposed with a first metal at an upper portion thereof
  • An oxide semiconductor field effect transistor, a second metal-oxide semiconductor field effect transistor is disposed on the upper portion of the second independent channel, and an upper resistor and a second resistor are disposed on the upper end of the epitaxial layer, and the gate terminal of the device is connected a gate metal pad, the second resistor is connected between the gate metal pad and the device gate, a first drain of the first metal-oxide semiconductor field effect transistor and the device gate Connecting, the first source of the first metal-oxide semiconductor field effect transistor is connected to the device source through the first resistor, and the first gate of the first metal-oxide semiconductor field effect transistor a second gate and a second drain of the second metal-oxide semiconductor field effect transistor are simultaneously connected to the gate metal pad, and the second source and the second metal-oxide semiconductor field effect transistor The device sources are connected in common.
  • the upper end of the epitaxial layer is further insulated and disposed with a third resistor connected between the gate metal pad and the first gate.
  • an upper portion of the third independent channel is configured with a PN junction, a cathode of the PN junction is connected to the gate metal pad, and an anode of the PN junction is connected to a control end of the device gate.
  • an upper portion of the first independent channel is disposed with a first source region of a first conductivity type and a first drain region, and an upper end of the first source region is provided with the first source, the first The first drain is disposed at an upper end of the drain region, and the first gate is disposed at an upper end of the first source region and the first drain region.
  • an upper portion of the second independent channel is disposed with a second source region and a second drain region of a first conductivity type, and an upper end of the second source region is disposed with the second source, the second The second drain is disposed at an upper end of the drain region, and the second gate is disposed at an upper end of the second source region and the second drain region.
  • the upper portion of the third independent channel is provided with a base region of a first conductivity type, the upper portion of which is disposed with a first region of a second conductivity type, and the upper portion of the base region is disposed with a second region of a first conductivity type .
  • the first conductivity type is an N type
  • the second conductivity type is a P type
  • the first area is an anode of the PN junction
  • the second area is a cathode of the PN junction.
  • the first conductivity type is a P type
  • the second conductivity type is an N type
  • the second area is an anode of the PN junction
  • the first area is a cathode of the PN junction.
  • the first metal-oxide semiconductor field effect transistor is at least two, and each of the first metal-oxide semiconductor field effect transistors is independently disposed in one of the first independent channels, each of the first metal- Each of the first gates of the oxide semiconductor field effect transistor is connected in parallel, each of the first drains is connected in parallel, and each of the first sources is connected in parallel.
  • the device gate is a split gate or a full gate.
  • a power device with stable switching performance proposed by the invention has faster switching speed and larger switching capacity
  • the switching stability of the power device is stronger, no malfunction occurs, and the reliability is improved.
  • Figure 1 is a cross-sectional view of a power device with stable switching performance
  • FIG. 2 is a top plan view of a power device with stable switching performance
  • Figure 3 is a partially enlarged schematic view of Figure 2.
  • the schematic diagrams in the drawings of the specification enlarge the thickness of the layers and regions of the present invention, and the size of the listed figures does not represent the actual size; The scope of the invention should not be limited.
  • the embodiments listed in the specification should not be limited to the specific shapes of the regions shown in the drawings of the specification, but include the resulting shapes such as manufacturing-induced deviations, etc., such as the curves obtained by etching generally have the characteristics of being curved or rounded. In the embodiments of the present invention, they are all represented by rectangles.
  • the power device with stable switching performance proposed by the present invention includes:
  • the first conductivity type substrate 700 has a device drain of a MOS power device disposed at a bottom end thereof, and an epitaxial layer 200 of a first conductivity type is disposed at an upper end of the substrate 700, and the material of the substrate epitaxial layer 200 is preferably silicon. But not limited to silicon;
  • the second conductivity type channel 100 is disposed in the epitaxial layer at intervals. As shown in FIG. 1 , only six channels 100 are shown in this embodiment, and the number thereof may be determined according to specific product design requirements.
  • the channel 100 is flush with the upper end of the epitaxial layer 200;
  • the body region 300 of the second conductivity type is disposed on the upper portion of the channel 100 and the epitaxial layer 200. Specifically, the body region 300 of the second conductivity type covers an upper portion of the plurality of channels 100 so that the second conductive portion is finally The body region 300 of the type is flush with the upper end of the epitaxial layer 200, wherein the body region 300 covers at least the upper ends of the two adjacent channels 100 to form adjacent body regions, and the body region is configured with the first a conductive device source 310, the upper end between the adjacent body regions is provided with a device gate 500, thereby constituting a MOS power device;
  • first independent channels not covered by the body region exist in the channel 100 110, a second independent channel 120 and a third independent channel 130
  • a first metal-oxide semiconductor field effect transistor is disposed on an upper portion of the first independent channel 110, and an upper portion is disposed on an upper portion of the second independent channel 120 a second metal-oxide semiconductor field effect transistor
  • the upper end of the epitaxial layer 200 is insulated and configured with a first resistor 610 and a second resistor 620
  • the device gate 500 end is connected to the gate metal pad
  • the second resistor 620 is connected Between the gate metal pad and the device gate 500, a first drain 115 of the first metal-oxide semiconductor field effect transistor is connected to the device gate 500, the first metal-oxidation
  • the first source 113 of the semiconductor field effect transistor is connected to the device source 310 through the first resistor 610, and the first gate 114 and the second metal of the first metal-oxide semiconductor field effect transistor
  • the second gate 124 and the second drain 620 of the oxide semiconductor field effect transistor are
  • the first gate When the power device is turned off, the first gate has an oscillating voltage, and when the oscillating voltage is too high, the first metal-oxide semiconductor FET and the second metal-oxide semiconductor FET are diverted to the device source.
  • the first resistor and the second resistor effectively slow down the absorption of the high voltage, avoiding the gate voltage oscillation, and when the voltage of the gate of the device is at a normal voltage value, the two metal-oxide semiconductor FETs are turned off, and the current does not pass through the metal.
  • the oxide semiconductor field effect tube conducts, and does not consume through the first resistor, thereby reducing the loss of the power device, improving the switching capacity of the power device, effectively eliminating the gate voltage oscillation, the stability of the power device switch, and improving Power device reliability, faster switching speed and higher switching capacity.
  • the device gates 500 are all gated gates, that is, the device gates are independently disposed at the upper end of each body region, and no adjacent body regions are connected; or the device gates 500 are Is the full gate gate.
  • an insulating film 400 is formed on the upper surface of the power device, a conductive film is formed on the insulating film 400, the conductive film and the insulating film are etched, and the remaining conductive film becomes the a device gate, a first gate, a second gate, and a first resistor and a second resistor, and a third resistor 630 is further formed on the conductive film, and is connected to the gate metal pad and the first Between the gates 114.
  • a PN junction is disposed on an upper portion of the third independent channel 130, a cathode of the PN junction is connected to the gate metal pad, and an anode of the PN junction and a gate of the device are controlled. End connection.
  • the upper portion of the first independent channel 110 is spaced apart from the first source region 112 and the first drain region 111 of the first conductivity type, as shown in FIGS. 2 and 3, the first source region
  • the first source 113 is disposed at an upper end of the first drain region 111
  • the first drain electrode is disposed at an upper end of the first drain region 111
  • the first gate region is disposed at an upper end of the first drain region and the first drain region 114.
  • An upper portion of the second independent channel 120 is disposed with a second source region 122 and a second drain region 121 of a first conductivity type, and an upper end of the second source region 122 is disposed with the second source electrode 123.
  • the second drain electrode 125 is disposed at an upper end of the second drain region 121, and the second gate electrode 124 is disposed at an upper end of the second source region and the second drain region.
  • the upper portion of the third independent channel 130 is provided with a first conductive type base region 131, and the upper portion thereof is provided with a second conductive type first region 132, and the upper portion of the base region 131 is disposed with a first portion A second region 133 of a conductivity type.
  • the first conductivity type is an N type
  • the second conductivity type is a P type
  • the first area is an anode of the PN junction
  • the second area is the PN junction cathode.
  • the first conductivity type is a P type
  • the second conductivity type is an N type
  • the second area is an anode of the PN junction
  • the first area is the PN junction cathode.
  • the first metal-oxide semiconductor field effect transistor is at least two, and each of the first metal-oxide semiconductor field effect transistors is independently disposed in one of the first independent channels, each of which is Each of the first gates of a metal-oxide semiconductor field effect transistor is connected in parallel, each of the first drains is connected in parallel, and each of the first sources is connected in parallel to enhance the diversion effect of the first gate overvoltage, thereby further reducing gate voltage oscillation. Stabilize the breaking characteristics of power devices.
  • the power device with stable switching performance proposed by the present invention has a faster switching speed and a larger switching capacity. At the same time, the switching stability of the power device is stronger, no malfunction occurs, and reliability is improved.

Abstract

A power component having stable switching performance, comprising: a substrate (700) having a first conductivity, a bottom end thereof being provided with a drain of the component, and an upper end of the substrate being provided with an epitaxial layer (200); channels (100) having a second conductivity and body regions (300) having the second conductivity, the body regions being provided therein with sources (310) of the component and gates (500) of the component; a first independent channel (110), a second independent channel (120) and a third independent channel (130) are present among the channels; an upper portion of the first independent channel (110) is provided with a first metal-oxide semiconductor field effect transistor; an upper portion of the second independent channel (120) is provided with a second metal-oxide semiconductor field effect transistor; an upper end of the epitaxial layer (200) is insulatedly provided with a first resistor (610) and a second resistor (620); the first and second metal-oxide semiconductor field effect transistors are connected as a flow guide loop in the power component. The power component has the technical effect of stable switching performance.

Description

开关性能稳定的功率器件Power device with stable switching performance 技术领域Technical field
本发明属于半导体技术领域,特别是涉及一种开关性能稳定的功率器件。The invention belongs to the field of semiconductor technology, and in particular relates to a power device with stable switching performance.
背景技术Background technique
功率器件包括功率IC和功率分立器件,功率分立器件则主要包括功率MOSFET、大功率晶体管和IGBT等半导体器件,功率器件几乎用于所有的电子制造业,所应用的产品包括计算机领域的笔记本、PC、服务器、显示器以及各种外设;网络通信领域的手机、电话以及其它各种终端和局端设备;消费电子领域的传统黑白家电和各种数码产品;工业控制类中的工业PC、各类仪器仪表和各类控制设备等。除了保证这些设备的正常运行以外,功率器件还能起到有效的节能作用。由于电子产品的需求以及能效要求的不断提高,中国功率器件市场一直保持较快的发展速度。Power devices include power ICs and power discrete devices. Power discrete devices mainly include semiconductor devices such as power MOSFETs, high-power transistors, and IGBTs. Power devices are used in almost all electronic manufacturing industries, including notebooks and PCs in the computer field. , servers, displays and various peripherals; mobile phones, telephones and other various terminal and central office equipment in the field of network communication; traditional black and white household appliances and various digital products in the field of consumer electronics; industrial PCs in industrial control, various types Instrumentation and various control equipment. In addition to ensuring the normal operation of these devices, power devices can also effectively save energy. Due to the demand for electronic products and the continuous improvement of energy efficiency requirements, the Chinese power device market has maintained a relatively fast development speed.
功率半导体器件是电力电子电路的重要组成部分,一个理想的功率半导体器件应该具有好的静态和动态特性,在截止状态时能承受高电压且漏电流要小,在导通状态时,能流过大电流和很低的管压降,在开关转换时,具有短的开、关时间;通态损耗、断态损耗和开关损耗均要小。同时能承受高的di/dt和du/dt以及具有全控功能。Power semiconductor devices are an important part of power electronic circuits. An ideal power semiconductor device should have good static and dynamic characteristics. It can withstand high voltage and leakage current in the off state, and can flow through in the on state. High current and very low tube voltage drop have short on and off times during switching, and on-state loss, off-state loss and switching loss are small. At the same time, it can withstand high di/dt and du/dt and has full control function.
现有的功率器件具有极快的开关特性,实现更高的功率转换效率,但在功率器件断开和闭合过程中,栅极易产生震荡,导致功率器件开关状态瞬时不可控,功率器件容易误动作,降低了功率器件的开关稳定性。The existing power devices have extremely fast switching characteristics to achieve higher power conversion efficiency, but during the disconnection and closing of the power device, the gate is prone to oscillation, which causes the switching state of the power device to be instantaneously uncontrollable, and the power device is prone to error. The action reduces the switching stability of the power device.
发明内容Summary of the invention
针对上述技术问题,本发明中提出了一种开关性能稳定的功率器件,在器件栅极设置有分流电路,当功率器件的栅电压震荡过大时,电压通过分流电路导流,避免栅电压震荡,解决了功率器件开关性能不稳定的技术问题。 Aiming at the above technical problem, the present invention proposes a power device with stable switching performance, and a shunt circuit is arranged at the gate of the device. When the gate voltage of the power device is excessively oscillated, the voltage is diverted through the shunt circuit to avoid the gate voltage oscillation. The technical problem of unstable switching performance of the power device is solved.
为了实现根据本发明的这些目的和其它优点,提供了一种开关性能稳定的功率器件,包括:In order to achieve these and other advantages in accordance with the present invention, a power device having stable switching performance is provided, including:
第一导电型的衬底,其底端配置有MOS功率器件的器件漏极,所述衬底上端配置有第一导电型的外延层;a substrate of a first conductivity type having a drain of a device of a MOS power device at a bottom end thereof, and an epitaxial layer of a first conductivity type disposed at an upper end of the substrate;
第二导电型的沟道,其间隔配置在所述外延层中;a second conductivity type channel disposed at intervals in the epitaxial layer;
第二导电型的体区,其配置在所述沟道和外延层上部,其中,所述体区至少覆盖在两个相邻所述沟道的上端形成相邻体区,所述体区内配置有第一导电型的器件源极,所述相邻体区之间的上端配置有器件栅极;a body region of a second conductivity type disposed at an upper portion of the channel and the epitaxial layer, wherein the body region covers at least an upper end of two adjacent channels to form an adjacent body region, wherein the body region a device source of a first conductivity type is disposed, and an upper end of the adjacent body region is configured with a device gate;
其中,所述沟道中至少存在三个未被所述体区覆盖的第一独立沟道、第二独立沟道以及第三独立沟道,所述第一独立沟道上部配置有第一金属-氧化物半导体场效应管,所述第二独立沟道上部配置有第二金属-氧化物半导体场效应管,所述外延层上端绝缘配置有第一电阻和第二电阻,所述器件栅极端连接栅极金属垫,所述第二电阻连接在所述栅极金属垫和所述器件栅极之间,所述第一金属-氧化物半导体场效应管的第一漏极与所述器件栅极连接,所述第一金属-氧化物半导体场效应管的第一源极通过所述第一电阻与所述器件源极共接,所述第一金属-氧化物半导体场效应管的第一栅极、第二金属-氧化物半导体场效应管的第二栅极和第二漏极同时共接在栅极金属垫上,所述第二金属-氧化物半导体场效应管的第二源极与所述器件源极共接。Wherein at least three first independent channels, second independent channels and third independent channels not covered by the body regions are present in the channel, and the first independent channel is disposed with a first metal at an upper portion thereof An oxide semiconductor field effect transistor, a second metal-oxide semiconductor field effect transistor is disposed on the upper portion of the second independent channel, and an upper resistor and a second resistor are disposed on the upper end of the epitaxial layer, and the gate terminal of the device is connected a gate metal pad, the second resistor is connected between the gate metal pad and the device gate, a first drain of the first metal-oxide semiconductor field effect transistor and the device gate Connecting, the first source of the first metal-oxide semiconductor field effect transistor is connected to the device source through the first resistor, and the first gate of the first metal-oxide semiconductor field effect transistor a second gate and a second drain of the second metal-oxide semiconductor field effect transistor are simultaneously connected to the gate metal pad, and the second source and the second metal-oxide semiconductor field effect transistor The device sources are connected in common.
优选的,所述外延层上端还绝缘配置有第三电阻,其连接在所述栅极金属垫与所述第一栅极之间。Preferably, the upper end of the epitaxial layer is further insulated and disposed with a third resistor connected between the gate metal pad and the first gate.
优选的,所述第三独立沟道上部配置有PN结,所述PN结的阴极与所述栅极金属垫连接,所述PN结的阳极极与所述器件栅极的控制端连接。Preferably, an upper portion of the third independent channel is configured with a PN junction, a cathode of the PN junction is connected to the gate metal pad, and an anode of the PN junction is connected to a control end of the device gate.
优选的,所述第一独立沟道的上部间隔配置有第一导电型的第一源区和第一漏区,所述第一源区上端设置有所述第一源极,所述第一漏区上端设置有所述第一漏极,所述第一源区和第一漏区上端配置有所述第一栅极。 Preferably, an upper portion of the first independent channel is disposed with a first source region of a first conductivity type and a first drain region, and an upper end of the first source region is provided with the first source, the first The first drain is disposed at an upper end of the drain region, and the first gate is disposed at an upper end of the first source region and the first drain region.
优选的,所述第二独立沟道的上部间隔配置有第一导电型的第二源区和第二漏区,所述第二源区上端设置有所述第二源极,所述第二漏区上端设置有所述第二漏极,所述第二源区和第二漏区上端配置有所述第二栅极。Preferably, an upper portion of the second independent channel is disposed with a second source region and a second drain region of a first conductivity type, and an upper end of the second source region is disposed with the second source, the second The second drain is disposed at an upper end of the drain region, and the second gate is disposed at an upper end of the second source region and the second drain region.
优选的,所述第三独立沟道的上部配置有第一导电型的基区,其上部配置有第二导电型的第一区,所述基区上端配置有第一导电型的第二区。Preferably, the upper portion of the third independent channel is provided with a base region of a first conductivity type, the upper portion of which is disposed with a first region of a second conductivity type, and the upper portion of the base region is disposed with a second region of a first conductivity type .
优选的,所述第一导电型为N型,所述第二导电型为P型,所述第一区为所述PN结的阳极,所述第二区为所述PN结的阴极。Preferably, the first conductivity type is an N type, the second conductivity type is a P type, the first area is an anode of the PN junction, and the second area is a cathode of the PN junction.
优选的,所述第一导电型为P型,所述第二导电型为N型,所述第二区为所述PN结的阳极,所述第一区为所述PN结的阴极。Preferably, the first conductivity type is a P type, the second conductivity type is an N type, the second area is an anode of the PN junction, and the first area is a cathode of the PN junction.
优选的,所述第一金属-氧化物半导体场效应管至少为2个,每一个第一金属-氧化物半导体场效应管独立配置在一个所述第一独立沟道中,每一个第一金属-氧化物半导体场效应管的各个第一栅极并联、各个第一漏极并联、各个第一源极并联。Preferably, the first metal-oxide semiconductor field effect transistor is at least two, and each of the first metal-oxide semiconductor field effect transistors is independently disposed in one of the first independent channels, each of the first metal- Each of the first gates of the oxide semiconductor field effect transistor is connected in parallel, each of the first drains is connected in parallel, and each of the first sources is connected in parallel.
优选的,所述器件栅极为分栅栅极或全栅栅极。Preferably, the device gate is a split gate or a full gate.
本发明至少包括以下有益效果:The invention includes at least the following beneficial effects:
1、本发明提出的一种开关性能稳定的功率器件,开关速度更快,开关容量更大;1. A power device with stable switching performance proposed by the invention has faster switching speed and larger switching capacity;
2、功率器件的开关稳定性更强,不会产生误动作,提高了可靠性。2. The switching stability of the power device is stronger, no malfunction occurs, and the reliability is improved.
本发明的其它优点、目标和特征将部分通过下面的说明体现,部分还将通过对本发明的研究和实践而为本领域的技术人员所理解。Other advantages, objects, and features of the invention will be set forth in part in the description in the description which
附图说明DRAWINGS
图1是开关性能稳定的功率器件的剖视图;Figure 1 is a cross-sectional view of a power device with stable switching performance;
图2是开关性能稳定的功率器件的俯视图;2 is a top plan view of a power device with stable switching performance;
图3是图2中的局部放大示意图。 Figure 3 is a partially enlarged schematic view of Figure 2.
具体实施方式Detailed ways
下面结合附图对本发明做进一步的详细说明,以令本领域技术人员参照说明书文字能够据以实施。The present invention will be further described in detail below with reference to the accompanying drawings, so that those skilled in the art can refer
应当理解,本发明所使用的诸如“具有”、“包含”以及“包括”术语并不配出一个或多个其它元件或其组合的存在或添加。It is to be understood that the terms "having", "comprising" and "comprising" are used in the <RTIgt;
同时,为清楚地说明本发明的具体实施方式,说明书附图中所列示意图,放大了本发明所述的层和区域的厚度,且所列图形大小并不代表实际尺寸;说明书附图是示意性的,不应限定本发明的范围。说明书中所列实施例不应仅限于说明书附图中所示区域的特定形状,而是包括所得到的形状如制造引起的偏差等,如刻蚀得到的曲线通常具有弯曲或圆润的特点,在本发明实施例中均以矩形表示。Meanwhile, in order to clearly illustrate the specific embodiments of the present invention, the schematic diagrams in the drawings of the specification enlarge the thickness of the layers and regions of the present invention, and the size of the listed figures does not represent the actual size; The scope of the invention should not be limited. The embodiments listed in the specification should not be limited to the specific shapes of the regions shown in the drawings of the specification, but include the resulting shapes such as manufacturing-induced deviations, etc., such as the curves obtained by etching generally have the characteristics of being curved or rounded. In the embodiments of the present invention, they are all represented by rectangles.
如图1-3所示,本发明提出的开关性能稳定的功率器件,包括:As shown in FIG. 1-3, the power device with stable switching performance proposed by the present invention includes:
第一导电型的衬底700,其底端配置有MOS功率器件的器件漏极,所述衬底700上端配置有第一导电型的外延层200,衬底外延层200的材质优选为硅,但不局限于为硅;The first conductivity type substrate 700 has a device drain of a MOS power device disposed at a bottom end thereof, and an epitaxial layer 200 of a first conductivity type is disposed at an upper end of the substrate 700, and the material of the substrate epitaxial layer 200 is preferably silicon. But not limited to silicon;
第二导电型的沟道100,其间隔配置在所述外延层中,如图1所示,本实施例中仅示出了6个沟道100,其数量多少可根据具体产品设计要求确定,沟道100与外延层200的上端齐平;The second conductivity type channel 100 is disposed in the epitaxial layer at intervals. As shown in FIG. 1 , only six channels 100 are shown in this embodiment, and the number thereof may be determined according to specific product design requirements. The channel 100 is flush with the upper end of the epitaxial layer 200;
第二导电型的体区300,其配置在所述沟道100和外延层200上部,具体的,第二导电型的体区300覆盖设置在若干个沟道100的上部,使得最终第二导电型的体区300与外延层200的上端齐平,其中,所述体区300至少覆盖在两个相邻所述沟道100的上端形成相邻体区,所述体区内配置有第一导电型的器件源极310,所述相邻体区之间的上端配置有器件栅极500,从而构成了MOS功率器件;The body region 300 of the second conductivity type is disposed on the upper portion of the channel 100 and the epitaxial layer 200. Specifically, the body region 300 of the second conductivity type covers an upper portion of the plurality of channels 100 so that the second conductive portion is finally The body region 300 of the type is flush with the upper end of the epitaxial layer 200, wherein the body region 300 covers at least the upper ends of the two adjacent channels 100 to form adjacent body regions, and the body region is configured with the first a conductive device source 310, the upper end between the adjacent body regions is provided with a device gate 500, thereby constituting a MOS power device;
其中,所述沟道100中至少存在三个未被所述体区覆盖的第一独立沟道 110、第二独立沟道120以及第三独立沟道130,所述第一独立沟道110上部配置有第一金属-氧化物半导体场效应管,所述第二独立沟道120上部配置有第二金属-氧化物半导体场效应管,所述外延层200上端绝缘配置有第一电阻610和第二电阻620,所述器件栅极500端连接栅极金属垫,所述第二电阻620连接在所述栅极金属垫和所述器件栅极500之间,所述第一金属-氧化物半导体场效应管的第一漏极115与所述器件栅极500连接,所述第一金属-氧化物半导体场效应管的第一源极113通过所述第一电阻610与所述器件源极310共接,所述第一金属-氧化物半导体场效应管的第一栅极114、第二金属-氧化物半导体场效应管的第二栅极124和第二漏极620同时共接在栅极金属垫上,所述第二金属-氧化物半导体场效应管的第二源极123与所述器件源极310共接。各极之间以及与电阻之间都是通过金属线连接的,为现有技术,本实施例中没有再叙述。Wherein at least three first independent channels not covered by the body region exist in the channel 100 110, a second independent channel 120 and a third independent channel 130, a first metal-oxide semiconductor field effect transistor is disposed on an upper portion of the first independent channel 110, and an upper portion is disposed on an upper portion of the second independent channel 120 a second metal-oxide semiconductor field effect transistor, the upper end of the epitaxial layer 200 is insulated and configured with a first resistor 610 and a second resistor 620, the device gate 500 end is connected to the gate metal pad, and the second resistor 620 is connected Between the gate metal pad and the device gate 500, a first drain 115 of the first metal-oxide semiconductor field effect transistor is connected to the device gate 500, the first metal-oxidation The first source 113 of the semiconductor field effect transistor is connected to the device source 310 through the first resistor 610, and the first gate 114 and the second metal of the first metal-oxide semiconductor field effect transistor The second gate 124 and the second drain 620 of the oxide semiconductor field effect transistor are simultaneously connected to the gate metal pad, and the second source 123 of the second metal-oxide semiconductor field effect transistor and the device The source 310 is connected in common. The electrodes and the resistors are connected by metal wires. The prior art is not described in this embodiment.
当功率器件关断时,第一栅极出现震荡电压,当震荡电压过高时,通过第一金属-氧化物半导体场效应管和第二金属-氧化物半导体场效应管导流到器件源极,通过第一电阻和第二电阻有效减缓吸收了高电压,避免了栅电压震荡,器件栅极的电压处于正常电压值时,两个金属-氧化物半导体场效应管截止,电流不会通过金属-氧化物半导体场效应管导流,也不会经过第一电阻消耗,从而降低了功率器件的损耗,提高了功率器件的开关容量,有效消除了栅电压震荡,功率器件开关的稳定性,提高功率器件的可靠性,开关速度更快,开关容量更高。When the power device is turned off, the first gate has an oscillating voltage, and when the oscillating voltage is too high, the first metal-oxide semiconductor FET and the second metal-oxide semiconductor FET are diverted to the device source. The first resistor and the second resistor effectively slow down the absorption of the high voltage, avoiding the gate voltage oscillation, and when the voltage of the gate of the device is at a normal voltage value, the two metal-oxide semiconductor FETs are turned off, and the current does not pass through the metal. - The oxide semiconductor field effect tube conducts, and does not consume through the first resistor, thereby reducing the loss of the power device, improving the switching capacity of the power device, effectively eliminating the gate voltage oscillation, the stability of the power device switch, and improving Power device reliability, faster switching speed and higher switching capacity.
一种实施例中,所述器件栅极500都是分栅栅极,也就是器件栅极独立设置在每个体区上端,不连接两个相邻的体区;或者所述器件栅极500都是全栅栅极。In one embodiment, the device gates 500 are all gated gates, that is, the device gates are independently disposed at the upper end of each body region, and no adjacent body regions are connected; or the device gates 500 are Is the full gate gate.
一种实施例中,在功率器件的上表面上形成一层绝缘薄膜400,在绝缘薄膜400上形成一层导电膜,刻蚀导电膜和绝缘薄膜,剩余的导电膜成为所 述器件栅极、第一栅极、第二栅极和第一电阻、第二电阻,同时在导电膜上还形成有第三电阻630,其连接在所述栅极金属垫与所述第一栅极114之间。In one embodiment, an insulating film 400 is formed on the upper surface of the power device, a conductive film is formed on the insulating film 400, the conductive film and the insulating film are etched, and the remaining conductive film becomes the a device gate, a first gate, a second gate, and a first resistor and a second resistor, and a third resistor 630 is further formed on the conductive film, and is connected to the gate metal pad and the first Between the gates 114.
一种实施例中,所述第三独立沟道130上部配置有PN结,所述PN结的阴极与所述栅极金属垫连接,所述PN结的阳极极与所述器件栅极的控制端连接。In one embodiment, a PN junction is disposed on an upper portion of the third independent channel 130, a cathode of the PN junction is connected to the gate metal pad, and an anode of the PN junction and a gate of the device are controlled. End connection.
一种实施例中,所述第一独立沟道110的上部间隔配置有第一导电型的第一源区112和第一漏区111,如图2和3所示,所述第一源区112上端设置有所述第一源极113,所述第一漏区111上端设置有所述第一漏极115,所述第一源区和第一漏区上端配置有所述第一栅极114。In one embodiment, the upper portion of the first independent channel 110 is spaced apart from the first source region 112 and the first drain region 111 of the first conductivity type, as shown in FIGS. 2 and 3, the first source region The first source 113 is disposed at an upper end of the first drain region 111, and the first drain electrode is disposed at an upper end of the first drain region 111, and the first gate region is disposed at an upper end of the first drain region and the first drain region 114.
所述第二独立沟道120的上部间隔配置有第一导电型的第二源区122和第二漏区121,所述第二源区122上端设置有所述第二源极123,所述第二漏区121上端设置有所述第二漏极125,所述第二源区和第二漏区上端配置有所述第二栅极124。An upper portion of the second independent channel 120 is disposed with a second source region 122 and a second drain region 121 of a first conductivity type, and an upper end of the second source region 122 is disposed with the second source electrode 123. The second drain electrode 125 is disposed at an upper end of the second drain region 121, and the second gate electrode 124 is disposed at an upper end of the second source region and the second drain region.
一种实施例中,所述第三独立沟道130的上部配置有第一导电型的基区131,其上部配置有第二导电型的第一区132,所述基区131上端配置有第一导电型的第二区133。In one embodiment, the upper portion of the third independent channel 130 is provided with a first conductive type base region 131, and the upper portion thereof is provided with a second conductive type first region 132, and the upper portion of the base region 131 is disposed with a first portion A second region 133 of a conductivity type.
一种实施例中,所述第一导电型为N型,所述第二导电型为P型,所述第一区为所述PN结的阳极,所述第二区为所述PN结的阴极。In one embodiment, the first conductivity type is an N type, the second conductivity type is a P type, the first area is an anode of the PN junction, and the second area is the PN junction cathode.
一种实施例中,所述第一导电型为P型,所述第二导电型为N型,所述第二区为所述PN结的阳极,所述第一区为所述PN结的阴极。In one embodiment, the first conductivity type is a P type, the second conductivity type is an N type, the second area is an anode of the PN junction, and the first area is the PN junction cathode.
一种实施例中,所述第一金属-氧化物半导体场效应管至少为2个,每一个第一金属-氧化物半导体场效应管独立配置在一个所述第一独立沟道中,每一个第一金属-氧化物半导体场效应管的各个第一栅极并联、各个第一漏极并联、各个第一源极并联,以增强第一栅极过电压的导流效果,进一步减少栅电压震荡,稳定功率器件的开断特性。 In one embodiment, the first metal-oxide semiconductor field effect transistor is at least two, and each of the first metal-oxide semiconductor field effect transistors is independently disposed in one of the first independent channels, each of which is Each of the first gates of a metal-oxide semiconductor field effect transistor is connected in parallel, each of the first drains is connected in parallel, and each of the first sources is connected in parallel to enhance the diversion effect of the first gate overvoltage, thereby further reducing gate voltage oscillation. Stabilize the breaking characteristics of power devices.
由上所述,本发明提出的一种开关性能稳定的功率器件,开关速度更快,开关容量更大;同时,功率器件的开关稳定性更强,不会产生误动作,提高了可靠性。As described above, the power device with stable switching performance proposed by the present invention has a faster switching speed and a larger switching capacity. At the same time, the switching stability of the power device is stronger, no malfunction occurs, and reliability is improved.
尽管本发明的实施方案已公开如上,但其并不仅仅限于说明书和实施方式中所列运用,它完全可以被适用于各种适合本发明的领域,对于熟悉本领域的人员而言,可容易地实现另外的修改,因此在不背离权利要求及等同范围所限定的一般概念下,本发明并不限于特定的细节和这里示出与描述的图例。 Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and the embodiments, and are fully applicable to various fields suitable for the present invention, and are easily accessible to those skilled in the art. The invention is not limited to the specific details and the details shown and described herein, without departing from the scope of the appended claims.

Claims (10)

  1. 一种开关性能稳定的功率器件,其特征在于,包括:A power device with stable switching performance, characterized in that it comprises:
    第一导电型的衬底,其底端配置有MOS功率器件的器件漏极,所述衬底上端配置有第一导电型的外延层;a substrate of a first conductivity type having a drain of a device of a MOS power device at a bottom end thereof, and an epitaxial layer of a first conductivity type disposed at an upper end of the substrate;
    第二导电型的沟道,其间隔配置在所述外延层中;a second conductivity type channel disposed at intervals in the epitaxial layer;
    第二导电型的体区,其配置在所述沟道和外延层上部,其中,所述体区至少覆盖在两个相邻所述沟道的上端形成相邻体区,所述体区内配置有第一导电型的器件源极,所述相邻体区之间的上端配置有器件栅极;a body region of a second conductivity type disposed at an upper portion of the channel and the epitaxial layer, wherein the body region covers at least an upper end of two adjacent channels to form an adjacent body region, wherein the body region a device source of a first conductivity type is disposed, and an upper end of the adjacent body region is configured with a device gate;
    其中,所述沟道中至少存在三个未被所述体区覆盖的第一独立沟道、第二独立沟道以及第三独立沟道,所述第一独立沟道上部配置有第一金属-氧化物半导体场效应管,所述第二独立沟道上部配置有第二金属-氧化物半导体场效应管,所述外延层上端绝缘配置有第一电阻和第二电阻,所述器件栅极端连接栅极金属垫,所述第二电阻连接在所述栅极金属垫和所述器件栅极之间,所述第一金属-氧化物半导体场效应管的第一漏极与所述器件栅极连接,所述第一金属-氧化物半导体场效应管的第一源极通过所述第一电阻与所述器件源极共接,所述第一金属-氧化物半导体场效应管的第一栅极、第二金属-氧化物半导体场效应管的第二栅极和第二漏极同时共接在栅极金属垫上,所述第二金属-氧化物半导体场效应管的第二源极与所述器件源极共接。Wherein at least three first independent channels, second independent channels and third independent channels not covered by the body regions are present in the channel, and the first independent channel is disposed with a first metal at an upper portion thereof An oxide semiconductor field effect transistor, a second metal-oxide semiconductor field effect transistor is disposed on the upper portion of the second independent channel, and an upper resistor and a second resistor are disposed on the upper end of the epitaxial layer, and the gate terminal of the device is connected a gate metal pad, the second resistor is connected between the gate metal pad and the device gate, a first drain of the first metal-oxide semiconductor field effect transistor and the device gate Connecting, the first source of the first metal-oxide semiconductor field effect transistor is connected to the device source through the first resistor, and the first gate of the first metal-oxide semiconductor field effect transistor a second gate and a second drain of the second metal-oxide semiconductor field effect transistor are simultaneously connected to the gate metal pad, and the second source and the second metal-oxide semiconductor field effect transistor The device sources are connected in common.
  2. 如权利要求1所述的开关性能稳定的功率器件,其特征在于,所述外延层上端还绝缘配置有第三电阻,其连接在所述栅极金属垫与所述第一栅极之间。The power device with stable switching performance according to claim 1, wherein the upper end of the epitaxial layer is further insulated and disposed with a third resistor connected between the gate metal pad and the first gate.
  3. 如权利要求2所述的开关性能稳定的功率器件,其特征在于,所述第三独立沟道上部配置有PN结,所述PN结的阴极与所述栅极金属垫连接,所述PN结的阳极极与所述器件栅极的控制端连接。 A power device with stable switching performance according to claim 2, wherein said third independent channel upper portion is provided with a PN junction, said cathode of said PN junction being connected to said gate metal pad, said PN junction The anode pole is connected to the control terminal of the device gate.
  4. 如权利要求3所述的开关性能稳定的功率器件,其特征在于,所述第一独立沟道的上部间隔配置有第一导电型的第一源区和第一漏区,所述第一源区上端设置有所述第一源极,所述第一漏区上端设置有所述第一漏极,所述第一源区和第一漏区上端配置有所述第一栅极。The power device with stable switching performance according to claim 3, wherein the upper portion of the first independent channel is disposed with a first source region of a first conductivity type and a first drain region, the first source The first source is disposed at an upper end of the region, the first drain is disposed at an upper end of the first drain region, and the first gate is disposed at an upper end of the first source region and the first drain region.
  5. 如权利要求4所述的开关性能稳定的功率器件,其特征在于,所述第二独立沟道的上部间隔配置有第一导电型的第二源区和第二漏区,所述第二源区上端设置有所述第二源极,所述第二漏区上端设置有所述第二漏极,所述第二源区和第二漏区上端配置有所述第二栅极。The power device with stable switching performance according to claim 4, wherein the upper portion of the second independent channel is disposed with a second source region and a second drain region of the first conductivity type, the second source The second source is disposed at an upper end of the region, the second drain is disposed at an upper end of the second drain region, and the second gate is disposed at an upper end of the second source region and the second drain region.
  6. 如权利要求5所述的开关性能稳定的功率器件,其特征在于,所述第三独立沟道的上部配置有第一导电型的基区,其上部配置有第二导电型的第一区,所述基区上端配置有第一导电型的第二区。The power device with stable switching performance according to claim 5, wherein the upper portion of the third independent channel is provided with a base region of a first conductivity type, and the upper portion of the third independent channel is configured with a first region of a second conductivity type, A second region of the first conductivity type is disposed at an upper end of the base region.
  7. 如权利要求6所述的开关性能稳定的功率器件,其特征在于,所述第一导电型为N型,所述第二导电型为P型,所述第一区为所述PN结的阳极,所述第二区为所述PN结的阴极。A power device with stable switching performance according to claim 6, wherein said first conductivity type is N type, said second conductivity type is P type, and said first region is an anode of said PN junction. The second region is the cathode of the PN junction.
  8. 如权利要求6所述的开关性能稳定的功率器件,其特征在于,所述第一导电型为P型,所述第二导电型为N型,所述第二区为所述PN结的阳极,所述第一区为所述PN结的阴极。A power device with stable switching performance according to claim 6, wherein said first conductivity type is a P type, said second conductivity type is an N type, and said second region is an anode of said PN junction. The first zone is the cathode of the PN junction.
  9. 如权利要求7或8所述的开关性能稳定的功率器件,其特征在于,所述第一金属-氧化物半导体场效应管至少为2个,每一个第一金属-氧化物半导体场效应管独立配置在一个所述第一独立沟道中,每一个第一金属-氧化物半导体场效应管的各个第一栅极并联、各个第一漏极并联、各个第一源极并联。A power device with stable switching performance according to claim 7 or 8, wherein said first metal-oxide semiconductor field effect transistor has at least two, each of which is independent of the first metal-oxide semiconductor field effect transistor. In each of the first independent channels, each of the first gates of each of the first metal-oxide semiconductor field effect transistors is connected in parallel, each of the first drains is connected in parallel, and each of the first sources is connected in parallel.
  10. 如权利要求1所述的开关性能稳定的功率器件,其特征在于,所述器件栅极为分栅栅极或全栅栅极。 The power device with stable switching performance according to claim 1, wherein the gate of the device is a split gate or a full gate.
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