WO2018223434A1 - 一种阵列基板及显示装置 - Google Patents

一种阵列基板及显示装置 Download PDF

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WO2018223434A1
WO2018223434A1 PCT/CN2017/090257 CN2017090257W WO2018223434A1 WO 2018223434 A1 WO2018223434 A1 WO 2018223434A1 CN 2017090257 W CN2017090257 W CN 2017090257W WO 2018223434 A1 WO2018223434 A1 WO 2018223434A1
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layer
array substrate
active
active region
storage capacitor
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PCT/CN2017/090257
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French (fr)
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余明爵
徐源竣
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深圳市华星光电技术有限公司
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Priority to US15/562,818 priority Critical patent/US20200043953A1/en
Publication of WO2018223434A1 publication Critical patent/WO2018223434A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • the present invention relates to the field of display technologies, and more particularly to an array substrate and a display device.
  • OLED organic light emitting diode
  • LCD liquid crystal display
  • OLED organic light emitting diode
  • AMOLED Active Matrix Organic Light Emitting Display
  • the AMOLED generally adopts a 2T1C driving circuit including a switching TFT, a driving TFT, and a storage capacitor.
  • the switching TFT controls the opening and closing of the driving TFT through the storage capacitor, and drives the AMOLED to work by driving the current generated by the TFT in a saturated state.
  • the active regions of the switching TFT and the driving TFT generally use the same channel material, which is an oxide semiconductor or a low temperature poly-Silicon (LTPS) material.
  • LTPS low temperature poly-Silicon
  • the oxide semiconductor material has good uniformity and low leakage, its electron mobility is low, and it is not very suitable as an active layer channel material for a switching TFT.
  • the present application proposes an array substrate and a display device, which achieve the purpose of fast switching speed and high uniformity of illumination.
  • the present invention provides an array substrate including a substrate, a buffer layer, and an active layer disposed in sequence, the active layer including a first active region and a second active region, wherein the first active region
  • the conductive channel is composed of low temperature polysilicon
  • the conductive channel of the second active region is composed of an oxide semiconductor.
  • the array substrate of the present invention has the LTPS as the conductive channel material of the first active region and the oxide semiconductor as the conductive channel material of the second active region, so that the array substrate has a fast switching speed and high luminescence. Uniformity.
  • the array substrate further includes a nitrogen silicide buffer layer deposited between the substrate and the buffer layer, the nitrogen silicide buffer layer being located under the first active region.
  • the electron mobility of the LTPS material can be further improved by the hydrogenation of the nitrogen silicide, and the performance of the device can be improved.
  • the active layer further includes a storage capacitor lower electrode, and the storage capacitor lower electrode is also composed of low temperature polysilicon.
  • the first active region and the storage capacitor lower electrode are obtained by an crystallization process of an amorphous silicon material, wherein the crystallization process is rapid thermal annealing, excimer laser annealing, or solid phase crystallization.
  • the crystallization process is rapid thermal annealing, excimer laser annealing, or solid phase crystallization.
  • the first active region further includes a first source region and a first drain region respectively located on opposite sides of the conductive channel of the first active region.
  • the first source region, the first drain region, and the storage capacitor lower electrode are obtained by ion doping.
  • the oxide semiconductor material is indium gallium zinc oxide or indium tin zinc oxide.
  • the array substrate further includes a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a protective layer, a flat layer, and a transparent layer, which are sequentially disposed on the active layer. Electrode layer and pixel definition layer.
  • the present invention provides a display device including the above aspects and its possibilities The array substrate according to any one of the preceding embodiments.
  • the array substrate of the present invention has a fast switching speed and high by using the LTPS material as the conductive channel material of the first active region and the oxide semiconductor material as the conductive channel material of the second active region. Luminous uniformity.
  • FIG. 1 shows a schematic structural view of an array substrate according to an embodiment of the present invention.
  • FIG. 2 is a schematic view showing the structure of an array substrate according to another embodiment of the present invention.
  • the driving circuit of the AMOLED the most widely used is a 2T1C driving circuit, that is, the driving circuit includes a switching TFT element, a driving TFT element, and a storage capacitor.
  • the switching TFT element includes a first active region
  • the driving TFT element The second active region is included
  • the storage capacitor includes a storage capacitor upper electrode and a storage capacitor lower electrode.
  • the array substrate 100 includes a substrate 10 disposed on a bottom layer, a buffer layer 11 sequentially deposited on the substrate 10, and an active layer 12, the active layer 12 including a first active region 121, and a second The source region 122 and the storage capacitor lower electrode 131, wherein the conductive channel 1211 of the first active region 121 and the storage capacitor lower electrode 131 are composed of a low temperature polysilicon LTPS material, and the conductive channel 1221 of the second active region 122 is oxidized. Composition of semiconductor materials.
  • the array substrate 10 of the present invention makes the array substrate by using the LTPS material as the material of the conductive channel 1211 of the first active region 121 while using the oxide semiconductor material as the material of the conductive channel 1221 of the second active region 122. 10 has a fast switching speed and high luminous uniformity.
  • the array substrate 100 of the present invention is provided with a buffer layer 11, an active layer 12, a first insulating layer 14, a first metal layer 15, a second insulating layer 16, and a second metal layer 17 in this order.
  • the buffer layer 11 is a SiO 2 material deposited on the substrate 10, and an active layer 12 is deposited on the buffer layer 11.
  • the active layer 12 includes a first active region 121, a second active region 122, and a memory. Capacitor lower electrode 131.
  • the specific formation process of the active layer 12 is: first depositing an amorphous silicon material on a corresponding region on the buffer layer 11 for forming the first active region 121 and the storage capacitor lower electrode 131; then in the buffer layer 11 The region deposits an oxide semiconductor material for forming the second active region 122. Since the amorphous silicon material has a low electron mobility, it is not suitable as a material for the conductive channel. Therefore, the amorphous silicon material needs to be subjected to a crystallization process to be converted into a low temperature polysilicon LTPS material.
  • the amorphous silicon can be transformed by one of crystallization processes such as Rapid Thermal Annealing (RTA), Excimer Laser Annealing (ELA) or Solid Phase Crystallization (SPC). For low temperature polysilicon LTPS.
  • RTA Rapid Thermal Annealing
  • ESA Excimer Laser Annealing
  • SPC Solid Phase Crystallization
  • both ends of the first active region 121 and the storage capacitor lower electrode 131 may be ion doped (eg, doped with Ti ions) to reduce the resistance thereof.
  • the first source region 1212 and the first drain region 1213 are formed on both sides of the active region 121. Therefore, the first source region 1212 and the first drain region 1213 are connected by the conductive channel 1211.
  • P-type doping or N-type doping may be selected for ion doping.
  • the oxide semiconductor material is indium gallium zinc oxide (IGZO) or indium tin zinc oxide (ITZO).
  • a first insulating layer 14 is deposited on the active layer 12, the first insulating layer 14 is a monolayer silicide nitride (SiN x), a single layer of silica (SiO 2) or a multilayer combination of both.
  • a first metal layer 15 is deposited on a corresponding region on the first insulating layer 14, as a gate electrode 151 of the switching TFT element, a gate electrode 152 of the driving TFT element, and a storage capacitor upper electrode 132, respectively.
  • the first metal layer 15 is one of metal molybdenum, aluminum and copper.
  • the array substrate 100 of the present invention adopts a top gate TFT structure, and can effectively reduce parasitic capacitance.
  • a second insulating layer 16 and a second metal layer 17 are sequentially deposited on the first metal layer 15.
  • the second insulating layer 16 is a single layer of nitrogen silicide (SiN x ), a single layer of silicon dioxide (SiO 2 ) or a combination of the two
  • the second metal layer 17 is one of metal molybdenum, aluminum and copper.
  • a plurality of via holes are disposed through the first insulating layer 14 and the second insulating layer 16, and a source (S pole) and a drain (D pole) of the switching TFT element pass through different vias and the first source region 1212, respectively.
  • the first drain region 1213 is connected, and a source (S pole) and a drain (D pole) of the driving TFT element are respectively connected to the conductive channel 1221 through different via holes.
  • a protective layer, a flat layer, a transparent electrode layer, and a pixel defining layer are sequentially disposed on the second metal layer 17, which are not described herein.
  • FIG. 2 is a schematic structural view of an array substrate 100 according to another embodiment of the present invention.
  • a nitrogen silicide SiN x buffer layer 18 is disposed between the substrate 10 and the buffer layer 11, and the oxynitride buffer layer 18 is located under the first active region 121 due to self-hydrogenation of the nitrogen silicide.
  • the repair function can further improve the electron mobility and thus improve the electrical properties of the device.
  • the present invention also provides a display device comprising the array substrate of the present invention, and thus the display device also has the above-mentioned beneficial effects, which are not described herein.
  • the array substrate and the display device provided by the present invention make the LTPS material as the material of the conductive channel of the first active region while using the oxide semiconductor material as the material of the conductive channel of the second active region.
  • the array substrate has a fast switching speed and high luminous uniformity.

Abstract

一种阵列基板(100)和显示装置，该阵列基板(100)包括依次设置的基板(10)、缓冲层(11)和有源层(12)，有源层(12)包括第一有源区(121)、第二有源区(122)，其中，第一有源区(121)的导电沟道(1211)由低温多晶硅组成，第二有源区(122)的导电沟道由氧化物半导体组成。该显示装置包括该阵列基板(100)。通过将低温多晶硅材料作为第一有源区的导电沟道材料，同时将氧化物半导体材料作为第二有源区的导电沟道材料，使该阵列基板具有快的开关速度和高的发光均一性。

Description

一种阵列基板及显示装置
相关申请的交叉引用
本申请要求享有于2017年06月05日提交的名称为“一种阵列基板及显示装置”的中国专利申请CN201710411433.X的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术领域，并且更具体地，涉及一种阵列基板及显示装置。
背景技术
在显示技术领域，目前广泛使用的显示器件按照屏幕材质主要包括两种，即液晶显示器件(Liquid Crystal Display,LCD)和有机发光二极管(Organic Light Emitting Display,OLED)。OLED具有自发光、视角广、寿命长和节能环保等特点，目前OLED显示器与照明行业发展迅速，已成为重要的显示设计。OLED中的有源矩阵有机发光二极管(Active Matrix Organic Light Emitting Display,AMOLED)显示面板具有呈阵列式排布的像素，每一像素由数个薄膜晶体管(Thin Film Transistor,TFT)与存储电容构成的驱动电路进行驱动，属于主动显示类型，发光效能高，通常用于高清晰度的大尺寸显示装置。AMOLED一般采用2T1C的驱动电路，该驱动电路包括开关TFT、驱动TFT以及存储电容，开关TFT通过存储电容控制驱动TFT的打开与关闭，通过驱动TFT在饱和状态时产生的电流驱动AMOLED工作。
在现有的AMOLED的2T1C驱动电路中，开关TFT和驱动TFT的有源区通常使用同一种沟道材料，为氧化物半导体或低温多晶硅(Low Temperature Poly-Silicon,LTPS)材料。在使用LTPS作为有源区沟道材料时，虽然LTPS材料的电子迁移率高，但是大面积均一性不好，如果用在驱动TFT的有源层，则易造成电流不均，影响AMOLED亮度调节；同时，氧化物半导体材料虽然均一性较好，漏电很低，但其电子迁移率低，并不十分适合作为开关TFT的有源层沟道材料。
因此，需要提供一种改进的阵列基板及显示装置，使其具有快的开关速度和高的发光均一性。
发明内容
针对上述现有技术中的问题，本申请提出了一种阵列基板及显示装置，达到快的开关速度和高的发光均一性的目的。
一方面，本发明提供了一种阵列基板，包括依次设置的基板、缓冲层和有源层，该有源层包括第一有源区、第二有源区，其中，第一有源区的导电沟道由低温多晶硅组成，第二有源区的导电沟道由氧化物半导体组成。本发明的阵列基板通过将LTPS作为第一有源区的导电沟道材料，同时将氧化物半导体作为第二有源区的导电沟道材料，使该阵列基板具有快的开关速度和高的发光均一性。
根据本方面的一种可能的实现方式，该阵列基板还包括沉积于基板和缓冲层之间的氮硅化物缓冲层，该氮硅化物缓冲层位于第一有源区的下方。通过该实现方式，能够借助于氮硅化物的氢化作用，进一步提高LTPS材料的电子迁移率，提升器件的性能。
根据本方面的一种可能的实现方式，该有源层还包括存储电容下电极，该存储电容下电极也由低温多晶硅组成。
根据本方面的一种可能的实现方式，第一有源区和存储电容下电极由非晶硅材料经过结晶工艺而获得，其中，该结晶工艺为快速热退火、准分子激光退火或固相结晶中的一种。
根据本方面的一种可能的实现方式，第一有源区还包括分别位于第一有源区的导电沟道两侧的第一源极区和第一漏极区。
根据本方面的一种可能的实现方式，第一源极区、第一漏极区和存储电容下电极为通过离子掺杂而得到。
根据本方面的一种可能的实现方式，氧化物半导体材料为铟镓锌氧化物或铟锡锌氧化物。
根据本方面的一种可能的实现方式，阵列基板还包括依次设置于有源层上的第一绝缘层、第一金属层、第二绝缘层、第二金属层、保护层、平坦层、透明电极层以及像素定义层。
另一方面，本发明提供了一种显示装置，该显示装置包括上述方面及其可能 的实现方式中任一项所述的所述的阵列基板。
本发明的阵列基板通过将LTPS材料作为第一有源区的导电沟道材料，同时将氧化物半导体材料作为第二有源区的导电沟道材料，使该阵列基板具有快的开关速度和高的发光均一性。
上述技术特征可以各种适合的方式组合或由等效的技术特征来替代，只要能够达到本发明的目的。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中：
图1显示了根据本发明实施例的阵列基板的结构示意图。
图2显示了根据本发明另一实施例的阵列基板的结构示意图。
在附图中，相同的部件使用相同的附图标记。附图并未按照实际的比例。
具体实施方式
下面将结合附图对本发明作进一步说明。
在AMOLED的驱动电路中，应用最广泛的为2T1C驱动电路，即该驱动电路包括开关TFT元件、驱动TFT元件以及存储电容，在本发明中，开关TFT元件包括第一有源区，驱动TFT元件包括第二有源区，存储电容包括存储电容上电极和存储电容下电极。
图1为根据本发明的阵列基板100的结构示意图。如图1所示，该阵列基板100包括设置于底层的基板10、依次沉积在基板10上的缓冲层11和有源层12，该有源层12包括第一有源区121、第二有源区122和存储电容下电极131，其中，第一有源区121的导电沟道1211和存储电容下电极131由低温多晶硅LTPS材料组成，而第二有源区122的导电沟道1221由氧化物半导体材料组成。
本发明的阵列基板10通过将LTPS材料作为第一有源区121的导电沟道1211的材料，同时将氧化物半导体材料作为第二有源区122的导电沟道1221的材料，使该阵列基板10具有快的开关速度和高的发光均一性。
具体地，本发明的阵列基板100向上依次设置有缓冲层11、有源层12、第一绝缘层14、第一金属层15、第二绝缘层16和第二金属层17。其中，缓冲层11为SiO2材料，其沉积在基板10上，在缓冲层11上沉积有有源层12，该有源 层12包括第一有源区121、第二有源区122以及存储电容下电极131。
该有源层12的具体形成过程为：先在缓冲层11上的相应区域沉积非晶硅材料，以用于形成第一有源区121和存储电容下电极131；接着在缓冲层11的另外区域沉积氧化物半导体材料以用于形成第二有源区122。由于非晶硅材料的电子迁移率较低，故其并不适合作为导电沟道的材料。因此，在此需要对该非晶硅材料进行结晶工艺处理，使其转变为低温多晶硅LTPS材料。优选地，可以通过快速热退火(Rapid Thermal Annealing,RTA)、准分子激光退火(Excimer Laser Annealing,ELA)或固相结晶(Solid Phase Crystallization,SPC)等结晶工艺中的一种将非晶硅转变为低温多晶硅LTPS。
优选地，由于多晶硅材料的导电性不高，故可以对该第一有源区121的两端和存储电容下电极131进行离子掺杂(如掺杂Ti离子)以降低其电阻，在第一有源区121的两侧形成第一源极区1212和第一漏极区1213，因此，第一源极区1212和第一漏极区1213通过导电沟道1211进行连接。可选地，在进行离子掺杂时，可选择进行P型掺杂或N型掺杂。
优选地，该氧化物半导体材料为铟镓锌氧化物(IGZO)或铟锡锌氧化物(ITZO)。
第一绝缘层14沉积于有源层12上，该第一绝缘层14为单层氮硅化物(SiNx)、单层二氧化硅(SiO2)或二者的层叠组合。
接着，在第一绝缘层14上的相应区域沉积第一金属层15，分别作为开关TFT元件的栅极151、驱动TFT元件的栅极152以及存储电容上电极132。优选地，该第一金属层15为金属钼、铝和铜中的一种。本发明的阵列基板100采用顶栅式TFT结构，能够有效地降低寄生电容。
在第一金属层15上依次沉积第二绝缘层16和第二金属层17。同样地，第二绝缘层16为单层氮硅化物(SiNx)、单层二氧化硅(SiO2)或二者的层叠组合，第二金属层17为金属钼、铝和铜中的一种。贯穿第一绝缘层14和第二绝缘层16设置有多个过孔，开关TFT元件的源极(S极)和漏极(D极)分别通过不同的过孔与第一源极区1212和第一漏极区1213连接，驱动TFT元件的源极(S极)和漏极(D极)分别通过不同的过孔与导电沟道1221连接。
在一些实施例中，在第二金属层17上还依次设置有保护层、平坦层、透明电极层以及像素定义层，在此不作赘述。
图2为根据本发明的另一实施例的阵列基板100的结构示意图。如图2所示，在基板10和缓冲层11之间设置有氮硅化物SiNx缓冲层18，该氮硅化物缓冲层18位于第一有源区121的下方，由于氮硅化物具有自氢化修补功能，能够进一步地提高电子迁移率，进而提升器件的电性。
本发明还提供了一种显示装置，该显示装置包括本发明的阵列基板，因此该显示装置也具有上述的有益效果，在此不作赘述。
因此，本发明提供的阵列基板以及显示装置，通过将LTPS材料作为第一有源区的导电沟道的材料，同时将氧化物半导体材料作为第二有源区的导电沟道的材料，使该阵列基板具有快的开关速度和高的发光均一性。
虽然在本文中参照了特定的实施方式来描述本发明，但是应该理解的是，这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是，可以对示例性的实施例进行许多修改，并且可以设计出其他的布置，只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是，可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是，结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (18)

  1. 一种阵列基板，包括依次设置的基板、缓冲层和有源层，其中，所述有源层包括第一有源区和第二有源区，所述第一有源区的导电沟道由低温多晶硅组成，所述第二有源区的导电沟道由氧化物半导体组成。
  2. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括沉积于所述基板和所述缓冲层之间的氮硅化物缓冲层，所述氮硅化物缓冲层位于所述第一有源区的下方。
  3. 根据权利要求1所述的阵列基板，其中，所述有源层还包括存储电容下电极，所述存储电容下电极由低温多晶硅组成。
  4. 根据权利要求2所述的阵列基板，其中，所述有源层还包括存储电容下电极，所述存储电容下电极由低温多晶硅组成。
  5. 根据权利要求4所述的阵列基板，其中，所述第一有源区和所述存储电容下电极由非晶硅经过结晶工艺而获得，所述结晶工艺为快速热退火、准分子激光退火或固相结晶中的一种。
  6. 根据权利要求5所述的阵列基板，其中，所述第一有源区还包括分别位于所述第一有源区的导电沟道的两侧的第一源极区和第一漏极区。
  7. 根据权利要求6所述的阵列基板，其中，所述第一源极区、所述第一漏极区和所述存储电容下电极为通过离子掺杂而得到。
  8. 根据权利要求7所述的阵列基板，其中，所述氧化物半导体为铟镓锌氧化物或铟锡锌氧化物。
  9. 根据权利要求8所述的阵列基板，其中，所述阵列基板还包括依次设置于所述有源层上的第一绝缘层、第一金属层、第二绝缘层、第二金属层、保护层、平坦层、透明电极层以及像素定义层。
  10. 一种显示装置，其中，包括一种阵列基板，所述阵列基板包括依次设置的基板、缓冲层和有源层，所述有源层包括第一有源区和第二有源区，所述第一有源区的导电沟道由低温多晶硅组成，所述第二有源区的导电沟道由氧化物半导体组成。
  11. 根据权利要求10所述的显示装置，其中，所述阵列基板还包括沉积于所述基板和所述缓冲层之间的氮硅化物缓冲层，所述氮硅化物缓冲层位于所述第 一有源区的下方。
  12. 根据权利要求10所述的显示装置，其中，所述有源层还包括存储电容下电极，所述存储电容下电极由低温多晶硅组成。
  13. 根据权利要求11所述的显示装置，其中，所述有源层还包括存储电容下电极，所述存储电容下电极由低温多晶硅组成。
  14. 根据权利要求13所述的显示装置，其中，所述第一有源区和所述存储电容下电极由非晶硅经过结晶工艺而获得，所述结晶工艺为快速热退火、准分子激光退火或固相结晶中的一种。
  15. 根据权利要求14所述的显示装置，其中，所述第一有源区还包括分别位于所述第一有源区的导电沟道的两侧的第一源极区和第一漏极区。
  16. 根据权利要求15所述的显示装置，其中，所述第一源极区、所述第一漏极区和所述存储电容下电极为通过离子掺杂而得到。
  17. 根据权利要求16所述的显示装置，其中，所述氧化物半导体为铟镓锌氧化物或铟锡锌氧化物。
  18. 根据权利要求17所述的显示装置，其中，所述阵列基板还包括依次设置于所述有源层上的第一绝缘层、第一金属层、第二绝缘层、第二金属层、保护层、平坦层、透明电极层以及像素定义层。
PCT/CN2017/090257 2017-06-05 2017-06-27 一种阵列基板及显示装置 WO2018223434A1 (zh)

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