WO2018214484A1 - 有机发光二极管显示基板的制备方法、显示基板及显示装置 - Google Patents

有机发光二极管显示基板的制备方法、显示基板及显示装置 Download PDF

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WO2018214484A1
WO2018214484A1 PCT/CN2017/116473 CN2017116473W WO2018214484A1 WO 2018214484 A1 WO2018214484 A1 WO 2018214484A1 CN 2017116473 W CN2017116473 W CN 2017116473W WO 2018214484 A1 WO2018214484 A1 WO 2018214484A1
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layer
auxiliary electrode
organic light
substrate
electrode
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PCT/CN2017/116473
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English (en)
French (fr)
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刘则
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京东方科技集团股份有限公司
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Priority to EP17889534.8A priority Critical patent/EP3633746B1/en
Priority to US16/069,099 priority patent/US11183659B2/en
Publication of WO2018214484A1 publication Critical patent/WO2018214484A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/828—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing

Definitions

  • Embodiments of the present disclosure relate to the field of display technologies, and in particular, to a method for fabricating an organic light emitting diode (OLED) display substrate, and an organic light emitting diode display substrate manufactured thereby, and a display device including the display substrate.
  • OLED organic light emitting diode
  • OLED organic light-emitting diode
  • OLED devices are gradually converted from bottom emission to top emission due to the need to increase resolution and extend device lifetime.
  • the top emission cathode of the OLED has a higher light transmittance, but this causes the resistance of the cathode material block to be large, and it is impossible to balance the problem of the IR drop and the light transmittance. Therefore, the voltage drop (IR drop) of the electrodes in the OLED device needs to be improved.
  • a method for fabricating an OLED display substrate including:
  • the organic light emitting layer includes a portion formed in the via hole.
  • injecting the conductive liquid into the via hole comprises: injecting conductive droplets into the via hole by an inkjet printing process to penetrate the organic light emitting layer.
  • the temperature of the electrically conductive liquid is between about 50 ° C and 300 ° C.
  • the material of the electrically conductive droplets is an alloy having a melting point between about 50 ° C and 300 ° C.
  • the material of the conductive droplets is solder, and the melting point of the solder is between about 50 ° C and 300 ° C.
  • a conductive layer is formed on the base substrate, and a pattern of the auxiliary electrode and the conductive layer is formed by one patterning process.
  • the pattern of the conductive layer is one of the following patterns: a gate line pattern, a data line pattern, and a pixel electrode pattern.
  • the insulating layer includes a pixel defining layer, and a via for defining a pixel unit and a portion for exposing the auxiliary electrode are formed in the pixel defining layer by one patterning process The via.
  • the vias for defining the pixel cells and the vias for exposing at least a portion of the auxiliary electrodes do not overlap on the substrate substrate.
  • the insulating layer includes a pixel defining layer and a planarization layer, and the via penetrates the pixel defining layer and the planarization layer.
  • the insulating layer includes a pixel defining layer, a planarization layer, a passivation layer, and a gate insulating layer, the via holes penetrating the pixel defining layer, a planarization layer, a passivation layer, and Gate insulation layer.
  • the density of the via distribution near the center of the display substrate is greater than the density of the via distribution near the edge of the display substrate.
  • the auxiliary electrode is strip-shaped and parallel to the gate line or the data line.
  • the first electrode layer is a cathode layer.
  • a second aspect of the present invention provides an organic light emitting diode display substrate comprising: a substrate substrate; an auxiliary electrode on the substrate substrate; and an insulating layer on the auxiliary electrode;
  • the density of the via distribution near the center of the display substrate is greater than the density of the via distribution near the edge of the display substrate.
  • the auxiliary electrode is strip-shaped and parallel to the gate line or the data line.
  • the first electrode is a cathode.
  • An embodiment of the third aspect of the present invention provides a display device comprising the display substrate of each of the foregoing second aspects.
  • FIG. 1 is a flow chart of a method of fabricating an OLED display substrate in accordance with an embodiment of the present disclosure.
  • FIGS. 2a-2d are schematic diagrams showing a process of a method of fabricating an OLED display, in accordance with one embodiment of the present disclosure.
  • FIG. 3 shows a schematic plan view of an array substrate in accordance with an embodiment of the present disclosure.
  • FIGS. 4a-4m are diagrams of a process of making a particular OLED display, in accordance with one embodiment of the present disclosure.
  • the embodiments of the present disclosure are directed to the problems existing in the prior art, and propose a method for preparing an organic light emitting diode display substrate, which can effectively connect a cathode layer to an auxiliary electrode through a conductive element, thereby reducing a cathode voltage drop of the top emitting OLED display substrate. It is beneficial to prepare large-size display screens.
  • a method for preparing an organic light emitting diode display substrate first, An auxiliary electrode and an insulating layer having at least one via hole are sequentially formed on the base substrate, and at least a portion of the auxiliary electrode is exposed in the via hole. Next, an organic light-emitting layer is formed on the insulating layer. Thereafter, a conductive liquid is injected into the via hole, and the conductive liquid is cured and electrically connected to the auxiliary electrode. Then, a cathode layer is formed on the organic light-emitting layer, and the cathode layer is electrically connected to the auxiliary electrode through a conductive liquid solidified in the via hole.
  • the conductive liquid is solidified and then electrically connected to the auxiliary electrode by injecting a conductive liquid into the via hole above the auxiliary electrode, and then a cathode layer is formed on the organic light-emitting layer, so that the The cathode layer is electrically connected to the auxiliary electrode through the conductive liquid solidified in the via hole, which can effectively reduce the voltage drop of the cathode layer, and is advantageous for preparing a large-sized display screen.
  • the organic light-emitting layer is fabricated prior to the transparent cathode, sometimes the organic light-emitting layer before the transparent cathode is formed preferentially enters the via hole above the auxiliary electrode, and the organic light-emitting layer material prevents the transparent cathode from contacting the auxiliary electrode, resulting in a transparent cathode. Cannot be electrically connected to the auxiliary electrode.
  • the injected conductive liquid for example, a high velocity jetted liquid or a high temperature liquid, may destroy the organic light emitting layer in the via above the auxiliary electrode such that the auxiliary electrode can be electrically connected to the cathode.
  • FIG. 1 is a flow chart of a method of fabricating an OLED display substrate in accordance with an embodiment of the present disclosure.
  • a method of fabricating an OLED display substrate according to an embodiment of the present disclosure includes the following steps:
  • the base substrate may be made of alkaline glass.
  • the auxiliary electrode can be formed on the base substrate by a sputtering process.
  • the material of the auxiliary electrode may be, for example, various metal materials for making wires, including but not limited to gold, silver, copper, aluminum, chromium, molybdenum, alloys, and the like.
  • the material of the insulating layer may be, for example, silicon dioxide, silicon nitride, silicon oxynitride or the like or a mixed material thereof.
  • an insulating layer may be formed on the auxiliary electrode by a chemical vapor deposition process, and the insulating layer may be patterned by a photolithography process to form via holes in the insulating layer.
  • a via can be formed in the insulating layer by dry etching, which is not limited in the present disclosure.
  • the organic light-emitting layer may include a hole injection layer, a hole transport layer, an electroluminescence layer, an electron transport layer, an electron injection layer, and the like.
  • the layers of the organic light-emitting layer may be deposited layer by layer by an evaporation process.
  • the conductive liquid is, for example, a conductive alloy or a solder in a molten state.
  • the conductive liquid directly contacts the auxiliary electrode under the organic light-emitting layer, for example, by gravity or high temperature breakdown or destruction of the organic light-emitting layer, thereby forming an electrically conductive connection with the auxiliary electrode.
  • the first electrode layer is a cathode layer
  • the cathode layer may be made of a metal oxide material having high light transmittance, such as indium tin oxide, indium zinc oxide, zinc oxide, indium oxide, indium gallium oxide, and One of the aluminum oxide zinc or any combination thereof is not limited in the embodiment of the present disclosure.
  • the cathode material may be deposited on the organic light-emitting layer by a sputtering process or an evaporation process, which is not limited herein.
  • the conductive layer is injected into the via hole to penetrate the organic light-emitting layer in the via hole, and the liquid is solidified and electrically connected to the auxiliary electrode; subsequently, the cathode layer is passed through
  • the conductive conductive liquid is electrically connected to the auxiliary electrode, which can effectively reduce the voltage drop of the cathode layer, and is advantageous for preparing a large-sized display screen.
  • injecting the conductive liquid into the via hole may include ejecting the conductive liquid droplet into the via hole by an inkjet printing process.
  • Inkjet printing can quickly inject conductive droplets into the vias above the auxiliary electrodes and destroy the organic light-emitting layer in the vias to achieve conductive contact between the auxiliary electrodes and the cathode.
  • Inkjet printing has the advantages of simple operation, low cost, accurate positioning, high efficiency, and easy realization of large size.
  • the temperature of the ejected droplet is above 50 °C, such as between 50 °C and 300 °C.
  • the melting point of the organic light-emitting layer material is about 50 ° C.
  • the temperature of the ejected droplets is greater than 50 ° C, the organic light-emitting layer material can be melted and penetrated, and the conductive liquid droplets can directly contact the auxiliary electrode under the organic light-emitting layer.
  • the temperature of the ejected droplets should be less than 300 ° C in order to facilitate inkjet printing.
  • the material of the droplets ejected in the inkjet printing process may be an alloy material such as an alloy of bismuth, tin, lead, indium, or the like.
  • the melting point of the alloy is, for example, between 50 ° C and 300 ° C to be able to melt the underlying organic light-emitting layer material and to easily form a conductive liquid.
  • the material of the droplets ejected in the inkjet printing process may be a solder, such as a brazing solder, having a melting point of, for example, between 50 ° C and 300 ° C to be capable of melting the underlying organic light emitting layer material, And it is easy to form a conductive liquid.
  • a solder such as a brazing solder
  • FIGS. 2a-2d are schematic diagrams illustrating the principles of a method of fabricating an OLED display, in accordance with one embodiment of the present disclosure.
  • FIG. 2a shows a schematic cross-sectional view of an OLED display substrate prior to inkjet printing.
  • the OLED display substrate prior to inkjet printing, includes a substrate substrate 1, an auxiliary electrode 2 on the substrate substrate, and an insulating layer 3 on the auxiliary electrode 2.
  • the insulating layer 3 has at least one via 35 therein.
  • the via 35 is filled with the organic light-emitting layer 4.
  • the cathode layer when the cathode layer is subsequently laminated, the cathode layer is deposited over the organic light-emitting layer 4 in the via 35, and the organic light-emitting layer 4 is not electrically conductive, thereby blocking the electrical connection between the cathode and the auxiliary electrode 2, thus The auxiliary electrode 2 does not function to lower the cathode voltage drop. Therefore, the organic light-emitting layer 4 in the via hole 35 must be removed, so that the auxiliary electrode 2 can be electrically connected to the cathode.
  • Embodiments of the present disclosure propose a method of rapidly removing the organic light-emitting layer 4 in a via by inkjet printing.
  • Fig. 2b shows a state in which the droplets have not entered the via 35 above the auxiliary electrode 2 during inkjet printing.
  • conductive droplets 36 are ejected into vias 35 by an ink jet printer.
  • the ink jet printer for example, adopt a commercially available Micro LAB JET 4 TM ink-jet printer.
  • the conductive droplets 36 penetrate the organic light-emitting layer 4 by, for example, gravity or a jetting impact force to contact the auxiliary electrode 2 under the organic light-emitting layer 4.
  • Fig. 2c shows a state in which the droplet 36 enters the via hole 35 and breaks the organic light-emitting layer 4 to be in direct contact with the auxiliary electrode 2.
  • the ejected droplets are made of a conductive material, and thus, the droplets 36 are formed in the via holes 35 to form conductive members in conductive contact with the auxiliary electrodes 2.
  • the conductive droplets 36 are printed only in the vias where the auxiliary electrode 2 and the cathode are to be connected, and the OLEDs display the vias at the remaining positions in the substrate, for example, in the vias 45 for forming the pixels, it is not necessary to print the conductive droplets 36. .
  • the conductive liquid droplet 36 strikes the organic light-emitting layer 4 in the hole 35, and it is not necessary to completely remove the organic light-emitting layer. 4.
  • a transparent conductive layer such as an ITO layer
  • ITO layer is deposited over the organic light-emitting layer 4, for example, by a sputtering process, and is etched to form a cathode 5.
  • the organic light-emitting layer in the via 35 has been broken and partially replaced by the conductive member 37, and therefore, the cathode 5 can be electrically connected to the auxiliary electrode 2 through the conductive member 37 in the via 35.
  • the OLED display substrate manufactured by the above method effectively connects the cathode layer to the auxiliary electrode through the conductive element, which can effectively reduce the voltage drop of the cathode, and is advantageous for preparing a large-sized display screen.
  • high temperature conductive droplets may be ejected into vias 35. Since the melting point of the organic light-emitting layer material is low, for example, at about 50 ° C, high-temperature conductive droplets can melt and destroy the organic light-emitting layer 4 in the via 35.
  • the temperature of the droplets can be above 50 °C, such as between 50 °C and 300 °C. Alternatively, the temperature of the droplets may be 100 °C. Alternatively, the temperature of the droplets may be between 50 ° C and 100 ° C, or between 100 ° C and 300 ° C.
  • the material of the droplets ejected in the inkjet printing process may be an alloy material such as an alloy of bismuth, tin, lead, indium, or the like.
  • the melting point of the alloy may be selected between 50 ° C and 300 ° C to facilitate melting of the organic light emitting layer material, and the alloy is liable to form a conductive liquid.
  • the material of the droplets ejected in the inkjet printing process may also be solder.
  • a solder having a melting point between 50 ° C and 300 ° C, such as tin-lead solder, can be selected.
  • an embodiment of another aspect of the present disclosure also provides an OLED display substrate prepared by the above method.
  • the prepared OLED display substrate comprises: a substrate substrate 1; an auxiliary electrode 2 on the substrate substrate 1; an insulating layer 3 on the auxiliary electrode 2; an organic light-emitting layer 4 on the insulating layer 3; And a cathode 5 on the organic light-emitting layer.
  • the via 35 has a conductive element 37 therein, and the auxiliary electrode 2 and the cathode 5 are electrically connected by the conductive element 37.
  • the conductive member 37 is formed by injecting a conductive liquid into a via hole in the insulating layer 3 and curing it.
  • the organic light-emitting layer 4 for connecting the auxiliary electrode 2 and the cathode 5 during the process of injecting the conductive liquid is broken, and the conductive liquid is directly contacted with the auxiliary electrode 2 under the organic light-emitting layer after being solidified.
  • the cathode 5 is electrically connected to the auxiliary electrode 2 through the conductive member 37 in the via hole 35, thereby achieving the purpose of reducing the voltage drop of the cathode 5, and is advantageous for fabricating a large-sized display screen.
  • the substrate substrate 1 shown in FIGS. 2a-2d may be a part of the structure of the array substrate, such as a glass substrate in the array substrate, or a partial structure under any conductive layer in the array substrate.
  • the auxiliary electrode 2 may be located in the conductive layer of the array substrate 1.
  • the conductive layer is, for example, a metal layer.
  • the metal layer may be a metal layer where a gate line, a data line, or a pixel electrode is located.
  • the gate line may be on the same layer as the gate of the thin film transistor.
  • the data line can be on the same layer as the source and drain of the thin film transistor.
  • the pixel electrode can be the anode of the OLED display device. In this way, it is not necessary to add an additional conductive layer or a metal layer in the array substrate, which is advantageous for reducing the thickness of the display device and simplifying the structure of the display device; and, the auxiliary electrode can be fabricated simultaneously with the gate line, the data line or the pixel electrode. Simplify the manufacturing process without adding additional manufacturing processes.
  • auxiliary electrode When the auxiliary electrode is located in the metal layer where the gate line is located, it can be assisted by one patterning process.
  • the auxiliary electrode and the gate line may be formed of the same metal material, for example, but not limited to, gold, silver, copper, aluminum, chromium, molybdenum, alloy, etc., and are not limited herein. In this way, the auxiliary electrode can be fabricated while the gate line of the array substrate is fabricated, without adding an additional manufacturing process, thereby simplifying the fabrication process.
  • the data lines of the auxiliary electrode and the array substrate can be formed by one patterning process.
  • the auxiliary electrode and the data line may be formed of the same metal material, for example, but not limited to, gold, silver, copper, aluminum, chromium, molybdenum, alloy, etc., and are not limited herein. In this way, the auxiliary electrode can be fabricated while the data line of the array substrate is fabricated, and an additional manufacturing process is not required, thereby simplifying the manufacturing process.
  • the auxiliary electrode and the pixel electrode of the array substrate can be formed by one patterning process.
  • the material of the pixel electrode includes, for example, but not limited to, gold, silver, copper, aluminum, chromium, molybdenum, alloy, etc., and may be indium tin oxide (ITO) or the like. There are no restrictions here. In this way, the auxiliary electrode can be fabricated while the pixel electrode of the array substrate is fabricated, without adding an additional manufacturing process, thereby simplifying the fabrication process.
  • the insulating layer over the auxiliary electrode may be a pixel defining layer.
  • the via hole for exposing the auxiliary electrode may be formed while forming a via hole for defining the pixel unit in the pixel defining layer.
  • the insulating layer over the auxiliary electrode may be a gate insulating layer and a planarization layer.
  • the gate insulating layer is an insulating layer above the gate electrode
  • the planarization layer is an insulating layer above the source and drain of the thin film transistor.
  • the via for connecting the auxiliary electrode and the cathode needs to penetrate the gate insulating layer and the planarization layer.
  • a via that penetrates two layers may be formed at one time by dry etching after forming the gate insulating layer and the planarization layer.
  • the insulating layer over the auxiliary electrode may be a planarization layer.
  • a via hole may be formed in the planarization layer by dry etching after forming the planarization layer to connect the auxiliary electrode and the cathode.
  • a via for connecting the auxiliary electrode and the cathode may be provided for each pixel.
  • a via for connecting the auxiliary electrode and the cathode may be provided corresponding to the plurality of pixels.
  • the via holes may be uniformly disposed throughout the array substrate or may not necessarily be uniformly disposed.
  • the distribution density of the vias for connecting the auxiliary electrode and the cathode near the center of the array substrate is set to be larger than the distribution density of the via holes near the edge of the array substrate. In this way, a large number of auxiliary electrodes are introduced through the via holes at the central portion of the array substrate, so that the voltage drop loss at the center of the array substrate can be prevented from being excessively large, resulting in abnormal display of the pixels.
  • FIG. 3 shows a schematic plan view of an array substrate in accordance with one embodiment of the present disclosure, wherein for the sake of simplicity, only the switching transistor T, the driving transistor, the capacitor, etc., are known in the art for arrays of OLED display devices. Other components of the substrate will not be described herein.
  • FIG. 3 for an array substrate including 4 ⁇ 4 pixel units, 2 ⁇ 2 pixel units near the center of the array substrate may be provided with more via holes, and other pixel units near the edge of the array substrate may be disposed. Less vias.
  • the auxiliary electrode 22 is connected and The number of via holes H of the cathode is set to three, and the number of via holes H in other pixel cells near the edge of the array substrate is set to one.
  • each of the pixel units in a partial region near the center of the array substrate, is provided with one via, and in a portion of the region near the edge of the array substrate, a plurality of pixel units are provided with one via. The closer to the center of the array substrate, the greater the distribution density of vias.
  • the insulating layer may be a gate One or more of the edge layer, the passivation layer, the pixel defining layer, and the planarization layer.
  • the via may be a via that penetrates the corresponding one or more insulating layers for electrically connecting the auxiliary electrode and the cathode.
  • the auxiliary electrode 22 may be strip-shaped and parallel to the gate line G or the data line D. The case where the auxiliary electrode 22 is parallel to the gate line G is shown in FIG.
  • the auxiliary electrodes may be formed in the gaps between the pixels.
  • the method for fabricating the OLED display substrate of the above-mentioned embodiments of the present disclosure can be applied to the fabrication of a top-gate OLED display, and can also be applied to the fabrication of a bottom-gate OLED display, which is not limited in the present disclosure.
  • the substrate 10 is provided.
  • the substrate 10 can be made, for example, of an alkali-free glass, which is not limited in the present disclosure.
  • a TFT Thin Film Transistor
  • a first metal layer is laminated over the substrate 10, and the first metal layer is patterned by, for example, an etching process to form the gate electrode 21 and the auxiliary electrode 22.
  • the material of the gate metal material layer may be a conductive metal such as molybdenum or copper, which is not limited herein.
  • a gate line may be formed while patterning the first metal layer to form the gate electrode 21 and the auxiliary electrode 22. That is, the same metal layer is patterned by the same patterning process to simultaneously form the gate electrode 21, the auxiliary electrode 22, and the gate line 23.
  • a gate insulating layer 30 is laid over the gate electrode 21 and the auxiliary electrode 22, and the gate insulating layer 30 is patterned by, for example, a photolithography process to form a first layer in the gate insulating layer 30. Via 31.
  • the first via 31 will be used to connect the cathode and auxiliary electrode 22 of the OLED display substrate.
  • the material of the gate insulating layer may be, for example, silicon oxide, silicon oxynitride or the like, which is a gate insulating material in the field. limited.
  • a semiconductor layer is deposited over the gate insulating layer 30 and patterned to form the semiconductor active layer 40 of the thin film transistor.
  • the material of the semiconductor active layer 40 is, for example, a commonly used material such as indium gallium zinc oxide, which is not limited herein.
  • a passivation layer (etch barrier layer) 50 such as an inorganic non-metal material layer, is deposited over the semiconductor active layer 40 and patterned in the passivation layer 50 after being patterned by an etching process.
  • the second via 51 and the third via 52 are formed at both ends of the semiconductor active layer 40, respectively, for connecting the source and drain of the thin film transistor.
  • the third via 52 is formed above the auxiliary electrode 22 and communicates with the first via 31. The third via 52 will also be used to connect the cathode and auxiliary electrode 22 of the OLED display substrate.
  • a second metal layer is deposited over the passivation layer 50, and the second metal layer is patterned by, for example, an etch process to form the source 61 and the drain 62 of the thin film transistor.
  • the material of the second metal layer may be a source-drain metal material in the field, which is not limited herein.
  • the data line 63 may be formed while patterning the second metal layer to form the source 61 and the drain 62. That is, the same metal layer is patterned by the same patterning process to simultaneously form the source electrode 61, the drain electrode 62, and the data line 63.
  • a protective layer 70 may be formed over the second metal layer.
  • the protective layer 70 is formed, for example, of an inorganic insulating material, and the protective layer 70 is patterned by, for example, a photolithography process to form a fourth via 71 and a fifth via 72 in the protective layer 70.
  • the fourth via 71 is formed above the drain electrode 62 of the thin film transistor, and the fifth via 72 is formed above the auxiliary electrode 22 and communicates with the first via 31 and the third via 52.
  • the fourth via 71 will be used to connect the drain of the pixel electrode and the thin film transistor.
  • the fifth via 72 will be used to connect the cathode and auxiliary electrode 22 of the OLED display substrate.
  • a planarization layer 80 is formed over the protective layer 70.
  • the material of the planarization layer 80 is, for example, an insulating material for a planarization layer, such as silicon oxide, silicon oxynitride, or silicon nitride, which is not limited herein.
  • the planarization layer 80 is patterned by, for example, a photolithography process to form a first layer in the planarization layer 80.
  • Six vias 81 and a seventh via 82 is formed above the drain 62 of the thin film transistor and communicates with the fourth via 71.
  • the seventh via 82 is formed above the auxiliary electrode 22 and communicates with the first via 31, the third via 52, and the fifth via 72.
  • the sixth via 81 will be used to connect the pixel electrode and the drain 62 of the thin film transistor, which will be used to connect the cathode and auxiliary electrode 22 of the OLED display substrate.
  • a third metal layer is deposited over the planarization layer 80, for example by a sputtering process, for forming the anode 90 of the OLED display substrate, ie, the pixel electrode of the array substrate.
  • the material of the third metal layer may be an anode metal material used for the OLED display substrate in the art, which is not limited herein.
  • the third metal layer may include a metal reflective layer and an ITO electrode, as needed.
  • the third metal layer also forms an eighth via 92 in communication with the seventh via 82 at the seventh via 82. Since the third metal layer is a conductive layer, the conductive connection between the auxiliary electrode 22 and the cathode is not affected. Thus, the third metal layer can also enter the seventh via 82 without having to form vias 92 in the third metal layer.
  • the third metal layer may extend partially below the pixel electrode layer but not into the seventh via 82.
  • a layer of insulating material such as a photoresist layer
  • the photoresist layer is patterned by, for example, exposure and development to form pixels in the photoresist layer.
  • the layer 100 is defined, and a ninth via 101 defining a pixel unit and a tenth via 102 for connecting the auxiliary electrode 22 and the cathode, a tenth via 102 and an eighth via are formed in the pixel defining layer 100 92 connected.
  • the orthographic projections of the ninth via 101 and the tenth via 102 on the substrate do not overlap.
  • an organic light-emitting layer 200 is deposited over the pixel defining layer 100, for example, by an evaporation process.
  • the organic light-emitting layer may include a plurality of layers such as a hole injection layer, a hole transport layer, an electroluminescence layer, an electron transport layer, an electron injection layer, and the like.
  • the layers of the organic light-emitting layer may be deposited layer by layer by an evaporation process.
  • the organic light emitting layer material since the organic light emitting layer material is vapor deposited on the entire surface, the organic light emitting layer material enters the pixel region defined by the pixel defining layer 100, and also enters the through gate insulating layer 30 and the passivation layer 50.
  • the ten via holes 102 are formed in the communication holes.
  • the connection holes are also electrically connected to the auxiliary electrode 22 because they are filled with the organic light-emitting layer 200. Therefore, the organic light-emitting layer 200 in the via hole above the auxiliary electrode 22 must be removed to electrically connect the cathode and the auxiliary electrode 22, thereby reducing the cathode voltage drop, thereby improving the display quality of the display.
  • conductive droplets are ejected into via holes (communication holes) above the auxiliary electrode 22 by an inkjet printing process to break the organic light-emitting layer 200 in the via holes, so that subsequent fabrication is performed.
  • the cathode can be electrically connected to the auxiliary electrode 22 when the cathode layer is deposited.
  • high temperature droplets may be ejected into the vias above the auxiliary electrode 22, for example, at a temperature between 50 ° C and 300 ° C.
  • the temperature of the conductive droplets may be 100 °C.
  • the organic light-emitting layer in the pores can be melted and blown by spraying high-temperature conductive droplets. Thereafter, the high temperature conductive droplets cool and solidify and form the conductive element 300.
  • the material of the ejected droplets is an alloy, such as an alloy material having a melting point between 50 ° C and 300 ° C.
  • alloys of antimony, tin, lead, indium, and the like are examples of alloys of antimony, tin, lead, indium, and the like.
  • the material of the ejected droplets may be a solder for brazing, such as tin-lead solder.
  • the solder has a melting point between 50 ° C and 300 ° C, for example a melting point of 100 ° C.
  • a transparent cathode layer 400 of a material such as ITO, IZO, or the like is deposited over the organic light-emitting layer 200.
  • the cathode layer material enters the pixel region defined by the pixel defining layer 80, and also enters the first through the gate insulating layer 30, the passivation layer 50, the protective layer 70, the pixel defining layer 80, and the anode 90.
  • the via hole 31, the third via hole 52, the fifth via hole 72, the seventh via hole 82, the eighth via hole 92, and the tenth via hole 102 are formed in the communication hole.
  • the cathode layer 400 can be electrically connected to the auxiliary electrode 22 through the conductive member 300. Since the auxiliary electrode is connected, the cathode voltage drop can be reduced, thereby improving the display quality of the display, and facilitating fabrication of the size display panel.
  • an inorganic insulating material may be deposited on the cathode layer 400 by chemical vapor deposition or the like.
  • a barrier layer 500 to seal the pixel cells may be deposited on the cathode layer 400 by chemical vapor deposition or the like.
  • the formed array substrate is shown in Figure 4m.
  • a color film substrate can also be fabricated and paired with the formed array substrate to form an OLED display device.
  • the conductive liquid is injected into the via hole to penetrate the organic light-emitting layer in the via hole, and the liquid is cured to form a conductive element electrically connected to the auxiliary electrode;
  • the cathode layer is cured by the conductive liquid to form a conductive element electrically connected to the auxiliary electrode. Therefore, the voltage drop of the cathode layer can be effectively reduced, which is advantageous for preparing a large-sized display screen.
  • the auxiliary electrode 22 and the gate electrode 21 are formed in the same metal layer, and the auxiliary electrode 22 passes through the gate insulating layer 30, the passivation layer 50, the protective layer 70, the planarization layer 80, and the pixel defining layer.
  • the via of the plurality of insulating layers of 100 or the like is electrically connected to the cathode layer 400, but the present disclosure is not limited thereto.
  • the auxiliary electrode 22 may be formed in the same metal layer as the source 61 and the drain 62.
  • the via connecting the cathode 400 and the auxiliary electrode 22 may penetrate only the protective layer 70, the planarization layer 80, and the pixel defining layer 100 without The gate insulating layer 30 and the passivation layer 50 are penetrated.
  • the auxiliary electrode 22 may be formed in the same layer as the anode 90 of the pixel electrode.
  • the via connecting the cathode 400 and the auxiliary electrode 22 may penetrate only the pixel defining layer 100 without penetrating the gate insulating layer 30, the passivation layer 50, and the protective layer. 70 and planarization layer 80.
  • the auxiliary electrode may be formed in any one of the conductive layers in the array substrate, and may be a metal conductive layer or a non-metal conductive layer, which is not limited in the present disclosure. In this way, the auxiliary electrode can be fabricated while the conductive layer of the array substrate is fabricated, without adding an additional manufacturing process, thereby simplifying the fabrication process.
  • some layers may be omitted, and for example, the protective layer 70 may be omitted as needed.
  • an additional layer may be added as needed, as long as the auxiliary electrode and the cathode can be electrically connected by a via hole passing through the insulating layer. Therefore, in the drawings of the embodiments of the present disclosure, only the implementation of the present disclosure is involved. For the structure involved in the example, other structures can be referred to the usual design.
  • the via holes that connect the auxiliary electrode 22 and the cathode layer 400 are formed in a layer-by-layer manner in the above embodiment, but the present disclosure is not limited thereto.
  • the passivation layer 50, the protective layer 70, the planarization layer 80, and the pixel defining layer 100 are formed, it is not necessary to form a via hole at a position above the auxiliary electrode 22 in advance, but a completed gate is formed.
  • the passivation layer 50, the protective layer 70, the planarization layer 80, and the pixel defining layer 100, the pixel defining layer 100, the planarization layer 80, and the protective layer are formed from top to bottom by an etching process. 70. Via holes of the passivation layer 50 and the gate insulating layer 30.
  • the preparation process of a specific OLED display substrate is illustrated by taking the OLED display substrate of the bottom gate structure as an example.
  • the concept of the present disclosure can also be applied to an OLED display substrate of a bottom gate structure or an OLED display substrate of a double gate structure, which is not limited in the present disclosure.
  • an organic light emitting diode display substrate comprising: a substrate substrate 1; an auxiliary electrode 22 on the substrate substrate 1; an insulating layer 30 on the auxiliary electrode 22; and organic light emission on the insulating layer 30. a layer 4; and a first electrode 5 on the organic light-emitting layer 4, wherein there is at least one via 35 in the insulating layer 30, the via having a cured conductive element 36, the auxiliary electrode 22 and The first electrode 5 is electrically connected through the conductive element 36 in the via 35.
  • the conductive member 36 is formed by a liquid conductive material, specifically a high-temperature conductive liquid, when the liquid conductive material enters the via hole, the organic light-emitting layer in the via hole can be melted and worn due to its high temperature. Throughout, it is convenient to electrically connect the first electrode 5 through the conductive element 36 in the via 35 such that the voltage drop across the first electrode is reduced.
  • a further embodiment of the invention also relates to a display device comprising the display substrate manufactured in the previous embodiment.
  • the display device may be, for example, a device having a display function such as a mobile phone, a television, a tablet, a notebook computer, a digital photo frame, a personal digital assistant, a navigator, or the like.

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Abstract

一种有机发光二极管显示基板的制备方法，包括：在衬底基板(1)上依次形成辅助电极(2)和绝缘层(3)；在绝缘层(3)上形成至少一个过孔(35)，所述过孔(35)露出所述辅助电极(2)的至少一部分；在所述绝缘层(3)上形成有机发光层(4)；向所述过孔(35)中注入导电液滴(36)；固化所述导电液滴(36)并使得固化的导电液滴(36)与所述辅助电极(2)电连接；以及在所述有机发光层(4)上形成阴极(5)，使所述阴极(5)通过所述过孔(35)中固化的所述导电液滴(36)与所述辅助电极(2)电连接。还提供了一种有机发光二极管显示基板。

Description

有机发光二极管显示基板的制备方法、显示基板及显示装置
相关申请的交叉引用
本申请要求于2017年5月26日递交中国专利局的、申请号为201710387570.4的中国专利申请的权益，该申请的全部公开内容以引用方式并入本文。
技术领域
本公开的实施例涉及显示技术领域，尤其涉及一种有机发光二极管(OLED)显示基板的制备方法及所制造的有机发光二极管显示基板，以及包括该显示基板的显示装置。
背景技术
有机发光二极管(OLED)显示器件中，由于提高分辨率和延长器件寿命的需求，OLED器件逐步由底发射方式转为顶发射。但是，OLED的顶发射阴极有较高的光透过率，但这会使得阴极材料方块的电阻大，无法平衡阴极电压降(IR drop)和光透过率的问题。因此，OLED器件中电极的电压降(IR drop)有待改善。
发明内容
根据本公开的一个方面，提供一种OLED显示基板的制备方法，包括：
在衬底基板上依次形成辅助电极和绝缘层；
在绝缘层上形成至少一个过孔，所述过孔露出所述辅助电极的至少一部分；
在所述绝缘层上形成有机发光层，；
向所述过孔中注入导电液体；
固化所述导电液体并使得固化的导电液体与所述辅助电极电连接；以及
在所述有机发光层上形成第一电极层，使所述第一电极层通过所述过孔中固化的所述导电液体与所述辅助电极电连接。
根据本发明的一个实施例，所述有机发光层包括形成于过孔中的部分。
根据本发明的一个实施例，向所述过孔中注入导电液体包括：通过喷墨打印工艺向所述过孔中注入导电液滴，以穿透所述有机发光层。
根据本发明的一个实施例，所述导电液体的温度约在50℃-300℃之间。
根据本发明的一个实施例，所述导电液滴的材料为合金，所述合金的熔点约在50℃-300℃之间。
根据本发明的一个实施例，所述导电液滴的材料为焊料，所述焊料的熔点约在50℃-300℃之间。
根据本发明的一个实施例，在所述衬底基板上形成导电层，通过一次构图工艺形成所述辅助电极和导电层的图形。
根据本发明的一个实施例，所述导电层的图形为如下图形之一：栅线图形、数据线图形和像素电极图形。
根据本发明的一个实施例，所述绝缘层包括像素界定层，并且，通过一次构图工艺在所述像素界定层中形成用于限定像素单元的过孔和用于暴露所述辅助电极的至少一部分的所述过孔。
根据本发明的一个实施例，用于限定像素单元的过孔和用于暴露所述辅助电极的至少一部分的所述过孔在衬底基板上的正投影不重叠。根据本发明的一个实施例，所述绝缘层包括像素界定层和平坦化层，并且，所述过孔穿透所述像素界定层和平坦化层。
根据本发明的一个实施例，所述绝缘层包括像素界定层、平坦化层、钝化层和栅极绝缘层，所述过孔穿透所述像素界定层、平坦化层、钝化层和栅极绝缘层。
根据本发明的一个实施例，靠近显示基板的中心的所述过孔分布的密度大于靠近显示基板的边缘的所述过孔分布的密度。
根据本发明的一个实施例，所述辅助电极为条状，并平行于栅线或数据线。
根据本发明的一个实施例，所述第一电极层是阴极层。
本发明第二方面提供一种有机发光二极管显示基板，包括：衬底基板；在衬底基板上的辅助电极；在辅助电极上的绝缘层；
在绝缘层上的有机发光层；以及在有机发光层上的第一电极，其中，在绝缘层中具有至少一个过孔，所述过孔中具有被固化的导电元件，所述辅助电极和所述第一电极通过所述过孔中的所述导电元件电连接。
根据本发明的一个示例性实施例，靠近显示基板的中心的所述过孔分布的密度大于靠近显示基板的边缘的所述过孔分布的密度。
根据本发明的一个示例性实施例，所述辅助电极为条状，并平行于栅线或数据线。
根据本发明的一个示例性实施例，所述第一电极是阴极。
本发明第三方面的实施例提供一种显示装置，包括前述第二方面的各实施例的显示基板。
附图说明
图1是根据本公开的一个实施例的OLED显示基板的制备方法的流程图。
图2a-2d是示出根据本公开的一个实施例的制作OLED显示器的方法的过程的示意图。
图3示出了根据本公开的一个实施例的阵列基板的平面示意图。
图4a-4m根据本公开的一个实施例的制作一个具体的OLED显示器的过程的图示。
具体实施方式
为更清楚地阐述本公开的目的、技术方案及优点，以下将结合附图对本公开的实施例进行详细的说明。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。应当理解，下文对于实施例的描述旨在对本公开的总体构思进行解释和说明，而不应当理解为是对本公开的限制。在说明书和附图中，相同或相似的附图标记指代相同或相似的部件或构件。为了清晰起见，附图不一定按比例绘制。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”“顶”或“底”等等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。当诸如层、膜、区域或衬底基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
本公开的实施例针对现有技术存在的问题，提出一种有机发光二极管显示基板的制备方法，其能够有效地将阴极层通过导电元件与辅助电极连接，降低顶发射OLED显示基板的阴极压降，有利于制备大尺寸显示屏。
根据本公开实施例提出的有机发光二极管显示基板的制备方法，首先，在 衬底基板上依次形成辅助电极和具有至少一个过孔的绝缘层，在所述过孔中露出所述辅助电极的至少一部分。接着，在所述绝缘层上形成有机发光层。之后，向所述过孔中注入导电液体，使所述导电液体固化后与所述辅助电极电连接。然后，在所述有机发光层上形成阴极层，所述阴极层通过所述过孔中固化的导电液体与所述辅助电极电连接。
根据上述OLED显示基板的制备方法，通过向辅助电极上方的过孔中注入导电液体，使所述导电液体固化后与所述辅助电极电连接，之后在有机发光层上形成阴极层，使所述阴极层通过所述过孔中固化的导电液体与所述辅助电极电连接，可以有效降低阴极层的电压降，有利于制备大尺寸显示屏。
在有机发光层先于透明阴极制作的情况下，有时透明阴极制作前有机发光层会优先进入辅助电极上方的过孔中，这些有机发光层材料会阻止透明阴极与辅助电极的接触，导致透明阴极与辅助电极无法电连接。根据本公开的一些实施例，注入的导电液体，例如，高速喷射的液体或者高温的液体可以破坏辅助电极上方的过孔中的有机发光层，使得辅助电极能够与阴极有效电连接。
图1是根据本公开的一个实施例的OLED显示基板的制备方法的流程图。
如图1所示，根据本公开的一个实施例的OLED显示基板的制备方法包括以下步骤：
S11：在衬底基板上依次形成辅助电极和绝缘层。
S12：在绝缘层上形成至少一个过孔，所述过孔露出所述辅助电极的至少一部分。
衬底基板可以由碱性玻璃制成。辅助电极可以通过溅射工艺制作在衬底基板上。辅助电极的材料例如可以为各种制作导线的金属材料，包括但不限于金、银、铜、铝、铬、钼、合金等。绝缘层的材料例如可以为二氧化硅、氮化硅、氮氧化硅等或其混合材料。根据一个示例，可以通过化学汽相沉积工艺在辅助电极上形成绝缘层，并通过光刻工艺图案化绝缘层以在绝缘层中形成过孔。根据另外的示例，可采用干法蚀刻在绝缘层中形成过孔，本公开对此不做限定。
S13：在所述绝缘层上形成有机发光层。有机发光层可以包括空穴注入层、空穴传输层、电致发光层、电子传输层、电子注入层等。可采用蒸镀工艺逐层沉积有机发光层的各层材料。
S14：向所述过孔中注入导电液体。
S15：固化所述导电液体并使得固化的导电液体与所述辅助电极电连接。导电液体例如为熔融态的导电合金或者焊料。导电液体例如借助重力或高温击穿或破坏有机发光层而直接接触有机发光层下面的辅助电极，从而与辅助电极形成导电连接。
S16：在所述有机发光层上形成第一电极层，使所述第一电极层通过所述过孔中固化的所述导电液体与所述辅助电极电连接。其中，第一电极层是阴极层，例如，阴极层可以采用具有高的光透过率的金属氧化物材料制成，例如氧化铟锡、氧化铟锌、氧化锌、氧化铟、氧化铟镓和氧化铝锌中的一种或其任意组合，本公开的实施例对此不做限定。阴极材料可以通过溅射工艺或蒸镀工艺沉积在有机发光层上方，在此不做限定。
根据上述实施例的OLED显示基板的制备方法，通过向过孔中注入导电液体以穿透过孔中的有机发光层，所述液体固化后与所述辅助电极电连接；随后，使阴极层通过固化的导电液体与辅助电极导电连接，可以有效降低阴极层的电压降，有利于制备大尺寸显示屏。
根据本公开的一个示例的实施例，在上述步骤S14中，向过孔中注入导电液体可以包括：通过喷墨打印工艺向过孔中喷射导电的液滴。采用喷墨打印可以快速将导电的液滴注入辅助电极上方的过孔中，并破坏过孔中的有机发光层，实现辅助电极和阴极的导电接触。喷墨打印具有操作简单、成本低廉、定位准确、效率高及易于实现大尺寸等优点。
本领域技术人员可以想到，采用其它方法向过孔中注入导电液体也是可行的，只要能够使导电液体穿透有机发光层，实现辅助电极与其上方的阴极电连接即可。
根据一个实施例，当采用喷墨打印工艺向过孔中喷射导电的液滴时，所喷射的液滴的温度在50℃以上，例如在50℃-300℃之间。有机发光层材料的熔点在50℃左右，当喷射的液滴的温度大于50℃时，有机发光层材料可以被熔化和穿透，导电液滴能够直接接触有机发光层下面的辅助电极。另外，考虑到与喷墨打印工艺的兼容性，喷射的液滴的温度应小于300℃，以便于实施喷墨打印。
例如，在喷墨打印工艺中所喷射的液滴的材料可以为合金材料，例如钡、锡、铅、铟等的合金。合金的熔点例如在50℃-300℃之间，以能够熔化下方的有机发光层材料，并且易于形成导电液体。
根据另外的实施例，在喷墨打印工艺中所喷射的液滴的材料可以为焊料，例如钎焊焊料，其熔点例如在50℃-300℃之间，以能够熔化下方的有机发光层材料，并且易于形成导电液体。
图2a-2d是示出根据本公开的一个实施例的制作OLED显示器的方法的原理的示意图。
图2a示出了喷墨打印之前的OLED显示基板的剖面结构示意图。如图2a所示，在喷墨打印之前，OLED显示基板包括：衬底基板1、在衬底基板上的辅助电极2、在辅助电极2上的绝缘层3。所述绝缘层3中具有至少一个过孔35。所述过孔35被有机发光层4填充。在这种状态下，当后续层积阴极层时，阴极层沉积在过孔35中的有机发光层4的上方，有机发光层4不导电，会阻断阴极与辅助电极2的电连接，因而，辅助电极2不能起到降低阴极压降的作用。因此，必须去除过孔35中的有机发光层4，使得辅助电极2能够与阴极电连接。
本公开的实施例提出了一种通过喷墨打印快速去除过孔中的有机发光层4的方法。图2b示出了喷墨打印过程中液滴尚未进入辅助电极2上方的过孔35的状态。如图2b所示，通过喷墨打印机向过孔35中喷射导电的液滴36。所采 用的喷墨打印机例如市售的Micro LAB JET 4TM喷墨打印机。导电液滴36例如借助重力或喷射的冲击力穿透有机发光层4而接触有机发光层4下方的辅助电极2。
图2c示出了液滴36进入过孔35中且破坏有机发光层4而与辅助电极2直接接触的状态。喷射的液滴由导电材料制成，因此，液滴36在过孔35中固化后会形成导电元件与辅助电极2导电接触。
注意，只在需要连接辅助电极2与阴极的过孔中打印导电液滴36，而OLED显示基板中其余位置的过孔，例如，用于形成像素的过孔45中则不必打印导电液滴36。此外，虽然图2c中示出了导电液滴36取代过孔35中的有机发光层的状态，但是，导电液滴击穿过孔35中的有机发光层4即可，无须完全去除有机发光层4。
之后，如图2d所示，例如通过溅射工艺在有机发光层4的上方沉积一层透明导电层，例如ITO层，并刻蚀后形成阴极5。此时，过孔35中的有机发光层已被破坏，并被导电元件37部分代替，因此，阴极5可通过过孔35中的导电元件37与辅助电极2导电连接。通过上述方法制造的OLED显示基板有效将阴极层通过导电元件与辅助电极连接，可以有效降低阴极的电压降，有利于制备大尺寸显示屏。
根据一个示例的实施例，可以向过孔35中喷射高温的导电液滴。因为有机发光层材料的熔点较低，例如在50℃左右，高温的导电液滴可以熔化和破坏过孔35中的有机发光层4。例如，液滴的温度可以在50℃以上，例如在50℃-300℃之间。可选地，液滴的温度可以为100℃。可选地，液滴的温度可以在50℃-100℃之间，或者100℃-300℃
作为例子，在喷墨打印工艺中所喷射的液滴的材料可以为合金材料，例如钡、锡、铅、铟等的合金。合金的熔点可以选择在50℃-300℃之间，以有利于熔化有机发光层材料，并且该合金易于形成导电液体。
根据另外的例子，在喷墨打印工艺中所喷射的液滴的材料也可以为焊料。 可以选择熔点在50℃-300℃之间的焊料，例如锡铅焊料。
本公开另一方面的实施例还提供了一种采用上述方法制备的OLED显示基板。如图2d所示，制备的OLED显示基板包括：衬底基板1；在衬底基板1上的辅助电极2；在辅助电极2上的绝缘层3；在绝缘层3上的有机发光层4；以及在有机发光层上的阴极5。在绝缘层3中具有至少一个用于连接辅助电极2和阴极5的过孔35。所述过孔35中具有导电元件37，所述辅助电极2和所述阴极5通过所述导电元件37电连接。
所述导电元件37是通过向绝缘层3中的过孔中注入导电液体并固化后形成的。在注入导电液体的过程中用于连接辅助电极2和阴极5的有机发光层4被破坏，使导电液体固化后直接接触有机发光层下方的辅助电极2。从而，阴极5通过过孔35中的导电元件37与辅助电极2电连接，实现了降低阴极5电压降的目的，有利于制作大尺寸显示屏。
在上述实施例中，只是示意地示出了OLED显示基板的部分结构，以说明本公开的实施例。在实际的OLED显示基板中，图2a-2d所示的衬底基板1可以为阵列基板的一部分结构，例如阵列基板中的玻璃基板，或阵列基板中任意导电层下方的部分结构。辅助电极2可位于阵列基板1的导电层中。所述导电层例如为金属层。
具体地，所述金属层可以为栅线、数据线或像素电极所在的金属层。栅线可以和薄膜晶体管的栅极位于同一层。数据线可以和薄膜晶体管的源漏极位于同一层。像素电极可以为OLED显示器件的阳极。这样，不必在阵列基板中增加额外的导电层或金属层，有利于减小显示器件的厚度，简化显示器件的结构；并且，可以在制作栅线、数据线或像素电极的同时制作辅助电极，不必增加额外的制作工艺，从而简化制作工艺。
当辅助电极位于栅线所在的金属层中时，可以通过一次构图工艺形成辅助 电极和阵列基板的栅线。辅助电极和栅线例如可以采用相同的金属材料形成，例如包括但不限于金、银、铜、铝、铬、钼、合金等，在此不做限制。这样，可以在制作阵列基板的栅线的同时制作辅助电极，不必增加额外的制作工艺，从而简化制作工艺。
类似地，当辅助电极位于数据线所在的金属层中时，可以通过一次构图工艺形成辅助电极和阵列基板的数据线。辅助电极和数据线例如可以采用相同的金属材料形成，例如包括但不限于金、银、铜、铝、铬、钼、合金等，在此不做限制。这样，可以在制作阵列基板的数据线的同时制作辅助电极，不必增加额外的制作工艺，从而简化制作工艺。
类似地，当辅助电极位于像素电极所在的导电层中时，可以通过一次构图工艺形成辅助电极和阵列基板的像素电极。像素电极的材料例如包括但不限于金、银、铜、铝、铬、钼、合金等，也可是氧化铟锡(ITO)等。在此不做限制。这样，可以在制作阵列基板的像素电极的同时制作辅助电极，不必增加额外的制作工艺，从而简化制作工艺。
根据一个具体的实施例，辅助电极上方的绝缘层可以为像素界定层。此时，可以在所述像素界定层中形成用于限定像素单元的过孔的同时形成用于暴露所述辅助电极的所述过孔。这样，可以通过同一次构图工艺，例如光刻工艺，在制作像素单元的过孔和用于连接辅助电极和阴极的过孔，不必增加额外的制作工艺，从而简化制作工艺。
根据另一个实施例，辅助电极上方的绝缘层可以为栅极绝缘层和平坦化层。栅极绝缘层是位于栅极的上方的绝缘层，平坦化层是位于薄膜晶体管的源漏极上方的绝缘层。这时，用于连接辅助电极和阴极的过孔需要穿透栅极绝缘层和平坦化层。例如，可以在形成栅极绝缘层和平坦化层后通过干法蚀刻一次性形成穿透两层的过孔。
根据另一个实施例，辅助电极上方的绝缘层可以为平坦化层。这时，用于 连接辅助电极和阴极的过孔只需要穿透平坦化层即可。因此可以在形成平坦化层后通过干法蚀刻在平坦化层中形成过孔，以连接辅助电极和阴极。
可选地，可以对应每个像素设置一个用于连接辅助电极和阴极的过孔。或者，也可以是对应多个像素设置一个用于连接辅助电极和阴极的过孔。过孔在整个阵列基板中可以均匀设置，也可以不必均匀地设置。
对于大尺寸的显示面板，由于驱动电路设置在阵列基板的边缘部分，因此在靠近阵列基板中部处的阴极压降损失较大，而阵列基板的边缘部分处阴极压降损失较小。因此，根据一个实施例，将靠近阵列基板的中心的用于连接辅助电极和阴极的过孔的分布密度设置为大于靠近阵列基板的边缘的所述过孔的分布密度。这样，在阵列基板的中心部分处通过过孔引入较多的辅助电极，能够避免阵列基板中心处的压降损失过大，导致像素显示异常。
图3示出了根据本公开的一个实施例的阵列基板的平面示意图,其中，为简明起见，仅示出了开关晶体管T，驱动晶体管、电容器等本领域已知的用于OLED显示器件的阵列基板的其它元件在此不再赘述。如图3所示，对于包括4×4个像素单元的阵列基板，靠近阵列基板的中心的2×2个像素单元可以设置较多的过孔，而靠近阵列基板的边缘的其它像素单元可以设置较少的过孔。具体地，靠近阵列基板的中心的第二行第二列、第二行第三列、第三行第二列和第三行第三列的每个像素单元中的用于连接辅助电极22和阴极的过孔H的数量设置为三个，而靠近阵列基板的边缘的其它像素单元中的过孔H的数量设置为一个。
或者，根据其它的实施例，在靠近阵列基板的中心的部分区域中，每一个像素单元设置一个过孔，而在靠近阵列基板的边缘的部分区域，多个像素单元设置一个过孔。越靠近阵列基板的中心，过孔的分布密度越大。
根据显示器件的具体结构和辅助电极的具体位置，所述绝缘层可以为栅绝 缘层、钝化层、像素界定层和平坦化层中的一层或多层。所述过孔可以是穿透相应的一层或多层绝缘层的过孔，以用于电连接辅助电极和阴极。
为了便于制作辅助电极，辅助电极22可以为条状，并平行于栅线G或数据线D。图3中示出了辅助电极22平行于栅线G的情况。另外，为了不影响像素开口率，辅助电极可以形成在像素之间的间隙中。
本公开上述实施例的OLED显示基板的制备方法可以应用于制作顶栅形OLED显示器，也可以应用于制作底栅形OLED显示器，本公开对此不做限定。
以下参照图4a-4m以底栅结构的OLED显示器为例说明根据本公开的方法制作OLED显示基板的具体过程以及形成的显示基板。本领域技术人员应当理解，本公开的方法也可以应用于制作底栅型OLED显示器。
首先，提供基板10。所述基板10例如可以由无碱玻璃制成，本公开对此不作限制。
接着，在基板10上形成TFT(薄膜晶体管)。以底栅结构为例，如图4a所示，在基板10上方层积第一金属层，并通过例如刻蚀工艺图案化第一金属层以形成栅极21和辅助电极22。例如，栅极金属材料层的材料可以为钼或铜等导电金属，这里不做限定。在图案化第一金属层以形成栅极21和辅助电极22的同时可以形成栅线。即，通过同一构图工艺图案化同一金属层以同时形成栅极21、辅助电极22和栅线23。
应当注意，为了使附图看起来更加清楚，在后续的图4b-4m中，省去了栅线23，以便使本领域技术人员更容易理解本公开的实施例。
接着，如图4b所示，在栅极21和辅助电极22上方铺设一层栅极绝缘层30，并通过例如光刻工艺图案化栅极绝缘层30以在栅极绝缘层30中形成第一过孔31。第一过孔31将用于连接OLED显示基板的阴极和辅助电极22。栅极绝缘层的材料例如可以为氧化硅、氮氧化硅等本领域栅极绝缘材料，这里不做 限定。
如图4c所示，在栅极绝缘层30上方沉积一层半导体层并图案化以形成薄膜晶体管的半导体有源层40。半导体有源层40的材料例如为铟镓锌氧化物等常用材料，这里不做限定。
接下来，参考图4d，在半导体有源层40上方沉积一层钝化层(刻蚀阻挡层)50，例如无机非金属材料层，并经刻蚀工艺图案化后在钝化层50中形成第二过孔51和第三过孔52。第二过孔51分别形成在半导体有源层40的两端，将用于连接薄膜晶体管的源极和漏极。第三过孔52形成在辅助电极22上方，与第一过孔31连通。第三过孔52也将用于连接OLED显示基板的阴极和辅助电极22。
如图4e所示，在钝化层50上方沉积第二金属层，通过例如刻蚀工艺图案化第二金属层以形成薄膜晶体管的源极61和漏极62。第二金属层的材料可以为本领域源漏极金属材料，这里不做限定。在图案化第二金属层以形成源极61和漏极62的同时可以形成数据线63。即，通过同一构图工艺图案化同一金属层以同时形成源极61、漏极62和数据线63。
应当注意，为了使附图看起来更加清楚，在后续的图4f-4m中，省去了数据线63，以便使本领域技术人员更容易理解本公开的实施例。
可选地，如图4f所示，在第二金属层的上方可形成保护层70。保护层70例如由无机绝缘材料形成，并通过例如光刻工艺图案化保护层70以在保护层70中形成第四过孔71和第五过孔72。第四过孔71形成在薄膜晶体管的漏极62上方，第五过孔72形成在辅助电极22上方，并与第一过孔31、第三过孔52连通。第四过孔71将用于连接像素电极和薄膜晶体管的漏极。第五过孔72将用于连接OLED显示基板的阴极和辅助电极22。
如图4g所示，在保护层70上方形成平坦化层80。该平坦化层80的材料例如为氧化硅、氮氧化硅、氮化硅等本领域用于平坦化层的绝缘材料，在这里不作限定。通过例如光刻工艺图案化平坦化层80，以在平坦化层80中形成第 六过孔81和第七过孔82。第六过孔81形成在薄膜晶体管的漏极62的上方，与第四过孔71连通。第七过孔82形成在辅助电极22上方，并与第一过孔31、第三过孔52、第五过孔72连通。第六过孔81将用于连接像素电极和薄膜晶体管的漏极62，第七过孔82将用于连接OLED显示基板的阴极和辅助电极22。
如图4h所示，例如通过溅射工艺在平坦化层80上方沉积第三金属层，以用于形成OLED显示基板的阳极90，即阵列基板的像素电极。第三金属层的材料可以为本领域用于OLED显示基板的阳极金属材料，这里不做限定。根据需要，可选地，第三金属层可以包括金属反射层和ITO电极。第三金属层在第七过孔82处也形成与第七过孔82连通的第八过孔92。因为第三金属层为导电层，不会影响辅助电极22与阴极的导电连接。这样，第三金属层也可以进入第七过孔82中，而不必在第三金属层中形成过孔92。或者，第三金属层可以部分地延伸到像素电极层下方，但不进入第七过孔82中。
如图4i所示，在第三金属层的上方铺设一层绝缘材料层，例如光刻胶层，并通过例如曝光和显影以图案化该光刻胶层，以在光刻胶层中形成像素界定层100，并且，在所述像素界定层100中形成限定像素单元的第九过孔101和用于连通辅助电极22和阴极的第十过孔102，第十过孔102和第八过孔92连通。第九过孔101和第十过孔102在衬底基板上的正投影不重叠。
如图4j所示，在像素界定层100上方例如通过蒸镀工艺沉积一层有机发光层200。具体地，有机发光层可以包括空穴注入层、空穴传输层、电致发光层、电子传输层、电子注入层等多层。可采用蒸镀工艺逐层沉积有机发光层的各层材料。
如图4k所示，因为有机发光层材料为整面蒸镀，所以有机发光层材料在进入像素界定层100限定的像素区域的同时，也进入了穿透栅级绝缘层30、钝化层50、保护层70、像素界定层80、阳极90和像素界定层100的由第一过孔31、第三过孔52、第五过孔72、第七过孔82、第八过孔92和第十过孔102形成的连通孔中。
在这种状态下，当后续OLED制作工艺中将阴极层沉积在有机发光层200上方时，即使阴极层进入由第一过孔31、第三过孔52、第五过孔72、第七过孔82、第八过孔92和第十过孔102形成的连通孔中，也由于该连通孔被有机发光层200填充而不能够与辅助电极22电连接。因此，必须去除辅助电极22上方的过孔中的有机发光层200，以使得阴极和辅助电极22电连接，从而起到降低阴极压降，进而提高显示器显示质量的目的。
因此，根据本公开的一个实施例，通过喷墨打印工艺向辅助电极22上方的过孔(连通孔)中喷射导电的液滴，以破坏过孔中的有机发光层200，使得后续制作中当沉积阴极层时阴极能够和辅助电极22电连接。具体地，如图4k所示，可以向辅助电极22上方的过孔中喷射高温液滴，例如温度在50℃-300℃。可选地，导电液滴的温度可以为100℃。通过喷射高温的导电液滴，可熔化和击穿过孔中的有机发光层。之后，高温的导电液滴冷却固化并形成导电元件300。
根据一个实施例，所喷射的液滴的材料为合金，例如熔点在50℃-300℃之间的合金材料。例如钡、锡、铅、铟等的合金。
根据另外的实施例，所喷射的液滴的材料可以为钎焊用焊料，例如锡铅焊料。可选地，所述焊料的熔点在在50℃-300℃之间，例如熔点为100℃。
如图4l所示，在有机发光层200上方沉积例如ITO、IZO等材料的透明阴极层400。此时，阴极层材料在进入像素界定层80限定的像素区域的同时，也进入了穿透栅级绝缘层30、钝化层50、保护层70、像素界定层80和阳极90的由第一过孔31、第三过孔52、第五过孔72、第七过孔82、第八过孔92和第十过孔102形成的连通孔中。由于该连通孔中的有机发光层200被高温导电液滴穿透，并代之以导电元件300，所以阴极层400可通过导电元件300与辅助电极22电连接。由于连接了辅助电极，可以降低阴极压降，进而提高显示器显示质量，并有利于制作在尺寸显示面板。
接着，可在阴极层400上方通过化学汽相沉积等方法沉积一层无机绝缘材 料的阻挡层500，以密封像素单元。形成的阵列基板如图4m所示。
本领域技术人员可以理解，在上述步骤之后，还可以制作彩膜基板，并与所形成的阵列基板对盒以形成OLED显示设备。
根据上述实施例的OLED显示基板的制备方法，通过向过孔中注入导电液体，以穿透过孔中的有机发光层，且所述液体固化后形成导电元件与所述辅助电极电连接；随后，使阴极层通过导电液体固化成形成的导电元件与辅助电极导电连接。因此，可以有效降低阴极层的电压降，有利于制备大尺寸显示屏。
虽然以上实施例中，辅助电极22与栅极21形成在同一金属层中，并且辅助电极22通过穿透栅级绝缘层30、钝化层50、保护层70、平坦化层80、像素界定层100等多个绝缘层的过孔与阴极层400电连接，但是本公开不限于此。
根据以上实施例的变形例，辅助电极22可以与源极61和漏极62形成在同一金属层中。当辅助电极22与源极61和漏极62形成在同一金属层中时，连通阴极400和辅助电极22的过孔可以仅穿透保护层70、平坦化层80和像素界定层100，而不必穿透栅级绝缘层30和钝化层50。
根据以上实施例的另外的变形例子，辅助电极22可以作为像素电极的阳极90形成在同一层中。当辅助电极22与阳极90形成在同一层中时，连通阴极400和辅助电极22的过孔可以仅穿透像素界定层100，而不必穿透栅级绝缘层30、钝化层50、保护层70和平坦化层80。
因此，辅助电极可以形成于阵列基板中的任一导电层中，可以为金属导电层或非金属导电层，本公开对此不做限制。这样，可以在制作阵列基板的导电层的同时制作辅助电极，不必增加额外的制作工艺，从而简化制作工艺。
此外，以上实施例中，有些层可以省略，例如可以根据需要省略保护层70。或者，可以根据需要再增加另外的层，只要可以通过穿过绝缘层的过孔使辅助电极和阴极电连接即可。因此，本公开实施例附图中，只涉及到与本公开实施 例涉及到的结构，其他结构可参考通常设计。
此外，以上实施例中以逐层的方式形成连通辅助电极22和阴极层400的过孔，但是，本公开不限于此。例如，在制作栅级绝缘层30、钝化层50、保护层70、平坦化层80、像素界定层100时，可以不必预先在辅助电极22上方的位置形成过孔，而是在制作完成栅级绝缘层30、钝化层50、保护层70、平坦化层80、像素界定层100之后，通过刻蚀工艺一次性形成从上至下穿透像素界定层100、平坦化层80、保护层70、钝化层50和栅级绝缘层30的过孔。
此外，以上以底栅结构的OLED显示基板为例说明了一个具体的OLED显示基板的制备过程。但是，本领域技术人员应当理解，本公开的构思也可以用于底栅结构的OLED显示基板或双栅结构的OLED显示基板，本公开对此不做限定。
本发明另一方面提供一种有机发光二极管显示基板，包括：衬底基板1；在衬底基板1上的辅助电极22；在辅助电极22上的绝缘层30；在绝缘层30上的有机发光层4；以及在有机发光层4上的第一电极5，其中，在绝缘层30中具有至少一个过孔35，所述过孔中具有被固化的导电元件36，所述辅助电极22和所述第一电极5通过所述过孔35中的所述导电元件36电连接。本案中由于导电元件36是由液态的导电材料，具体可以是高温的导电液体固化而成，在该液态导电材料进入过孔时，由于其高温，可以使得过孔中的有机发光层熔化和穿透，这样便可方便的使第一电极5通过过孔35中的所述导电元件36电连接，使得降低第一电极上的压降。
本发明另外的实施例还涉及一种显示装置，包括前述实施例所制造的显示基板。所述显示装置例如可以为手机、电视机、平板电脑、笔记本电脑、数码相框、个人数字助理、导航仪等具有显示功能的装置。
以上通过举例的方式描述了本公开的几个实施例，但是本领域的技术人员将会认识到，在不背离本公开的构思的前提下，可以对本公开的实施例做出各种修改和变化。所有这些修改和变化都应当落入本公开的保护范围内。因此， 本公开的保护范围应以权利要求限定的保护范围为准。

Claims (20)

  1. 一种有机发光二极管显示基板的制备方法，包括：
    在衬底基板上依次形成辅助电极和绝缘层；
    在绝缘层上形成至少一个过孔，所述过孔露出所述辅助电极的至少一部分；
    在所述绝缘层上形成有机发光层；
    向所述过孔中注入导电液体；
    固化所述导电液体并使得固化的导电液体与所述辅助电极电连接；以及
    在所述有机发光层上形成第一电极层，使所述第一电极层通过所述过孔中固化的所述导电液体与所述辅助电极电连接。
  2. 根据权利要求1所述的方法，其中，所述有机发光层包括形成于过孔中的部分。
  3. 根据权利要求2所述的方法，其中，向所述过孔中注入导电液体包括：通过喷墨打印工艺向所述过孔中注入导电液滴，以穿透过孔中的所述有机发光层。
  4. 根据权利要求1所述的方法，其中，所述导电液体的温度约在50℃-300℃之间。
  5. 根据权利要求3所述的方法，其中，所述导电液滴的材料为合金，所述合金的熔点约在50℃-300℃之间。
  6. 根据权利要求3所述的方法，其中，所述导电液滴的材料为焊料，所述焊料的熔点约在50℃-300℃之间。
  7. 根据权利要求1-6任一项所述的方法，其中，在所述衬底基板上形成导电层，通过一次构图工艺形成所述辅助电极和导电层的图形。
  8. 根据权利要求7所述的方法，其中，所述导电层的图形为如下图形之一：栅线图形、数据线图形和像素电极图形。
  9. 根据权利要求1-6任一项所述的方法，其中，所述绝缘层包括像素界定 层，并且，通过一次构图工艺在所述像素界定层中形成用于限定像素单元的过孔和用于暴露所述辅助电极的至少一部分的所述过孔。
  10. 根据权利要求9所述的方法，其中，用于限定像素单元的过孔和用于暴露所述辅助电极的至少一部分所述过孔在衬底基板上的正投影不重叠。
  11. 根据权利要求1-6任一项所述的方法，其中，所述绝缘层包括像素界定层和平坦化层，并且，所述过孔穿透所述像素界定层和平坦化层。
  12. 根据权利要求1-6任一项所述的方法，其中，所述绝缘层包括像素界定层、平坦化层、钝化层和栅极绝缘层，所述过孔穿透所述像素界定层、平坦化层、钝化层和栅极绝缘层。
  13. 根据权利要求1-6任一项所述的方法，其中，靠近显示基板的中心的所述过孔分布的密度大于靠近显示基板的边缘的所述过孔分布的密度。
  14. 根据权利要求1-13任一项所述的方法，其中，所述辅助电极为条状，并平行于栅线或数据线。
  15. 根据权利要求1所述的方法，其中，所述第一电极层是阴极层。
  16. 一种有机发光二极管显示基板，包括：
    衬底基板；
    在衬底基板上的辅助电极；
    在辅助电极上的绝缘层；
    在绝缘层上的有机发光层；以及
    在有机发光层上的第一电极，
    其中，在绝缘层中具有至少一个过孔，所述过孔中具有被固化的导电元件，所述辅助电极和所述第一电极通过所述过孔中的所述导电元件电连接。
  17. 根据权利要求16所述的有机发光二极管显示基板，其中，靠近显示基板的中心的所述过孔分布的密度大于靠近显示基板的边缘的所述过孔分布的密度。
  18. 根据权利要求16所述的有机发光二极管显示基板，其中，所述辅助电 极为条状，并平行于栅线或数据线。
  19. 根据权利要求16所述的有机发光二极管显示基板，其中，所述第一电极是阴极。
  20. 一种显示装置，包括如权利要求16-19任一项所述的有机发光二极管显示基板。
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