WO2018214008A1 - 一种光模块结构及其制作方法 - Google Patents

一种光模块结构及其制作方法 Download PDF

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Publication number
WO2018214008A1
WO2018214008A1 PCT/CN2017/085436 CN2017085436W WO2018214008A1 WO 2018214008 A1 WO2018214008 A1 WO 2018214008A1 CN 2017085436 W CN2017085436 W CN 2017085436W WO 2018214008 A1 WO2018214008 A1 WO 2018214008A1
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WO
WIPO (PCT)
Prior art keywords
optical
chip
coupling
substrate
waveguide
Prior art date
Application number
PCT/CN2017/085436
Other languages
English (en)
French (fr)
Inventor
董振
刘军
曾理
赵庆
宋小鹿
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP17910824.6A priority Critical patent/EP3617763A4/en
Priority to PCT/CN2017/085436 priority patent/WO2018214008A1/zh
Priority to CN201780049585.8A priority patent/CN109564332B/zh
Publication of WO2018214008A1 publication Critical patent/WO2018214008A1/zh
Priority to US16/692,041 priority patent/US10921534B2/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/422—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements
    • G02B6/4221—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements involving a visual detection of the position of the elements, e.g. by using a microscope or a camera
    • G02B6/4224—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements involving a visual detection of the position of the elements, e.g. by using a microscope or a camera using visual alignment markings, e.g. index methods
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236—Fixing or mounting methods of the aligned elements
    • G02B6/4238—Soldering
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236—Fixing or mounting methods of the aligned elements
    • G02B6/4245—Mounting of the opto-electronic elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4256—Details of housings
    • G02B6/4257—Details of housings having a supporting carrier or a mounting substrate or a mounting plate
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4228—Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4266—Thermal aspects, temperature control or temperature monitoring
    • G02B6/4268—Cooling
    • G02B6/4269—Cooling with heat sinks or radiation fins
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects

Definitions

  • the present application relates to the field of optical communication technologies, and in particular, to an optical module structure and a method for fabricating the same.
  • optical modules with high data capacity are key.
  • the optical module has a low package density and a small number of channels, and it is difficult to support a large-capacity data optical interconnection.
  • An embodiment of the present application provides an optical module structure, including: a substrate; an optical chip and an electrical chip fixedly connected to the substrate, so as to package the optical chip and the electrical chip on the same substrate
  • the package density of the optical module structure is increased, and then the channel of the optical module structure is increased under the same area to facilitate optical interconnection of large-capacity data.
  • the optical module structure provided by the embodiment of the present application further includes: an optical coupling structure fixedly connected to the optical chip; wherein the optical chip has a first reference plane toward a side of the substrate, the first reference At least one first alignment mark is disposed on the surface; the light coupling structure has a second reference surface, and the second reference surface is provided with at least one second alignment mark; wherein the first reference surface and the Aligning the second reference surface, the first alignment mark and the second alignment mark being aligned such that alignment by the first reference surface and the second reference surface and the first alignment
  • the marking and the second alignment mark are aligned to achieve alignment, and the passive alignment method is convenient and quick, avoiding errors caused by human alignment, and the alignment precision is high.
  • the optical coupling structure has a first vertical plane perpendicular to the second reference surface, and when the optical chip is optically coupled with the optical coupling structure, the first vertical surface is The optical chip is aligned toward an end surface of one side of the light coupling structure.
  • the coupling between the optical coupling structure and the optical chip is evanescent wave coupling, edge coupling, or vertical coupling.
  • the optical waveguide in the optical coupling structure and the optical waveguide in the optical chip pass through Coupling the first reference plane of the optical chip and the second reference plane of the optical coupling structure; wherein the optical waveguide in the optical chip has a waveguide direction at the coupling toward the first vertical plane, the optical coupling
  • the waveguide direction of the optical waveguide in the structure is parallel to the waveguide direction of the optical waveguide in the optical chip at the coupling, and the direction is opposite.
  • the optical waveguide in the optical coupling structure and the optical waveguide in the optical chip pass the light Coupling a first end surface of the chip and a first vertical surface of the optical coupling structure; an optical waveguide in the optical chip faces a waveguide direction at a coupling toward the first vertical surface, and an optical waveguide in the optical coupling structure
  • the waveguide direction at the coupling is parallel to the waveguide direction of the optical waveguide in the optical chip at the coupling, and the direction is opposite.
  • the optical waveguide in the optical coupling structure and the optical waveguide in the optical chip pass the light Coupling a first reference plane of the chip and a second reference plane of the optical coupling structure; wherein a waveguide direction of the optical waveguide in the optical chip faces the first vertical plane at a coupling, in the optical coupling structure
  • the waveguide of the optical waveguide at the coupling is perpendicular to the first reference plane and faces the first reference plane.
  • a grating coupler is further disposed between the optical coupling medium and the optical waveguide of the optical chip.
  • the optical chip and the electric chip are juxtaposed on the substrate, and the fixed connection manner of the optical chip and the substrate and the fixed connection manner of the electric chip and the substrate are the same.
  • the optical chip and the electrical chip can be performed on the same production line, thereby improving the generation efficiency of the optical module structure and reducing the generation cost.
  • a fixed connection manner between the optical chip and the substrate is soldering, and a fixed connection manner between the electrical chip and the substrate is also soldering.
  • a monolithic integrated light source is disposed on the optical chip to improve integration of the optical module structure.
  • the optical chip is fixed with a light source chip toward a side of the substrate, the substrate has a first groove facing a surface of the optical chip, and the light source chip is located at the first concave In the slot, the integration of the optical module structure is increased, and the volume of the optical module structure is increased due to the introduction of the light source chip.
  • the optical chip has a second recess in a side surface of the substrate, and the optical chip is located in the second recess to further reduce the introduction due to the introduction of the light source chip.
  • the increased volume of the optical module structure is not limited to, but not limited to, but not limited to, but not limited to, but not limited to, but not limited to,
  • the fixed connection manner between the light source chip and the optical chip is soldering, so that the fixing of the optical chip and the light source chip may be fixed on the same production line as the optical chip and the substrate. Finished up to improve production efficiency.
  • the optical module structure further includes: a heat dissipation structure on a side of the optical chip and the electrical chip facing away from the substrate, the heat dissipation structure being at least partially in contact with the optical chip, and The electrical chip is at least partially in contact with each other, so that the optical module structure can use the heat dissipation structure to simultaneously dissipate heat from the optical chip and the electrical chip, thereby improving heat dissipation efficiency of the optical module structure.
  • the embodiment of the present application further provides a method for packaging an optical module structure, including:
  • the optical coupling structure Preparing an optical coupling structure, the optical coupling structure having a second reference surface, the second reference surface being provided with at least one second alignment mark;
  • the optical coupling structure is fixed on the optical chip.
  • fixing the optical chip and the electrical chip on the first surface of the substrate includes:
  • the optical chip and the electrical chip are separately soldered on a first surface of the substrate.
  • the method before the fixing the optical chip and the electric chip on the first surface of the substrate, the method further includes: forming a second groove on the optical chip, and fixing in the second groove Light source chip
  • the light source chip is located in the first recess.
  • the optical chip and the electrical chip are fixed in parallel on the substrate by using a hybrid package to improve the packaging density of the optical module structure, thereby Under the same area, the channel of the optical module structure is added to facilitate optical interconnection supporting large-capacity data.
  • the first reference surface and the second reference surface are aligned, and the first alignment mark and the second alignment mark are aligned.
  • Passive alignment is adopted, which is convenient and quick, avoids errors caused by human alignment, and has high alignment precision.
  • a fixed connection manner between the substrate and the optical chip, a fixed connection manner between the substrate and the electrical chip, and the light The fixed connection between the chip and the power chip and the fixed connection between the substrate and the circuit board are soldered, so that the fixing of each component unit in the optical module structure can be performed on the same production line.
  • the production efficiency of the optical module structure is improved, and the production cost is reduced.
  • the preparing the optical coupling structure includes: providing an optical coupling medium; writing an optical waveguide in the optical coupling medium using a femtosecond laser direct writing technique to form an optical coupling structure.
  • the preparing the optical coupling structure further includes forming a metal layer on a surface of the optical coupling medium.
  • the packaging method further includes: fixing a heat dissipation structure on a side of the optical chip and the electrical chip facing away from the substrate, the heat dissipation structure being at least partially in contact with the optical chip, and The electrical chip is at least partially in contact with each other, so that the optical module structure can use the heat dissipation structure to simultaneously dissipate heat from the optical chip and the electrical chip, thereby improving heat dissipation efficiency of the optical module structure.
  • FIG. 1 is a schematic structural diagram of a structure of an optical module according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of alignment of an optical chip and an optical coupling structure in an optical module structure according to an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a structure of an optical module according to another embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a structure of an optical module according to another embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a structure of an optical module according to still another embodiment of the present application.
  • FIG. 6 is a flowchart of a method for packaging an optical module structure according to an embodiment of the present application.
  • optical modules currently have a low packing density and fewer channels, and it is difficult to support large-capacity data optical interconnections.
  • the embodiment of the present application provides an optical module structure.
  • the optical module structure includes: a substrate 10; an optical chip 20 and an electrical chip 30 fixedly connected to the substrate 10;
  • the optical chip 20 is fixedly connected to the optical coupling structure 40; wherein the optical chip 20 has a first reference surface facing a side of the substrate 10, and the first reference surface is provided with at least one first alignment mark;
  • the light coupling structure 40 has a second reference surface, and the second reference surface is provided with at least one second alignment mark, wherein the first reference surface is aligned with the second reference surface, the first An alignment mark is aligned with the second alignment mark.
  • the optical chip 20 and the electrical chip 30 are packaged on the same substrate 10, and the package density of the optical module structure is improved by using a hybrid package. And, in the same area, the channel of the optical module structure is added to facilitate optical interconnection supporting large-capacity data.
  • optical module structure provided by the embodiment of the present application achieves alignment by aligning the first reference surface and the second reference surface and aligning the first alignment mark and the second alignment mark This method of passive alignment is convenient and fast, avoids errors caused by human alignment, and has high alignment precision.
  • FIG. 2 illustrates an alignment process of the optical chip 20 and the optical coupling structure 40 in the optical module structure in an embodiment of the present application.
  • the alignment process includes: first utilizing the first reference The first alignment mark 22 on the surface 21 and the second alignment mark 42 on the second reference surface 41 achieve alignment in the first direction X; the second reference direction 21 and the second reference surface 41 are used to implement the second direction Alignment on Y; finally, fixing of the optical chip 20 and the optical coupling structure 40 is achieved.
  • the first alignment mark 22 and the second alignment mark 42 may be the same pattern or a complementary pattern, which is not limited in this application. Subject to availability. It should be noted that, in an optional embodiment of the present application, at least three or four first alignment marks are disposed on the first reference surface, and at least three are also disposed on the second reference surface. Or four second alignment marks, and more optionally, the first alignment marks 22 are respectively disposed in different directions of the surface of the first reference surface 21, and the second alignment marks 42 are also respectively disposed at The second reference surface 41 has different directions on the surface to improve the alignment accuracy of the optical chip 20 and the optical coupling structure 40.
  • the first reference surface is aligned with the second reference surface
  • the first alignment mark and the second alignment mark pair are Included in a direction perpendicular to the surface of the substrate 10, the projection of the first reference plane and the projection of the second reference plane at least partially overlap, the projection of the first alignment mark and the second
  • the projections of the alignment marks coincide to achieve alignment of the optical chip 20 to the direction of the light coupling structure 40 in a plane parallel to the surface of the substrate 10.
  • the first reference plane and the second reference plane are aligned to further include a distance between the first reference plane and the second reference plane that meets a preset requirement (such as zero).
  • a preset requirement such as zero
  • the substrate 10 has an electrical connection line therein.
  • the electrical chip 30 and the optical chip 20 are electrically connected through the electrical connection line, so that in a specific application, an electrical signal generated or amplified by the electrical chip 30 can be transmitted to the optical chip 20 through the substrate 10, the light
  • the chip 20 converts the electrical signal into an optical signal for transmission to the optical coupling structure 40 and is transmitted through an array of optical fibers 70 communicatively coupled to the optical coupling structure 40.
  • the optical chip 20 is a chip having an optical signal transmission/processing function, and has an electrical signal input/output interface and an optical signal input/output interface, thereby implementing an optical signal and an electrical signal.
  • the electrical chip 30 is a chip including a device such as a driver or a transimpedance amplifier for generating, amplifying, and/or receiving an electrical signal; the optical coupling structure 40 is located between the optical chip 20 and the optical fiber array 70. Optical coupling of the optical chip 20 to the fiber array 70 is achieved.
  • the optical coupling structure 40 has a first vertical plane perpendicular to the second reference surface, when the optical chip 20 and the light When the coupling structure 40 is optically coupled, the first vertical surface is aligned with an end surface of the optical chip 20 toward the side of the light coupling structure 40.
  • the first vertical surface is in direct contact with an end surface of the optical chip 20 facing the optical coupling structure 40 to achieve a plane parallel to the surface of the substrate 10 Alignment of the optical chip 20 to the direction of the light coupling structure 40.
  • the coupling manner between the optical coupling structure 40 and the optical chip 20 may be evanescent wave coupling, edge coupling or vertical coupling, which is not limited in this application.
  • edge coupling or vertical coupling
  • the coupling between the optical coupling structure 40 and the optical chip 20 is an evanescent wave coupling.
  • the optical coupling structure 40 The optical waveguide in the optical waveguide 20 and the optical waveguide in the optical chip 20 are coupled by a first reference surface of the optical chip 20 and a second reference surface of the optical coupling structure 40, wherein the light in the optical chip 20
  • the waveguide direction of the waveguide at the coupling faces the first vertical plane, and the waveguide direction of the optical waveguide in the optical coupling structure 40 is parallel to the waveguide direction of the optical waveguide in the optical chip 20 at the coupling, and The opposite direction.
  • the coupling manner between the optical coupling structure 40 and the optical chip 20 is edge coupling.
  • the optical coupling structure 40 The optical waveguide in the optical waveguide 20 and the optical waveguide in the optical chip 20 are coupled through a first end surface of the optical chip 20 and a first vertical surface of the optical coupling structure 40; the optical waveguide in the optical chip 20 is coupled The waveguide direction at the direction is toward the first vertical plane, and the waveguide direction of the optical waveguide in the light coupling structure 40 is parallel to the waveguide direction of the optical waveguide in the optical chip 20 at the coupling, and the directions are opposite.
  • a coupling manner between the optical coupling structure 40 and the optical chip 20 is a vertical coupling.
  • the optical coupling structure 40 The optical waveguide in the optical waveguide 20 and the optical waveguide in the optical chip 20 are coupled by a first reference surface of the optical chip 20 and a second reference surface of the optical coupling structure 40; wherein the light in the optical chip 20
  • the waveguide direction of the waveguide at the coupling faces the first vertical plane, and the waveguide of the optical waveguide in the light coupling structure 40 is perpendicular to the first reference plane at the coupling and faces the first reference plane.
  • a grating coupler is further disposed between the optical coupling medium and the optical waveguide of the optical chip 20.
  • the optical coupling structure 40 has a rectangular structure, is fixed on the substrate 10, has only a first vertical plane, and has no second reference plane and second. a reference mark, when specifically coupled, the optical chip 20 and the light coupling structure 40 pass through the end face of the optical chip 20 toward the side of the light coupling structure 40 and the first vertical surface of the light coupling structure 40 ( That is, the coupling of the light coupling structure 40 toward the end face of the optical chip 20 side is achieved.
  • the waveguide direction of the optical waveguide in the optical chip 20 is parallel to the direction of the optical chip 20 to the optical coupling structure 40, and faces the side of the optical coupling structure 40, the light
  • the waveguide direction of the optical waveguide in the coupling structure 40 is parallel to the direction of the optical coupling structure 40 to the optical chip 20 and faces the optical chip 20.
  • the optical chip 20 and the electric chip 30 are juxtaposed on the substrate 10, and the optical chip 20 and the substrate 10 are The fixed connection manner and the fixed connection manner of the electrical chip 30 and the substrate 10 are the same to ensure that the optical chip 20 and the electrical chip 30 can be performed on the same production line, thereby improving the efficiency of the structure of the optical module. Reduce the cost of production.
  • a fixed connection manner between the optical chip 20 and the substrate 10 is soldering
  • a fixed connection manner between the electrical chip 30 and the substrate 10 is also soldering.
  • the optical chip 20 is a flip chip
  • the electrical chip 30 is also a flip chip
  • the flip chip is a solder chip soldered to The technology of the substrate 10, in the specific soldering, the surface of the chip has a pad and solder, and the surface of the substrate 10 also has a corresponding pad.
  • the chip is flipped, and the surface with the solder is mounted on the substrate 10 downward. Soldered together by reflow or eutectic soldering.
  • the optical chip 20 is fixed with a light source chip 50 toward a side of the substrate 10, and the substrate 10 faces a surface of the optical chip 20 side.
  • a first recess is disposed, and the light source chip 50 is located in the first recess, that is, a portion of the light source chip 50 protruding from a surface of the optical chip 20 facing the substrate 10 is located in the first recess In the slot, thereby integrating the light source chip 50 into the optical module structure, increasing the package density of the optical module, and reducing the structure of the optical module due to the introduction of the light source chip 50. volume.
  • the optical chip 20 has a second recess in a surface of one side of the substrate 10, and the optical chip 20 is located in the second recess to further reduce The introduction of the light source chip 50 results in an increased volume of the optical module structure.
  • the fixed connection between the light source chip 50 and the optical chip 20 is soldering, so that the optical chip 20 and the light source chip 50 are
  • the fixing can be completed on the same production line as the fixing of the optical chip 20 and the substrate 10, thereby improving production efficiency.
  • the light source may be integrated into the optical chip 20 by providing a monolithic integrated light source on the optical chip 20, which is not limited in this application, as the case may be. And set.
  • the optical module structure further includes: a heat dissipation structure 60 located on a side of the optical chip 20 and the electrical chip 30 facing away from the substrate 10
  • the heat dissipation structure 60 is at least partially in contact with the optical chip 20 and at least partially in contact with the electrical chip 30, so that the optical module structure can utilize the heat dissipation structure 60 to simultaneously the optical chip 20 and the The heat dissipation of the electrical chip 30 is performed to improve the optical mode The heat dissipation efficiency of the block structure.
  • the heat dissipation structure 60 completely covers the surface of the electrical chip 30 facing away from the substrate 10 to increase the heat dissipation structure 60 and the electrical chip 30.
  • the contact area is increased, thereby improving the heat dissipation efficiency of the electric chip 30.
  • the heat dissipation structure 60 completely covers the surface of the optical chip 20 facing away from the substrate 10 to increase the heat dissipation structure 60 and the The contact area between the optical chips 20 is described, thereby improving the heat dissipation efficiency of the optical chip 20.
  • the optical module structure further includes: the side of the substrate 10 facing away from the optical chip 20 and the electrical chip 30, and the The circuit board is fixedly connected to the circuit board.
  • the circuit board is a PCB circuit board, and a fixed connection manner between the circuit board and the substrate 10 is soldering.
  • the optical module structure provided by the embodiment of the present application is aligned by the first reference plane and the second reference plane, and the first alignment mark and the second alignment mark are aligned.
  • the way of source alignment is convenient and fast, avoids the error caused by human alignment, and the alignment precision is high.
  • the optical module structure provided by the embodiment of the present application, the fixed connection manner between the substrate 10 and the optical chip 20, the fixed connection manner between the substrate 10 and the electrical chip 30, and the light
  • the fixed connection between the chip 20 and the light source chip 60 and the fixed connection between the substrate 10 and the circuit board are soldered, so that the fixing of each component unit in the optical module structure can be the same
  • the production line is carried out to improve the production efficiency of the optical module structure and reduce the production cost.
  • the embodiment of the present application further provides a method for packaging an optical module structure, which is applied to the optical module structure provided by any of the foregoing embodiments of the present application.
  • the encapsulation method provided by the embodiment of the present application includes:
  • the optical chip and the electric chip are fixed on the first surface of the substrate, the optical chip has a first reference surface facing the substrate, and the first reference surface is provided with at least one first alignment mark.
  • fixing the optical chip and the electrical chip on the first surface of the substrate comprises: respectively fixing the optical chip and the electrical chip on the first surface of the substrate.
  • the fixed connection between the optical chip and the first surface of the substrate is soldering, and the fixed connection between the electrical chip and the first surface of the substrate is also soldered, thereby The fixing between the optical chip and the substrate and the fixing between the electric chip and the substrate are completed on the same production line, thereby improving the packaging efficiency of the optical module structure and reducing the cost of the optical module structure.
  • the substrate has an electrical connection line, and the electric chip and the optical chip are electrically connected through the electrical connection line, thereby being applied in a specific application.
  • the electrical signal generated or amplified by the electrical chip may be transmitted to the optical chip through the substrate, and the optical chip converts the electrical signal into an optical signal and transmits the optical signal to the optical coupling structure, and communicates with the optical coupling structure.
  • the connected fiber array is transmitted out.
  • the optical chip is a chip having an optical signal transmission/processing function, and has an electrical signal input/output interface and an optical signal input/output interface, thereby implementing optical signals and electrical signals.
  • the electrical chip is a chip including a device such as a driver or a transimpedance amplifier for generating, amplifying, and/or receiving telecommunications
  • the optical coupling structure is located between the optical chip and the optical fiber array to realize optical coupling between the optical chip and the optical fiber array.
  • S20 Preparing an optical coupling structure, the optical coupling structure having a second reference surface, and the second reference surface is provided with at least one second alignment mark.
  • the preparing the optical coupling structure comprises: providing an optical coupling medium; writing an optical waveguide in the optical coupling medium by using a femtosecond laser direct writing technique to form an optical coupling structure.
  • the preparing the optical coupling structure further includes: forming a metal layer on a surface of the optical coupling medium.
  • the forming process of the metal layer is an evaporation process, but the present application does not limit this, as the case may be.
  • the optical coupling structure is made of glass, and the waveguide and the alignment mark can be prepared by using optical write waveguide technology. Not limited, depending on the situation.
  • the first reference surface is aligned with the second reference surface, and the first alignment mark and the second alignment mark are aligned to be perpendicular to the substrate surface. a direction in which the projection of the first reference plane and the projection of the second reference plane at least partially overlap, the projection of the first alignment mark and the projection of the second alignment mark coincide to achieve parallel Alignment of the optical chip to the direction of the light coupling structure in a plane of the surface of the substrate.
  • the first reference plane and the second reference plane are aligned to further include a distance between the first reference plane and the second reference plane that meets a preset requirement (such as zero Or other preset values) to achieve alignment of the optical chip with the optical coupling structure in a direction perpendicular to the surface of the substrate, but this application is not limited thereto, as the case may be.
  • a preset requirement such as zero Or other preset values
  • the optical coupling structure has a first vertical plane perpendicular to the second reference surface, when the optical chip and the optical coupling structure When optical coupling is performed, the first vertical surface is aligned with an end surface of the optical chip toward the side of the light coupling structure.
  • the first vertical surface is in direct contact with an end surface of the optical chip toward a side of the optical coupling structure to achieve a plane parallel to the surface of the substrate, Alignment of the optical chip to the direction of the light coupling structure.
  • the coupling manner between the optical coupling structure and the optical chip may be evanescent wave coupling, edge coupling or vertical coupling, which is not limited in this application.
  • the optical coupling medium and A grating coupler is further disposed between the optical waveguides of the optical chip.
  • the light source of the optical module structure may be an external light source, or may be integrated in the optical module structure, when the light source is integrated in the optical module structure, in an embodiment of the present application, before the optical chip and the electrical chip are fixed on the first surface of the substrate, the method further includes:
  • the light source chip is located in the first recess.
  • the light source chip when the light source chip is fixed in the second groove, optionally, the light source chip is fixed on the optical chip by flip chip mounting.
  • the light source may also be integrated in the optical chip in the form of a monolithic integrated light source, as the case may be.
  • the packaging method further includes: fixing a heat dissipation structure on a side of the optical chip and the electrical chip facing away from the substrate, the heat dissipation structure and The optical chip is at least partially in contact with each other and is at least partially in contact with the electric chip, so that the optical module structure can simultaneously dissipate heat from the optical chip and the electric chip by using the heat dissipation structure, thereby improving the structure of the optical module. Cooling efficiency.
  • the heat dissipation structure completely covers a side surface of the electrical chip facing away from the substrate to increase a contact area between the heat dissipation structure and the electrical chip.
  • the heat dissipation structure of the electric chip is improved.
  • the heat dissipation structure completely covers the side surface of the optical chip facing away from the substrate to increase the contact area between the heat dissipation structure and the optical chip, thereby The heat dissipation efficiency of the optical chip is improved.
  • the packaging method further includes: fixing a circuit board on one side of the optical chip and the electric chip on the substrate north road, optionally
  • the circuit board is a PCB circuit board, and a fixed connection manner between the circuit board and the substrate is soldering.
  • the optical module structure manufacturing method uses a hybrid package to fix the optical chip and the electrical chip in parallel on the substrate to improve the packaging of the optical module structure.
  • the density, and thus the same area, increases the channel of the optical module structure to facilitate optical interconnection of large volume data.
  • the first reference surface and the second reference surface are aligned, and the first alignment mark and the second alignment mark are aligned.
  • Passive alignment is adopted, which is convenient and quick, avoids errors caused by human alignment, and has high alignment precision.
  • a fixed connection manner between the substrate and the optical chip, a fixed connection manner between the substrate and the electrical chip, and the light The fixed connection between the chip and the light source chip 60 and the fixed connection between the substrate and the circuit board are soldered, so that the fixing of each component unit in the optical module structure can be on the same production line. To improve the production efficiency of the optical module structure and reduce the production cost.

Abstract

本申请公开了一种模块结构及其制作方法，该光模块结构包括：基板；与基板固定连接的光芯片和电芯片；与光芯片固定连接的光耦合结构；光芯片朝向基板一侧具有第一基准面，第一基准面上设置有至少一个第一对准标记；光耦合结构具有第二基准面，第二基准面上设置有至少一个第二对准标记；其中，第一基准面和第二基准面对准，第一对准标记和第二对准标记对准。该光模块结构采用混合封装的方式，提高了所述光模块结构的封装密度，进而在相同面积下，增加了所述光模块结构的通道，以便于支持大容量数据的光互连。而且，该光模块结构采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。

Description

一种光模块结构及其制作方法 技术领域
本申请涉及光通信技术领域，尤其涉及一种光模块结构及其制作方法。
背景技术
随着云计算、大数据、高清视频和VR技术等的迅速发展，宽带对网络的容量提出了更高的要求，使得高速大容量的光互连成为了构建未来高速网络的基础。而要实现高容量的光互连，具有高数据容量的光模块是关键。但是，目前光模块的封装密度较低，通道较少，难以支持大容量的数据光互连。
发明内容
本申请实施例提供了一种光模块结构，该光模块结构包括：基板；与所述基板固定连接的光芯片和电芯片，从而通过将所述光芯片和所述电芯片封装在同一基板上，采用混合封装的方式，提高所述光模块结构的封装密度，进而在相同面积下，增加所述光模块结构的通道，以便于支持大容量数据的光互连。另外，本申请实施例所提供的光模块结构还包括：与所述光芯片固定连接的光耦合结构；其中，所述光芯片朝向所述基板一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记；所述光耦合结构具有第二基准面，所述第二基准面上设置有至少一个第二对准标记；其中，所述第一基准面和所述第二基准面对准，所述第一对准标记和所述第二对准标记对准，从而通过所述第一基准面和所述第二基准面对准以及所述第一对准标记和所述第二对准标记对准实现对准，这种采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。
在一种实现方式中，所述光耦合结构具有垂直于所述第二基准面的第一垂直面，当所述光芯片与所述光耦合结构进行光耦合时，所述第一垂直面与所述光芯片朝向所述光耦合结构一侧的端面对准。
在一种实现方式中，所述光耦合结构与所述光芯片之间的耦合方式为倏逝波耦合、边缘耦合或垂直耦合。
在一种实现方式中，当所述光耦合结构与所述光芯片之间的耦合方式为倏逝波耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一基准面和所述光耦合结构的第二基准面实现耦合；其中，所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向平行于所述光芯片中的光波导在耦合处的波导方向，且方向相反。
在一种实现方式中，当所述光耦合结构与所述光芯片之间的耦合方式为边缘耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一端面和所述光耦合结构的第一垂直面实现耦合；所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向平行于所述光芯片中的光波导在耦合处的波导方向，且方向相反。
在一种实现方式中，当所述光耦合结构与所述光芯片之间的耦合方式为垂直耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一基准面和所述光耦合结构的第二基准面实现耦合；其中，所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向垂直于所述第一基准面，且朝向所述第一基准面。
在一种实现方式中，当所述光耦合结构与所述光芯片之间的耦合方式为垂直耦合时，所述光耦合介质和所述光芯片的光波导之间还设置有光栅耦合器。
在一种实现方式中，所述光芯片与所述电芯片并列位于所述基板上，且所述光芯片与所述基板的固定连接方式和所述电芯片与所述基板的固定连接方式相同，以保证所述光芯片和所述电芯片可以在同一生产线进行，从而提高所述光模块结构的生成效率，降低生成成本。
可选的，所述光芯片与所述基板之间的固定连接方式为焊接，所述电芯片与所述基板之间的固定连接方式也为焊接。
在一种实现方式中，所述光芯片上设置有单片集成光源，以提高光模块结构的集成度。
在一种实现方式中，所述光芯片朝向所述基板一侧固定有光源芯片，所述基板朝向所述光芯片一侧表面内具有第一凹槽，所述光源芯片位于所述第一凹槽内，以提高光模块结构的集成度，并减小由于所述光源芯片的引入而导致所述光模块结构增大的体积。
可选的，所述光芯片朝向所述基板一侧表面内具有第二凹槽，所述光芯片位于所述第二凹槽内，以进一步减小由于所述光源芯片的引入而导致所述光模块结构增大的体积。
可选的，所述光源芯片与所述光芯片之间的固定连接方式为焊接，以使得所述光芯片与所述光源芯片的固定可以与所述光芯片与所述基板的固定在同一生产线上完成，提高生产效率。
在一种实现方式中，所述光模块结构还包括：位于所述光芯片和所述电芯片背离所述基板一侧的散热结构，所述散热结构与所述光芯片至少部分接触，且与所述电芯片至少部分接触，从而使得所述光模块结构可以利用所述散热结构同时对所述光芯片和所述电芯片散热，提高所述光模块结构的散热效率。
本申请实施例还提供了一种光模块结构的封装方法，包括：
在基板的第一表面固定光芯片和电芯片，所述光芯片朝向所述基板一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记；
制备光耦合结构，所述光耦合结构具有第二基准面，所述第二基准面上设置有至少一个第二对准标记；
调整所述光耦合结构，使得所述第一基准面和所述第二基准面对准，所述第一对准标记和所述第二对准标记对准；
将所述光耦合结构固定在所述光芯片上。
在一种实现方式中，在基板的第一表面固定光芯片和电芯片包括：
在基板的第一表面分别焊接所述光芯片和所述电芯片。
在一种实现方式中，在所述基板的第一表面固定所述光芯片和所述电芯片之前还包括：在所述光芯片上形成第二凹槽，在所述第二凹槽内固定光源芯片；
在所述基板上形成第一凹槽，在所述基板的第一表面固定所述光芯片和所述电芯片后，所述光源芯片位于所述第一凹槽内。
本申请实施例所提供的光模块结构的制作方法，采用混合封装的方式，将所述光芯片和所述电芯片并列固定在所述基板上，提高所述光模块结构的封装密度，从而在相同面积下，增加了所述光模块结构的通道，以便于支持大容量数据的光互连。
而且，本申请实施例所提供的光模块结构封装方法中，通过所述第一基准面和所述第二基准面对准以及所述第一对准标记和所述第二对准标记对准，采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。
此外，本申请实施例所提供的光模块结构的封装方法中，所述基板与所述光芯片之间的固定连接方式、所述基板与所述电芯片之间的固定连接方式、所述光芯片与所述电源芯片之间的固定连接方式以及所述基板与所述电路板之间的固定连接方式均为焊接，从而使得所述光模块结构中各组成单元的固定可以在同一生产线上进行，提高所述光模块结构的生产效率，降低生产成本。
在一种实现方式中，所述制备光耦合结构包括：提供光耦合介质；利用飞秒激光直写技术在所述光耦合介质中写入光波导，形成光耦合结构。
在一种实现方式中，所述制备光耦合结构还包括：在所述光耦合介质表面形成金属层。
在一种实现方式中，该封装方法还包括：在所述光芯片和所述电芯片背离所述基板一侧固定散热结构，所述散热结构与所述光芯片至少部分接触，且与所述电芯片至少部分接触，从而使得所述光模块结构可以利用所述散热结构同时对所述光芯片和所述电芯片散热，提高所述光模块结构的散热效率。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一个实施例所提供的光模块结构的结构示意图；
图2为本申请一个实施例所提供的光模块结构中，光芯片和光耦合结构的对准示意图；
图3为本申请另一个实施例所提供的光模块结构的结构示意图；
图4为本申请又一个实施例所提供的光模块结构的结构示意图；
图5为本申请再一个实施例所提供的光模块结构的结构示意图；
图6为本申请一个实施例所提供的光模块结构的封装方法流程图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地 描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
正如背景技术部分所述，目前光模块的封装密度较低，通道较少，难以支持大容量的数据光互连。
有鉴于此，本申请实施例提供了一种光模块结构，如图1所示，该光模块结构包括：基板10；与所述基板10固定连接的光芯片20和电芯片30；与所述光芯片20固定连接的光耦合结构40；其中，所述光芯片20朝向所述基板10的一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记；所述光耦合结构40具有第二基准面，所述第二基准面上设置有至少一个第二对准标记，其中，所述第一基准面与所述第二基准面对准，所述第一对准标记与所述第二对准标记对准。
由此可见，本申请实施例所提供的光模块结构，将所述光芯片20和所述电芯片30封装在同一基板10上，采用混合封装的方式，提高了所述光模块结构的封装密度，进而在相同面积下，增加了所述光模块结构的通道，以便于支持大容量数据的光互连。
而且，本申请实施例所提供的光模块结构，通过所述第一基准面和所述第二基准面对准以及所述第一对准标记和所述第二对准标记对准实现对准，这种采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。
如图2所示，图2示出了本申请一个实施例中，所述光模块结构中光芯片20和光耦合结构40的对准过程，具体的，该对准过程包括：先利用第一基准面21上第一对准标记22和第二基准面41上的第二对准标记42实现第一方向X上的对准；再利用第一基准面21和第二基准面41实现第二方向Y上的对准；最后，实现所述光芯片20和所述光耦合结构40的固定。
需要说明的是，在本申请实施例中，所述第一对准标记22和第二对准标记42可以为相同的图案，也可以为互补的图案，本申请对此并不做限定，具体视情况而定。还需要说明的是，在本申请一个可选实施例中，所述第一基准面上设置有至少三个或四个第一对准标记，所述第二基准面上也设置有至少三个或四个第二对准标记，更可选的，所述第一对准标记22分别设置在所述第一基准面21表面的不同方向上，所述第二对准标记42也分别设置在第二基准面41表面的不同方向上，以提高光芯片20和光耦合结构40的对准精度。
在上述实施例的基础上，在本申请的一个具体实施例中，所述第一基准面与所述第二基准面对准，所述第一对准标记与所述第二对准标记对准包括在垂直于所述基板10表面的方向上，所述第一基准面的投影和所述第二基准面的投影至少部分交叠，所述第一对准标记的投影和所述第二对准标记的投影重合，以实现平行于所述基板10表面的平面内，所述光芯片20至所述光耦合结构40方向的对准。在本申请的其他实施例中，所述第一基准面与所述第二基准面对准还包括所述第一基准面和所述第二基准面之间的距离满足预设要求(如零或其他预设数值)，以实现垂直于所述基板10表面的方向上，所述光芯片20与所述光耦合结构40的对准，但本申请对此并不做限定，具体视情况而定。
在上述任一实施例的基础上，在本申请的一个实施例中，所述基板10内具有电连接线， 所述电芯片30和所述光芯片20通过所述电连接线电连接，从而在具体应用时，所述电芯片30产生或放大的电信号可以通过基板10传输给光芯片20，所述光芯片20将所述电信号转换成光信号传输给所述光耦合结构40，并经与所述光耦合结构40通信连接的光纤阵列70传输出去。
具体的，在本申请的一个实施例中，所述光芯片20为具有光信号传输/处理功能的芯片，并具有电信号输入/输出接口和光信号输入/输出接口，从而实现光信号和电信号的相互转换；所述电芯片30为包括驱动器或跨阻放大器等器件的芯片，用于产生、放大和/或接收电信号；所述光耦合结构40位于光芯片20与光纤阵列70之间，实现光芯片20与光纤阵列70的光耦合。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光耦合结构40具有垂直于所述第二基准面的第一垂直面，当所述光芯片20与所述光耦合结构40进行光耦合时，所述第一垂直面与所述光芯片20朝向所述光耦合结构40一侧的端面对准。具体的，在本申请的一个实现方式中，所述第一垂直面与所述光芯片20朝向所述光耦合结构40一侧的端面直接接触，以实现平行于所述基板10表面的平面内，所述光芯片20至所述光耦合结构40方向的对准。
需要说明的是，在本申请实施例中，所述光耦合结构40与所述光芯片20之间的耦合方式可以为倏逝波耦合、边缘耦合或垂直耦合，本申请对此并不做限定，下面结合具体实施例进行说明。
如图1所示，本申请的一个实施例中，所述光耦合结构40与所述光芯片20之间的耦合方式为倏逝波耦合，在本申请实施例中，所述光耦合结构40中的光波导与所述光芯片20中的光波导通过所述光芯片20的第一基准面和所述光耦合结构40的第二基准面实现耦合，其中，所述光芯片20中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构40中的光波导在耦合处的波导方向平行于所述光芯片20中的光波导在耦合处的波导方向，且方向相反。
如图3所示，在本申请的另一个实施例中，所述光耦合结构40与所述光芯片20之间的耦合方式为边缘耦合，在本申请实施例中，所述光耦合结构40中的光波导与所述光芯片20中的光波导通过所述光芯片20的第一端面和所述光耦合结构40的第一垂直面实现耦合；所述光芯片20中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构40中的光波导在耦合处的波导方向平行于所述光芯片20中的光波导在耦合处的波导方向，且方向相反。
如图4所示，在本申请的另一个实施例中，所述光耦合结构40与所述光芯片20之间的耦合方式为垂直耦合，在本申请实施例中，所述光耦合结构40中的光波导与所述光芯片20中的光波导通过所述光芯片20的第一基准面和所述光耦合结构40的第二基准面实现耦合；其中，所述光芯片20中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构40中的光波导在耦合处的波导方向垂直于所述第一基准面，且朝向所述第一基准面。
需要说明的是，在上述实施例的基础上，在本申请的一个实施例中，当所述光耦合结 构40与所述光芯片20之间的耦合方式为垂直耦合时，所述光耦合介质和所述光芯片20的光波导之间还设置有光栅耦合器。
如图5所示，在本申请的又一个实施例中，所述光耦合结构40为矩形结构，固定在所述基板10上，仅具有第一垂直面，不具有第二基准面和第二基准标记，在具体耦合时，所述光芯片20和所述光耦合结构40通过所述光芯片20朝向所述光耦合结构40一侧的端面与所述光耦合结构40的第一垂直面(也即所述光耦合结构40朝向所述光芯片20一侧的端面)实现耦合。在本申请实施例中，所述光芯片20中的光波导的波导方向平行于所述光芯片20至所述光耦合结构40的方向，且朝向所述光耦合结构40一侧，所述光耦合结构40中光波导的波导方向平行于所述光耦合结构40至所述光芯片20的方向，且朝向所述光芯片20。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光芯片20与所述电芯片30并列位于所述基板10上，且所述光芯片20与所述基板10的固定连接方式和所述电芯片30与所述基板10的固定连接方式相同，以保证所述光芯片20和所述电芯片30可以在同一生产线进行，从而提高所述光模块结构的生成效率，降低生成成本。
可选的，所述光芯片20与所述基板10之间的固定连接方式为焊接，所述电芯片30与所述基板10之间的固定连接方式也为焊接。具体的，在本申请的一种实现方式中，所述光芯片20为倒装贴片，所述电芯片30也为倒装贴片，所述倒装贴片是一种将裸芯片焊接到基板10的技术，具体焊接时，芯片表面具有焊盘及焊料，基板10表面也具有对应的焊盘，在焊接过程中，将芯片翻转，带有焊料的表面向下贴装在基板10上，通过回流焊或共晶焊等方式焊接在一起。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光芯片20朝向所述基板10一侧固定有光源芯片50，所述基板10朝向所述光芯片20一侧表面内具有第一凹槽，所述光源芯片50位于所述第一凹槽内，即所述光源芯片50凸出所述光芯片20朝向所述基板10一侧表面的部分位于所述第一凹槽内，从而在将所述光源芯片50集成到所述光模块结构中，提高所述光模块封装密度的同时，减小由于所述光源芯片50的引入而导致所述光模块结构增大的体积。可选的，在本申请实施例中，所述光芯片20朝向所述基板10一侧表面内具有第二凹槽，所述光芯片20位于所述第二凹槽内，以进一步减小由于所述光源芯片50的引入而导致所述光模块结构增大的体积。
在上述实施例的基础上，在本申请的一个具体实施中，所述光源芯片50与所述光芯片20之间的固定连接方式为焊接，以使得所述光芯片20与所述光源芯片50的固定可以与所述光芯片20与所述基板10的固定在同一生产线上完成，提高生产效率。
在本申请的其他实施例中，还可以通过在所述光芯片20上设置单片集成光源的方式，将光源集成在所述光芯片20中，本申请对此并不做限定，具体视情况而定。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光模块结构还包括：位于所述光芯片20和所述电芯片30背离所述基板10一侧的散热结构60，所述散热结构60与所述光芯片20至少部分接触，且与所述电芯片30至少部分接触，从而使得所述光模块结构可以利用所述散热结构60同时对所述光芯片20和所述电芯片30散热，提高所述光模 块结构的散热效率。可选的，在本申请的一个具体实施例中，所述散热结构60完全覆盖所述电芯片30背离所述基板10一侧表面，以增大所述散热结构60与所述电芯片30之间的接触面积，从而提高所述电芯片30的散热效率；同理，所述散热结构60完全覆盖所述光芯片20背离所述基板10一侧表面，以增大所述散热结构60与所述光芯片20之间的接触面积，从而提高所述光芯片20的散热效率。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光模块结构还包括：位于所述基板10背离所述光芯片20和所述电芯片30一侧，与所述基板10固定连接的电路板，可选的，所述电路板为PCB电路板，所述电路板与所述基板10之间的固定连接方式为焊接。
综上所述，本申请实施例所提供的光模块结构，采用混合封装的方式，将所述光芯片20和所述电芯片30并列固定在所述基板10上，提高所述光模块结构的封装密度，从而在相同面积下，增加了所述光模块结构的通道，以便于支持大容量数据的光互连。
而且，本申请实施例所提供的光模块结构，通过所述第一基准面和所述第二基准面对准以及所述第一对准标记和所述第二对准标记对准，采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。
另外，本申请实施例所提供的光模块结构，所述基板10与所述光芯片20之间的固定连接方式、所述基板10与所述电芯片30之间的固定连接方式、所述光芯片20与所述光源芯片60之间的固定连接方式以及所述基板10与所述电路板之间的固定连接方式均为焊接，从而使得所述光模块结构中各组成单元的固定可以在同一生产线上进行，提高所述光模块结构的生产效率，降低生产成本。
此外，本申请实施例还提供了一种光模块结构的封装方法，应用于本申请上述任一实施例所提供的光模块结构。如图6所示，本申请实施例所提供的封装方法包括：
S10：在基板的第一表面固定光芯片和电芯片，所述光芯片朝向所述基板的一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记.
具体的，在本申请的一个实施例中，在基板的第一表面固定光芯片和电芯片包括：在基板的第一表面分别固定所述光芯片和所述电芯片。可选的，所述光芯片和所述基板的第一表面之间的固定连接方式为焊接，所述电芯片与所述基板的第一表面之间的固定连接方式也为焊接，从而使得所述光芯片与所述基板之间的固定以及所述电芯片与所述基板之间的固定在同一生产线上完成，提高所述光模块结构的封装效率，降低所述光模块结构的成本。
在上述任一实施例的基础上，在本申请的一个实施例中，所述基板内具有电连接线，所述电芯片和所述光芯片通过所述电连接线电连接，从而在具体应用时，所述电芯片产生或放大的电信号可以通过基板传输给光芯片，所述光芯片将所述电信号转换成光信号传输给所述光耦合结构，并经与所述光耦合结构通信连接的光纤阵列传输出去。
具体的，在本申请的一个实施例中，所述光芯片为具有光信号传输/处理功能的芯片，并具有电信号输入/输出接口和光信号输入/输出接口，从而实现光信号和电信号的相互转换；所述电芯片为包括驱动器或跨阻放大器等器件的芯片，用于产生、放大和/或接收电信 号；所述光耦合结构位于光芯片与光纤阵列之间，实现光芯片与光纤阵列的光耦合。
S20：制备光耦合结构，所述光耦合结构具有第二基准面，所述第二基准面上设置有至少一个第二对准标记。
具体的，在本申请的一个实施例中，所述制备光耦合结构包括：提供光耦合介质；利用飞秒激光直写技术在所述光耦合介质中写入光波导，形成光耦合结构。
在上述实施例的基础上，在本申请的另一个实施例中，所述制备光耦合结构还包括：在所述光耦合介质表面形成金属层。可选的，所述金属层的形成工艺为蒸镀工艺，但本申请对此并不做限定，具体视情况而定。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光耦合结构的材质为玻璃，其波导和对准标记的制备均可以采用光写波导技术，本申请对此并不做限定，具体视情况而定。
S30：调整所述光耦合结构，使得所述第一基准面和所述第二基准面对准，所述第一对准标记和所述第二对准标记对准。
在本申请的一个实施例中，所述第一基准面与所述第二基准面对准，所述第一对准标记与所述第二对准标记对准包括在垂直于所述基板表面的方向上，所述第一基准面的投影和所述第二基准面的投影至少部分交叠，所述第一对准标记的投影和所述第二对准标记的投影重合，以实现平行于所述基板表面的平面内，所述光芯片至所述光耦合结构方向的对准。在本申请的其他实施例中，所述第一基准面与所述第二基准面对准还包括所述第一基准面和所述第二基准面之间的距离满足预设要求(如零或其他预设数值)，以实现垂直于所述基板表面的方向上，所述光芯片与所述光耦合结构的对准，但本申请对此并不做限定，具体视情况而定。
在上述任一实施例的基础上，在本申请的一个实施例中，所述光耦合结构具有垂直于所述第二基准面的第一垂直面，当所述光芯片与所述光耦合结构进行光耦合时，所述第一垂直面与所述光芯片朝向所述光耦合结构一侧的端面对准。具体的，在本申请的一个实现方式中，所述第一垂直面与所述光芯片朝向所述光耦合结构一侧的端面直接接触，以实现平行于所述基板表面的平面内，所述光芯片至所述光耦合结构方向的对准。
需要说明的是，在本申请实施例中，所述光耦合结构与所述光芯片之间的耦合方式可以为倏逝波耦合、边缘耦合或垂直耦合，本申请对此并不做限定。
还需要说明的是，在上述实施例的基础上，在本申请的一个实施例中，当所述光耦合结构与所述光芯片之间的耦合方式为垂直耦合时，所述光耦合介质和所述光芯片的光波导之间还设置有光栅耦合器。
S40：将所述光耦合结构固定在所述光芯片上。
需要说明的是，在本申请实施例中，所述光模块结构的光源可以为外置光源，也可以集成在所述光模块结构中，当所述光源集成在所述光模块结构中时，在本申请的一个实施例中，在所述基板的第一表面固定所述光芯片和所述电芯片之前还包括：
在所述光芯片上形成第二凹槽，在所述第二凹槽内固定光源芯片；
在所述基板上形成第一凹槽，在所述基板的第一表面固定所述光芯片和所述电芯片后， 所述光源芯片位于所述第一凹槽内。
需要说明的是，在本申请实施例中，所述在所述第二凹槽内固定光源芯片时，可选的，所述光源芯片通过倒装贴片的方式固定在所述光芯片上，但本申请对此并不做限定，在本申请的其他实施例中，所述光源还可以采用单片集成光源的形式集成在光芯片中，具体视情况而定。
在上述任一实施例的基础上，在本申请的一个实施例中，该封装方法还包括：在所述光芯片和所述电芯片背离所述基板一侧固定散热结构，所述散热结构与所述光芯片至少部分接触，且与所述电芯片至少部分接触，从而使得所述光模块结构可以利用所述散热结构同时对所述光芯片和所述电芯片散热，提高所述光模块结构的散热效率。可选的，在本申请的一个具体实施例中，所述散热结构完全覆盖所述电芯片背离所述基板一侧表面，以增大所述散热结构与所述电芯片之间的接触面积，从而提高所述电芯片的散热效率；同理，所述散热结构完全覆盖所述光芯片背离所述基板一侧表面，以增大所述散热结构与所述光芯片之间的接触面积，从而提高所述光芯片的散热效率。
在上述任一实施例的基础上，在本申请的一个实施例中，该封装方法还包括：在所述基板北路所述光芯片和所述电芯片的一侧固定电路板，可选的，所述电路板为PCB电路板，所述电路板与所述基板之间的固定连接方式为焊接。
综上所述，本申请实施例所提供的光模块结构制作方法，采用混合封装的方式，将所述光芯片和所述电芯片并列固定在所述基板上，提高所述光模块结构的封装密度，从而在相同面积下，增加了所述光模块结构的通道，以便于支持大容量数据的光互连。
而且，本申请实施例所提供的光模块结构封装方法中，通过所述第一基准面和所述第二基准面对准以及所述第一对准标记和所述第二对准标记对准，采用无源对准的方式，方便快捷，避免了人为对准引起的误差，对准精度较高。
此外，本申请实施例所提供的光模块结构的封装方法中，所述基板与所述光芯片之间的固定连接方式、所述基板与所述电芯片之间的固定连接方式、所述光芯片与所述光源芯片60之间的固定连接方式以及所述基板与所述电路板之间的固定连接方式均为焊接，从而使得所述光模块结构中各组成单元的固定可以在同一生产线上进行，提高所述光模块结构的生产效率，降低生产成本。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下，在其它实施例中实现。因此，本申请将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (17)

  1. 一种光模块结构，其特征在于，包括：
    基板；
    与所述基板固定连接的光芯片和电芯片；
    与所述光芯片固定连接的光耦合结构；
    其中，所述光芯片朝向所述基板一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记；所述光耦合结构具有第二基准面，所述第二基准面上设置有至少一个第二对准标记；其中，所述第一基准面和所述第二基准面对准，所述第一对准标记和所述第二对准标记对准。
  2. 根据权利要求1所述的光模块结构，其特征在于，所述光耦合结构具有垂直于所述第二基准面的第一垂直面，当所述光芯片与所述光耦合结构进行光耦合时，所述第一垂直面与所述光芯片朝向所述光耦合结构一侧的端面对准。
  3. 根据权利要求2所述的光模块结构，其特征在于，所述光耦合结构与所述光芯片之间的耦合方式为倏逝波耦合、边缘耦合或垂直耦合。
  4. 根据权利要求3所述的光模块结构，其特征在于，当所述光耦合结构与所述光芯片之间的耦合方式为倏逝波耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一基准面和所述光耦合结构的第二基准面实现耦合；其中，所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向平行于所述光芯片中的光波导在耦合处的波导方向，且方向相反。
  5. 根据权利要求3所述的光模块结构，其特征在于，当所述光耦合结构与所述光芯片之间的耦合方式为边缘耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一端面和所述光耦合结构的第一垂直面实现耦合；所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向平行于所述光芯片中的光波导在耦合处的波导方向，且方向相反。
  6. 根据权利要求3所述的光模块结构，其特征在于，当所述光耦合结构与所述光芯片之间的耦合方式为垂直耦合时，所述光耦合结构中的光波导与所述光芯片中的光波导通过所述光芯片的第一基准面和所述光耦合结构的第二基准面实现耦合；其中，所述光芯片中的光波导在耦合处的波导方向朝向所述第一垂直面，所述光耦合结构中的光波导在耦合处的波导方向垂直于所述第一基准面，且朝向所述第一基准面。
  7. 根据权利要求3所述的光模块结构，其特征在于，当所述光耦合结构与所述光芯片之间的耦合方式为垂直耦合时，所述光耦合介质和所述光芯片的光波导之间还设置有光栅耦合器。
  8. 根据权利要求1所述的光模块结构，其特征在于，所述光芯片与所述电芯片并列位于所述基板上，且所述光芯片与所述基板的固定连接方式和所述电芯片与所述基板的固定连接方式相同。
  9. 根据权利要求1所述的光模块结构，其特征在于，所述光芯片上设置有单片集成光源。
  10. 根据权利要求1所述的光模块结构，其特征在于，所述光芯片朝向所述基板一侧固定有光源芯片，所述基板朝向所述光芯片一侧表面内具有第一凹槽，所述光源芯片位于所述第一凹槽内。
  11. 根据权利要求1所述的光模块结构，其特征在于，还包括：
    位于所述光芯片和所述电芯片背离所述基板一侧的散热结构，所述散热结构与所述光芯片至少部分接触，且与所述电芯片至少部分接触。
  12. 一种光模块结构的封装方法，其特征在于，包括：
    在基板的第一表面固定光芯片和电芯片，所述光芯片朝向所述基板一侧具有第一基准面，所述第一基准面上设置有至少一个第一对准标记；
    制备光耦合结构，所述光耦合结构具有第二基准面，所述第二基准面上设置有至少一个第二对准标记；
    调整所述光耦合结构，使得所述第一基准面和所述第二基准面对准，所述第一对准标记和所述第二对准标记对准；
    将所述光耦合结构固定在所述光芯片上。
  13. 根据权利要求12所述的封装方法，其特征在于，在基板的第一表面固定光芯片和电芯片包括：
    在基板的第一表面分别焊接所述光芯片和所述电芯片。
  14. 根据权利要求12所述的封装方法，其特征在于，在所述基板的第一表面固定所述光芯片和所述电芯片之前还包括：
    在所述光芯片上形成第二凹槽，在所述第二凹槽内固定光源芯片；
    在所述基板上形成第一凹槽，在所述基板的第一表面固定所述光芯片和所述电芯片后，所述光源芯片位于所述第一凹槽内。
  15. 根据权利要求12所述的封装方法，其特征在于，所述制备光耦合结构包括：
    提供光耦合介质；
    利用飞秒激光直写技术在所述光耦合介质中写入光波导，形成光耦合结构。
  16. 根据权利要求15所述的封装方法，其特征在于，所述制备光耦合结构还包括：在所述光耦合介质表面形成金属层。
  17. 根据权利要求12所述的封装方法，其特征在于，该封装方法还包括：
    在所述光芯片和所述电芯片背离所述基板一侧固定散热结构，所述散热结构与所述光芯片至少部分接触，且与所述电芯片至少部分接触。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111129941A (zh) * 2019-11-21 2020-05-08 东南大学 一种硅基集成激光器芯片倒装耦合结构

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6774456B2 (ja) * 2018-04-26 2020-10-21 日本電信電話株式会社 光モジュール
US11107770B1 (en) * 2019-06-27 2021-08-31 Xilinx, Inc. Integrated electrical/optical interface with two-tiered packaging
CN111323878B (zh) * 2020-04-01 2021-10-15 联合微电子中心有限责任公司 一种激光器芯片与硅基光电子芯片的耦合对准装置及方法
US11256049B2 (en) * 2020-04-22 2022-02-22 Nokia Solutions And Networks Oy Optical-to-electric-to-optical routing engine
CN114077016B (zh) * 2020-08-11 2023-09-01 美国莫列斯有限公司 具有光子集成电路的封装结构
US11942585B2 (en) * 2021-07-02 2024-03-26 Advanced Semiconductor Engineering, Inc. Optoelectronic package structure and method of manufacturing the same
WO2023233534A1 (ja) * 2022-05-31 2023-12-07 日本電信電話株式会社 光モジュール

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006088859A2 (en) * 2005-02-16 2006-08-24 Applied Materials, Inc. Optical coupling to ic chip
CN101226261A (zh) * 2008-02-18 2008-07-23 武汉电信器件有限公司 光纤与面型光电芯片的耦合方法及其结构
CN102356337A (zh) * 2009-03-17 2012-02-15 日本电气株式会社 光波导装置及其制造方法
CN106207743A (zh) * 2016-08-25 2016-12-07 武汉光迅科技股份有限公司 一种用于光栅耦合的激光器结构及封装方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5499312A (en) 1993-11-09 1996-03-12 Hewlett-Packard Company Passive alignment and packaging of optoelectronic components to optical waveguides using flip-chip bonding technology
JP2005055613A (ja) * 2003-08-01 2005-03-03 Sumitomo Electric Ind Ltd 光モジュール
US6933171B2 (en) 2003-10-21 2005-08-23 Intel Corporation Large bumps for optical flip chips
US20060269288A1 (en) * 2005-05-31 2006-11-30 Georgia Tech Research Corporation High density optical harness
KR101153770B1 (ko) * 2006-09-19 2012-06-14 이비덴 가부시키가이샤 광 상호접속 디바이스 및 그 제조 방법
JP2010060793A (ja) * 2008-09-03 2010-03-18 Nec Electronics Corp 光伝送装置及びその製造方法
US20120207426A1 (en) * 2011-02-16 2012-08-16 International Business Machines Corporation Flip-chip packaging for dense hybrid integration of electrical and photonic integrated circuits
JP5847473B2 (ja) * 2011-07-21 2016-01-20 シチズンホールディングス株式会社 光モジュール
KR20130071747A (ko) * 2011-12-21 2013-07-01 한국전자통신연구원 광 송신소자와 광 능동소자를 하이브리드 집적한 광 도파로 플랫폼 및 그 제작방법
US8855452B2 (en) * 2012-01-18 2014-10-07 International Business Machines Corporation Silicon photonic chip optical coupling structures
US9335500B2 (en) 2012-01-31 2016-05-10 Hewlett Packard Enterprise Development Lp Hybrid electro-optical package for an opto-electronic engine
JP5925062B2 (ja) * 2012-06-18 2016-05-25 シチズンホールディングス株式会社 光モジュール及び光モジュールの製造方法
US9091827B2 (en) * 2012-07-09 2015-07-28 Luxtera, Inc. Method and system for grating couplers incorporating perturbed waveguides
TWI461775B (zh) * 2012-09-26 2014-11-21 Delta Electronics Inc 光通訊模組及其耦光組接方法
US9217836B2 (en) * 2012-10-23 2015-12-22 Kotura, Inc. Edge coupling of optical devices
EP2932320A4 (en) * 2012-12-13 2016-08-10 Opel Solar Inc FIBER OPTIC COUPLER ARRANGEMENT
US8971676B1 (en) * 2013-10-07 2015-03-03 Oracle International Corporation Hybrid-integrated photonic chip package
US9753225B2 (en) * 2015-12-17 2017-09-05 Xyratex Technology Limited Passive alignment optical connector
US9645331B1 (en) * 2016-09-12 2017-05-09 Yottahn, Inc. Optical module device and method of manufacturing the same
US9933574B1 (en) * 2016-12-22 2018-04-03 Oracle International Corporation Waveguide-last silicon photonic optical connector assembly
US10025047B1 (en) * 2017-04-14 2018-07-17 Google Llc Integration of silicon photonics IC for high data rate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006088859A2 (en) * 2005-02-16 2006-08-24 Applied Materials, Inc. Optical coupling to ic chip
CN101226261A (zh) * 2008-02-18 2008-07-23 武汉电信器件有限公司 光纤与面型光电芯片的耦合方法及其结构
CN102356337A (zh) * 2009-03-17 2012-02-15 日本电气株式会社 光波导装置及其制造方法
CN106207743A (zh) * 2016-08-25 2016-12-07 武汉光迅科技股份有限公司 一种用于光栅耦合的激光器结构及封装方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3617763A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111129941A (zh) * 2019-11-21 2020-05-08 东南大学 一种硅基集成激光器芯片倒装耦合结构
CN111129941B (zh) * 2019-11-21 2021-06-01 东南大学 一种硅基集成激光器芯片倒装耦合结构

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