US20180372968A1 - Wafer-level integrated opto-electronic module - Google Patents

Wafer-level integrated opto-electronic module Download PDF

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Publication number
US20180372968A1
US20180372968A1 US16/108,803 US201816108803A US2018372968A1 US 20180372968 A1 US20180372968 A1 US 20180372968A1 US 201816108803 A US201816108803 A US 201816108803A US 2018372968 A1 US2018372968 A1 US 2018372968A1
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United States
Prior art keywords
wafer
module
optoelectronic
module portions
substrate
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Abandoned
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US16/108,803
Inventor
Ian Armour McKay
James Gavon Renfro, JR.
Rebecca Kayla Schaevitz
Michael John Yadlowsky
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Corning Research and Development Corp
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Corning Optical Communications LLC
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Priority to US16/108,803 priority Critical patent/US20180372968A1/en
Assigned to Corning Optical Communications LLC reassignment Corning Optical Communications LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SCHAEVITZ, REBECCA KAYLA, MCKAY, IAN ARMOUR, RENFRO, JAMES GAVON, JR., YADLOWSKY, MICHAEL JOHN
Publication of US20180372968A1 publication Critical patent/US20180372968A1/en
Abandoned legal-status Critical Current

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    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4228Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12002Three-dimensional structures
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4204Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4204Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4206Optical features
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236Fixing or mounting methods of the aligned elements
    • G02B6/4239Adhesive bonding; Encapsulation with polymer material
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236Fixing or mounting methods of the aligned elements
    • G02B6/424Mounting of the optical light guide
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4274Electrical aspects
    • G02B6/428Electrical aspects containing printed circuit boards [PCB]
    • H01S5/02248
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0225Out-coupling of light
    • H01S5/02251Out-coupling of light using optical fibres
    • H01S5/02252
    • H01S5/02284
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/023Mount members, e.g. sub-mount members
    • H01S5/02325Mechanically integrated components on mount members or optical micro-benches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/023Mount members, e.g. sub-mount members
    • H01S5/02325Mechanically integrated components on mount members or optical micro-benches
    • H01S5/02326Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4204Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4228Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
    • G02B6/423Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements using guiding surfaces for the alignment
    • G02B6/4231Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements using guiding surfaces for the alignment with intermediate elements, e.g. rods and balls, between the elements
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4274Electrical aspects
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4292Coupling light guides with opto-electronic elements the light guide being disconnectable from the opto-electronic element, e.g. mutually self aligning arrangements

Definitions

  • the disclosure is directed to a method to manufacture optoelectronic modules.
  • the disclosure is further directed to an optoelectronic module.
  • PDs Photodiodes
  • VCSELs Very Cavity Surface Emitting Lasers
  • PCB Printed Circuit Board
  • Fibers are brought onto the optical element on the PCB to complete the link to the optoelectronic module.
  • each placement of PDs, VCSELs and a lens block has a tolerance of about 10 nm and thus creates a stack up allocation, i.e. the placement tolerances accumulate, for a larger error distribution in placement, which becomes especially problematic at higher data rates above 10 Gbps.
  • silicon photonics structures use single mode operation, which must couple into a single mode fiber with apertures typically less than 10 ⁇ m. Consequently, alignment accuracies need to be within just a few micrometers, e.g. 2-1 ⁇ m, or better, to get reasonable optical coupling.
  • a further need is to provide an optoelectronic module, wherein alignment tolerances between an optical fiber coupled to the optoelectronic module, at least one passive optical component and at least one optoelectronic component of the module are reduced and wherein the optoelectronic module can be manufactured in a low time.
  • a first wafer comprising a plurality of first module portions
  • each of the first module portions comprises at least one passive optical component
  • the at least one passive optical component has a first and a second side and is configured to modify a beam of light such that a direction of light coupled in the at least one passive optical component at the first side is changed and coupled out of the at least one passive optical component at the second side.
  • a second wafer comprising a plurality of second module portions
  • each of the second module portions comprises at least one optoelectronic component and metalized via holes extending in a material of the second wafer from a first surface of the second wafer to a second opposite surface of the second wafer, and wherein the respective at least one optoelectronic component of the second module portions is electrically connected to the respective metalized via holes of the second module portions.
  • a third water comprising a plurality of third module portions is provided, wherein each of the third module portions comprises at least one electronic component.
  • the second wafer is bonded onto the third wafer such that the respective at least one electronic component of the third module portions is electrically coupled to the respective at least one optoelectronic component of the second module portions by means of the respective metalized via holes of the second module portions.
  • the first wafer is bonded onto the second wafer to provide a wafer stack such that each of the first module portions is aligned to a respective one of the second module portions so that light coupled into the respective at least one passive optical component of the first module portions at the first side of the respective at least one passive optical component is coupled out at the second side of the respective at least one optical component and is directed to the respective at least one optoelectronic component of the second module portions.
  • the wafer stack is diced into individual optoelectronic modules respectively comprising one of the first and the second and the third module portions.
  • An embodiment of an optoelectronic module being manufactured by means of the method comprises a first substrate comprising a first module portion of the optoelectronic module including at least one passive optical component.
  • the module comprises a second substrate comprising a second module portion of the optoelectronic module including at least one optoelectronic component.
  • the module comprises a third substrate comprising a third module portion of the optoelectronic module, wherein the third module portion comprises at least one electronic component.
  • the first substrate has a first surface and a second opposite surface, wherein the at least one optical component is arranged on the first surface of the first substrate.
  • the at least one passive optical component has a first and a second side and is configured to modify a beam of light such that a direction of light coupled in the at least one optical component at the first side is changed and coupled out of the at least one passive optical component at the second side.
  • the second substrate has a first surface and an opposite second surface, wherein the at least one optoelectronic component is arranged on the first surface of the second substrate.
  • the second substrate comprises metalized via holes extending in a material of the second substrate from the first surface of the second substrate to the second surface of the second substrate.
  • the at least one optoelectronic component is electrically connected to the metalized via holes.
  • the second substrate is bonded onto the third substrate such that the at least one electronic component of the third module portion is electrically coupled to the at least one optoelectronic component of the second substrate by the metalized via holes of the second substrate.
  • the first substrate is bonded onto the second substrate such that the first module portion is aligned to the second module portion so that light coupled into the respective at least one passive optical component of the first module portion at the first side of the at least one optical component is coupled out at the second side of the at least one optical component and is directed to the at least one optoelectronic component of the second module portion.
  • the method allows to provide a plurality of optoelectronic modules, wherein the alignment tolerances between the respective at least one optoelectronic device, for example a photodiode, a laser or a silicon photonics chip, and the respective at least one passive optical component, and an optical fiber coupled to the respective optoelectronic module are in a range of a few micrometers, for example in a range of about 1-2 ⁇ m.
  • the method uses wafer-scale alignment and may further use wafer-scale testing while also making the final module SMT compatible.
  • the wafer-scale technique allows manufacturers to achieve the low alignment tolerances across hundreds to thousands of devices simultaneously, thus reducing overall cost and time. By also making it wafer-scale testable prior to assembly, fallout of the final assembled device on the PCB can be reduced.
  • the modules may be designed to be compatible with typical semiconductor manufacturing processes, such as SMT, so that the optoelectronic module manufactured by the above-specified method can be integrated into a final product without added assembly cost.
  • the method to manufacture the optoelectronic modules can be used for active optical cables, silicon photonics and optical fiber connections or potentially free-space connectivity across many industries. Additionally, the manufacturing method would enable the large volume that may ensue due to the wafer-scale design, low cost and ease of assembly.
  • the manufacturing tolerances provided could lend itself to making a low-cost, robust module capable of speeds much greater than 10 Gbps and thus provide a path toward innovation requiring high data rate communication.
  • FIG. 1 shows an embodiment of a method to manufacture optoelectronic modules
  • FIG. 2A shows several wafers to be stacked for manufacturing a plurality of optoelectronic modules
  • FIG. 2B shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 3 shows an embodiment of optoelectronic modules of three substrates
  • FIG. 4 shows a perspective view of a cutout of stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 5 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 6 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 7 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 8A shows a perpendicular attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 8B shows a perpendicular attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 9A shows a downward attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 9B shows a downward attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 10A shows a vertical attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 10B shows a vertical attachment of an embodiment of an optoelectronic module onto an electronic board
  • FIG. 11A shows a downward attachment of an embodiment of an optoelectronic module onto an opto-electronic board with an embedded waveguide
  • FIG. 11B shows a downward attachment of an embodiment of an optoelectronic module onto an opto-electronic board with an embedded waveguide
  • FIG. 12A shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board
  • FIG. 12B shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board
  • FIG. 12C shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board
  • FIG. 13A shows an embodiment of several stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 13B shows an embodiment of several stacked wafers for manufacturing a plurality of optoelectronic modules
  • FIG. 14 shows an exploded view of several layers of an optoelectronic module
  • FIG. 15A shows an embodiment of several substrates to be stacked above each other for manufacturing an optoelectronic module
  • FIG. 15B shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 16A shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 16B shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 17A shows an embodiment of several substrates to be stacked above each other for manufacturing an optoelectronic module
  • FIG. 17B shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 18A shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 18B shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 18C shows an embodiment of stacked substrates of an optoelectronic module
  • FIG. 19 shows an embodiment of stacked substrates of an optoelectronic module.
  • FIG. 1 shows steps A to F of a method to simultaneously manufacture a plurality of optoelectronic modules.
  • the method is based on providing a wafer stack of several wafers 100 , 200 and 300 , wherein each of the waters comprises respective different components of the optoelectronic modules.
  • the wafer stack is diced into the individual optoelectronic modules.
  • FIG. 2A illustrates respective embodiments of a first wafer 100 , a second wafer 200 and a third wafer 300 to be stacked to each other.
  • FIG. 2B shows the wafer stack of the bonded first wafer 100 , the second wafer 200 and the third wafer 300 .
  • the first wafer 100 comprising a plurality of first module portions 101 is provided.
  • Each of the first module portions 101 comprises at least one passive optical component 110 .
  • the at least one passive optical component 110 has a first and a second side and is configured to modify a beam of light such that a direction of the light coupled in the at least one passive optical component 110 at the first side is changed and coupled out of the at least one passive optical component 110 at the second side.
  • At least one optical fiber can be aligned to the at least one passive optical component 110 so that light may be coupled from the at least one optical fiber into the at least one passive optical component 110 or coupled out of the at least one passive optical component 110 into the at least one optical fiber.
  • Optical fiber alignment components such as fixtures to hold and align an optical fiber can be mounted on the first wafer 100 .
  • the fiber alignment components can be configured as wafers stacked on top of the first wafer 100 .
  • the second wafer 200 comprising a plurality of second module portions 201 is provided.
  • Each of the second module portions 201 comprises at least one optoelectronic component 210 and metalized via holes 220 extending in a material of the second wafer 200 from a first surface S 200 a of the second wafer to a second opposite surface S 200 b of the second wafer.
  • the respective at least one optoelectronic component 210 of the second module portions 201 is electrically connected to the respective metalized via holes 220 of the second module portions 201 .
  • the third wafer 300 comprising a plurality of third module portions 301 is provided.
  • Each of the third module portions comprises at least one electronic component 310 .
  • the second wafer 200 is bonded onto the third wafer 300 such that the respective at least one electronic component 310 of the third module portions 301 is electrically coupled to the respective at least one optoelectronic component 210 of the second module portions 201 by means of the respective metalized via holes 220 of the second module portions 201 .
  • the first wafer 100 is bonded onto the second wafer 200 to provide a wafer stack such that each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled into the respective at least one passive optical component 110 of the first module portions 101 at the first side of the respective at least one passive optical component 110 is coupled out at the second side of the respective at least one optical component 110 and is directed to the respective at least one optoelectronic component 210 of the second module portions 201 .
  • the wafer stack comprising the first wafer 100 , the second wafer 200 , and the third wafer 300 is diced into individual dies respectively comprising one of the first and the second and the third module portions 101 , 201 and 301 for respectively forming one of the optoelectronic modules.
  • Each of the optoelectronic modules is formed by a respective first module portion 101 of the first wafer 100 , a respective second module portion 201 of the second wafer 200 and a respective third module portion 301 of the third wafer 300 , wherein the respective first, second and third module portions are stacked and bonded above each other.
  • the first wafer 100 is provided in the step A with a first surface S 100 a and a second surface S 100 b being opposite to the first surface S 100 a.
  • the respective at least one passive optical component 110 of each of the first module portions 101 is arranged on the first surface S 100 a of the first wafer 100 .
  • the second wafer 200 is provided in step B with the respective at least one optoelectronic component 210 of each of the second module portions 200 being arranged on the first surface S 200 a of the second wafer 200 .
  • the first wafer 100 is bonded onto the second wafer 200 such that the second surface S 100 b of the first wafer 100 is disposed on the first surface S 200 a of the second wafer 200 .
  • FIG. 3 shows several optoelectronic modules 1 after being diced out of the wafer stack comprising the first wafer 100 , the second wafer 200 and the third wafer 300 .
  • Each of the optoelectronic modules 1 comprises a first substrate 100 ′ being cut out of the first wafer 100 of the wafer stack and comprising the first module portion 101 of the respective optoelectronic module including the at least one passive optical component 110 .
  • each of the optoelectronic modules 1 comprise a second substrate 200 ′ being cut out of the second wafer 200 of the wafer stack and comprising the second module portion 201 of the respective optoelectronic module including the at least one optoelectronic component 210 .
  • Each of the optoelectronic modules further comprises a third substrate 300 ′ being cut out of the third wafer 300 of the wafer stack and comprising the third module portion 301 of the optoelectronic module, wherein the third module portion 301 comprises the at least one electronic component 310 .
  • the first substrate 100 ′ has a first surface and a second opposite surface, wherein the at least one passive optical component 110 is arranged on the first surface of the first substrate 100 .
  • the at least one passive optical component 110 has a first and a second side and is configured to modify a beam of light such that a direction of the light coupled in the at least one optical component 110 at the first side is changed and coupled out of the at least one passive optical component 110 at the second side.
  • the second substrate 200 ′ has a first surface and an opposite second surface, wherein the at least one optoelectronic component 210 is arranged on the first surface of the second substrate 200 ′.
  • the second substrate 200 ′ comprises the metalized via holes 220 extending in a material of the second substrate 200 ′ from the first surface of the second substrate to the second surface of the second substrate.
  • the at least one optoelectronic component 210 is electrically connected to the metalized via holes 220 .
  • the second substrate 200 ′ is bonded onto the third substrate 300 ′ such that the at least one electronic component 310 of the third module portion 301 is electrically coupled to the at least one optoelectronic component 210 of the second module portion 201 by the metalized via holes 220 of the second substrate 200 ′.
  • the first substrate 100 ′ is bonded onto the second substrate 200 ′ such that the first module portion 101 is aligned to the second module portion 201 so that light coupled into the respective at least one passive optical component 110 of the first module portion 101 at the first side of the at least one optical component is coupled out at the second side of the at least one optical component 110 and is directed to the at least one optoelectronic component 210 of the second module portion 201 .
  • the second wafer 200 may be configured as a GaAs or a silicon photonics wafer or an InP wafer.
  • the first wafer 100 may be configured as one of a glass wafer and an opaque polymer wafer with holes drilled out and filled with a transparent polymer.
  • the respective at least one passive optical component 110 of the first module portions 101 may comprise an optical lens and/or a light turning element, for example an optical mirror, being configured to change a direction of the light beam, for example by TIR (Total Internal Reflection), so that light is coupled between an optical fiber coupled to the respective first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101 .
  • TIR Total Internal Reflection
  • the respective at least one optoelectronic component 210 of the second module portions 201 may be configured as an optical emitter, for example a VCSEL, and/or an optical receiver, for example a photodiode.
  • the respective at least one electronic component 310 of the third module portions 301 may be configured as an electrical driver and/or an electrical amplifier.
  • the first opto-mechanical wafer 100 may comprises a substrate of glass.
  • Glass can provide a flat surface to mold optical components, such as lenses and turning mirrors, on the first wafer 100 .
  • Glass can also have precision features etched into its surface and through the first wafer 100 to allow for any mechanical alignment of optical fibers or other components.
  • glass can be designed with coefficients of thermal expansion (CTEs) similar to semiconductor wafers, thus improving reliability of the final optoelectronic modules over large temperature ranges.
  • CTEs coefficients of thermal expansion
  • glass is an ideal substrate for high-speed signal integrity and both metal traces and vias can be made on it.
  • FIG. 4 shows a perspective view of an embodiment of an optoelectronic module 1 after dicing the wafer-scale stack in perspective view, wherein each of the first, second and third module portions 101 , 201 and 301 comprises electrical contact pads to provide an external electrical connection to the electrical and/or optoelectronic components of the module or to electrically connect the electrical and optoelectronic components to each other.
  • the second wafer 200 can be provided in method step B with respective electrical contact pads 230 for each of the second module portions 201 .
  • the respective electrical contact pads 210 are electrically coupled to the respective metalized via holes 220 of the second module portions 201 .
  • the respective electrical contact pads 230 are arranged on the second surface S 200 b of the second wafer 200 .
  • the third wafer 300 is provided with respective electrical contact pads 330 for each of the third module portions 301 .
  • the respective electrical contact pads 330 are electrically coupled with the respective at least one electronic component 310 of the third module portions 301 .
  • the respective electrical contact pads 330 are arranged on a surface S 300 a of the third wafer.
  • the second wafer 200 is bonded onto the third wafer 300 such that the second surface S 200 b of the second wafer 200 is disposed on the surface S 300 a, of the third wafer 300 and the respective electrical contact pads 330 of the third module portions 301 are aligned to the respective electrical contact pads 230 of the second module portions 201 to provide an electrical connection between the respective electrical contact pads 330 of the third module portions 301 and the respective electrical contact pads 230 of the second module portions 201 .
  • the third wafer 300 is provided in method step A with respective metalized via holes 320 for each of the third module portions 301 in a material of the third wafer 300 .
  • the respective metalized via holes 320 extend from the first surface S 300 a of the third wafer 300 to a second opposite surface S 300 b of the third wafer 300 .
  • the respective electrical contact pads 330 of the third module portions 301 arranged on the first surface S 300 a of the third wafer 300 are electrically coupled to the respective metalized via holes 320 of the third module portions 301 .
  • the third water 300 is provided with respective electrical contact pads 340 for each of the third module portions 301 on the second surface S 300 b of the third wafer 300 .
  • the respective electrical contact pads 340 of the third module portions 301 on the second surface S 300 b are electrically coupled to the respective metalized via holes 320 of the third module portions 301 .
  • the optoelectronic module comprises the electrical contact pads 330 and 340 being arranged on both surfaces S 300 a and S 300 b of the wafer 300 .
  • the first wafer 100 is provided in method step A with respective metalized via holes 120 for each of the first module portions 101 in a material of the first wafer 100 .
  • the respective metalized via holes 120 extend from the first surface S 100 a of the first wafer 100 to the second surface S 100 b of the first wafer 100 .
  • the second wafer 200 is provided with respective electrical contact pads 240 for each of the second module portions 201 on the first surface S 200 a of the second wafer 200 such that the respective electrical contact pads 240 of the second module portions 201 are electrically connected to the respective metalized via holes 220 of the second module portions 201 .
  • the first wafer 100 is bonded onto the second wafer 200 such that the respective electrical contact pads 240 of the second module portions 201 are electrically connected to the respective metalized via holes 120 of the first module portions 101 .
  • the first wafer 100 is provided in method step A with respective electrical contact pads 130 for each of the first module portions 101 on the second surface S 100 b of the first wafer such that the respective electrical contact pads 130 of the first module portions 101 are electrically connected to the respective metalized via holes 120 of the first module portions 101 .
  • the first wafer 100 can be provided in method step A with a conductive redistribution layer 150 on the second surface S 100 b of the first wafer 100 .
  • the conductive redistribution layer 150 comprises respective conductive traces for each of the first module portions 101 , wherein the respective conductive traces of the conductive redistribution layer 150 are arranged to electrically couple the respective contact pads 130 of the first module portions 101 on the second surface S 100 b of the first wafer 100 to the respective metalized via holes 120 of the first module portions 101 .
  • the first module portion 101 comprises electrical contact pads 130 arranged on the second surface S 100 b of the wafer 100 and electrical contact pads 140 arranged on the first surface S 100 a of the first wafer MO.
  • the electrical contact pads 140 on the top surface S 100 a of the first wafer 100 could allow for flip-chip bonding of the optoelectronic module 1 .
  • the second wafer 200 comprising the second module portions 201 with the respective optoelectronic components 210 is configured as a wafer made of GaAs.
  • the electrical signals would traverse from the top surface of the third wafer 300 comprising the third module portions with the respective electronic components through the GaAs vias 220 of the second wafer 200 to the first wafer 100 comprising opto-mechanical components 110 to connect the electrical signals to an external electronic board, for example a PCB.
  • the vias 220 would electrically connect the second wafer 200 to the third wafer 300 containing either laser drivers or receiver amplifiers as electronic components to drive the optoelectronic components, for example the VCSELs or IUDs, of the second wafer respectively.
  • the top first wafer 100 would have passive optical components such as lenses and turning mirrors, as well as opto-mechanical components for fiber attachment components and also comprises electrical traces and vias to connect to an external board such as a PCB. In configuring the stack up using GaAs vias, very well controlled impedances and electrical losses capable of achieving very high data rates are provided.
  • the second wafer 200 is configured as a Silicon Photonics wafer.
  • the electrical signals from the bottom third (electronic) wafer 300 comprising the electronic components could either traverse from the top to the bottom of the third (electronic) wafer 300 or from the top of the third (electronic) wafer 300 through the middle second (SiP optoelectronic) wafer 200 to the top first (opto-mechanical) wafer 100 .
  • the top of the electronic wafer 300 would also be connected to the middle SiP optoelectronic wafer 200 in order to drive the transmitter and receiver optoelectronic devices 210 .
  • the top opto-mechanical wafer 100 may optionally have electrical connectivity.
  • the specified method utilizes (GaAs, Si or other wafer-based) via fabrication technology to reduce parasitics of wirebonding optoelectronic devices for III-V wafers and in other cases for multi-chip integration of Si-based electronic components.
  • vias enable compact wafer-level integration of optical sources and detectors on a wafer, such as a GaAs or silicon photonics wafer, sandwiched between the third (bottom) wafer 300 having electronic functions such as laser drivers and receiver amplifiers, for example Si CMOS or SiGe Bi-CMOS, and the first (top) wafer 100 having passive optical components, for example lenses, turning mirrors, fiber alignment components as well as possibly components for electrical connectivity.
  • the wafer stack comprising the bonded first, second and third wafer 100 , 200 and 300 may be diced along the respective metalized via holes 120 of the first module portions 101 of the first wafer 100 into the individual dies/optoelectronic modules 1 to create half- or castellated vias in the first wafer 100 .
  • vias 120 are arranged in the material of the first wafer 100 extending from the first surface S 100 a to the second surface S 100 b of the first wafer 100 .
  • the first wafer 100 is diced through the metalized vias 120 such that half- or castellated vias are created.
  • the castellated vias could allow for perpendicular/edge bonding of the optoelectronic module as illustrated below in FIG. 8A .
  • FIG. 5 shows another embodiment of a wafer stack comprising the first wafer 100 , the second wafer 200 and the third wafer 300 .
  • the first wafer 100 is provided without any metalized vias through the first wafer 100 for backside mounting.
  • Fiber alignment components to hold and align the optical fibers to the optical components 110 can be mounted on the first wafer 100 .
  • the fiber alignment components can be configured as wafers stacked on top of the first wafer 100 . After being stacked and aligned the wafer stack is diced into individual optoelectronic modules.
  • a fourth wafer 400 configured for thermal isolation may be provided in method step D between the third wafer 300 and the second wafer 200 , wherein the fourth wafer 400 comprises metalized via holes in a material of the fourth wafer, wherein the metalized via holes are arranged to electrically couple the respective electrical contact pads 330 of the third module portions 301 to the respective electrical contact pads 230 of the second module portions 201 .
  • FIG. 6 shows an embodiment of a wafer stack comprising the first wafer 100 , the second wafer 200 , the third wafer 300 and the fourth wafer 400 .
  • the fourth wafer 400 serves as to improve thermal isolation of the second (optoelectronic) wafer 200 from the first (electronic) wafer 300 .
  • the insertion of the fourth wafer 400 al lows to protect the optoelectronic components 210 , for example an optical source and detector of the second wafer 200 , from the electronic components 310 , for example drive electronics of the third wafer.
  • the fourth wafer 400 may be configured as a glass interposer wafer with metal vias and redistribution layers between the third and the second wafers 300 and 200 .
  • the wafer stack up would include a total of four wafers beginning at the bottom with the third (electronic) wafer 300 , followed by the fourth wafer 400 acting as a thermal isolation wafer, the second (optoelectronic) wafer 200 and, at the top, the first (opto-mechanical) wafer 100 .
  • the isolation may especially be important for the VCSEL sub-assembly where the output optical power as well as the threshold current is affected significantly by temperature especially as data rates increase, but also may be important in SiP (Silicon Photonics) where some devices are temperature sensitive.
  • FIG. 7 shows an embodiment of a wafer stack comprising just the first wafer 100 and the second wafer 200 .
  • the first wafer 100 comprises first module portions 101 comprising at least one passive optical component 110 and metalized via holes 120 .
  • the second wafer 200 comprises the second module portions 201 comprising at least one optoelectronic component and metalized via holes extending in the material of the second wafer 200 .
  • the wafer stack does not comprise the third wafer 300 .
  • only one set of vias are needed, either in the first wafer 100 or the second wafer 200 , but not both. Vias in the first wafer 100 would allow for downward or horizontal mounting as shown in FIGS. 8B, 9B or 11B , while vias in the second wafer 200 would allow for mounting as shown in FIG. 10 b , 12 a , 12 b or 12 c.
  • FIGS. 8A to 12C show different arrangements of an optoelectronic module 1 on an electronic board 3 .
  • the optoelectronic module 1 shown in FIGS. 8A, 9A, 10A and 11A comprises the third substrate 300 ′ with electronic components 310 , such as drivers or amplifiers integrated in the substrate 300 ′, the second substrate 200 ′ with the optoelectronic components 210 , for example photodiodes or VCSELs, and the first substrate 100 ′ with the passive optical components 110 , such as optical lenses.
  • the first substrate 100 ′ may also include electrical and/or opto-mechanical components.
  • the second substrate 200 ′ contains electrical vias 220 to electrically couple the electronic components of the third substrate 300 ′ with the optoelectronic components of the second substrate.
  • the electronic components and the optoelectronic components may be electrically coupled to the electronic board by means of electrical traces disposed on a surface of the first substrate 100 ′, as shown, for example, in the embodiments of FIGS. 8A, 9A and 11A .
  • FIG. 10A there are no electrical contacts to the first substrate 100 ′, but there are electrical vias in the third substrate 300 ′ to connect to the electronic board 3 .
  • the optoelectronic module 1 shown in FIGS. 8B, 9B, 10B, 11B and 12A to 12C only comprises the first substrate 100 ′ and the second substrate 200 ′ but does not comprise the third substrate 300 ′.
  • the electronic components are provided as separate, individual devices 30 directly mounted on the electronic board 3 .
  • the optoelectronic module 1 is provided by dicing the wafer stack shown in FIG. 7 into individual modules.
  • the first substrate 100 ′ may or may not comprise electrical vias/metalized via holes.
  • FIGS. 8 b , 9 b and 11 b show embodiments with vias in the first substrate 100 ′ connecting the second substrate 200 ′.
  • the vias on the first substrate 100 ′ can then connect to the electronic board 3 by means of castellated vias ( FIG. 8 b ) or electronic contact pads ( FIGS. 9 b and 11 b ).
  • the electronic connection then provides electrical connectivity between the second substrate 200 ′ and the electronic components 30 being mounted on the electronic board 3 .
  • FIGS. 10 b and 12 A to 12 C show examples where the first substrate 100 ′ do not comprise electrical vias/metalized via holes or any metal redistribution layers.
  • substrate 200 ′ comprises of electrical vias/metalized via holes in order to connect to the electronic board 3 and, in particular, to the electronic components 30 being mounted on the electronic board 3 .
  • the optoelectronic module 1 is perpendicularly attached onto the electronic board 3 .
  • the first wafer 100 may comprise castellated vias 110 as described above and shown in FIG. 4 .
  • Metal traces 10 may be arranged on the electronic board 3 to connect the optoelectronic module 1 , for example by means of the castellated vias, to electronic components of the electronic board 2 .
  • Metallic pads, for example Cu pads, may be optionally be provided on the backside of the electronic board 3 for solder reflow to a master PCB, for example a motherboard.
  • a glue 20 may be applied to the surface of the electronic board 3 to provide any stability for mounting the optoelectronic module 1 to the board 3 .
  • FIGS. 9A and 9B respectively show an embodiment of an arrangement of an optoelectronic module 1 onto an electronic board 3 , for example a printed circuit board, wherein the optoelectronic module 1 is attached downward onto the electronic board 3 .
  • Metal traces 10 are provided on a surface of the electronic board 3 to electrically connect the electronic components of the electronic board 3 to the optoelectronic module 1 .
  • FIGS. 10A and 10B respectively show an embodiment of an arrangement of an optoelectronic module 1 onto an electronic board 3 , wherein the optoelectronic module 1 is vertically mounted onto the electronic board 3 .
  • the optoelectronic module 1 shown in FIG. 10A is provided by dicing the wafer stack shown in FIG. 5 into individual modules.
  • the optoelectronic module 1 shown in FIG. 10B is provided by dicing a wafer stack only comprising the first wafer 100 and the second wafer 200 , wherein the first wafer does not comprise electrical vias.
  • the optical fiber 2 is held and aligned by means of an alignment component, for example, a fixture 160 .
  • the fixture 160 may be configured as an individual component mounted/attached on the surface of the first substrate 100 ′ or as a wafer/wafers with or without molded elements stacked on top of the first substrate 100 ′.
  • FIGS. 11A and 11B respectively show an embodiment of a downward arrangement of an optoelectronic module 1 onto an opto-electronic board 3 .
  • Metal traces 10 are provided on a surface of the opto-electronic board to electrically connect the electronic components of the opto-electronic board 3 to the optoelectronic module I.
  • Electrical vias are provided in the first substrate 100 ′ to make the electrical connection between the electronic board 3 and the second substrate 200 ′ (and the third substrate 300 ′ for the embodiment of FIG. 11A ).
  • the opto-electronic board 3 may comprise a channel to insert a waveguide 4 being embedded in the opto-electronic board 3 such that a front face of the embedded waveguide 4 is arranged in a cavity of the opto-electronic board 3 under the passive optical component 110 , for example a lens, of the optoelectronic module.
  • Light may be coupled from the front face of the embedded waveguide 4 through the passive optical component 110 into the optoelectronic module 1 and vice versa.
  • the opto-electronic board 3 may comprises a mirror/TIR component to change the direction in order to aid in the coupling of light.
  • FIGS. 12A to 12C show downward approaches of arrangements of an optoelectronic module 1 comprising the first (opto-mechanical) substrate 100 ′ and the second (optoelectronic) substrate 200 ′.
  • the optoelectronic module 1 has no wafer-scale IC integration.
  • the optoelectronic module 1 has only a wafer-scale integration with the first (opto-mechanical) wafer 100 and the second (optoelectronic) wafer 200 and possibly with a fiber alignment component made up of multiple wafers or molded components on a single wafer.
  • the optoelectronic module 1 is provided by dicing the wafer stack as shown in FIG. 7 into individual modules.
  • the electronic board 3 is provided with a cutout to place the optoelectronic module 1 to different components.
  • FIG. 12A shows an embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100 ′ which can be made of glass and the optoelectronic substrate 200 ′ on the electronic board 3 .
  • the optoelectronic module 1 is electrically bonded onto the electronic component 30 , for example a transceiver.
  • the optoelectronic substrate 200 ′ is disposed onto the electronic component 30 .
  • the optoelectronic substrate 200 ′ contains metallized via holes 220 , i.e. electrical vias, to electrically couple the optoelectronic components of the optoelectronic substrate 200 ′ to the electrical component 30 .
  • the electrical component 30 is electrically coupled to the electronic board 3 .
  • FIG. 12B shows another embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100 ′ which can be made of glass and the optoelectronic substrate 200 ′ on the electronic board 3 .
  • the optoelectronic module 1 is bonded onto an interposer 40 along with the electronic component 30 , for example a transceiver.
  • the interposer 40 comprises electrical vias 41 to electrically couple the optoelectronic components of the optoelectronic substrate 200 ′ to the electrical component 30 and electrical vias 42 to electrically couple the optoelectronic components and the electrical component 30 to the electronic board 3 .
  • FIG. 12C shows another embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100 ′ which can be made of glass and the optoelectronic substrate 200 ′ on the electronic board 3 .
  • the optoelectronic substrate 200 ′ is placed onto an electronic substrate 50 .
  • the optoelectronic components of the optoelectronic substrate 200 ′ are electrically coupled to the electronic board 3 via electrical traces of the electronic substrate 50 .
  • the electronic component 30 is mounted to a side of the electronic board 3 .
  • the first opto-mechanical wafer 100 may be provided with mechanical elements to fix the optical fiber 2 to the module 1 with high precision and exact alignment, thus creating a robust and well-aligned optical link.
  • a respective at least one fixture 160 fabricated from a wafer with molded alignment features or a stack of wafers with varying sized vias may be placed for each of the first module portions 101 on the first surface S 100 a of the first wafer 100 to couple a respective at least one optical fiber 2 to the first module portions 101 , as shown in FIGS. 8A to 10B and in FIGS. 12A to 12C .
  • the respective at least one fixture 160 is configured to hold the respective at least one optical fiber 2 and to align the respective at least one optical fiber 2 to the respective at least one passive optical component 110 of the first module portions 101 such that light is coupled between the respective at least one optical fiber 2 and the respective at least one passive optical component 110 of the first module portions 101 .
  • the respective at least one fixture 160 is configured to provide a distance between a front face of the respective at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101 .
  • the fixture may be made by wafer scale process molding directly onto the first wafer and/or is one of a single wafer and several stacked wafers with varying holes or molded elements to form the fixture and bonded to the first wafer at the wafer scale.
  • FIGS. 8A to 12C show the fixture 160 being placed on the first surface S 100 a of the first module portion 101 of the optoelectronic module 1 to hold and align the optical fiber 2 to the passive optical component 110 .
  • the fixture 160 may comprise protrusions 161 being configured to hold the optical fiber 2 in a distance far away from the passive optical component 110 .
  • the fixture 160 can be made of a single wafer with molded components.
  • the fixture can be made of a stack of wafers with varying sized holes and aligned to the first wafer 100 in the same fashion that the first wafer 100 is aligned to the second wafer 200 .
  • the fixture 160 may comprise individual fixture elements bonded precisely to each module.
  • metal traces and vias on the first opto-mechanical wafer 100 are used to connect signals to an external PCB. This concept is shown for example in FIGS. 2A and 2B .
  • the sub-assembly could be mounted onto a PCB perpendicular to its surface as shown in FIGS. 8A and 8B .
  • the overall footprint of the optoelectronic modules can be reduced by stacking the second (optoelectronic) wafer 200 on top of the third (electronic) wafer 300 or IC, it is conceivable this implementation could even work for applications with limited vertical space.
  • An example of such an application is an active optical cable assembly in which this module would be integrated into the board residing in the plug of the cable.
  • the vias in the first opto-mechanical wafer 100 could be designed such that the metal connections are on the opposite side of the wafer and the module could be mounted horizontally as shown in FIGS. 9A and 9B .
  • the electronic board 3 would need a cutout to allow for the optical path through the electronic board or it would need to be an optical PCB with embedded waveguides as shown in FIGS. 9A and 9B .
  • By architecting the solution horizontally it may be possible to improve heat extraction and the electrical signaling characteristics. Such a solution may benefit applications where speed, power and heat are paramount, such as in data centers and server farms.
  • a spacer layer may be provided on the first surface S 100 a of the first wafer 100 to provide a distance between a front face of the respective at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101 .
  • the functionality of the bonded respective first and second module portions 101 , 201 and/or the bonded respective third and second module portions 301 , 201 and/or the bonded respective first and second and third module portions 101 , 201 , 301 is tested in the method step D before dicing the wafer stack into the individual dies.
  • the functionality of the optoelectronic modules is tested before dicing the bonded first, second and third wafer in method step E into the individual dies/optoelectronic modules.
  • the respective materials of the first, second and third wafer must be chosen appropriately and a covering element could be needed over the optical and mechanical alignment features to prevent debris from compromising that area.
  • the covering element may be placed on the first surface S 100 a of the first wafer 100 to protect the respective at least one passive optical component 110 of the first module portions 101 from debris when dicing the wafer stack into the individual dies and/or to assist with fiber alignment.
  • a cleaning step may be used in place of a protective cover.
  • the covering element could prove useful during the dicing process of the wafer as well as during SMT.
  • the cover should be placed prior to singulation (at the wafer-scale) and removed following the entire SMT process and just before fiber insertion. Additionally, the cover could be placed back onto the module following fiber insertion to add mechanical support and alignment of the fiber.
  • the integration of the three wafers, i.e. the bottom electrical, the middle optoelectronic and the top opto-mechanical wafers 300 , 200 and 100 provides many possible benefits.
  • One benefit is the compact integration of the second (optoelectronic) wafer 200 , for example GaAs VCSEL or silicon photonics wafer, with the third (bottom electrical) wafer 300 , which leads to very well controlled impedances and parasitics critical for data rates above 10 Gbps.
  • a second benefit is the tight alignment accuracies and parallelism of alignment over hundreds to thousands of modules of the first (opto-mechanical) wafer 100 to the second (optoelectronic) wafer 200 , critical for high-speed multi-mode as well as single-mode operation.
  • a third benefit is the capability to have easy access to electrical signals external to the module either by vias through the second (optoelectronic) wafer 200 connecting the top of the third (electronic) wafer 300 to the first (opto-mechanical) wafer 100 or alternatively vias through the third (electronic) wafer 300 connecting the top to the bottom of the third wafer 300 .
  • a fourth benefit is the compact size of the entire subassemblies after dicing the water-stack of the first, second and third wafer.
  • a fifth benefit is the compatibility of a final optoelectronic module with traditional electronic processing technologies, such as Surface Mount Technology (SMT).
  • SMT Surface Mount Technology
  • a sixth benefit is that the platform can be used for both multi-mode and single-mode optical integration given the very tight optical alignment tolerances, allowing for use with traditional VCSEL-based multi-mode optics as well as Silicon Photonics (SiP) single-mode optics with all light emission is surface normal. And lastly, these optoelectronic subassemblies have the further capability of wafer-scale testing to produce “known-good modules”.
  • the method to manufacture optoelectronic modules is described in the following by process steps for manufacturing an optoelectronic receiver module using the first opto-mechanical wafer 100 , the second optoelectronic wafer 200 and the third electronic wafer 300 , wherein a GaAs approach is assumed to be used for the second wafer 200 .
  • the electronic wafer 300 is designed with module portions 301 respectively comprising a receiver integrated circuit (IC) and top electrical pads having a pitch easily fabricated on a low-cost electronic circuit substrate, for example a PCB.
  • IC receiver integrated circuit
  • An example pitch would be 0.25 mm where the pads and spacing widths are 0.125 mm. Variation of this design is valid presuming the electrical signal integrity is good and the integration onto an electronic board remains feasible.
  • the optoelectronic wafer 200 is designed with second module portions 201 respectively comprising a GaAs photodiode with pad locations, spacing and widths that match the receiver IC and through GaAs vias to replicate the location, spacing and widths of the electrical pads on the backside of the optoelectronic GaAs wafer 200 .
  • thermo-compression or other means may be applied to electrically bond the optoelectronic GaAs wafer 200 onto the electronic wafer 300 , and align the electrical pads on the top surface of the electronic wafer 300 to the pads on the bottom surface of the optoelectronic GaAs wafer 200 .
  • Some of the electrical pads on the top surface of the optoelectronic GaAs wafer 200 need only connect to the bottom electronic wafer 300 , for example those that connect to the photodiode, while other pads need to connect eventually to the electronic board, for example a PCB.
  • the layout of the pads and the subsequent metal redistribution layer on the glass substrate should reflect that connection requirement.
  • the stacked wafers 300 and 200 are tested for optical and electrical functionality, for example, by using an optical and electrical probe system.
  • the electrical portion of the opto-mechanical wafer 100 may be designed with an electrical redistribution layer from trace pads aligned to the optoelectronic GaAs wafer 200 top surface to metalized vias in the glass.
  • the vias should be designed such that dicing would occur through the via and provide sufficient metal remaining in the half- or castellated-via to create contacts in a perpendicular orientation.
  • the vias could be of the non-castellated type and flipped onto a PCB.
  • opto-mechanical components including polymer lenses, spacer layers, mechanical alignment features to align optical fibers to the lenses and provide an optimized optical path are designed.
  • the opto-mechanical wafer 100 can be fabricated by the steps of creating through-glass vias (TGVs), metalizing glass vias, metalizing glass redistribution layer and contact pads, plating up metal lines and contacts as needed, molding polymer lenses on alternate side, optionally placing a spacer layer, optionally placing an optical turn, placing fiber alignment features and placing mechanical fixturing features for the fiber holder, all of which may be done at the wafer scale.
  • TSVs through-glass vias
  • metalizing glass vias metalizing glass redistribution layer and contact pads
  • plating up metal lines and contacts as needed
  • molding polymer lenses on alternate side optionally placing a spacer layer, optionally placing an optical turn, placing fiber alignment features and placing mechanical fixturing features for the fiber holder, all of which may be
  • thermo-compression or other means of electrical bonding is provided to bond the top surface of electronic/optoelectronic wafer stackup onto the metalized side of the opto-mechanical wafer 100 so that the photodiodes are aligned with the lenses within low tolerance, for example an accuracy of less than 2 ⁇ m.
  • an index matching gel can be placed between the photodiode surface and the glass to minimize reflections on the surfaces.
  • the modules may be tested on the wafer-scale before dicing, wherein any may be marked that fail to meet manufacturing standards for electrical and optical connectivity.
  • a removable wafer-scale covering element may be placed over the opto-mechanical features on the top surface of the opto-mechanical wafer 100 .
  • the stacked wafers 300 , 200 and 100 are then diced into individual optoelectronic modules, cleaned and the temporary covering element is removed.
  • the singularized final optoelectronic modules may be visually tested and additionally tested in a test fixture for good electrical and optical connectivity for perpendicular, vertical or downward surface mounting to a PCB. Afterwards, the temporary covering element is replaced for shipping and as a possible final fiber alignment mechanical fixture.
  • One alternative process flow in which the electronic wafer 300 is not part of the optoelectronic module as shown for the wafer stack in FIG. 7 would change a few of the steps described above.
  • the first step would change such that some or possibly none of the metal pads on the IC need match the GaAs substrate of the optoelectronic wafer.
  • the step of bonding the electronic and the optoelectronic wafer would be removed.
  • the steps of designing and fabricating the opto-mechanical wafer 100 would not need any of the metallization described.
  • the opto-mechanical wafer could still have metallization in some embodiments as shown in FIGS.
  • the step of bonding the opto-mechanical wafer 100 onto the optoelectronic wafer 200 could only need index matching epoxy and no electrical connection according to a possible embodiment. After the step of testing the optoelectronic module and replacing the temporary cover, an additional step is needed to apply thereto-compression, or by other means, mount the optoelectronic module onto an electronic wafer for good electrical connection.
  • the last step could be to mount the optoelectronic module onto a glass interposer with the electronic chip mounted to the backside or to the side for thermal isolation or to a common substrate, such as a PCB.
  • the final module would then be tested for electrical and optical performance.
  • the last step could be to mount the optoelectronic module to the final electronic board 3 with the electronic chip mounted to the side as shown in FIGS. 8B, 9B, 10B and 11B .
  • the same steps above could be used with the GaAs wafer 200 replaced by a silicon photonics wafer 200 . Additionally, it would be possible to integrate both receiver and transmitter functionality onto one wafer rather than having two separate process flows.
  • the silicon photonics process could also be slightly altered such that the electrical tracing going externally to an electronic board goes through the electronic wafer rather than through the SiP wafer to the opto-mechanical wafer.
  • the first step of designing the electronic wafer 300 would also need to design through Si vias to the backside to match with standard PCB or similar electronic board capabilities.
  • the steps of designing and fabricating the opto-mechanical wafer 100 would not need any of the metallization described for the opto-mechanical wafer.
  • the step of bonding the opto-mechanical wafer 100 to the optoelectronic wafer 200 would only need index matching epoxy and no electrical connection.
  • the opto-mechanical wafer 100 may still have the electronic connection through the opto-mechanical wafer with the Silicon IC chip either disposed on a common substrate or the stacked up module bonded onto the Silicon IC, where the IC is a larger chip than the module.
  • Another variation to the method to manufacture optoelectronic modules could be a mix of wafer-level integration with chip-based integration used in silicon-based electronics.
  • wafer-level integration of just the two top wafers i.e. the optoelectronic wafer (GaAs, SiP or other) 200 and the opto-mechanical wafer 100 .
  • the two wafers 100 and 200 would be bonded solely with index-matching epoxy and have no electrical connectivity while still maintaining the advantages of wafer-level fabrication for the optical and fiber attach elements.
  • metalization for downward or flip chip connections as well, for example, either through metal redistribution layers and/or vias. The arrangement is shown in FIGS.
  • This two-layer stack would form the sub-assembly to then be diced into individual optoelectronic modules, which can be electrically connected at the bottom of the module, i.e. the bottom of the optoelectronic wafer, using the same via design as the previous three-layer stack. Since the two-layer stack no longer directly integrates the electronic wafer functionality into the wafer-level integration, it is necessary to subsequently integrate the singularized optoelectronic module, i.e. the diced two-layer stack, with an electronic chip or a diced electronic wafer.
  • One possible method to do this final integration with an electronic chip could be to bond the optoelectronic module directly on top of an electronic chip or an interposer substrate typically referred to as 2.5D or 3D integration in silicon processing.
  • the module could be soldered, e.g. through Surface Mount Technology (SMT), directly to an electronic board, such as a PCB, with nearby electronic chips with laser drive and receiver amplification.
  • SMT Surface Mount Technology
  • Embodiments of a method to manufacture the optoelectronic modules comprising at least two substrates cut out of a wafer stack comprising at least the first (opto-mechanical) wafer 100 and the second (optoelectronic) wafer 200 are described with reference to FIGS. 13A and 13B .
  • FIG. 13A shows a wafer stack comprising the first (opto-mechanical) wafer 100 comprising alignment components 160 , such as v-grooves, and light turning elements 170 based on TIR (Total Internal Reflection).
  • the first wafer 100 does not comprise any electrical vias through the material of the first wafer 100 , for example a glass material.
  • the wafer stack further comprises a spacer wafer 600 bonded below the opto-mechanical wafer 100 and the second (optoelectronic) wafer 200 arranged on the bottom side of the spacer wafer 600 .
  • the optoelectronic wafer 200 can be made of glass.
  • Electronic components, for example a transceiver, and optoelectronic components, for example, a VCSEL and/or a PD can be placed on a surface of the optoelectronic wafer 200 .
  • FIG. 13B shows a wafer stack comprising an opto-mechanical wafer 100 , a spacer wafer 600 and an optoelectronic wafer 200 .
  • the opto-mechanical wafer 100 is placed on the top side of the wafer stack and the optoelectronic wafer 200 is placed on the bottom side of the wafer stack.
  • the spacer wafer 600 is arranged between the opto-mechanical wafer 100 and the optoelectronic wafer 200 .
  • the optoelectronic wafer 200 may be configured as an electronic board, for example a PCB with individual electronic and opto-electronic components arranged on top of the electronic board within an opening of the spacer wafer as shown below in FIG. 19 .
  • the optoelectronic wafer 200 may be configured as a SiP wafer with backside electrical connections.
  • a water stack as shown in FIG. 13A comprises a first (opto-mechanical) wafer 100 comprising a plurality of first (opto-mechanical) module portions 101 , wherein each of the first (opto-mechanical) module portions 101 comprises at least one fixture 160 , which is molded at the wafer scale onto the surface of the first wafer 100 , to hold an optical fiber 2 .
  • the fixture can also be individual injection molded elements that are bonded precisely to each module.
  • a first (opto-mechanical) wafer 100 comprising a plurality of first module portions 101 is provided, wherein the first wafer 100 has a first surface S 100 a and an opposite second surface S 100 b.
  • a second (optoelectronic) wafer 200 comprising a plurality of second module portions 201 is provided, wherein the second wafer 200 has a first surface S 200 a and an opposite second surface S 200 h.
  • Each of the second module portions 201 comprises at least one optoelectronic component 210 .
  • the first wafer 100 is disposed onto the second wafer 200 to provide a wafer stack such that the second surface S 100 b of the first wafer 100 is placed opposite to the first surface S 200 a of the second wafer 200 and each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled in a respective one of the first module portions 201 is transferred to a respective one of the second module portions 201 and is directed to the respective at least one optoelectronic component 210 of the second module portions 201 .
  • the wafer stack is diced into individual dies respectively comprising one of the first (opto-mechanical) and one of the second (optoelectronic) module portions for respectively forming one of the optoelectronic modules 1 .
  • each of the first module portions 101 comprises at least a fixture 160 to hold an optical fiber 2 .
  • the at least one fixture 160 is made by a wafer scale process molding directly onto the first wafer 100 and/or using one of a single wafer with molded elements and several stacked wafers with varying holes and/or cut outs.
  • At least one passive optical component 110 for each of the first module portions is provided on the first surface S 100 a of the first wafer 100 .
  • the first wafer 100 is disposed onto the second wafer 200 such that light coupled into the respective at least one passive optical component 110 of the first module portions 101 is coupled into the respective at least one optoelectronic component 210 of the second module portions 201 .
  • At least one of the first and second module portions 101 , 201 is provided with at least one passive optical component 110 a, 110 b.
  • the first wafer 100 is disposed onto the second wafer 200 to provide a wafer stack such that each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled out of the optical fiber 2 held in the respective at least one fixture 160 of the first module portions 101 is coupled into the respective at least one passive optical component 110 a, 110 b of one of the first and second module portions 101 , 201 at the first side of the respective at least one passive optical component and is coupled out at the second side of the respective at least one optical component and is directed to the respective at least one optoelectronic component 210 of the second module portions 201 .
  • a respective one of the at least one passive optical component 110 a for each of the first module portions 101 is placed on the second surface S 100 b of the first wafer 100 .
  • the respective at least one optoelectronic component 210 of the second module portions 201 is placed on the first surface S 200 a of the second wafer 200 .
  • a respective one of the at least one passive optical component 110 b for each of the second module portions is placed on the first surface S 200 a of the second wafer 200 .
  • the respective at least one optoelectronic component 210 of the second module portions 201 is placed on the second surface S 200 b of the second wafer 200 .
  • a respective first one of the at least one passive optical component 110 a for each of the first module portions 101 is placed on the second surface S 100 b of the first wafer 100 .
  • a respective second one of the at least one passive optical component 110 b for each of the second module portions 201 is placed on the first surface S 200 a of the second wafer 200 .
  • the respective at least one optoelectronic component 210 of the second module portions 201 is placed on the second surface S 200 b of the second wafer 200 .
  • the first wafer 100 is provided with a respective at least one light turning element 170 for each of the first module portions 101 .
  • the light turning element 170 is configured to change a direction of the light beam so that light is coupled between the respective one of the at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 a, 110 b of the at least one first and second module portions 101 , 201 .
  • At least one respective electronic component 310 is provided for each of the second module portions 201 .
  • the respective at least one electronic component 310 is placed on one of the first and second surface S 200 a, S 200 b of the second wafer 200 .
  • a covering element 500 is provided over the first surface S 100 a of the first wafer 100 .
  • a spacer wafer 600 is provided between the first wafer 100 and the second wafer 200 .
  • a spacer layer made by molding directly onto the first surface S 200 a of the second wafer 200 and/or the second surface S 100 b of the first wafer 100 may be provided.
  • respective tapered and/or straight etched holes 190 are provided for each of the first module portions 101 in the material of the first wafer 100 to fix the front face of the respective at least one optical fiber 2 coupled to the first module portions 101 of the first wafer 100 .
  • respective straight holes and respective molded tapers for each of the first module portions 101 may be provided in the material of the first water 100 to fix the front face of the respective at least one optical fiber 2 coupled to the first module portions 101 of the first wafer 100 .
  • either the first and second wafers 100 , 200 are respectively configured as glass wafers, or the first wafer 100 is configured as a glass wafer and the second wafer 200 is configured as one of a printed circuit board, ceramic substrate, electronic board and an SiP wafer.
  • the respective at least one passive optical component 110 , 110 a, 110 b of one of the first and second module portions 101 , 201 may comprise an optical lens.
  • the respective at least one optoelectronic component 210 of the second module portions 201 may be configured as an optical emitter and/or an optical receiver.
  • the respective at least one electronic component 310 of the second module portions 201 may be configured as an electrical driver and/or an electrical amplifier.
  • an optoelectronic module comprising at least two stacked substrates, for example a first (opto-mechanical) substrate comprising optical components such as optical alignment components and beam deflection components and a second (optoelectronic) substrate comprising electronic and optoelectronic components such as transceiver ICs, VCSELs or PDs being cut out of the wafer stack of the bonded optoelectronic wafer 200 and an opto-mechanical wafer 100 are shown in FIGS. 14 to 19 .
  • the optoelectronic modules shown in FIGS. 14 to 19 additionally comprise other components, for example a spacer polymer.
  • the spacer polymer could be a wafer in itself and thus many of the embodiments shown in FIGS. 14 to 19 may be based on 2-4 stacked wafers, as for example shown for the 3 stacked wafers of FIG. 13A and 13B .
  • FIG. 14 shows an exploded view of an optoelectronic module 1 manufactured with the method as described with reference to the wafer stack shown in FIG. 13A .
  • the optoelectronic module comprises an opto-mechanical substrate 100 ′, an optoelectronic substrate 200 ′ and a spacer layer 180 that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 , the optoelectronic wafer 200 and the spacer wafer 600 as shown in FIGS. 13A .
  • a covering element 500 is provided to be disposed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • a fixture 160 to hold the optical fibers 2 is arranged on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • a light turning element 170 including a fiber alignment structure is placed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • the light turning element 170 is either molded directly onto the surface or placed with precision and created using injection molding.
  • First passive optical components 110 a for example lenses, are placed on the second surface S 100 b of the opto-mechanical substrate 100 ′.
  • Spacer layers 180 are provided, wherein the spacer layers 180 may be placed on the second surface S 100 b of the opto-mechanical substrate 100 ′ or on the first surface S 200 a of the optoelectronic wafer 200 or both surfaces S 100 b and S 200 a.
  • the opto-mechanical substrate 100 ′ may be configured as a glass substrate.
  • the light turning element 170 with the fiber alignment structure may be configured as a molded polymer layer, and the first passive optical components 110 a may be configured as another molded polymer layer and the spacer layers 180 may be molded as another polymer or a separate machined wafer and disposed on the glass substrate 100 ′ fabricated as one component.
  • the optoelectronic substrate 200 ′ may comprise second passive optical component 110 b being disposed on a first surface S 200 a of the optoelectronic substrate 200 ′.
  • the second passive optical components 110 b may be configured as one molded polymer layer being disposed on a glass substrate 200 ′.
  • the optoelectronic substrate 200 ′ further comprises electronic components 310 , such as transceivers. Solder ball contacts 230 to reflow the module on a PCB substrate and a metallization for an optoelectronic component 210 , for example a VCSEL or a PD, are disposed on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • FIG. 15A shows a two-dimensional exploded view of the optoelectronic module 1 as shown in FIG. 14 in a perspective exploded view.
  • FIGS. 15B shows an embodiment of an optoelectronic module 1 of FIG. 15A manufactured with the method described with reference to the wafer stack shown in FIG. 13A .
  • the optoelectronic module comprises an opto-mechanical substrate 100 ′, an optoelectronic substrate 200 ′ and a spacer layer 180 that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 , the optoelectronic wafer 200 and the spacer wafer 600 as shown in FIG. 13A .
  • the opto-mechanical substrate 100 ′ and the optoelectronic substrate 200 ′ may be made of glass being transparent for the light transferred in the optical fiber 2 .
  • a covering element 500 that can be made of glass or plastic is disposed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • a fixture 160 to hold the optical fiber 2 is arranged on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • Light turning elements 170 a and 170 b are disposed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • First passive optical components 110 a for example lenses, are placed on the second surface S 100 b of the opto-mechanical substrate 100 ′.
  • Spacer layers 180 are placed on the second surface S 100 b of the opto-mechanical substrate 100 ′ and on the first surface S 200 a of the optoelectronic substrate 200 ′.
  • the opto-mechanical substrate 100 ′ may be configured as a glass substrate.
  • the optoelectronic substrate 200 ′ comprises second passive optical components Hob, for example lenses, being disposed on the first surface S 200 a of the optoelectronic substrate 200 ′.
  • the optoelectronic substrate 200 ′ further comprises electronic components 310 , such as transceivers. Solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210 , for example a VCSEL or a PD, are disposed on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • the optoelectronic module 1 has a first optical path comprising the light turning element 170 a and the optical lens 110 a.
  • Light coupled out of the optoelectronic component 210 a being configured as a VCSEL is coupled out of the VCSEL 210 a and coupled in the lens 110 a.
  • the light is coupled through the opto-mechanical substrate 100 ′ into the light turning element 170 a from which it is deflected towards the optical fiber 2 .
  • the optoelectronic module 1 has a second optical path comprising the light turning element 170 b and the optical lens 110 b.
  • Light coupled out of the optical fiber 2 is deflected by the light turning element 170 b through the opto-mechanical substrate 100 ′ towards the optical lens 110 b.
  • the lens 110 b focuses the light to the optoelectronic component 210 b that can be configured as a photodiode.
  • FIGS. 16A and 16B respectively show other embodiments of an optoelectronic module 1 manufactured with the method described with reference to the wafer stack shown in FIG. 13A .
  • the optoelectronic modules shown in FIGS. 16A and 16B comprise an opto-mechanical substrate 100 ′ and an optoelectronic substrate 200 ′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown in FIG. 13A
  • the opto-mechanical substrate 100 ′ may be made of a material being opaque for the light transferred in the optical fiber 2 .
  • a covering element 500 that can be made of glass or plastic is disposed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • the optoelectronic module 1 shown in FIG. 16A comprises the same arrangement of the fixture 160 and the light-turning elements 170 a, 170 b on the first surface S 100 a of the opto-mechanical substrate 100 ′ and first passive optical components 110 a, for example lenses, as well as spacer layers 180 on the second surface S 100 b of the opto-mechanical substrate 100 ′ as shown in FIG. 15A .
  • the optoelectronic substrate 200 ′ comprises the same arrangement of the second passive optical components 110 b, for example lenses, and spacer layers 180 on the first surface S 200 a of the optoelectronic substrate 200 ′ and electronic components 310 , such as transceivers, solder ball contacts 210 and optoelectronic components 210 , for example a VCSEL or a PD, on the second surface S 200 b of the optoelectronic substrate 200 ′ as shown for the optoelectronic module in FIG. 15A .
  • the opto-mechanical substrate 100 ′ may comprise cavities 101 within the opaque material of the opto-mechanical substrate 100 ′.
  • the cavities may be filled with a material of polymer to provide a light transmission path between the light turning elements 170 a, 170 b and the first and second passive optical components 110 a and 110 b.
  • FIG. 16B shows a similar embodiment of an optoelectronic module as shown in FIG. 16A with the difference that first passive optical components 110 a and second passive optical components 110 b, such as lenses, are disposed opposite to each other on the second surface S 100 b of the opto-mechanical substrate 100 ′ and the first surface S 200 a of the optoelectronic substrate 200 ′. Additional embodiments not shown can have the optical components placed in other configurations, such as both on surface S 100 b or both on surface S 200 a.
  • FIGS. 17A and 17B respectively show an embodiment of an optoelectronic module 1 manufactured with the method described with reference to the water stack shown in FIG. 13A .
  • the optoelectronic module comprises an opto-mechanical substrate 100 ′ and an optoelectronic substrate 200 ′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown in FIG. 13A .
  • the opto-mechanical substrate 100 ′ and the optoelectronic substrate 200 ′ may be made of glass being transparent for the light transferred in the optical fiber 2 .
  • the top substrate 100 ′ acts as supporting means for the opto-mechanical components and additionally as a cover.
  • the light turning elements 170 a, 170 b acts as mirrors having a metal or similar coating to be reflective.
  • Light turning elements 170 a and 170 b as well as a fiber alignment fixture 160 are arranged on the second surface S 100 b of the opto-mechanical substrate 100 ′.
  • Passive optical components 110 a, 110 b as well as a vertical adjustment polymer layer 250 are disposed on the first surface S 200 a of the optoelectronic substrate 200 ′.
  • the vertical adjustment polymer layer 250 can be a portion of the spacer wafer 600 .
  • the optoelectronic substrate 200 ′ further comprises electronic components 310 , such as transceivers, solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210 , for example a VCSEL or a PD, that are disposed on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • electronic components 310 such as transceivers, solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210 , for example a VCSEL or a PD, that are disposed on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • the optoelectronic module 1 shown in FIG. 17B is embodied in a similar way as shown for the optoelectronic module of FIG. 17A with the difference that a curvature is added to the light turning elements 170 a and 170 b being configured as metal coated mirrors.
  • FIGS. 18A to 18C respectively show embodiments of an optoelectronic module 1 manufactured with the method described with reference to the water stack shown in FIG. 13A .
  • the optoelectronic module comprises an opto-mechanical substrate 100 ′ and an optoelectronic substrate 200 ′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown for the wafer stack in FIG. 13A .
  • the opto-mechanical substrate 100 ′ comprises cavities 101 to insert optical fibers 2 .
  • Spacer layers 180 are disposed on the first and second surface S 100 a and S 100 b of the opto-mechanical substrate 100 ′.
  • the optoelectronic substrate 100 ′ can be made of glass being transparent for the light transferred through the optical fiber 2 and for arranging electrical traces.
  • First and second passive optical components 110 a and 110 b, for example lenses, are disposed on the first surface S 200 a of the optoelectronic substrate 200 ′.
  • the optoelectronic substrate 200 ′ further comprises electronic components 310 , such as transceivers, solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210 , for example a VCSEL, or a PD, that are disposed on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • the optoelectronic components and the electronic components are arranged on the same substrate for electrical integrity.
  • the opto-mechanical substrate 100 ′ may be made of glass, wherein the cavities 101 are configured as tapered etched holes 190 .
  • the optical fibers 2 are inserted in the tapered etched holes.
  • the opto-mechanical substrate 100 ′ is configured to be made of a material being opaque for the light transferred through the optical fibers 10 .
  • the opto-mechanical substrate 100 ′ comprises cavities 101 formed as tapered polymer molded holes 190 in which the optical fibers 2 are inserted.
  • the optoelectronic module 1 shown in FIG. 18C is embodied similar as shown for the optoelectronic module of FIG. 18B with the difference that the polymer molded holes do not taper and are provided with a hard cladding or ferrule 5 acting a fiber stop means.
  • FIG. 19 shows an embodiment of an optoelectronic module 1 comprising the opto-mechanical substrate 100 ′ and the optoelectronic substrate 200 ′.
  • the optoelectronic components such as VCSEL/PD
  • an optoelectronic wafer 200 being embodied as a PCB or similar electronic board with electrical traces and vias to connect this module externally to a larger PCB or electronic board later after dicing.
  • the stack arrangement is manufactured at the wafer scale with the PCB being a wafer.
  • the substrate 100 ′ may be made of glass having a first surface S 100 a on which a fixture 160 for holding and aligning an optical fiber 2 and light turning elements 170 a, 170 b are disposed.
  • a cap 500 made of glass or a plastic material is disposed on the first surface S 100 a of the opto-mechanical substrate 100 ′.
  • Passive optical components 170 such as lenses, are disposed on a second surface S 100 b of the opto-mechanical substrate 100 ′.
  • the opto-mechanical substrate 100 ′ is mounted onto the optoelectronic substrate 200 ′, for example a PCB.
  • the optoelectronic substrate 200 ′ comprises optoelectronic components 210 a, 210 b being embodied as VCSELs or PDs and arranged on a first surface S 200 a of the optoelectronic substrate.
  • An electronic component 310 for example a transceiver IC, may also be mounted onto the first surface S 200 a. of the optoelectronic substrate 200 ′. Electrical contact pads are provided on the second surface S 200 b of the optoelectronic substrate 200 ′.
  • a spacer layer 180 is arranged between the second surface S 100 b of the opto-mechanical substrate 100 ′ and the first surface S 200 a of the optoelectronic substrate 200 ′.
  • the scale unit given in FIG. 19 is just a possible orientation and does not restrict the components of the embodiment to the specified values.
  • the opto-mechanical substrate 100 ′ is aligned to the optoelectronic substrate 200 ′ at the wafer scale so that light may be transferred through a first optical path from the optoelectronic transmitter 210 a through the lens 110 a and the glass substrate 100 ′ to the light turning mirror 170 a that deflects the light such that it is coupled into the optical fiber 2 .
  • the opto-mechanical substrate 100 ′ is further aligned to the optoelectronic substrate 200 ′ so that light may be transferred through a second optical path from the optical fiber 2 to the light turning mirror 170 b that deflects the light towards the lens 110 b from which the light is coupled out towards the optoelectronic receiver 210 b.
  • the different embodiments of the method to manufacture optoelectronic components substantially reduce the cost of assembling devices comprising electronic integrated circuits, optoelectronic sources and detectors, optical components and waveguides such as lenses and fiber.
  • the embodiments of the method allow fabricating multiple devices in parallel and aligning them at the wafer-scale thereby increasing assembly throughput.
  • Testable sub-assemblies are fabricated by dicing the stacked wafers that allows verification of the critical precision alignments and device functionality prior to additional assembly thereby reducing the loss of other components due to fallout.
  • the optoelectronic sub-assemblies built by the described embodiments of the method are compatible with low cost electronic circuit board fabrication technology, such as surface-mount technology (SMT).
  • SMT surface-mount technology
  • the embodiments of the method provide a path toward high-speed assembly at low-cost due to tight alignment tolerances and controlled electrical connectivity and allow volume manufacturing that can scale cost down as demand increases. Furthermore, the need for wire-bonding in some embodiments is eliminated which improves impedance control of the electrical lines as well as vibration tolerance for automotive or other such applications.
  • optical emitter/receiver can be nearly anywhere in the plane of the module instead of near the perimeter as in many pick-and-place designs where the electronic chip and optoelectronic chips are on a common substrate. With this freedom, the likely ideal placement would be toward the center of the module so that the mechanical features holding the fiber in alignment can also be centered.

Abstract

A method to manufacture optoelectronic modules comprises a step of providing a first wafer comprising a plurality of first module portions, wherein each of the first module portions comprises at least one passive optical component, providing a second wafer comprising a plurality of second module portions, wherein each of the second module portions comprises at least one optoelectronic component. The wafers are disposed on each other to provide a wafer stack that is diced into individual optoelectronic modules respectively comprising one of the first and the second and the third module portions.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This application is a divisional of U.S. application Ser. No. 15/216,136, filed on Jul. 21, 2016, which claims the benefit of priority to European Application No. 15178897.3, filed on Jul. 29, 2015, both applications being incorporated herein by reference.
  • FIELD
  • The disclosure is directed to a method to manufacture optoelectronic modules. The disclosure is further directed to an optoelectronic module.
  • BACKGROUND
  • The capability to provide sub-micrometer to few micrometer optical alignment accuracy has been a costly and time-consuming necessity in most optical communication components and devices because of the small dimensions of typical optical waveguides. As an example, in an active optical cable, PDs (Photodiodes) and multi-mode VCSELs (Vertical Cavity Surface Emitting Lasers) are placed individually within about 10-micrometer accuracy onto a populated PCB (Printed Circuit Board) with electronic components. This populated PCB is then moved to a different machine for wirebonding and once again back to the precision placement machine to place an optical element with lenses and a turning mirror. Fibers are brought onto the optical element on the PCB to complete the link to the optoelectronic module.
  • If any failures occur in this process, such as damaging a VCSEL or poor placement accuracy, the entire PCB is lost. This loss is expensive given the PCB must be pre-populated with all the electronics through the dirty surface mount technology (SMT) process prior to the final clean optical assembly described above. Additionally, each placement of PDs, VCSELs and a lens block has a tolerance of about 10 nm and thus creates a stack up allocation, i.e. the placement tolerances accumulate, for a larger error distribution in placement, which becomes especially problematic at higher data rates above 10 Gbps.
  • As a second example, silicon photonics structures use single mode operation, which must couple into a single mode fiber with apertures typically less than 10 μm. Consequently, alignment accuracies need to be within just a few micrometers, e.g. 2-1 μm, or better, to get reasonable optical coupling. The use of pick and place tooling, while capable of achieving these alignment accuracies, takes a significant amount of time and thus increases cost of the overall system.
  • It is a desire to provide a method to manufacture optoelectronic modules, wherein alignment tolerances between a respective optical fiber coupled to the optoelectronic modules, a respective at least one passive optical component and a respective at least one optoelectronic components of the modules, are reduced and wherein a large amount of the optoelectronic modules can be manufactured in a small amount of time. A further need is to provide an optoelectronic module, wherein alignment tolerances between an optical fiber coupled to the optoelectronic module, at least one passive optical component and at least one optoelectronic component of the module are reduced and wherein the optoelectronic module can be manufactured in a low time.
  • SUMMARY
  • According to an embodiment of a method to manufacture optoelectronic modules, a first wafer comprising a plurality of first module portions is provided, wherein each of the first module portions comprises at least one passive optical component, wherein the at least one passive optical component has a first and a second side and is configured to modify a beam of light such that a direction of light coupled in the at least one passive optical component at the first side is changed and coupled out of the at least one passive optical component at the second side. Furthermore, a second wafer comprising a plurality of second module portions is provided, wherein each of the second module portions comprises at least one optoelectronic component and metalized via holes extending in a material of the second wafer from a first surface of the second wafer to a second opposite surface of the second wafer, and wherein the respective at least one optoelectronic component of the second module portions is electrically connected to the respective metalized via holes of the second module portions. A third water comprising a plurality of third module portions is provided, wherein each of the third module portions comprises at least one electronic component.
  • The second wafer is bonded onto the third wafer such that the respective at least one electronic component of the third module portions is electrically coupled to the respective at least one optoelectronic component of the second module portions by means of the respective metalized via holes of the second module portions. Furthermore, the first wafer is bonded onto the second wafer to provide a wafer stack such that each of the first module portions is aligned to a respective one of the second module portions so that light coupled into the respective at least one passive optical component of the first module portions at the first side of the respective at least one passive optical component is coupled out at the second side of the respective at least one optical component and is directed to the respective at least one optoelectronic component of the second module portions.
  • The wafer stack is diced into individual optoelectronic modules respectively comprising one of the first and the second and the third module portions.
  • An embodiment of an optoelectronic module being manufactured by means of the method comprises a first substrate comprising a first module portion of the optoelectronic module including at least one passive optical component. The module comprises a second substrate comprising a second module portion of the optoelectronic module including at least one optoelectronic component. Furthermore, the module comprises a third substrate comprising a third module portion of the optoelectronic module, wherein the third module portion comprises at least one electronic component.
  • The first substrate has a first surface and a second opposite surface, wherein the at least one optical component is arranged on the first surface of the first substrate. The at least one passive optical component has a first and a second side and is configured to modify a beam of light such that a direction of light coupled in the at least one optical component at the first side is changed and coupled out of the at least one passive optical component at the second side.
  • The second substrate has a first surface and an opposite second surface, wherein the at least one optoelectronic component is arranged on the first surface of the second substrate. The second substrate comprises metalized via holes extending in a material of the second substrate from the first surface of the second substrate to the second surface of the second substrate. The at least one optoelectronic component is electrically connected to the metalized via holes.
  • The second substrate is bonded onto the third substrate such that the at least one electronic component of the third module portion is electrically coupled to the at least one optoelectronic component of the second substrate by the metalized via holes of the second substrate. The first substrate is bonded onto the second substrate such that the first module portion is aligned to the second module portion so that light coupled into the respective at least one passive optical component of the first module portion at the first side of the at least one optical component is coupled out at the second side of the at least one optical component and is directed to the at least one optoelectronic component of the second module portion.
  • The method allows to provide a plurality of optoelectronic modules, wherein the alignment tolerances between the respective at least one optoelectronic device, for example a photodiode, a laser or a silicon photonics chip, and the respective at least one passive optical component, and an optical fiber coupled to the respective optoelectronic module are in a range of a few micrometers, for example in a range of about 1-2 μm. Thus, it is possible to reduce fallout, cost and time of assembly of such modules and final PCBs. The method uses wafer-scale alignment and may further use wafer-scale testing while also making the final module SMT compatible.
  • The wafer-scale technique allows manufacturers to achieve the low alignment tolerances across hundreds to thousands of devices simultaneously, thus reducing overall cost and time. By also making it wafer-scale testable prior to assembly, fallout of the final assembled device on the PCB can be reduced. The modules may be designed to be compatible with typical semiconductor manufacturing processes, such as SMT, so that the optoelectronic module manufactured by the above-specified method can be integrated into a final product without added assembly cost. The method to manufacture the optoelectronic modules can be used for active optical cables, silicon photonics and optical fiber connections or potentially free-space connectivity across many industries. Additionally, the manufacturing method would enable the large volume that may ensue due to the wafer-scale design, low cost and ease of assembly. Lastly, the manufacturing tolerances provided could lend itself to making a low-cost, robust module capable of speeds much greater than 10 Gbps and thus provide a path toward innovation requiring high data rate communication.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows an embodiment of a method to manufacture optoelectronic modules;
  • FIG. 2A shows several wafers to be stacked for manufacturing a plurality of optoelectronic modules;
  • FIG. 2B shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 3 shows an embodiment of optoelectronic modules of three substrates;
  • FIG. 4 shows a perspective view of a cutout of stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 5 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 6 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 7 shows an embodiment of stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 8A shows a perpendicular attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 8B shows a perpendicular attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 9A shows a downward attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 9B shows a downward attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 10A shows a vertical attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 10B shows a vertical attachment of an embodiment of an optoelectronic module onto an electronic board;
  • FIG. 11A shows a downward attachment of an embodiment of an optoelectronic module onto an opto-electronic board with an embedded waveguide;
  • FIG. 11B shows a downward attachment of an embodiment of an optoelectronic module onto an opto-electronic board with an embedded waveguide;
  • FIG. 12A shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board;
  • FIG. 12B shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board;
  • FIG. 12C shows an embodiment of a downward arrangement of an optoelectronic module onto an electronic board;
  • FIG. 13A shows an embodiment of several stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 13B shows an embodiment of several stacked wafers for manufacturing a plurality of optoelectronic modules;
  • FIG. 14 shows an exploded view of several layers of an optoelectronic module;
  • FIG. 15A shows an embodiment of several substrates to be stacked above each other for manufacturing an optoelectronic module;
  • FIG. 15B shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 16A shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 16B shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 17A shows an embodiment of several substrates to be stacked above each other for manufacturing an optoelectronic module;
  • FIG. 17B shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 18A shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 18B shows an embodiment of stacked substrates of an optoelectronic module;
  • FIG. 18C shows an embodiment of stacked substrates of an optoelectronic module; and
  • FIG. 19 shows an embodiment of stacked substrates of an optoelectronic module.
  • DETAILED DESCRIPTION
  • The method to manufacture optoelectronic modules will now be described in more detail hereinafter with reference to the accompanying drawings showing different embodiments of the method. The method may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the disclosure will fully convey the scope of the method to those skilled in the art. The drawings are not necessarily drawn to scale but are configured to clearly illustrate the method. The written text included in some of the Figures should facilitate the understanding of the Figures and particularly indicates examples of materials which may be used for the different components, substrates and layers but does not limit the possible materials that can be used for these components, substrates and layers to the materials specified in the Figures.
  • FIG. 1 shows steps A to F of a method to simultaneously manufacture a plurality of optoelectronic modules. The method is based on providing a wafer stack of several wafers 100, 200 and 300, wherein each of the waters comprises respective different components of the optoelectronic modules. The wafer stack is diced into the individual optoelectronic modules. FIG. 2A illustrates respective embodiments of a first wafer 100, a second wafer 200 and a third wafer 300 to be stacked to each other. FIG. 2B shows the wafer stack of the bonded first wafer 100, the second wafer 200 and the third wafer 300.
  • According to a step A of the method to manufacture the optoelectronic modules, the first wafer 100 comprising a plurality of first module portions 101 is provided. Each of the first module portions 101 comprises at least one passive optical component 110. The at least one passive optical component 110 has a first and a second side and is configured to modify a beam of light such that a direction of the light coupled in the at least one passive optical component 110 at the first side is changed and coupled out of the at least one passive optical component 110 at the second side.
  • At least one optical fiber can be aligned to the at least one passive optical component 110 so that light may be coupled from the at least one optical fiber into the at least one passive optical component 110 or coupled out of the at least one passive optical component 110 into the at least one optical fiber. Optical fiber alignment components such as fixtures to hold and align an optical fiber can be mounted on the first wafer 100. According to another embodiment, the fiber alignment components can be configured as wafers stacked on top of the first wafer 100.
  • According to a subsequent step B, the second wafer 200 comprising a plurality of second module portions 201 is provided. Each of the second module portions 201 comprises at least one optoelectronic component 210 and metalized via holes 220 extending in a material of the second wafer 200 from a first surface S200 a of the second wafer to a second opposite surface S200 b of the second wafer. The respective at least one optoelectronic component 210 of the second module portions 201 is electrically connected to the respective metalized via holes 220 of the second module portions 201.
  • According to a subsequent step C, the third wafer 300 comprising a plurality of third module portions 301 is provided. Each of the third module portions comprises at least one electronic component 310.
  • According to a subsequent step D, the second wafer 200 is bonded onto the third wafer 300 such that the respective at least one electronic component 310 of the third module portions 301 is electrically coupled to the respective at least one optoelectronic component 210 of the second module portions 201 by means of the respective metalized via holes 220 of the second module portions 201.
  • According to a subsequent step E, the first wafer 100 is bonded onto the second wafer 200 to provide a wafer stack such that each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled into the respective at least one passive optical component 110 of the first module portions 101 at the first side of the respective at least one passive optical component 110 is coupled out at the second side of the respective at least one optical component 110 and is directed to the respective at least one optoelectronic component 210 of the second module portions 201.
  • According to a subsequent step F, the wafer stack comprising the first wafer 100, the second wafer 200, and the third wafer 300 is diced into individual dies respectively comprising one of the first and the second and the third module portions 101, 201 and 301 for respectively forming one of the optoelectronic modules. Each of the optoelectronic modules is formed by a respective first module portion 101 of the first wafer 100, a respective second module portion 201 of the second wafer 200 and a respective third module portion 301 of the third wafer 300, wherein the respective first, second and third module portions are stacked and bonded above each other.
  • The first wafer 100 is provided in the step A with a first surface S100 a and a second surface S100 b being opposite to the first surface S100 a. The respective at least one passive optical component 110 of each of the first module portions 101 is arranged on the first surface S100 a of the first wafer 100. The second wafer 200 is provided in step B with the respective at least one optoelectronic component 210 of each of the second module portions 200 being arranged on the first surface S200 a of the second wafer 200. According to an embodiment of method step C, the first wafer 100 is bonded onto the second wafer 200 such that the second surface S100 b of the first wafer 100 is disposed on the first surface S200 a of the second wafer 200.
  • FIG. 3 shows several optoelectronic modules 1 after being diced out of the wafer stack comprising the first wafer 100, the second wafer 200 and the third wafer 300. Each of the optoelectronic modules 1 comprises a first substrate 100′ being cut out of the first wafer 100 of the wafer stack and comprising the first module portion 101 of the respective optoelectronic module including the at least one passive optical component 110. Furthermore, each of the optoelectronic modules 1 comprise a second substrate 200′ being cut out of the second wafer 200 of the wafer stack and comprising the second module portion 201 of the respective optoelectronic module including the at least one optoelectronic component 210. Each of the optoelectronic modules further comprises a third substrate 300′ being cut out of the third wafer 300 of the wafer stack and comprising the third module portion 301 of the optoelectronic module, wherein the third module portion 301 comprises the at least one electronic component 310.
  • The first substrate 100′ has a first surface and a second opposite surface, wherein the at least one passive optical component 110 is arranged on the first surface of the first substrate 100. The at least one passive optical component 110 has a first and a second side and is configured to modify a beam of light such that a direction of the light coupled in the at least one optical component 110 at the first side is changed and coupled out of the at least one passive optical component 110 at the second side.
  • The second substrate 200′ has a first surface and an opposite second surface, wherein the at least one optoelectronic component 210 is arranged on the first surface of the second substrate 200′. The second substrate 200′ comprises the metalized via holes 220 extending in a material of the second substrate 200′ from the first surface of the second substrate to the second surface of the second substrate. The at least one optoelectronic component 210 is electrically connected to the metalized via holes 220.
  • The second substrate 200′ is bonded onto the third substrate 300′ such that the at least one electronic component 310 of the third module portion 301 is electrically coupled to the at least one optoelectronic component 210 of the second module portion 201 by the metalized via holes 220 of the second substrate 200′. The first substrate 100′ is bonded onto the second substrate 200′ such that the first module portion 101 is aligned to the second module portion 201 so that light coupled into the respective at least one passive optical component 110 of the first module portion 101 at the first side of the at least one optical component is coupled out at the second side of the at least one optical component 110 and is directed to the at least one optoelectronic component 210 of the second module portion 201.
  • According to an embodiment of the method to manufacture the optoelectronic module, the second wafer 200 may be configured as a GaAs or a silicon photonics wafer or an InP wafer. The first wafer 100 may be configured as one of a glass wafer and an opaque polymer wafer with holes drilled out and filled with a transparent polymer. The respective at least one passive optical component 110 of the first module portions 101 may comprise an optical lens and/or a light turning element, for example an optical mirror, being configured to change a direction of the light beam, for example by TIR (Total Internal Reflection), so that light is coupled between an optical fiber coupled to the respective first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101.
  • The respective at least one optoelectronic component 210 of the second module portions 201 may be configured as an optical emitter, for example a VCSEL, and/or an optical receiver, for example a photodiode. The respective at least one electronic component 310 of the third module portions 301 may be configured as an electrical driver and/or an electrical amplifier.
  • As explained above, the first opto-mechanical wafer 100 may comprises a substrate of glass. Glass can provide a flat surface to mold optical components, such as lenses and turning mirrors, on the first wafer 100. Glass can also have precision features etched into its surface and through the first wafer 100 to allow for any mechanical alignment of optical fibers or other components. Furthermore, glass can be designed with coefficients of thermal expansion (CTEs) similar to semiconductor wafers, thus improving reliability of the final optoelectronic modules over large temperature ranges. Lastly, glass is an ideal substrate for high-speed signal integrity and both metal traces and vias can be made on it.
  • FIG. 4 shows a perspective view of an embodiment of an optoelectronic module 1 after dicing the wafer-scale stack in perspective view, wherein each of the first, second and third module portions 101, 201 and 301 comprises electrical contact pads to provide an external electrical connection to the electrical and/or optoelectronic components of the module or to electrically connect the electrical and optoelectronic components to each other.
  • According to an embodiment of the method to manufacture the optoelectronic modules, the second wafer 200 can be provided in method step B with respective electrical contact pads 230 for each of the second module portions 201. The respective electrical contact pads 210 are electrically coupled to the respective metalized via holes 220 of the second module portions 201. The respective electrical contact pads 230 are arranged on the second surface S200 b of the second wafer 200.
  • In method step C, the third wafer 300 is provided with respective electrical contact pads 330 for each of the third module portions 301. The respective electrical contact pads 330 are electrically coupled with the respective at least one electronic component 310 of the third module portions 301. The respective electrical contact pads 330 are arranged on a surface S300 a of the third wafer.
  • According to an embodiment of method step D, the second wafer 200 is bonded onto the third wafer 300 such that the second surface S200 b of the second wafer 200 is disposed on the surface S300 a, of the third wafer 300 and the respective electrical contact pads 330 of the third module portions 301 are aligned to the respective electrical contact pads 230 of the second module portions 201 to provide an electrical connection between the respective electrical contact pads 330 of the third module portions 301 and the respective electrical contact pads 230 of the second module portions 201.
  • According to an embodiment of the method to manufacture the optoelectronic modules, the third wafer 300 is provided in method step A with respective metalized via holes 320 for each of the third module portions 301 in a material of the third wafer 300. The respective metalized via holes 320 extend from the first surface S300 a of the third wafer 300 to a second opposite surface S300 b of the third wafer 300. The respective electrical contact pads 330 of the third module portions 301 arranged on the first surface S300 a of the third wafer 300 are electrically coupled to the respective metalized via holes 320 of the third module portions 301.
  • The third water 300 is provided with respective electrical contact pads 340 for each of the third module portions 301 on the second surface S300 b of the third wafer 300. The respective electrical contact pads 340 of the third module portions 301 on the second surface S300 b are electrically coupled to the respective metalized via holes 320 of the third module portions 301. According to the embodiment of the optoelectronic module 1 shown in FIG. 4, the optoelectronic module comprises the electrical contact pads 330 and 340 being arranged on both surfaces S300 a and S300 b of the wafer 300.
  • According to a further embodiment of the method to manufacture the optoelectronic modules, the first wafer 100 is provided in method step A with respective metalized via holes 120 for each of the first module portions 101 in a material of the first wafer 100. The respective metalized via holes 120 extend from the first surface S100 a of the first wafer 100 to the second surface S100 b of the first wafer 100.
  • According to an embodiment of the method step B, the second wafer 200 is provided with respective electrical contact pads 240 for each of the second module portions 201 on the first surface S200 a of the second wafer 200 such that the respective electrical contact pads 240 of the second module portions 201 are electrically connected to the respective metalized via holes 220 of the second module portions 201.
  • According to an embodiment of the method step E, the first wafer 100 is bonded onto the second wafer 200 such that the respective electrical contact pads 240 of the second module portions 201 are electrically connected to the respective metalized via holes 120 of the first module portions 101.
  • According to another embodiment of the method to manufacture the optoelectronic modules, the first wafer 100 is provided in method step A with respective electrical contact pads 130 for each of the first module portions 101 on the second surface S100 b of the first wafer such that the respective electrical contact pads 130 of the first module portions 101 are electrically connected to the respective metalized via holes 120 of the first module portions 101.
  • Furthermore, the first wafer 100 can be provided in method step A with a conductive redistribution layer 150 on the second surface S100 b of the first wafer 100. The conductive redistribution layer 150 comprises respective conductive traces for each of the first module portions 101, wherein the respective conductive traces of the conductive redistribution layer 150 are arranged to electrically couple the respective contact pads 130 of the first module portions 101 on the second surface S100 b of the first wafer 100 to the respective metalized via holes 120 of the first module portions 101.
  • According to the embodiment of the optoelectronic module 1 shown in FIG. 4, the first module portion 101 comprises electrical contact pads 130 arranged on the second surface S100 b of the wafer 100 and electrical contact pads 140 arranged on the first surface S100 a of the first wafer MO. The electrical contact pads 140 on the top surface S100 a of the first wafer 100 could allow for flip-chip bonding of the optoelectronic module 1.
  • According to an embodiment of the method to manufacture the optoelectronic modules, the second wafer 200 comprising the second module portions 201 with the respective optoelectronic components 210 is configured as a wafer made of GaAs. The electrical signals would traverse from the top surface of the third wafer 300 comprising the third module portions with the respective electronic components through the GaAs vias 220 of the second wafer 200 to the first wafer 100 comprising opto-mechanical components 110 to connect the electrical signals to an external electronic board, for example a PCB.
  • Additionally, the vias 220 would electrically connect the second wafer 200 to the third wafer 300 containing either laser drivers or receiver amplifiers as electronic components to drive the optoelectronic components, for example the VCSELs or IUDs, of the second wafer respectively. In this implementation, the top first wafer 100 would have passive optical components such as lenses and turning mirrors, as well as opto-mechanical components for fiber attachment components and also comprises electrical traces and vias to connect to an external board such as a PCB. In configuring the stack up using GaAs vias, very well controlled impedances and electrical losses capable of achieving very high data rates are provided.
  • Another possible implementation utilizing via technology would be in SiP with vias through silicon. In this implementation, the second wafer 200 is configured as a Silicon Photonics wafer. The electrical signals from the bottom third (electronic) wafer 300 comprising the electronic components could either traverse from the top to the bottom of the third (electronic) wafer 300 or from the top of the third (electronic) wafer 300 through the middle second (SiP optoelectronic) wafer 200 to the top first (opto-mechanical) wafer 100. The top of the electronic wafer 300 would also be connected to the middle SiP optoelectronic wafer 200 in order to drive the transmitter and receiver optoelectronic devices 210. In this implementation, the top opto-mechanical wafer 100 may optionally have electrical connectivity.
  • The specified method utilizes (GaAs, Si or other wafer-based) via fabrication technology to reduce parasitics of wirebonding optoelectronic devices for III-V wafers and in other cases for multi-chip integration of Si-based electronic components. For the purpose of the specified method, vias enable compact wafer-level integration of optical sources and detectors on a wafer, such as a GaAs or silicon photonics wafer, sandwiched between the third (bottom) wafer 300 having electronic functions such as laser drivers and receiver amplifiers, for example Si CMOS or SiGe Bi-CMOS, and the first (top) wafer 100 having passive optical components, for example lenses, turning mirrors, fiber alignment components as well as possibly components for electrical connectivity.
  • According to an embodiment of the method to manufacture the optoelectronic modules, the wafer stack comprising the bonded first, second and third wafer 100, 200 and 300 may be diced along the respective metalized via holes 120 of the first module portions 101 of the first wafer 100 into the individual dies/optoelectronic modules 1 to create half- or castellated vias in the first wafer 100. As shown for the optoelectronic module 1 of FIG. 4, vias 120 are arranged in the material of the first wafer 100 extending from the first surface S100 a to the second surface S100 b of the first wafer 100. In order to separate the optoelectronic module 1, the first wafer 100 is diced through the metalized vias 120 such that half- or castellated vias are created. The castellated vias could allow for perpendicular/edge bonding of the optoelectronic module as illustrated below in FIG. 8A.
  • FIG. 5 shows another embodiment of a wafer stack comprising the first wafer 100, the second wafer 200 and the third wafer 300. In contrast to the embodiment of the wafer stack shown in FIG. 2B, the first wafer 100 is provided without any metalized vias through the first wafer 100 for backside mounting. Fiber alignment components to hold and align the optical fibers to the optical components 110 can be mounted on the first wafer 100. According to another embodiment, the fiber alignment components can be configured as wafers stacked on top of the first wafer 100. After being stacked and aligned the wafer stack is diced into individual optoelectronic modules.
  • According to a possible embodiment of the method to manufacture the optoelectronic modules 1, a fourth wafer 400 configured for thermal isolation may be provided in method step D between the third wafer 300 and the second wafer 200, wherein the fourth wafer 400 comprises metalized via holes in a material of the fourth wafer, wherein the metalized via holes are arranged to electrically couple the respective electrical contact pads 330 of the third module portions 301 to the respective electrical contact pads 230 of the second module portions 201. FIG. 6 shows an embodiment of a wafer stack comprising the first wafer 100, the second wafer 200, the third wafer 300 and the fourth wafer 400.
  • The fourth wafer 400 serves as to improve thermal isolation of the second (optoelectronic) wafer 200 from the first (electronic) wafer 300. The insertion of the fourth wafer 400 al lows to protect the optoelectronic components 210, for example an optical source and detector of the second wafer 200, from the electronic components 310, for example drive electronics of the third wafer. The fourth wafer 400 may be configured as a glass interposer wafer with metal vias and redistribution layers between the third and the second wafers 300 and 200. In this variation, the wafer stack up would include a total of four wafers beginning at the bottom with the third (electronic) wafer 300, followed by the fourth wafer 400 acting as a thermal isolation wafer, the second (optoelectronic) wafer 200 and, at the top, the first (opto-mechanical) wafer 100. The isolation may especially be important for the VCSEL sub-assembly where the output optical power as well as the threshold current is affected significantly by temperature especially as data rates increase, but also may be important in SiP (Silicon Photonics) where some devices are temperature sensitive.
  • FIG. 7 shows an embodiment of a wafer stack comprising just the first wafer 100 and the second wafer 200. The first wafer 100 comprises first module portions 101 comprising at least one passive optical component 110 and metalized via holes 120. The second wafer 200 comprises the second module portions 201 comprising at least one optoelectronic component and metalized via holes extending in the material of the second wafer 200. In contrast to the embodiment of the wafer stack shown in FIG. 2B, the wafer stack does not comprise the third wafer 300. For this embodiment, only one set of vias are needed, either in the first wafer 100 or the second wafer 200, but not both. Vias in the first wafer 100 would allow for downward or horizontal mounting as shown in FIGS. 8B, 9B or 11B, while vias in the second wafer 200 would allow for mounting as shown in FIG. 10b, 12a, 12b or 12 c.
  • FIGS. 8A to 12C show different arrangements of an optoelectronic module 1 on an electronic board 3. The optoelectronic module 1 shown in FIGS. 8A, 9A, 10A and 11A. comprises the third substrate 300′ with electronic components 310, such as drivers or amplifiers integrated in the substrate 300′, the second substrate 200′ with the optoelectronic components 210, for example photodiodes or VCSELs, and the first substrate 100′ with the passive optical components 110, such as optical lenses. The first substrate 100′ may also include electrical and/or opto-mechanical components. The second substrate 200′ contains electrical vias 220 to electrically couple the electronic components of the third substrate 300′ with the optoelectronic components of the second substrate. The electronic components and the optoelectronic components may be electrically coupled to the electronic board by means of electrical traces disposed on a surface of the first substrate 100′, as shown, for example, in the embodiments of FIGS. 8A, 9A and 11A. In the embodiment shown in FIG. 10A, there are no electrical contacts to the first substrate 100′, but there are electrical vias in the third substrate 300′ to connect to the electronic board 3.
  • The optoelectronic module 1 shown in FIGS. 8B, 9B, 10B, 11B and 12A to 12C only comprises the first substrate 100′ and the second substrate 200′ but does not comprise the third substrate 300′. According to the embodiments shown in FIGS. 8B, 9B, 10B, 11B and 12A to 12C the electronic components are provided as separate, individual devices 30 directly mounted on the electronic board 3. The optoelectronic module 1 is provided by dicing the wafer stack shown in FIG. 7 into individual modules. The first substrate 100′ may or may not comprise electrical vias/metalized via holes. FIGS. 8b, 9b and 11b show embodiments with vias in the first substrate 100′ connecting the second substrate 200′. The vias on the first substrate 100′ can then connect to the electronic board 3 by means of castellated vias (FIG. 8b ) or electronic contact pads (FIGS. 9b and 11b ). The electronic connection then provides electrical connectivity between the second substrate 200′ and the electronic components 30 being mounted on the electronic board 3. FIGS. 10b and 12A to 12C show examples where the first substrate 100′ do not comprise electrical vias/metalized via holes or any metal redistribution layers. In the alternate embodiment, substrate 200′ comprises of electrical vias/metalized via holes in order to connect to the electronic board 3 and, in particular, to the electronic components 30 being mounted on the electronic board 3.
  • According to embodiments of an arrangement of the optoelectronic module 1 on the electronic board 3, shown in FIGS. 8A and 8B, the optoelectronic module 1 is perpendicularly attached onto the electronic board 3. To this purpose, the first wafer 100 may comprise castellated vias 110 as described above and shown in FIG. 4. Metal traces 10 may be arranged on the electronic board 3 to connect the optoelectronic module 1, for example by means of the castellated vias, to electronic components of the electronic board 2. Metallic pads, for example Cu pads, may be optionally be provided on the backside of the electronic board 3 for solder reflow to a master PCB, for example a motherboard. A glue 20 may be applied to the surface of the electronic board 3 to provide any stability for mounting the optoelectronic module 1 to the board 3.
  • FIGS. 9A and 9B respectively show an embodiment of an arrangement of an optoelectronic module 1 onto an electronic board 3, for example a printed circuit board, wherein the optoelectronic module 1 is attached downward onto the electronic board 3. Metal traces 10 are provided on a surface of the electronic board 3 to electrically connect the electronic components of the electronic board 3 to the optoelectronic module 1.
  • FIGS. 10A and 10B respectively show an embodiment of an arrangement of an optoelectronic module 1 onto an electronic board 3, wherein the optoelectronic module 1 is vertically mounted onto the electronic board 3. The optoelectronic module 1 shown in FIG. 10A is provided by dicing the wafer stack shown in FIG. 5 into individual modules. The optoelectronic module 1 shown in FIG. 10B is provided by dicing a wafer stack only comprising the first wafer 100 and the second wafer 200, wherein the first wafer does not comprise electrical vias. The optical fiber 2 is held and aligned by means of an alignment component, for example, a fixture 160. The fixture 160 may be configured as an individual component mounted/attached on the surface of the first substrate 100′ or as a wafer/wafers with or without molded elements stacked on top of the first substrate 100′.
  • FIGS. 11A and 11B respectively show an embodiment of a downward arrangement of an optoelectronic module 1 onto an opto-electronic board 3. Metal traces 10 are provided on a surface of the opto-electronic board to electrically connect the electronic components of the opto-electronic board 3 to the optoelectronic module I. Electrical vias are provided in the first substrate 100′ to make the electrical connection between the electronic board 3 and the second substrate 200′ (and the third substrate 300′ for the embodiment of FIG. 11A). The opto-electronic board 3 may comprise a channel to insert a waveguide 4 being embedded in the opto-electronic board 3 such that a front face of the embedded waveguide 4 is arranged in a cavity of the opto-electronic board 3 under the passive optical component 110, for example a lens, of the optoelectronic module. Light may be coupled from the front face of the embedded waveguide 4 through the passive optical component 110 into the optoelectronic module 1 and vice versa. To this purpose, the opto-electronic board 3 may comprises a mirror/TIR component to change the direction in order to aid in the coupling of light.
  • FIGS. 12A to 12C show downward approaches of arrangements of an optoelectronic module 1 comprising the first (opto-mechanical) substrate 100′ and the second (optoelectronic) substrate 200′. The optoelectronic module 1 has no wafer-scale IC integration. The optoelectronic module 1 has only a wafer-scale integration with the first (opto-mechanical) wafer 100 and the second (optoelectronic) wafer 200 and possibly with a fiber alignment component made up of multiple wafers or molded components on a single wafer. The optoelectronic module 1 is provided by dicing the wafer stack as shown in FIG. 7 into individual modules. The electronic board 3 is provided with a cutout to place the optoelectronic module 1 to different components.
  • FIG. 12A shows an embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100′ which can be made of glass and the optoelectronic substrate 200′ on the electronic board 3. The optoelectronic module 1 is electrically bonded onto the electronic component 30, for example a transceiver. The optoelectronic substrate 200′ is disposed onto the electronic component 30. The optoelectronic substrate 200′ contains metallized via holes 220, i.e. electrical vias, to electrically couple the optoelectronic components of the optoelectronic substrate 200′ to the electrical component 30. The electrical component 30 is electrically coupled to the electronic board 3.
  • FIG. 12B shows another embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100′ which can be made of glass and the optoelectronic substrate 200′ on the electronic board 3. The optoelectronic module 1 is bonded onto an interposer 40 along with the electronic component 30, for example a transceiver. The interposer 40 comprises electrical vias 41 to electrically couple the optoelectronic components of the optoelectronic substrate 200′ to the electrical component 30 and electrical vias 42 to electrically couple the optoelectronic components and the electrical component 30 to the electronic board 3.
  • FIG. 12C shows another embodiment of an arrangement of an optoelectronic module 1 comprising the opto-mechanical substrate 100′ which can be made of glass and the optoelectronic substrate 200′ on the electronic board 3. The optoelectronic substrate 200′ is placed onto an electronic substrate 50, The optoelectronic components of the optoelectronic substrate 200′ are electrically coupled to the electronic board 3 via electrical traces of the electronic substrate 50. The electronic component 30 is mounted to a side of the electronic board 3.
  • According to an embodiment of the method to manufacture the optoelectronic modules, the first opto-mechanical wafer 100 may be provided with mechanical elements to fix the optical fiber 2 to the module 1 with high precision and exact alignment, thus creating a robust and well-aligned optical link. To this purpose, in method step A, a respective at least one fixture 160 fabricated from a wafer with molded alignment features or a stack of wafers with varying sized vias may be placed for each of the first module portions 101 on the first surface S100 a of the first wafer 100 to couple a respective at least one optical fiber 2 to the first module portions 101, as shown in FIGS. 8A to 10B and in FIGS. 12A to 12C. The respective at least one fixture 160 is configured to hold the respective at least one optical fiber 2 and to align the respective at least one optical fiber 2 to the respective at least one passive optical component 110 of the first module portions 101 such that light is coupled between the respective at least one optical fiber 2 and the respective at least one passive optical component 110 of the first module portions 101.
  • According to another embodiment of the method to manufacture the optoelectronic components, the respective at least one fixture 160 is configured to provide a distance between a front face of the respective at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101.
  • The fixture may be made by wafer scale process molding directly onto the first wafer and/or is one of a single wafer and several stacked wafers with varying holes or molded elements to form the fixture and bonded to the first wafer at the wafer scale.
  • FIGS. 8A to 12C show the fixture 160 being placed on the first surface S100 a of the first module portion 101 of the optoelectronic module 1 to hold and align the optical fiber 2 to the passive optical component 110. The fixture 160 may comprise protrusions 161 being configured to hold the optical fiber 2 in a distance far away from the passive optical component 110. According to a possible embodiment, the fixture 160 can be made of a single wafer with molded components. According to another embodiment, the fixture can be made of a stack of wafers with varying sized holes and aligned to the first wafer 100 in the same fashion that the first wafer 100 is aligned to the second wafer 200. According to another embodiment, the fixture 160 may comprise individual fixture elements bonded precisely to each module.
  • For the majority of implementations described above, metal traces and vias on the first opto-mechanical wafer 100 are used to connect signals to an external PCB. This concept is shown for example in FIGS. 2A and 2B. The sub-assembly could be mounted onto a PCB perpendicular to its surface as shown in FIGS. 8A and 8B.
  • Since the overall footprint of the optoelectronic modules can be reduced by stacking the second (optoelectronic) wafer 200 on top of the third (electronic) wafer 300 or IC, it is conceivable this implementation could even work for applications with limited vertical space. An example of such an application is an active optical cable assembly in which this module would be integrated into the board residing in the plug of the cable.
  • Alternatively, the vias in the first opto-mechanical wafer 100 could be designed such that the metal connections are on the opposite side of the wafer and the module could be mounted horizontally as shown in FIGS. 9A and 9B. In the horizontal arrangement, the electronic board 3 would need a cutout to allow for the optical path through the electronic board or it would need to be an optical PCB with embedded waveguides as shown in FIGS. 9A and 9B. By architecting the solution horizontally, it may be possible to improve heat extraction and the electrical signaling characteristics. Such a solution may benefit applications where speed, power and heat are paramount, such as in data centers and server farms.
  • According to another embodiment of the method to manufacture the optoelectronic modules, a spacer layer may be provided on the first surface S100 a of the first wafer 100 to provide a distance between a front face of the respective at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 of the first module portions 101.
  • According to a further embodiment of the method to manufacture the optoelectronic modules 1, the functionality of the bonded respective first and second module portions 101, 201 and/or the bonded respective third and second module portions 301, 201 and/or the bonded respective first and second and third module portions 101, 201, 301 is tested in the method step D before dicing the wafer stack into the individual dies. According to another embodiment, the functionality of the optoelectronic modules is tested before dicing the bonded first, second and third wafer in method step E into the individual dies/optoelectronic modules.
  • In order to make the final optoelectronic module compatible to SMT (Surface Mounted Technology), the respective materials of the first, second and third wafer must be chosen appropriately and a covering element could be needed over the optical and mechanical alignment features to prevent debris from compromising that area. According to a possible embodiment of the method to manufacture the optoelectronic modules, the covering element may be placed on the first surface S100 a of the first wafer 100 to protect the respective at least one passive optical component 110 of the first module portions 101 from debris when dicing the wafer stack into the individual dies and/or to assist with fiber alignment. Alternatively a cleaning step may be used in place of a protective cover.
  • The covering element could prove useful during the dicing process of the wafer as well as during SMT. Thus, the cover should be placed prior to singulation (at the wafer-scale) and removed following the entire SMT process and just before fiber insertion. Additionally, the cover could be placed back onto the module following fiber insertion to add mechanical support and alignment of the fiber.
  • The integration of the three wafers, i.e. the bottom electrical, the middle optoelectronic and the top opto- mechanical wafers 300, 200 and 100 provides many possible benefits. One benefit is the compact integration of the second (optoelectronic) wafer 200, for example GaAs VCSEL or silicon photonics wafer, with the third (bottom electrical) wafer 300, which leads to very well controlled impedances and parasitics critical for data rates above 10 Gbps.
  • A second benefit is the tight alignment accuracies and parallelism of alignment over hundreds to thousands of modules of the first (opto-mechanical) wafer 100 to the second (optoelectronic) wafer 200, critical for high-speed multi-mode as well as single-mode operation. A third benefit is the capability to have easy access to electrical signals external to the module either by vias through the second (optoelectronic) wafer 200 connecting the top of the third (electronic) wafer 300 to the first (opto-mechanical) wafer 100 or alternatively vias through the third (electronic) wafer 300 connecting the top to the bottom of the third wafer 300.
  • A fourth benefit is the compact size of the entire subassemblies after dicing the water-stack of the first, second and third wafer. A fifth benefit is the compatibility of a final optoelectronic module with traditional electronic processing technologies, such as Surface Mount Technology (SMT). A sixth benefit is that the platform can be used for both multi-mode and single-mode optical integration given the very tight optical alignment tolerances, allowing for use with traditional VCSEL-based multi-mode optics as well as Silicon Photonics (SiP) single-mode optics with all light emission is surface normal. And lastly, these optoelectronic subassemblies have the further capability of wafer-scale testing to produce “known-good modules”.
  • The method to manufacture optoelectronic modules is described in the following by process steps for manufacturing an optoelectronic receiver module using the first opto-mechanical wafer 100, the second optoelectronic wafer 200 and the third electronic wafer 300, wherein a GaAs approach is assumed to be used for the second wafer 200.
  • According to a first method step, the electronic wafer 300 is designed with module portions 301 respectively comprising a receiver integrated circuit (IC) and top electrical pads having a pitch easily fabricated on a low-cost electronic circuit substrate, for example a PCB. An example pitch would be 0.25 mm where the pads and spacing widths are 0.125 mm. Variation of this design is valid presuming the electrical signal integrity is good and the integration onto an electronic board remains feasible.
  • In a subsequent step the optoelectronic wafer 200 is designed with second module portions 201 respectively comprising a GaAs photodiode with pad locations, spacing and widths that match the receiver IC and through GaAs vias to replicate the location, spacing and widths of the electrical pads on the backside of the optoelectronic GaAs wafer 200.
  • After fabrication of the electronic and optoelectronic wafers, thermo-compression or other means may be applied to electrically bond the optoelectronic GaAs wafer 200 onto the electronic wafer 300, and align the electrical pads on the top surface of the electronic wafer 300 to the pads on the bottom surface of the optoelectronic GaAs wafer 200.
  • Some of the electrical pads on the top surface of the optoelectronic GaAs wafer 200 need only connect to the bottom electronic wafer 300, for example those that connect to the photodiode, while other pads need to connect eventually to the electronic board, for example a PCB. The layout of the pads and the subsequent metal redistribution layer on the glass substrate should reflect that connection requirement.
  • According to a subsequent step, the stacked wafers 300 and 200 are tested for optical and electrical functionality, for example, by using an optical and electrical probe system.
  • The electrical portion of the opto-mechanical wafer 100 may be designed with an electrical redistribution layer from trace pads aligned to the optoelectronic GaAs wafer 200 top surface to metalized vias in the glass. The vias should be designed such that dicing would occur through the via and provide sufficient metal remaining in the half- or castellated-via to create contacts in a perpendicular orientation.
  • Alternatively, the vias could be of the non-castellated type and flipped onto a PCB. Following the electrical design, opto-mechanical components including polymer lenses, spacer layers, mechanical alignment features to align optical fibers to the lenses and provide an optimized optical path are designed. After the design phase, the opto-mechanical wafer 100 can be fabricated by the steps of creating through-glass vias (TGVs), metalizing glass vias, metalizing glass redistribution layer and contact pads, plating up metal lines and contacts as needed, molding polymer lenses on alternate side, optionally placing a spacer layer, optionally placing an optical turn, placing fiber alignment features and placing mechanical fixturing features for the fiber holder, all of which may be done at the wafer scale.
  • In a subsequent step thermo-compression or other means of electrical bonding is provided to bond the top surface of electronic/optoelectronic wafer stackup onto the metalized side of the opto-mechanical wafer 100 so that the photodiodes are aligned with the lenses within low tolerance, for example an accuracy of less than 2 μm. Additionally, an index matching gel can be placed between the photodiode surface and the glass to minimize reflections on the surfaces.
  • The modules may be tested on the wafer-scale before dicing, wherein any may be marked that fail to meet manufacturing standards for electrical and optical connectivity. After the testing, a removable wafer-scale covering element may be placed over the opto-mechanical features on the top surface of the opto-mechanical wafer 100. The stacked wafers 300, 200 and 100 are then diced into individual optoelectronic modules, cleaned and the temporary covering element is removed.
  • The singularized final optoelectronic modules may be visually tested and additionally tested in a test fixture for good electrical and optical connectivity for perpendicular, vertical or downward surface mounting to a PCB. Afterwards, the temporary covering element is replaced for shipping and as a possible final fiber alignment mechanical fixture.
  • One alternative process flow in which the electronic wafer 300 is not part of the optoelectronic module as shown for the wafer stack in FIG. 7 would change a few of the steps described above. The first step would change such that some or possibly none of the metal pads on the IC need match the GaAs substrate of the optoelectronic wafer. The step of bonding the electronic and the optoelectronic wafer would be removed. According to a possible embodiment, the steps of designing and fabricating the opto-mechanical wafer 100 would not need any of the metallization described. The opto-mechanical wafer could still have metallization in some embodiments as shown in FIGS. 8B, 9B and 11B, and have it mounted on the side or flip chipped and with the silicon IC on the electronic board or glass interposer instead of in the stack up. The step of bonding the opto-mechanical wafer 100 onto the optoelectronic wafer 200 could only need index matching epoxy and no electrical connection according to a possible embodiment. After the step of testing the optoelectronic module and replacing the temporary cover, an additional step is needed to apply thereto-compression, or by other means, mount the optoelectronic module onto an electronic wafer for good electrical connection.
  • Alternatively, the last step could be to mount the optoelectronic module onto a glass interposer with the electronic chip mounted to the backside or to the side for thermal isolation or to a common substrate, such as a PCB. The final module would then be tested for electrical and optical performance. These possible embodiments are represented in FIGS. 12A to 12C.
  • Alternatively, the last step could be to mount the optoelectronic module to the final electronic board 3 with the electronic chip mounted to the side as shown in FIGS. 8B, 9B, 10B and 11B.
  • For the silicon photonics process, the same steps above could be used with the GaAs wafer 200 replaced by a silicon photonics wafer 200. Additionally, it would be possible to integrate both receiver and transmitter functionality onto one wafer rather than having two separate process flows. The silicon photonics process could also be slightly altered such that the electrical tracing going externally to an electronic board goes through the electronic wafer rather than through the SiP wafer to the opto-mechanical wafer. In this process flow, the first step of designing the electronic wafer 300 would also need to design through Si vias to the backside to match with standard PCB or similar electronic board capabilities. The steps of designing and fabricating the opto-mechanical wafer 100 would not need any of the metallization described for the opto-mechanical wafer. The step of bonding the opto-mechanical wafer 100 to the optoelectronic wafer 200 would only need index matching epoxy and no electrical connection. According to another possible embodiment, the opto-mechanical wafer 100 may still have the electronic connection through the opto-mechanical wafer with the Silicon IC chip either disposed on a common substrate or the stacked up module bonded onto the Silicon IC, where the IC is a larger chip than the module.
  • Another variation to the method to manufacture optoelectronic modules could be a mix of wafer-level integration with chip-based integration used in silicon-based electronics. In this implementation, wafer-level integration of just the two top wafers, i.e. the optoelectronic wafer (GaAs, SiP or other) 200 and the opto-mechanical wafer 100, is performed. In this case, the two wafers 100 and 200 would be bonded solely with index-matching epoxy and have no electrical connectivity while still maintaining the advantages of wafer-level fabrication for the optical and fiber attach elements. According to another embodiment, it is possible to consider having metalization here for downward or flip chip connections as well, for example, either through metal redistribution layers and/or vias. The arrangement is shown in FIGS. 8B, 9B, 10B and 11B with the IC mounted on the PCB, or as shown below in FIG. 14 where the surface S200 b of the optoelectronic wafer would have a metal redistribution layer in order to connect the VCSELs, PDs and Driver/Receiver circuitry.
  • This two-layer stack would form the sub-assembly to then be diced into individual optoelectronic modules, which can be electrically connected at the bottom of the module, i.e. the bottom of the optoelectronic wafer, using the same via design as the previous three-layer stack. Since the two-layer stack no longer directly integrates the electronic wafer functionality into the wafer-level integration, it is necessary to subsequently integrate the singularized optoelectronic module, i.e. the diced two-layer stack, with an electronic chip or a diced electronic wafer. One possible method to do this final integration with an electronic chip could be to bond the optoelectronic module directly on top of an electronic chip or an interposer substrate typically referred to as 2.5D or 3D integration in silicon processing. Alternatively, the module could be soldered, e.g. through Surface Mount Technology (SMT), directly to an electronic board, such as a PCB, with nearby electronic chips with laser drive and receiver amplification.
  • Embodiments of a method to manufacture the optoelectronic modules comprising at least two substrates cut out of a wafer stack comprising at least the first (opto-mechanical) wafer 100 and the second (optoelectronic) wafer 200 are described with reference to FIGS. 13A and 13B.
  • FIG. 13A shows a wafer stack comprising the first (opto-mechanical) wafer 100 comprising alignment components 160, such as v-grooves, and light turning elements 170 based on TIR (Total Internal Reflection). The first wafer 100 does not comprise any electrical vias through the material of the first wafer 100, for example a glass material. The wafer stack further comprises a spacer wafer 600 bonded below the opto-mechanical wafer 100 and the second (optoelectronic) wafer 200 arranged on the bottom side of the spacer wafer 600. The optoelectronic wafer 200 can be made of glass. Electronic components, for example a transceiver, and optoelectronic components, for example, a VCSEL and/or a PD can be placed on a surface of the optoelectronic wafer 200.
  • FIG. 13B shows a wafer stack comprising an opto-mechanical wafer 100, a spacer wafer 600 and an optoelectronic wafer 200. The opto-mechanical wafer 100 is placed on the top side of the wafer stack and the optoelectronic wafer 200 is placed on the bottom side of the wafer stack. The spacer wafer 600 is arranged between the opto-mechanical wafer 100 and the optoelectronic wafer 200. The optoelectronic wafer 200 may be configured as an electronic board, for example a PCB with individual electronic and opto-electronic components arranged on top of the electronic board within an opening of the spacer wafer as shown below in FIG. 19. Alternatively, the optoelectronic wafer 200 may be configured as a SiP wafer with backside electrical connections.
  • According to an embodiment of a method to manufacture optoelectronic modules, a water stack as shown in FIG. 13A is provided. The wafer stack comprises a first (opto-mechanical) wafer 100 comprising a plurality of first (opto-mechanical) module portions 101, wherein each of the first (opto-mechanical) module portions 101 comprises at least one fixture 160, which is molded at the wafer scale onto the surface of the first wafer 100, to hold an optical fiber 2. Alternatively, the fixture can also be individual injection molded elements that are bonded precisely to each module.
  • Embodiments of a method to manufacture optoelectronic modules as well as the corresponding optoelectronic modules are described below with reference to FIGS. 14 to 19 showing the corresponding optoelectronic modules manufactured by the method. According to an embodiment of the method to manufacture the optoelectronic modules, a first (opto-mechanical) wafer 100 comprising a plurality of first module portions 101 is provided, wherein the first wafer 100 has a first surface S100 a and an opposite second surface S100 b. A second (optoelectronic) wafer 200 comprising a plurality of second module portions 201 is provided, wherein the second wafer 200 has a first surface S200 a and an opposite second surface S200 h. Each of the second module portions 201 comprises at least one optoelectronic component 210.
  • The first wafer 100 is disposed onto the second wafer 200 to provide a wafer stack such that the second surface S100 b of the first wafer 100 is placed opposite to the first surface S200 a of the second wafer 200 and each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled in a respective one of the first module portions 201 is transferred to a respective one of the second module portions 201 and is directed to the respective at least one optoelectronic component 210 of the second module portions 201. The wafer stack is diced into individual dies respectively comprising one of the first (opto-mechanical) and one of the second (optoelectronic) module portions for respectively forming one of the optoelectronic modules 1.
  • According to a possible embodiment of the method to manufacture the optoelectronic modules, each of the first module portions 101 comprises at least a fixture 160 to hold an optical fiber 2. The at least one fixture 160 is made by a wafer scale process molding directly onto the first wafer 100 and/or using one of a single wafer with molded elements and several stacked wafers with varying holes and/or cut outs.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, at least one passive optical component 110 for each of the first module portions is provided on the first surface S100 a of the first wafer 100. The first wafer 100 is disposed onto the second wafer 200 such that light coupled into the respective at least one passive optical component 110 of the first module portions 101 is coupled into the respective at least one optoelectronic component 210 of the second module portions 201.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, at least one of the first and second module portions 101, 201 is provided with at least one passive optical component 110 a, 110 b. The first wafer 100 is disposed onto the second wafer 200 to provide a wafer stack such that each of the first module portions 101 is aligned to a respective one of the second module portions 201 so that light coupled out of the optical fiber 2 held in the respective at least one fixture 160 of the first module portions 101 is coupled into the respective at least one passive optical component 110 a, 110 b of one of the first and second module portions 101, 201 at the first side of the respective at least one passive optical component and is coupled out at the second side of the respective at least one optical component and is directed to the respective at least one optoelectronic component 210 of the second module portions 201.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, a respective one of the at least one passive optical component 110 a for each of the first module portions 101 is placed on the second surface S100 b of the first wafer 100. The respective at least one optoelectronic component 210 of the second module portions 201 is placed on the first surface S200 a of the second wafer 200.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, a respective one of the at least one passive optical component 110 b for each of the second module portions is placed on the first surface S200 a of the second wafer 200. The respective at least one optoelectronic component 210 of the second module portions 201 is placed on the second surface S200 b of the second wafer 200.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, a respective first one of the at least one passive optical component 110 a for each of the first module portions 101 is placed on the second surface S100 b of the first wafer 100. A respective second one of the at least one passive optical component 110 b for each of the second module portions 201 is placed on the first surface S200 a of the second wafer 200. The respective at least one optoelectronic component 210 of the second module portions 201 is placed on the second surface S200 b of the second wafer 200.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, the first wafer 100 is provided with a respective at least one light turning element 170 for each of the first module portions 101. The light turning element 170 is configured to change a direction of the light beam so that light is coupled between the respective one of the at least one optical fiber 2 coupled to the first module portions 101 and the respective at least one passive optical component 110 a, 110 b of the at least one first and second module portions 101, 201.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, at least one respective electronic component 310 is provided for each of the second module portions 201. The respective at least one electronic component 310 is placed on one of the first and second surface S200 a, S200 b of the second wafer 200.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, a covering element 500 is provided over the first surface S100 a of the first wafer 100.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, a spacer wafer 600 is provided between the first wafer 100 and the second wafer 200. Alternatively, a spacer layer made by molding directly onto the first surface S200 a of the second wafer 200 and/or the second surface S100 b of the first wafer 100 may be provided.
  • According to another possible embodiment of the method to manufacture the optoelectronic modules, respective tapered and/or straight etched holes 190 are provided for each of the first module portions 101 in the material of the first wafer 100 to fix the front face of the respective at least one optical fiber 2 coupled to the first module portions 101 of the first wafer 100. Alternatively, respective straight holes and respective molded tapers for each of the first module portions 101 may be provided in the material of the first water 100 to fix the front face of the respective at least one optical fiber 2 coupled to the first module portions 101 of the first wafer 100.
  • According to a possible embodiment of the method to manufacture the optoelectronic modules, either the first and second wafers 100, 200 are respectively configured as glass wafers, or the first wafer 100 is configured as a glass wafer and the second wafer 200 is configured as one of a printed circuit board, ceramic substrate, electronic board and an SiP wafer.
  • The respective at least one passive optical component 110, 110 a, 110 b of one of the first and second module portions 101, 201 may comprise an optical lens. The respective at least one optoelectronic component 210 of the second module portions 201 may be configured as an optical emitter and/or an optical receiver. The respective at least one electronic component 310 of the second module portions 201 may be configured as an electrical driver and/or an electrical amplifier.
  • Several embodiments of an optoelectronic module comprising at least two stacked substrates, for example a first (opto-mechanical) substrate comprising optical components such as optical alignment components and beam deflection components and a second (optoelectronic) substrate comprising electronic and optoelectronic components such as transceiver ICs, VCSELs or PDs being cut out of the wafer stack of the bonded optoelectronic wafer 200 and an opto-mechanical wafer 100 are shown in FIGS. 14 to 19. The optoelectronic modules shown in FIGS. 14 to 19 additionally comprise other components, for example a spacer polymer. The spacer polymer could be a wafer in itself and thus many of the embodiments shown in FIGS. 14 to 19 may be based on 2-4 stacked wafers, as for example shown for the 3 stacked wafers of FIG. 13A and 13B.
  • FIG. 14 shows an exploded view of an optoelectronic module 1 manufactured with the method as described with reference to the wafer stack shown in FIG. 13A. The optoelectronic module comprises an opto-mechanical substrate 100′, an optoelectronic substrate 200′ and a spacer layer 180 that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100, the optoelectronic wafer 200 and the spacer wafer 600 as shown in FIGS. 13A. A covering element 500 is provided to be disposed on the first surface S100 a of the opto-mechanical substrate 100′.
  • A fixture 160 to hold the optical fibers 2 is arranged on the first surface S100 a of the opto-mechanical substrate 100′. A light turning element 170 including a fiber alignment structure is placed on the first surface S100 a of the opto-mechanical substrate 100′. The light turning element 170 is either molded directly onto the surface or placed with precision and created using injection molding. First passive optical components 110 a, for example lenses, are placed on the second surface S100 b of the opto-mechanical substrate 100′. Spacer layers 180 are provided, wherein the spacer layers 180 may be placed on the second surface S100 b of the opto-mechanical substrate 100′ or on the first surface S200 a of the optoelectronic wafer 200 or both surfaces S100 b and S200 a. It is also possible to provide a separate spacer wafer in various manufacturing stackups. The opto-mechanical substrate 100′ may be configured as a glass substrate. The light turning element 170 with the fiber alignment structure may be configured as a molded polymer layer, and the first passive optical components 110 a may be configured as another molded polymer layer and the spacer layers 180 may be molded as another polymer or a separate machined wafer and disposed on the glass substrate 100′ fabricated as one component.
  • The optoelectronic substrate 200′ may comprise second passive optical component 110 b being disposed on a first surface S200 a of the optoelectronic substrate 200′. The second passive optical components 110 b may be configured as one molded polymer layer being disposed on a glass substrate 200′. The optoelectronic substrate 200′ further comprises electronic components 310, such as transceivers. Solder ball contacts 230 to reflow the module on a PCB substrate and a metallization for an optoelectronic component 210, for example a VCSEL or a PD, are disposed on the second surface S200 b of the optoelectronic substrate 200′.
  • FIG. 15A shows a two-dimensional exploded view of the optoelectronic module 1 as shown in FIG. 14 in a perspective exploded view. FIGS. 15B shows an embodiment of an optoelectronic module 1 of FIG. 15A manufactured with the method described with reference to the wafer stack shown in FIG. 13A. The optoelectronic module comprises an opto-mechanical substrate 100′, an optoelectronic substrate 200′ and a spacer layer 180 that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100, the optoelectronic wafer 200 and the spacer wafer 600 as shown in FIG. 13A. The opto-mechanical substrate 100′ and the optoelectronic substrate 200′ may be made of glass being transparent for the light transferred in the optical fiber 2. A covering element 500 that can be made of glass or plastic is disposed on the first surface S100 a of the opto-mechanical substrate 100′.
  • A fixture 160 to hold the optical fiber 2 is arranged on the first surface S100 a of the opto-mechanical substrate 100′. Light turning elements 170 a and 170 b are disposed on the first surface S100 a of the opto-mechanical substrate 100′. First passive optical components 110 a, for example lenses, are placed on the second surface S100 b of the opto-mechanical substrate 100′. Spacer layers 180 are placed on the second surface S100 b of the opto-mechanical substrate 100′ and on the first surface S200 a of the optoelectronic substrate 200′. The opto-mechanical substrate 100′ may be configured as a glass substrate.
  • The optoelectronic substrate 200′ comprises second passive optical components Hob, for example lenses, being disposed on the first surface S200 a of the optoelectronic substrate 200′. The optoelectronic substrate 200′ further comprises electronic components 310, such as transceivers. Solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210, for example a VCSEL or a PD, are disposed on the second surface S200 b of the optoelectronic substrate 200′.
  • The optoelectronic module 1 has a first optical path comprising the light turning element 170 a and the optical lens 110 a. Light coupled out of the optoelectronic component 210 a being configured as a VCSEL is coupled out of the VCSEL 210 a and coupled in the lens 110 a. The light is coupled through the opto-mechanical substrate 100′ into the light turning element 170 a from which it is deflected towards the optical fiber 2. The optoelectronic module 1 has a second optical path comprising the light turning element 170 b and the optical lens 110 b. Light coupled out of the optical fiber 2 is deflected by the light turning element 170 b through the opto-mechanical substrate 100′ towards the optical lens 110 b. The lens 110 b focuses the light to the optoelectronic component 210 b that can be configured as a photodiode.
  • FIGS. 16A and 16B respectively show other embodiments of an optoelectronic module 1 manufactured with the method described with reference to the wafer stack shown in FIG. 13A. The optoelectronic modules shown in FIGS. 16A and 16B comprise an opto-mechanical substrate 100′ and an optoelectronic substrate 200′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown in FIG. 13A The opto-mechanical substrate 100′ may be made of a material being opaque for the light transferred in the optical fiber 2. A covering element 500 that can be made of glass or plastic is disposed on the first surface S100 a of the opto-mechanical substrate 100′.
  • The optoelectronic module 1 shown in FIG. 16A comprises the same arrangement of the fixture 160 and the light-turning elements 170 a, 170 b on the first surface S100 a of the opto-mechanical substrate 100′ and first passive optical components 110 a, for example lenses, as well as spacer layers 180 on the second surface S100 b of the opto-mechanical substrate 100′ as shown in FIG. 15A.
  • The optoelectronic substrate 200′ comprises the same arrangement of the second passive optical components 110 b, for example lenses, and spacer layers 180 on the first surface S200 a of the optoelectronic substrate 200′ and electronic components 310, such as transceivers, solder ball contacts 210 and optoelectronic components 210, for example a VCSEL or a PD, on the second surface S200 b of the optoelectronic substrate 200′ as shown for the optoelectronic module in FIG. 15A.
  • The opto-mechanical substrate 100′ may comprise cavities 101 within the opaque material of the opto-mechanical substrate 100′. The cavities may be filled with a material of polymer to provide a light transmission path between the light turning elements 170 a, 170 b and the first and second passive optical components 110 a and 110 b.
  • FIG. 16B shows a similar embodiment of an optoelectronic module as shown in FIG. 16A with the difference that first passive optical components 110 a and second passive optical components 110 b, such as lenses, are disposed opposite to each other on the second surface S100 b of the opto-mechanical substrate 100′ and the first surface S200 a of the optoelectronic substrate 200′. Additional embodiments not shown can have the optical components placed in other configurations, such as both on surface S100 b or both on surface S200 a.
  • FIGS. 17A and 17B respectively show an embodiment of an optoelectronic module 1 manufactured with the method described with reference to the water stack shown in FIG. 13A. The optoelectronic module comprises an opto-mechanical substrate 100′ and an optoelectronic substrate 200′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown in FIG. 13A. The opto-mechanical substrate 100′ and the optoelectronic substrate 200′ may be made of glass being transparent for the light transferred in the optical fiber 2. The top substrate 100′ acts as supporting means for the opto-mechanical components and additionally as a cover. The light turning elements 170 a, 170 b acts as mirrors having a metal or similar coating to be reflective.
  • Light turning elements 170 a and 170 b as well as a fiber alignment fixture 160 are arranged on the second surface S100 b of the opto-mechanical substrate 100′. Passive optical components 110 a, 110 b as well as a vertical adjustment polymer layer 250 are disposed on the first surface S200 a of the optoelectronic substrate 200′. The vertical adjustment polymer layer 250 can be a portion of the spacer wafer 600. The optoelectronic substrate 200′ further comprises electronic components 310, such as transceivers, solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210, for example a VCSEL or a PD, that are disposed on the second surface S200 b of the optoelectronic substrate 200′.
  • The optoelectronic module 1 shown in FIG. 17B is embodied in a similar way as shown for the optoelectronic module of FIG. 17A with the difference that a curvature is added to the light turning elements 170 a and 170 b being configured as metal coated mirrors.
  • FIGS. 18A to 18C respectively show embodiments of an optoelectronic module 1 manufactured with the method described with reference to the water stack shown in FIG. 13A. The optoelectronic module comprises an opto-mechanical substrate 100′ and an optoelectronic substrate 200′ that are cut out of the bonded wafer stack comprising the opto-mechanical wafer 100 and the optoelectronic wafer 200 as shown for the wafer stack in FIG. 13A.
  • The opto-mechanical substrate 100′ comprises cavities 101 to insert optical fibers 2. Spacer layers 180 are disposed on the first and second surface S100 a and S100 b of the opto-mechanical substrate 100′. The optoelectronic substrate 100′ can be made of glass being transparent for the light transferred through the optical fiber 2 and for arranging electrical traces. First and second passive optical components 110 a and 110 b, for example lenses, are disposed on the first surface S200 a of the optoelectronic substrate 200′. The optoelectronic substrate 200′ further comprises electronic components 310, such as transceivers, solder ball contacts 230 to reflow the module on a PCB substrate and optoelectronic components 210, for example a VCSEL, or a PD, that are disposed on the second surface S200 b of the optoelectronic substrate 200′. The optoelectronic components and the electronic components are arranged on the same substrate for electrical integrity.
  • The opto-mechanical substrate 100′ may be made of glass, wherein the cavities 101 are configured as tapered etched holes 190. According to the embodiment of the optoelectronic module shown in FIG. 18A, the optical fibers 2 are inserted in the tapered etched holes. According to the embodiment of the optoelectronic module shown in FIG. 18B, the opto-mechanical substrate 100′ is configured to be made of a material being opaque for the light transferred through the optical fibers 10. The opto-mechanical substrate 100′ comprises cavities 101 formed as tapered polymer molded holes 190 in which the optical fibers 2 are inserted. The optoelectronic module 1 shown in FIG. 18C is embodied similar as shown for the optoelectronic module of FIG. 18B with the difference that the polymer molded holes do not taper and are provided with a hard cladding or ferrule 5 acting a fiber stop means.
  • FIG. 19 shows an embodiment of an optoelectronic module 1 comprising the opto-mechanical substrate 100′ and the optoelectronic substrate 200′. In contrast to the embodiments shown in FIGS. 14 to 18C the optoelectronic components, such as VCSEL/PD, are wirebonded onto an optoelectronic wafer 200 being embodied as a PCB or similar electronic board with electrical traces and vias to connect this module externally to a larger PCB or electronic board later after dicing. The stack arrangement is manufactured at the wafer scale with the PCB being a wafer.
  • The substrate 100′ may be made of glass having a first surface S100 a on which a fixture 160 for holding and aligning an optical fiber 2 and light turning elements 170 a, 170 b are disposed. A cap 500 made of glass or a plastic material is disposed on the first surface S100 a of the opto-mechanical substrate 100′. Passive optical components 170, such as lenses, are disposed on a second surface S100 b of the opto-mechanical substrate 100′.
  • The opto-mechanical substrate 100′ is mounted onto the optoelectronic substrate 200′, for example a PCB. The optoelectronic substrate 200′ comprises optoelectronic components 210 a, 210 b being embodied as VCSELs or PDs and arranged on a first surface S200 a of the optoelectronic substrate. An electronic component 310, for example a transceiver IC, may also be mounted onto the first surface S200 a. of the optoelectronic substrate 200′. Electrical contact pads are provided on the second surface S200 b of the optoelectronic substrate 200′. A spacer layer 180 is arranged between the second surface S100 b of the opto-mechanical substrate 100′ and the first surface S200 a of the optoelectronic substrate 200′. The scale unit given in FIG. 19 is just a possible orientation and does not restrict the components of the embodiment to the specified values.
  • The opto-mechanical substrate 100′ is aligned to the optoelectronic substrate 200′ at the wafer scale so that light may be transferred through a first optical path from the optoelectronic transmitter 210 a through the lens 110 a and the glass substrate 100′ to the light turning mirror 170 a that deflects the light such that it is coupled into the optical fiber 2. The opto-mechanical substrate 100′ is further aligned to the optoelectronic substrate 200′ so that light may be transferred through a second optical path from the optical fiber 2 to the light turning mirror 170 b that deflects the light towards the lens 110 b from which the light is coupled out towards the optoelectronic receiver 210 b.
  • In conclusion, the different embodiments of the method to manufacture optoelectronic components substantially reduce the cost of assembling devices comprising electronic integrated circuits, optoelectronic sources and detectors, optical components and waveguides such as lenses and fiber. The embodiments of the method allow fabricating multiple devices in parallel and aligning them at the wafer-scale thereby increasing assembly throughput. Testable sub-assemblies are fabricated by dicing the stacked wafers that allows verification of the critical precision alignments and device functionality prior to additional assembly thereby reducing the loss of other components due to fallout. The optoelectronic sub-assemblies built by the described embodiments of the method are compatible with low cost electronic circuit board fabrication technology, such as surface-mount technology (SMT). The embodiments of the method provide a path toward high-speed assembly at low-cost due to tight alignment tolerances and controlled electrical connectivity and allow volume manufacturing that can scale cost down as demand increases. Furthermore, the need for wire-bonding in some embodiments is eliminated which improves impedance control of the electrical lines as well as vibration tolerance for automotive or other such applications.
  • Another benefit to the specified approach is that the placement of the optical emitter/receiver can be nearly anywhere in the plane of the module instead of near the perimeter as in many pick-and-place designs where the electronic chip and optoelectronic chips are on a common substrate. With this freedom, the likely ideal placement would be toward the center of the module so that the mechanical features holding the fiber in alignment can also be centered.

Claims (11)

What is claimed is:
1. A method to manufacture optoelectronic modules, comprising:
providing a first wafer comprising a plurality of first module portions, wherein each of the first module portions comprises at least one passive optical component, wherein the at least one passive optical component has a first and a second side and is configured to modify a beam of light such that a direction of light coupled in the at least one passive optical component at the first side is changed and coupled out of the at least one passive optical component at the second side;
providing a second wafer comprising a plurality of second module portions, wherein each of the second module portions comprises at least one optoelectronic component and metalized via holes extending in a material of the second wafer from a first surface of the second wafer to a second opposite surface of the second wafer, wherein the respective at least one optoelectronic component of the second module portions is electrically connected to the respective metalized via holes of the second module portions;
providing a third wafer comprising a plurality of third module portions, wherein each of the third module portions comprises at least one electronic component;
bonding the second wafer onto the third wafer such that the respective at least one electronic component of the third module portions is electrically coupled to the respective at least one optoelectronic component of the second module portions by means of the respective metalized via holes of the second module portions;
bonding the first wafer onto the second wafer to provide a wafer stack such that each of the first module portions is aligned to a respective one of the second module portions so that light coupled into the respective at least one passive optical component of the first module portions at the first side of the respective at least one passive optical component is coupled out at the second side of the respective at least one passive optical component and is directed to the respective at least one optoelectronic component of the second module portions; and
dicing the wafer stack into individual optoelectronic modules respectively comprising one of the first and the second and the third module portions.
2. The method of claim 1, comprising:
the first wafer having a first and a second surface being opposite to the first surface;
arranging the at least one passive optical component of each of the first module portions on the first surface of the first wafer;
providing the second wafer with the at least one optoelectronic component of each of the second module portions being arranged on the first surface of the second wafer; and
bonding the first wafer onto the second wafer such that the second surface of the first wafer is disposed on the first surface of the second wafer.
3. The method of claim 1, comprising:
providing the third wafer with respective electrical contact pads for each of the third module portions on a first surface of the third wafer, wherein the respective electrical contact pads are electrically coupled with the respective at least one electronic component of the third module portions;
providing the second wafer with respective electrical contact pads for each of the second module portions on the second surface of the second wafer, wherein the respective electrical contact pads are electrically coupled to the respective metalized via holes of the second module portions; and
bonding the second wafer onto the third wafer such that the second surface of the second wafer is disposed on the first surface of the third wafer and the respective electrical contact pads of the third module portions are aligned to the respective electrical contact pads of the second module portions to provide an electrical connection between the respective electrical contact pads of the third module portions and the respective electrical contact pads of the second module portions.
4. The method of claim 1, comprising:
providing the first wafer with respective metalized via holes for each of the first module portions in a material of the first wafer, the respective metalized via holes extending from the first surface of the first wafer to the second surface of the first wafer;
providing the second wafer with respective electrical contact pads for each of the second module portions on the first surface of the second wafer such that the respective electrical contact pads of the second module portions are electrically connected to the respective metalized via holes of the second module portions; and
bonding the first wafer onto the second wafer such that the respective electrical contact pads of the second module portions are electrically connected to the respective metalized via holes of the first module portions.
5. The method of claim 3, comprising:
providing a fourth wafer being configured for thermal isolation between the third and the second wafer, wherein the fourth wafer comprises metalized via holes in a material of the fourth wafer, wherein the metalized via holes are arranged to electrically couple the respective electrical contact pads of the third module portions to the respective electrical contact pads of the second module portions.
6. A method to manufacture optoelectronic modules, comprising:
providing a first wafer comprising a plurality of first module portions, wherein the first wafer has a first and an opposite second surface;
providing a second wafer comprising a plurality of second module portions, wherein the second wafer has a first and an opposite second surface, wherein each of the second module portions comprises at least one optoelectronic component;
disposing the first wafer onto the second wafer to provide a wafer stack such that the second surface of the first wafer is placed opposite to the first surface of the second wafer and each of the first module portions is aligned to a respective one of the second module portions so that light coupled in a respective one of the first module portions is transferred to a respective one of the second module portions and is directed to the respective at least one optoelectronic component of the second module portions; and
dicing the wafer stack into individual optoelectronic modules respectively comprising one of the first and the second module portions.
7. The method of claim 6,
wherein each of the first module portions comprises at least a fixture to old an optical fiber; and
wherein the at least one fixture is made by a wafer scale process molding directly onto the first wafer and/or using one of a single wafer with molded elements and several stacked waters with varying holes and/or cut outs.
8. The method of claim 7, comprising:
providing at least one of the first and second module portions with at least one passive optical component; and
disposing the first wafer onto the second wafer to provide a wafer stack such that each of the first module portions is aligned to a respective one of the second module portions so that light coupled out of the optical fiber held in the respective at least one fixture of the first module portions is coupled into the respective at least one passive optical component of one of the first and second module portions at the first side of the respective at least one passive optical component and is coupled out at the second side of the respective at least one optical component and is directed to the respective at least one optoelectronic component of the second module portions.
9. An optoelectronic module, comprising:
a first substrate comprising a first module portion, wherein the first substrate has a first and an opposite second surface;
a second substrate comprising a second module portion, wherein the second substrate has a first and an opposite second surface, wherein the second module portion comprises at least one optoelectronic component;
wherein the first substrate is disposed onto the second substrate to provide the optoelectronic module such that the second surface of the first substrate is placed opposite to the first surface of the second substrate and the first module portion is aligned to the second module portion so that light coupled in the first module portion is transferred to the second module portion and is directed to the at least one optoelectronic component of the second module portion.
10. The optoelectronic module of claim 9,
wherein the first module portion comprises at least one fixture to hold an optical fiber, wherein the at least one fixture is disposed on the first surface of the first substrate.
11. The optoelectronic module of claim 10,
wherein at least one of the first and second module portion is provided with at least one passive optical component; and
wherein the first substrate is disposed on the second substrate to provide the optoelectronic module such that the first module portion is aligned to the second module portion so that light coupled out of the optical fiber held in the at least one fixture of the first module portion is coupled into the at least one passive optical component of one of the first and second module portions at the first side of the at least one passive optical component and is coupled out at the second side of the at least one optical component and is directed to the at least one optoelectronic component of the second module portion.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3757639A1 (en) * 2019-06-24 2020-12-30 TE Connectivity Nederland B.V. Interposer
US11693200B2 (en) 2021-07-19 2023-07-04 Cisco Technology, Inc. Double bonding when fabricating an optical device

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017151416A2 (en) 2016-03-02 2017-09-08 Corning Optical Communications LLC Interposer assemblies and arrangements for coupling at least one optical fiber to at least one optoelectronic device
US9772458B1 (en) * 2016-09-12 2017-09-26 Yottahn, Inc. Optical module for optical fibers and method of manufacturing the same
US10825952B2 (en) 2017-01-16 2020-11-03 Apple Inc. Combining light-emitting elements of differing divergence on the same substrate
US10502908B2 (en) * 2017-03-13 2019-12-10 Mellanox Technologies, Ltd. Long-reach active optical cable
CN110663147A (en) * 2018-04-28 2020-01-07 深圳市大疆创新科技有限公司 Laser diode packaging module, transmitting device, distance measuring device and electronic equipment
US10712499B2 (en) 2018-11-27 2020-07-14 Globalfoundries Inc. Semiconductor devices and methods of forming same
US11189985B2 (en) 2018-12-06 2021-11-30 Ii-Vi Delaware, Inc. Optoelectronic assembly
US11002924B2 (en) * 2018-12-11 2021-05-11 Sicoya Gmbh Optical connector
KR102518449B1 (en) 2019-02-21 2023-04-05 애플 인크. Indium Phosphide VCSEL with Dielectric DBR
US11418010B2 (en) 2019-04-01 2022-08-16 Apple Inc. VCSEL array with tight pitch and high efficiency
CN112017973B (en) * 2019-05-30 2023-02-28 上海新微技术研发中心有限公司 Packaging method of silicon optical module and silicon optical module
US11374381B1 (en) 2019-06-10 2022-06-28 Apple Inc. Integrated laser module
EP4214081A1 (en) 2020-09-18 2023-07-26 Nubis Communications, Inc. Data processing systems including optical communication modules
JP2022124177A (en) * 2021-02-15 2022-08-25 株式会社日本マイクロニクス Connection device and light condensing substrate
US20230066363A1 (en) * 2021-08-31 2023-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Package having prism structure and manufacturing method thereof
JP7046294B1 (en) * 2021-11-08 2022-04-01 三菱電機株式会社 Optical semiconductor device

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6328482B1 (en) * 1998-06-08 2001-12-11 Benjamin Bin Jian Multilayer optical fiber coupler
US6684007B2 (en) * 1998-10-09 2004-01-27 Fujitsu Limited Optical coupling structures and the fabrication processes
US7208725B2 (en) 1998-11-25 2007-04-24 Rohm And Haas Electronic Materials Llc Optoelectronic component with encapsulant
US6731843B2 (en) * 2000-12-29 2004-05-04 Intel Corporation Multi-level waveguide
GB2378316A (en) * 2001-07-30 2003-02-05 Suisse Electronique Microtech Passive alignment microstructures for electroptical devices
US7224856B2 (en) * 2001-10-23 2007-05-29 Digital Optics Corporation Wafer based optical chassis and associated methods
US7961989B2 (en) * 2001-10-23 2011-06-14 Tessera North America, Inc. Optical chassis, camera having an optical chassis, and associated methods
WO2003100486A1 (en) * 2002-05-28 2003-12-04 Matsushita Electric Works, Ltd. Material for substrate mounting optical circuit-electric circuit mixedly and substrate mounting optical circuit-electric circuit mixedly
US6953990B2 (en) 2003-09-19 2005-10-11 Agilent Technologies, Inc. Wafer-level packaging of optoelectronic devices
US6982437B2 (en) 2003-09-19 2006-01-03 Agilent Technologies, Inc. Surface emitting laser package having integrated optical element and alignment post
US20060097385A1 (en) * 2004-10-25 2006-05-11 Negley Gerald H Solid metal block semiconductor light emitting device mounting substrates and packages including cavities and heat sinks, and methods of packaging same
JP4160083B2 (en) * 2006-04-11 2008-10-01 シャープ株式会社 Optical device module and method of manufacturing optical device module
JP2007287872A (en) * 2006-04-14 2007-11-01 Fujifilm Corp Semiconductor device and its manufacturing method
US7767486B2 (en) 2007-11-21 2010-08-03 Intel Corporation High-volume on-wafer heterogeneous packaging of optical interconnects
GB2454813B (en) 2007-11-21 2010-06-09 Intel Corp High-volume on-wafer heterogeneous packaging of optical interconnects
US7703993B1 (en) 2008-12-17 2010-04-27 National Semiconductor Corporation Wafer level optoelectronic package with fiber side insertion
US8417708B2 (en) 2009-02-09 2013-04-09 Xerox Corporation Average case analysis for efficient spatial data structures
US20100270458A1 (en) * 2009-04-24 2010-10-28 Aptina Imaging Corporation Liquid electrical interconnect and devices using same
US8842951B2 (en) 2012-03-02 2014-09-23 Analog Devices, Inc. Systems and methods for passive alignment of opto-electronic components
US9874688B2 (en) * 2012-04-26 2018-01-23 Acacia Communications, Inc. Co-packaging photonic integrated circuits and application specific integrated circuits
US9052476B2 (en) * 2012-07-04 2015-06-09 Sae Magnetics (H.K.) Ltd. Wafer-level packaged optical subassembly and transceiver module having same
US9103999B2 (en) * 2013-03-13 2015-08-11 Avago Technologies General Ip (Singapore) Pte. Ltd. Optical data communication module having EMI cage
US8971676B1 (en) * 2013-10-07 2015-03-03 Oracle International Corporation Hybrid-integrated photonic chip package
US9784933B2 (en) * 2014-12-18 2017-10-10 Infinera Corporation Photonic integrated circuit (PIC) and silicon photonics (SIP) circuitry device
US9431442B2 (en) * 2015-02-02 2016-08-30 Apple Inc. Overmolded reconstructed camera module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3757639A1 (en) * 2019-06-24 2020-12-30 TE Connectivity Nederland B.V. Interposer
US11693200B2 (en) 2021-07-19 2023-07-04 Cisco Technology, Inc. Double bonding when fabricating an optical device

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