WO2018201918A1 - 静电防护方法、装置及液晶显示器 - Google Patents

静电防护方法、装置及液晶显示器 Download PDF

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Publication number
WO2018201918A1
WO2018201918A1 PCT/CN2018/083908 CN2018083908W WO2018201918A1 WO 2018201918 A1 WO2018201918 A1 WO 2018201918A1 CN 2018083908 W CN2018083908 W CN 2018083908W WO 2018201918 A1 WO2018201918 A1 WO 2018201918A1
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Prior art keywords
signal
circuit
timing control
array substrate
control circuit
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PCT/CN2018/083908
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English (en)
French (fr)
Inventor
王建军
刘媛媛
汪敏
马睿
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to US16/328,686 priority Critical patent/US10914993B2/en
Publication of WO2018201918A1 publication Critical patent/WO2018201918A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/22—Antistatic materials or arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Definitions

  • the present disclosure relates to liquid crystal display technology, and more particularly to an electrostatic protection method, device, and liquid crystal display.
  • the Gate Driver on Array (GOA) technology is a technology for directly fabricating gate driver circuits (Gate Driver ICs) on an array substrate instead of an external silicon chip. As shown in Fig. 1, the GOA circuit can be directly fabricated around the panel, which reduces the production process, improves the integration of the liquid crystal panel (PANEL), and reduces the production cost. With the increasing demand for ultra-narrow bezels in modern display products, the market share of display products using GOA technology is increasing.
  • Timing Controller is the logic control core of the liquid crystal display circuit. It is responsible for controlling the timing action of the liquid crystal panel, controlling when the scan drive circuit is started, and inputting the video signal (for example, low voltage differential signal (Low-Voltage).
  • Differential Signaling LVDS
  • RSDS Reduced Swing Differential Signaling
  • the present disclosure provides an electrostatic protection method, device, and liquid crystal display.
  • Embodiments of the present disclosure provide an electrostatic protection method, including:
  • Monitoring interface signals of the timing control circuit and/or the level conversion circuit to determine whether the monitored signal is subjected to static interference
  • the level conversion circuit is connected to the timing control circuit and the array substrate gate driving circuit, and level-converts an output signal outputted by the timing control circuit to the array substrate gate driving circuit.
  • the embodiment of the present disclosure further provides an electrostatic protection device, including:
  • a detection circuit configured to monitor an interface signal of the timing control circuit and/or the level conversion circuit to determine whether the monitored signal is subjected to static interference
  • control circuit configured to adjust a timing control signal output by the timing control circuit to the array substrate gate driving circuit when the electrostatic interference is detected
  • the level conversion circuit is connected to the timing control circuit and the array substrate gate driving circuit, and level-converts an output signal outputted by the timing control circuit to the array substrate gate driving circuit.
  • Embodiments of the present disclosure also provide a liquid crystal display including the above electrostatic protection device.
  • FIG. 1 is a schematic diagram of a GOA circuit in the related art
  • FIG. 2 is a schematic diagram of an electrostatic protection method in accordance with an embodiment of the present disclosure
  • FIG. 3 is a schematic view of an electrostatic protection device in accordance with an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of monitoring electrostatic interference of a TCON circuit in accordance with an embodiment of the present disclosure
  • 5-1 is a schematic diagram of monitoring level shifting circuit electrostatic interference (monitoring output current) according to an embodiment of the present disclosure
  • 5-2 is a schematic diagram of another monitoring level conversion circuit for electrostatic interference (detecting GND) according to an embodiment of the present disclosure
  • 5-3 is a schematic diagram of still another method for monitoring electrostatic interference of a level shifting circuit according to an embodiment of the present disclosure
  • 6-1 is a diagram showing a comparison of a GOA timing control signal when there is no static interference and a GOA timing control signal when static interference is detected, according to an embodiment of the present disclosure
  • 6-2 is another schematic diagram of comparison of a GOA timing control signal when there is no static interference and a GOA timing control signal when static interference is detected, according to an embodiment of the present disclosure
  • 6-3 is still another schematic diagram of a GOA timing control signal in the absence of static interference and a GOA timing control signal when static interference is detected, in accordance with an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides an electrostatic protection method, including:
  • S210 Monitor an interface signal of the timing control circuit TCON and/or the level conversion circuit, and determine whether the monitored signal is subjected to static interference;
  • the level conversion circuit is connected to the timing control circuit TCON and the array substrate gate driving GOA circuit, and level-outputs the output signal of the timing control circuit TCON output to the array substrate gate driving GOA circuit. .
  • interface signal as used herein may be used interchangeably with “input signal and/or output signal.”
  • the electrostatic protection method further includes the following features:
  • the interface signal of the monitoring timing control circuit TCON determines whether the monitored signal is subjected to static interference, including:
  • the input video signal of the TCON is detected, and when the amplitude of the video signal appears to be jittered, and the range of the amplitude change exceeds the second jitter threshold, it is determined that the electrostatic interference is detected.
  • the input video signal of the TCON includes: Low-Voltage Differential Signaling (LVDS) of TCON.
  • LVDS Low-Voltage Differential Signaling
  • the method further includes: transmitting an indication signal for indicating that the static interference is detected to the timing control circuit TCON.
  • the interface signal of the monitoring level conversion circuit determines whether the monitored signal is subjected to static interference, including:
  • OCP Over Circuit Protect
  • the timing control signal outputted by the level conversion circuit to the GOA circuit is buffered by the buffer of the first stage and output to the GOA circuit, the input signal of the buffer is compared with the output signal, if both When a difference occurs, it is determined that static interference is detected.
  • the adjusting the TCON output to the array substrate gate driving the timing control signal of the GOA circuit comprises:
  • TCON does not output the clock signal CLK of the next frame or multiple frames to the GOA circuit.
  • TCON outputs a frame start signal STV (Start Vertical) of the next frame or multiple frames to the GOA circuit, and does not output the clock signal CLK of the next frame or multiple frames to the GOA circuit;
  • the TCON outputs a frame start signal STV of the next frame or a plurality of frames to the GOA circuit, and outputs the active clock signal Active CLK of the next frame or the plurality of frames to the GOA circuit, and outputs the dummy clock signal of the next frame or the plurality of frames to the GOA circuit.
  • Dummy CLK Dummy CLK
  • the frame start signal is used to indicate that the GOA circuit performs pre-frame discharge before a frame starts;
  • the clock signal includes an active clock signal and a dummy clock signal, and the active clock signal is used to instruct the GOA circuit to open a row.
  • the dummy clock signal is used to instruct the GOA circuit to turn off the row switch of one or more rows that were previously turned on.
  • the GOA circuit has its own dedicated discharge and noise reduction circuit. In addition, when the GOA circuit is not working, it can also discharge through the leakage current of the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). .
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • an electrostatic protection device including:
  • the detecting circuit 301 is configured to monitor an interface signal of the timing control circuit TCON and/or the level converting circuit, and determine whether the monitored signal is subjected to static interference;
  • the control circuit 302 is configured to adjust a timing control signal output by the timing control circuit TCON to the array substrate gate driving GOA circuit when detecting static interference;
  • the level conversion circuit is connected to the timing control circuit TCON and the array substrate gate driving GOA circuit, and level-outputs the output signal of the timing control circuit TCON output to the array substrate gate driving GOA circuit. .
  • the electrostatic protection device further includes the following features:
  • the detecting circuit may include a first detecting sub-circuit
  • the first detecting sub-circuit is configured to monitor an interface signal of the timing control circuit TCON, and determine whether the monitored signal is subjected to static interference;
  • the first detecting sub-circuit is configured to monitor an interface signal of the timing control circuit TCON in the following manner to determine whether the monitored signal is subjected to static interference:
  • the input video signal of the TCON is detected, and when the amplitude of the video signal is jittered, and the range of the amplitude change exceeds the second jitter threshold, it is determined that the static interference is detected.
  • the input video signal of the TCON includes: Low-Voltage Differential Signaling (LVDS) of TCON.
  • LVDS Low-Voltage Differential Signaling
  • the detecting circuit may include a second detecting sub-circuit
  • the second detecting sub-circuit is further configured to: after detecting that the static interference is detected by monitoring the interface signal of the level converting circuit, send an indication signal for indicating that the static interference is detected to the timing control circuit TCON.
  • the second detecting sub-circuit is configured to monitor an interface signal of the level converting circuit to determine whether the monitored signal is subjected to static interference:
  • OCP Over Circuit Protect
  • the timing control signal outputted by the level conversion circuit to the GOA circuit is buffered by the buffer of the first stage and output to the GOA circuit, the input signal of the buffer is compared with the output signal, if both When a difference occurs, it is determined that static interference is detected.
  • control circuit is configured to adjust the timing control signal of the TCON output to the array substrate gate drive GOA circuit in the following manner:
  • TCON does not output the clock signal CLK of the next frame or multiple frames to the GOA circuit.
  • TCON outputs a frame start signal STV of the next frame or multiple frames to the GOA circuit, and does not output the clock signal CLK of the next frame or multiple frames to the GOA circuit;
  • the TCON outputs a frame start signal STV of the next frame or a plurality of frames to the GOA circuit, and outputs the active clock signal Active CLK of the next frame or the plurality of frames to the GOA circuit, and outputs the dummy clock signal of the next frame or the plurality of frames to the GOA circuit.
  • Dummy CLK Dummy CLK
  • the frame start signal is used to indicate that the GOA circuit performs pre-frame discharge before a frame starts;
  • the clock signal includes an active clock signal and a dummy clock signal, and the active clock signal is used to instruct the GOA circuit to open a row.
  • the dummy clock signal is used to instruct the GOA circuit to turn off the row switch of one or more rows that were previously turned on.
  • a liquid crystal display including the above-described static electricity protection device is provided.
  • the output signal of TCON is converted to a level by a level conversion circuit, and then output to the GOA circuit.
  • An electrostatic detecting sub-circuit may be added in the TCON circuit, and the input signal of the static detecting sub-circuit may include at least one of the following: a low voltage differential signal LVDS, a data enable signal DE, and a ground signal GND.
  • the static electricity detecting sub-circuit determines whether static interference is detected by monitoring one or more of the input signals, and sends a control signal to the GOA timing control circuit if static interference is detected;
  • the static electricity detecting sub-circuit can monitor the jitter of the grounding signal GND of the TCON, monitor the GND amplitude, and determine that the static interference is detected when the amplitude exceeds the set jitter range.
  • the static electricity detecting sub-circuit can also monitor the periodic change of the DE signal input by the TCON. In the blanking area, the DE signal is generally pulled low, but when a static disturbance occurs to the TCON input, the DE signal is pulled early. high.
  • the static electricity detecting sub-circuit can also monitor the amplitude change of the input LVDS signal. When the static disturbance occurs, the LVDS of the system side may be shaken, and the static amplitude of the input LVDS signal of the TCON is monitored to determine whether static interference occurs.
  • the output signal of the TCON is converted to a level by the level conversion circuit and output to the GOA circuit.
  • An electrostatic detecting sub-circuit is added to the level converting circuit, and an input signal of the static detecting sub-circuit includes an output current of the level converting circuit. After detecting the static interference, the static electricity detecting sub-circuit may send an indication signal to the TCON for notifying that the static electricity is detected.
  • the over-current protection (Over Circuit Protect (OCP) function of the level-shifting circuit can be turned on to monitor the output high current, and the maximum amplitude and abnormal time of the monitoring can be set. When the monitored output current exceeds the set amplitude and duration When the set time is exceeded, it can be determined that static interference is detected. In this case, the output current can be turned off for a while, then the output current is turned on and monitoring continues.
  • OCP Over Circuit Protect
  • the output signal of the TCON is converted to a level by a level conversion circuit, and then output to the GOA circuit.
  • An electrostatic detecting sub-circuit is added to the level converting circuit, and an input signal of the static detecting sub-circuit includes: a ground signal GND. After detecting the static interference, the electrostatic detecting sub-circuit sends an indication signal to the TCON for notifying that the static interference is detected.
  • the static electricity detecting sub-circuit in the level converting circuit can monitor the jitter of the ground signal GND of the level converting circuit, and monitor the GND amplitude. When the value exceeds the set jitter range, it is judged that static interference is detected.
  • the output signal of the TCON is converted to a level by the level conversion circuit, and then output to the GOA circuit.
  • the static detecting sub-circuit may include a buffer and a comparator, an output of the level converting circuit is connected to the input end of the buffer and the comparator Input.
  • the buffer and comparator may also be integrated within the level shifting circuit.
  • the buffer is used to buffer the output signal of the level shifting circuit and then output to the GOA circuit.
  • One input signal of the comparator is an output signal of the buffer, and the other input signal is an output signal of the level conversion circuit, and the comparator compares the two signals. If there is a difference between the comparison results, Then, an indication signal is sent to the TCON circuit for notifying that static interference is detected.
  • the following example shows how TCON adjusts the timing control signal output to the GOA circuit when static interference is detected.
  • the TCON circuit when static interference is detected, the TCON circuit enters the silent Mute mode, and does not output the CLK signal of the next frame or frames to the GOA circuit.
  • TCON outputs a frame start signal STV, and does not output a CLK signal of the next frame or several frames to the GOA circuit.
  • the STV signal is used to instruct the GOA circuit to perform pre-frame discharge before a frame begins.
  • the TCON outputs a frame start signal STV of the next frame or several frames to the GOA circuit, and does not output the active clock signal Active CLK of the next frame or several frames to the GOA circuit. , outputting a dummy frame clock signal Dummy CLK of the next frame or several frames to the GOA circuit;
  • the clock signal CLK includes an active clock signal Active CLK and a dummy clock signal Dummy CLK, the dummy clock signal Dummy CLK is located after the active clock signal Active CLK; the active clock signal Active CLK is used to indicate the GOA
  • the circuit turns on one or more rows of row switches, and the dummy clock signal Dummy CLK is used to instruct the GOA circuit to turn off one or more rows of row switches that were previously turned on.

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  • General Physics & Mathematics (AREA)
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Abstract

一种静电防护方法、装置及液晶显示器。静电防护方法包括：监测时序控制电路和/或电平转换电路的接口信号，判断监测的信号是否受到静电干扰（S210）；检测到静电干扰时，调整时序控制电路输出给阵列基板栅极驱动电路的时序控制信号（S220）；其中，电平转换电路连接时序控制电路和所述阵列基板栅极驱动电路，并对时序控制电路输出给阵列基板栅极驱动电路的输出信号进行电平转换。

Description

静电防护方法、装置及液晶显示器
相关申请的交叉引用
本申请要求于2017年5月4日递交的题为“一种静电防护方法、装置及液晶显示器”的中国专利申请(申请号201710308087.2)的优先权，在此以全文引用的方式将该中国专利申请并入本文中。
技术领域
本公开涉及液晶显示技术，尤指静电防护方法、装置及液晶显示器。
背景技术
阵列基板行驱动(Gate Driver on Array，简称GOA)技术是直接将栅极驱动电路(Gate Driver ICs)制作在阵列基板上以替代外接硅芯片制作的驱动晶片的一种技术。如图1所示，GOA电路可直接制作在面板周围，减少了制作程序，提高了液晶面板(PANEL)的集成度，降低了生产成本。随着现代显示产品对于超窄边框的要求越来越高，使用GOA技术的显示产品所占的市场份额越来越大。
时序控制电路(Timing Controller，简称TCON)是液晶显示器电路的逻辑控制核心，负责控制液晶面板时序动作，控制扫描驱动电路何时启动，将输入的视频信号(例如，低电压差分信号(Low-Voltage Differential Signaling，简称LVDS))转换成数据驱动电路所用的数据信号形式(比如mini-LVDS信号或低摆幅差分信号(Reduced Swing Differential Signaling，简称RSDS))，传递到数据驱动电路，控制数据驱动电路适时开启。
发明内容
本公开提供了静电防护方法、装置及液晶显示器。
本公开实施例提供一种静电防护方法，包括：
监测时序控制电路和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
检测到静电干扰时，调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号；
其中，所述电平转换电路连接所述时序控制电路和所述阵列基板栅极驱动电路，并对所述时序控制电路输出给阵列基板栅极驱动电路的输出信号进行电平转换。
本公开实施例还提供一种静电防护装置，包括：
检测电路，被配置为能够监测时序控制电路和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
控制电路，被配置为能够在检测到静电干扰时，调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号；
其中，所述电平转换电路连接所述时序控制电路和所述阵列基板栅极驱动电路，并对所述时序控制电路输出给阵列基板栅极驱动电路的输出信号进行电平转换。
本公开实施例还提供一种包括上述静电防护装置的液晶显示器。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本申请的实施例一起用于解释本公开的技术方案，并不构成对本公开技术方案的限制。
图1为相关技术中GOA电路的示意图；
图2为根据本公开实施例的静电防护方法的示意图；
图3为根据本公开实施例的静电防护装置的示意图；
图4为根据本公开实施例的监测TCON电路静电干扰的示意图；
图5-1为根据本公开实施例的一种监测电平转换电路静电干扰(监测输出电流)的示意图；
图5-2为根据本公开实施例的另一种监测电平转换电路静电干扰(检测GND)的示意图；
图5-3为根据本公开实施例的又一种监测电平转换电路静电干扰的示意图；
图6-1为根据本公开实施例的在没有静电干扰时的GOA时序控制信号与 检测到静电干扰时的GOA时序控制信号的比较示意图；
图6-2为根据本公开实施例的在没有静电干扰时的GOA时序控制信号与检测到静电干扰时的GOA时序控制信号的另一比较示意图；以及
图6-3为根据本公开实施例的在没有静电干扰时的GOA时序控制信号与检测到静电干扰时的GOA时序控制信号的又一比较示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。
如上所述，GOA技术可直接将栅极驱动电路制作在阵列基板上。然而，需要注意的是：时序控制电路TCON输出给GOA电路的时钟信号容易受到静电干扰而出现紊乱，从而导致液晶面板扫屏现象或画面显示异常。所以，需要一种针对GOA技术的静电防护方法。如图2所示，本公开实施例提供一种静电防护方法，包括：
S210，监测时序控制电路TCON和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
S220，检测到静电干扰时，调整所述时序控制电路TCON电路输出给阵列基板栅极驱动GOA电路的时序控制信号；
其中，所述电平转换电路连接所述时序控制电路TCON和所述阵列基板栅极驱动GOA电路，并对所述时序控制电路TCON输出给阵列基板栅极驱动GOA电路的输出信号进行电平转换。
在本文中所使用的术语“接口信号”可以与“输入信号和/或输出信号”互换使用。
所述静电防护方法还包括以下特点：
在一种实施方式中，所述监测时序控制电路TCON的接口信号，判断所 述监测的信号是否受到静电干扰，包括：
监测所述TCON的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第一抖动阈值时，判定检测到静电干扰；和/或
监测所述TCON的数据使能信号DE，检测DE信号在一个周期内是否提前使能，是则判定检测到静电干扰；和/或
检测所述TCON的输入视频信号，当所述视频信号的幅值出现抖动，并且幅值变化的范围超过第二抖动阈值时，判定检测到静电干扰。
其中，所述TCON的输入视频信号包括：TCON的输入低电压差分信号(Low-Voltage Differential Signaling，简称LVDS)。
在一种实施方式中，在通过监测电平转换电路的接口信号判断检测到静电干扰后，所述方法还包括：向所述时序控制电路TCON发送用于指示检测到静电干扰的指示信号。
在一种实施方式中，所述监测电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰，包括：
监测所述电平转换电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第三抖动阈值时，判定检测到静电干扰；和/或
开启所述电平转换电路的过电流保护(Over Circuit Protect，简称OCP)功能，当监测到输出电流超过设定的电流阈值并且持续时间超过设定的时间时，判定检测到静电干扰；和/或
当所述电平转换电路输出给所述GOA电路的时序控制信号经过一级缓冲器的缓存后输出给所述GOA电路时，将所述缓冲器的输入信号与输出信号进行比较，如果二者出现差异，则判定检测到静电干扰。
在一种实施方式中，所述调整所述TCON输出给阵列基板栅极驱动GOA电路的时序控制信号，包括：
TCON不向GOA电路输出下一帧或多帧的时钟信号CLK；或
TCON向GOA电路输出下一帧或多帧的帧开始信号STV(Start Vertical)，不向GOA电路输出下一帧或多帧的时钟信号CLK；或
TCON向GOA电路输出下一帧或多帧的帧开始信号STV，不向GOA电路输出下一帧或多帧的活动时钟信号Active CLK，向GOA电路输出下一帧或 多帧的哑元时钟信号Dummy CLK；
其中，所述帧开始信号用于指示所述GOA电路在一帧开始前进行帧前放电；所述时钟信号包括活动时钟信号和哑元时钟信号，所述活动时钟信号用于指示GOA电路打开一行或多行的行开关，所述哑元时钟信号用于指示GOA电路对之前打开的一行或多行的行开关进行关闭。
GOA电路中有自己专门的放电和降噪电路，另外在GOA电路不工作的时候还可以通过金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor，简称MOSFET)漏电流进行放电。有的GOA电路用一个帧开始信号STV(Start Vertical)作为整体复位(Total reset)输入，在每一帧开始前进行帧前放电。
如图3所示，根据本公开的另一实施例，提供一种静电防护装置，包括：
检测电路301，用于监测时序控制电路TCON和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
控制电路302，用于检测到静电干扰时，调整所述时序控制电路TCON输出给阵列基板栅极驱动GOA电路的时序控制信号；
其中，所述电平转换电路连接所述时序控制电路TCON和所述阵列基板栅极驱动GOA电路，并对所述时序控制电路TCON输出给阵列基板栅极驱动GOA电路的输出信号进行电平转换。
所述静电防护装置还包括以下特点：
在一种实施方式中，所述检测电路可以包括第一检测子电路；
所述第一检测子电路，用于监测时序控制电路TCON的接口信号，判断所述监测的信号是否受到静电干扰；
所述第一检测子电路，用于采用以下方式监测时序控制电路TCON的接口信号，判断所述监测的信号是否受到静电干扰：
监测所述TCON的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第一抖动阈值时，判定检测到静电干扰；和/或
监测所述TCON的数据使能信号DE，检测DE信号在一个周期内是否提前使能，是则判定检测到静电干扰；和/或
检测所述TCON的输入视频信号，当所述视频信号的幅值出现抖动，并 且幅值变化的范围超过第二抖动阈值时，判定检测到静电干扰。
其中，所述TCON的输入视频信号包括：TCON的输入低电压差分信号(Low-Voltage Differential Signaling，简称LVDS)。
在一种实施方式中，所述检测电路可以包括第二检测子电路；
其中，所述第二检测子电路，还用于通过监测电平转换电路的接口信号判断检测到静电干扰后，向所述时序控制电路TCON发送用于指示检测到静电干扰的指示信号。
在一种实施方式中，所述第二检测子电路，用于采用以下方式监测电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰：
监测所述电平转换电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第三抖动阈值时，判定检测到静电干扰；和/或
开启所述电平转换电路的过电流保护(Over Circuit Protect，简称OCP)功能，当监测到输出电流超过设定的电流阈值并且持续时间超过设定的时间时，判定检测到静电干扰；和/或
当所述电平转换电路输出给所述GOA电路的时序控制信号经过一级缓冲器的缓存后输出给所述GOA电路时，将所述缓冲器的输入信号与输出信号进行比较，如果二者出现差异，则判定检测到静电干扰。
在一种实施方式中，控制电路，用于采用以下方式调整所述TCON输出给阵列基板栅极驱动GOA电路的时序控制信号：
TCON不向GOA电路输出下一帧或多帧的时钟信号CLK；或
TCON向GOA电路输出下一帧或多帧的帧开始信号STV，不向GOA电路输出下一帧或多帧的时钟信号CLK；或
TCON向GOA电路输出下一帧或多帧的帧开始信号STV，不向GOA电路输出下一帧或多帧的活动时钟信号Active CLK，向GOA电路输出下一帧或多帧的哑元时钟信号Dummy CLK；
其中，所述帧开始信号用于指示所述GOA电路在一帧开始前进行帧前放电；所述时钟信号包括活动时钟信号和哑元时钟信号，所述活动时钟信号用于指示GOA电路打开一行或多行的行开关，所述哑元时钟信号用于指示GOA电路对之前打开的一行或多行的行开关进行关闭。
根据本公开的又一实施例，提供一种液晶显示器，包括上述静电防护装置。
下面通过一个示例说明如何在TCON内进行静电检测。
如图4所示，TCON的输出信号通过电平转换电路转换电平后，输出给GOA电路。可以在TCON电路内增加一个静电检测子电路，所述静电检测子电路的输入信号可包括以下至少一项：低电压差分信号LVDS，数据使能信号DE，接地信号GND。
所述静电检测子电路通过监测输入信号中的一种或多种，判定是否检测到静电干扰，如果检测到静电干扰，向GOA时序控制电路发送控制信号；
其中，所述静电检测子电路可以监测所述TCON的接地信号GND的抖动，对GND幅值进行监测，在幅值超出设定的抖动范围时判断检测到静电干扰。所述静电检测子电路还可以监测所述TCON输入的DE信号的周期变化，在空白(blanking)区域内DE信号一般是拉低的，但是当出现静电扰动到TCON输入时，DE信号会提前拉高。所述静电检测子电路还可以监测输入的LVDS信号的幅值变化，出现静电扰动时系统端的LVDS可能出现抖动，通过监测TCON的输入LVDS信号的抖动幅值来判断是否出现静电干扰。
下面通过一个示例说明如何在电平转换电路内进行静电检测。
在一种实现方式中，如图5-1所示，TCON的输出信号通过电平转换电路转换电平后，输出给GOA电路。在电平转换电路内增加一个静电检测子电路，所述静电检测子电路的输入信号包括：电平转换电路的输出电流。所述静电检测子电路检测到静电干扰后，可向TCON发送一个指示信号用于通知检测到静电干扰。
可以开启电平转换电路的过电流保护(Over Circuit Protect，简称OCP)功能，监测输出大电流，可以设置监测的最大幅值和异常时间，当监测到输出电流超过设定的幅值并且持续时间超过设定时间，则可以判定检测到静电干扰。在该情况下，可关断输出电流一段时间，然后再开启输出电流并继续监测。
在另一种实现方式中，如图5-2所示，TCON的输出信号通过电平转换电路转换电平后，输出给GOA电路。在电平转换电路内增加一个静电检测子电路，所述静电检测子电路的输入信号包括：接地信号GND。所述静电检测子电路检测到静电干扰后，向TCON发送一个指示信号用于通知检测到静电干 扰。
与图4所示示例中TCON内监测接地信号类似，所述电平转换电路内的静电检测子电路可以监测所述电平转换电路的接地信号GND的抖动，对GND幅值进行监测，在幅值超出设定的抖动范围时判断检测到静电干扰。
在又一种实现方式中，如图5-3所示，TCON的输出信号通过电平转换电路转换电平后，输出给GOA电路。在电平转换电路外部增加一个静电检测子电路，所述静电检测子电路可包括一个缓冲器和一个比较器，所述电平转换电路的输出端连接所述缓冲器的输入端和比较器的输入端。在其他的实施方式中，所述缓冲器和比较器也可以集成在所述电平转换电路内部。
所述缓冲器用于对电平转换电路的输出信号进行缓存，然后输出给GOA电路。所述比较器的一个输入信号是所述缓冲器的输出信号，另一个输入信号是所述电平转换电路的输出信号，所述比较器对这两种信号进行比较，如果比较结果存在差异，则向TCON电路发送一个指示信号用于通知检测到静电干扰。
下面通过一个示例说明在检测到静电干扰时，TCON如何调整输出给GOA电路的时序控制信号。
在一种实现方式中，如图6-1所示，在检测到静电干扰时，TCON电路进入静默Mute模式，不向GOA电路输出下一帧或几帧的CLK信号。
在另一种实现方式中，如图6-2所示，TCON输出帧开始信号STV，不向GOA电路输出下一帧或几帧的CLK信号。其中，所述STV信号用于指示所述GOA电路在一帧开始前进行帧前放电。
在又一种实现方式中，如图6-3所示，TCON向GOA电路输出下一帧或几帧的帧开始信号STV，不向GOA电路输出下一帧或几帧的活动时钟信号Active CLK，向GOA电路输出下一帧或几帧的哑元时钟信号Dummy CLK；
其中，所述时钟信号CLK包括活动时钟信号Active CLK和哑元时钟信号Dummy CLK，所述哑元时钟信号Dummy CLK位于所述活动时钟信号Active CLK之后；所述活动时钟信号Active CLK用于指示GOA电路打开一行或多行的行开关，所述哑元时钟信号Dummy CLK用于指示GOA电路对之前打开的一行或多行的行开关进行关闭。
虽然本公开所揭露的实施方式如上，但所述的内容仅为便于理解本公开而采用的实施方式，并非用以限定本公开。任何本公开所属领域内的技术人员，在不脱离本公开所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本公开的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (10)

  1. 一种静电防护方法，包括：
    监测时序控制电路和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
    检测到静电干扰时，调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号；
    其中，所述电平转换电路连接所述时序控制电路和所述阵列基板栅极驱动电路，并对所述时序控制电路输出给阵列基板栅极驱动电路的输出信号进行电平转换。
  2. 根据权利要求1所述的静电防护方法，其中：
    所述监测时序控制电路的接口信号，判断所述监测的信号是否受到静电干扰，包括：
    监测所述时序控制电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第一抖动阈值时，判定检测到静电干扰；和/或
    监测所述时序控制电路的数据使能信号，检测所述数据使能信号在一个周期内是否提前使能，是则判定检测到静电干扰；和/或
    检测所述时序控制电路的输入视频信号，当所述视频信号的幅值出现抖动，并且幅值变化的范围超过第二抖动阈值时，判定检测到静电干扰。
  3. 根据权利要求1所述的静电防护方法，其中：
    在通过监测电平转换电路的接口信号判断检测到静电干扰后，所述方法还包括：向所述时序控制电路发送用于指示检测到静电干扰的指示信号。
  4. 根据权利要求1所述的静电防护方法，其中：
    所述监测电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰，包括：
    监测所述电平转换电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第三抖动阈值时，判定检测到静电干扰；和/或
    开启所述电平转换电路的过电流保护功能，当监测到输出电流超过设定的电流阈值并且持续时间超过设定的时间时，判定检测到静电干扰；和/或
    当所述电平转换电路输出给所述阵列基板栅极驱动电路的时序控制信号经过缓冲器的缓存后再输出给所述阵列基板栅极驱动电路时，将所述缓冲器的输入信号与输出信号进行比较，如果二者出现差异，则判定检测到静电干扰。
  5. 根据权利要求1～4中任一项所述的静电防护方法，其中：
    所述调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号，包括：
    时序控制电路不向阵列基板栅极驱动电路输出下一帧或多帧的时钟信号；或
    时序控制电路向阵列基板栅极驱动电路输出下一帧或多帧的帧开始信号，不向阵列基板栅极驱动电路输出下一帧或多帧的时钟信号；或
    时序控制电路向阵列基板栅极驱动电路输出下一帧或多帧的帧开始信号，不向阵列基板栅极驱动电路输出下一帧或多帧的活动时钟信号，向阵列基板栅极驱动电路输出下一帧或多帧的哑元时钟信号；
    其中，所述帧开始信号用于指示所述阵列基板栅极驱动电路在一帧开始前进行帧前放电；所述时钟信号包括活动时钟信号和哑元时钟信号，所述活动时钟信号用于指示阵列基板栅极驱动电路打开一行或多行的行开关，所述哑元时钟信号用于指示阵列基板栅极驱动电路对之前打开的一行或多行的行开关进行关闭。
  6. 一种静电防护装置，包括：
    检测电路，被配置为能够监测时序控制电路和/或电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰；
    控制电路，被配置为能够在检测到静电干扰时，调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号；
    其中，所述电平转换电路连接所述时序控制电路和所述阵列基板栅极驱动电路，并对所述时序控制电路输出给阵列基板栅极驱动电路的输出信号进行电平转换。
  7. 根据权利要求6所述的静电防护装置，其中：
    所述检测电路包括第一检测子电路；
    所述第一检测子电路，被配置为能够监测时序控制电路的接口信号，判断 所述监测的信号是否受到静电干扰；
    所述第一检测子电路，被配置为能够采用以下方式监测时序控制电路的接口信号，判断所述监测的信号是否受到静电干扰：
    监测所述时序控制电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第一抖动阈值时，判定检测到静电干扰；和/或
    监测所述时序控制电路的数据使能信号，检测所述数据使能信号在一个周期内是否提前使能，是则判定检测到静电干扰；和/或
    检测所述时序控制电路的输入视频信号，当所述视频信号的幅值出现抖动，并且幅值变化的范围超过第二抖动阈值时，判定检测到静电干扰。
  8. 根据权利要求6所述的静电防护装置，其中：
    所述检测电路包括第二检测子电路；
    所述第二检测子电路，还被配置为能够通过监测电平转换电路的接口信号判断检测到静电干扰后，向所述时序控制电路发送用于指示检测到静电干扰的指示信号；
    所述第二检测子电路，被配置为能够采用以下方式监测电平转换电路的接口信号，判断所述监测的信号是否受到静电干扰：
    监测所述电平转换电路的接地信号，当所述接地信号的幅值出现抖动，并且幅值变化的范围超过第三抖动阈值时，判定检测到静电干扰；和/或
    开启所述电平转换电路的过电流保护功能，当监测到输出电流超过设定的电流阈值并且持续时间超过设定的时间时，判定检测到静电干扰；和/或
    当所述电平转换电路输出给所述阵列基板栅极驱动电路的时序控制信号经过缓冲器的缓存后再输出给所述阵列基板栅极驱动电路时，将所述缓冲器的输入信号与输出信号进行比较，如果二者出现差异，则判定检测到静电干扰。
  9. 根据权利要求6～8中任一项所述的静电防护装置，其中：
    控制电路，被配置为能够采用以下方式调整所述时序控制电路输出给阵列基板栅极驱动电路的时序控制信号：
    时序控制电路不向阵列基板栅极驱动电路输出下一帧或多帧的时钟信号；或
    时序控制电路向阵列基板栅极驱动电路输出下一帧或多帧的帧开始信号， 不向阵列基板栅极驱动电路输出下一帧或多帧的时钟信号；或
    时序控制电路向阵列基板栅极驱动电路输出下一帧或多帧的帧开始信号，不向阵列基板栅极驱动电路输出下一帧或多帧的活动时钟信号，向阵列基板栅极驱动电路输出下一帧或多帧的哑元时钟信号；
    其中，所述帧开始信号用于指示所述阵列基板栅极驱动电路在一帧开始前进行帧前放电；所述时钟信号包括活动时钟信号和哑元时钟信号，所述活动时钟信号用于指示阵列基板栅极驱动电路打开一行或多行的行开关，所述哑元时钟信号用于指示阵列基板栅极驱动电路对之前打开的一行或多行的行开关进行关闭。
  10. 一种包括上述权利要求6-9中任一项所述的静电防护装置的液晶显示器。
PCT/CN2018/083908 2017-05-04 2018-04-20 静电防护方法、装置及液晶显示器 Ceased WO2018201918A1 (zh)

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