WO2018201768A1 - 一种升压转换器的限流启动方法及电路 - Google Patents

一种升压转换器的限流启动方法及电路 Download PDF

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WO2018201768A1
WO2018201768A1 PCT/CN2018/075519 CN2018075519W WO2018201768A1 WO 2018201768 A1 WO2018201768 A1 WO 2018201768A1 CN 2018075519 W CN2018075519 W CN 2018075519W WO 2018201768 A1 WO2018201768 A1 WO 2018201768A1
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current
current source
circuit
turned
current limiting
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PCT/CN2018/075519
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English (en)
French (fr)
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林其亮
江宇晟
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深圳市中移联半导体科技有限公司
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Publication of WO2018201768A1 publication Critical patent/WO2018201768A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection

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  • the present invention relates to the field of boost converter circuits, and in particular, to a current limiting starting method and circuit for a boost converter.
  • FIG. 1 is a schematic diagram of a circuit structure of a conventional boost converter.
  • the boost converter includes an input voltage VBAT, a storage inductor L, a boost circuit, an output capacitor C, and an output voltage PVDD.
  • the efficiency is poor at low power, because an operation of a group of boost circuits is added, and if the output voltage PVDD is controlled at the input voltage VBAT at a low voltage,
  • the boost circuit is activated at high power, there will be problems with surge current and popping.
  • the current limiting circuit In order to avoid damage to the system itself and the inductive components during the startup of the booster circuit, the current limiting circuit is generally used to limit the current of the booster circuit, and the current limiting will be slow to avoid components. damage. However, for some applications, such as audio amplifier applications, if the current limit is too slow, it will cause a sound explosion, because the frequency of most sounds is between 100 and 10 kHz, that is, the boost circuit must be played within 100 us. Go to the target potential, otherwise the output of the concert has a popping phenomenon, please refer to Figure 2, when the startup is too slow, it will produce a sonic boom.
  • the traditional fast current limiting circuit has the largest surge at the beginning of startup, because PVDD has the largest clamping force on VBAT at the beginning of startup, and the current on the inductor is the smallest, so the traditional current limiting method will appear as shown in the figure.
  • the waveform shown in 3 produces a pop.
  • the disclosed patent CN103701312A provides a current limiting circuit and method for a boost converter, which performs current limiting control on a switching tube and a freewheeling tube in a boost converter to achieve current limiting in a full load range.
  • a boost converter which performs current limiting control on a switching tube and a freewheeling tube in a boost converter to achieve current limiting in a full load range.
  • it also produces the above-mentioned sonic boom phenomenon when it starts up.
  • the object of the present invention is to design a current limiting starting method and circuit for a boost converter, which can achieve the dual purposes of fast starting and current limiting.
  • a current limiting starting circuit of a boost converter comprising a switching transistor Q1, a freewheeling tube Q2 and a main control circuit, the current limiting starting circuit comprising:
  • a current detecting circuit for detecting a current of a drain of the switching transistor Q1;
  • the control comparison circuit is respectively connected with the first current source I1, the second current source I2 and the third current source I3 for simultaneously opening the first current source I1 and the second current source in the t1 time after the boost converter starts to start.
  • I2 and the third current source I3 generate a first current limiting signal Ilimitl, turn on the first current source I1 and the second current source I2 within t2 after startup, turn off the third current source I3 and generate a second current limiting signal Ilimit2, And opening the first current source I1 after the end of the current limiting, turning off the second current source I2 and the third current source I3 and generating a third current limiting signal I limit3 ;
  • a clock circuit for counting the times t1 and t2 and generating a clock signal
  • the main control circuit is adapted to generate a driving signal of the switch tube Q1 and the freewheeling tube Q2 according to the clock signal, the first current limiting signal I limit1 , the second current limiting signal I limit2 , and the third current limiting signal I limit3 holding, when receiving the control current limit signal I limit1 first of the switch Q1 is turned off, the freewheeling transistor Q2 is turned on, and receiving the second current limit signal I limit2 after the time t1
  • the switch tube Q1 is turned off, and the freewheeling tube Q2 is turned on.
  • the switch tube Q1 is turned on and the freewheel tube Q2 is turned off.
  • the switch tube Q1 of the present invention is an NMOS tube
  • the freewheeling tube Q2 is a PMOS tube.
  • the current limiting current value in the t2 time of the present invention is greater than the current limiting current value in the t1 time.
  • a current limiting starting method for a boost converter includes a switching transistor Q1, a freewheeling tube Q2, and a main control circuit, the main control circuit is connected with a control comparison circuit, and the control comparison circuit is respectively connected There is a first current source I1, a second current source I2 and a third current source I3, and the current limiting starting method comprises:
  • the first current source I1 and the second current source I2 are turned on in t2, the third current source I3 is turned off, and the switching transistor Q1 is turned off and the freewheeling tube Q2 is turned on;
  • the first current source I1 is turned on, the second current source I2 and the third current source I3 are turned off, and the switching transistor Q1 is turned on and the freewheeling tube Q2 is turned off.
  • the switch tube Q1 of the present invention is an NMOS tube
  • the freewheeling tube Q2 is a PMOS tube.
  • the current limiting current value in the t2 time of the present invention is greater than the current limiting current value in the t1 time.
  • the current limiting starting method and circuit of the boost converter provided by the invention adopts a two-stage current limiting method, and uses a smaller current limiting to achieve the effect of limiting the glitch at the beginning of starting, compared with the prior art.
  • the current limiting is amplified to perform the second-stage current limiting, so as to achieve the limiting surge, the dual purpose of fast starting and current limiting can be achieved.
  • Figure 1 is a circuit diagram of a conventional boost converter
  • FIG. 3 is a signal diagram of a prior art current limiting circuit
  • FIG. 4 is a signal diagram of a current limiting circuit of a current limiting starting method of the boost converter of the present invention
  • Figure 5 is a circuit diagram of a current limiting starting circuit of the boost converter of the present invention.
  • FIG. 6 is a current detecting diagram of a current limiting starting circuit of the boost converter of the present invention.
  • FIG. 7 is a clock circuit diagram of a current limiting start circuit of the boost converter of the present invention.
  • the conventional fast current limiting circuit has the largest surge at the beginning of startup, because the output voltage PVDD has the largest clamping voltage to the input voltage VBAT at the beginning of startup, and the current at the initial inductance is the smallest. Therefore, the waveform shown in Fig. 3 appears in the conventional practice.
  • the current limiting starting method and circuit of the boost converter provided by the present invention adopts a two-stage current limiting method, and uses a small current limiting to achieve a limiting surge effect at the beginning of starting, and After the t1 time, the current limiting is amplified to perform the second-stage current limiting. In this way, the limiting surge is achieved, and the dual purpose of fast starting and current limiting can be achieved.
  • the present invention provides a current limiting starting circuit of a boost converter.
  • the boost converter includes a switching transistor Q1, a freewheeling tube Q2, and a main control circuit.
  • the current limiting starting circuit includes:
  • a current detecting circuit for detecting a current of a drain of the switching transistor Q1;
  • the control comparison circuit is respectively connected with the first current source I1, the second current source I2 and the third current source I3 for simultaneously opening the first current source I1 and the second current source in the t1 time after the boost converter starts to start.
  • I2 and the third current source I3 generate a first current limiting signal I limit1 , turn on the first current source I1 and the second current source I2 within t2 after startup, turn off the third current source I3 and generate a second current limiting signal I Limit2 , and opening the first current source I1 after the end of the current limiting, turning off the second current source I2 and the third current source I3 and generating a third current limiting signal I limit3 ;
  • a clock circuit for counting the times t1 and t2 and generating a clock signal
  • the main control circuit is adapted to generate a driving signal of the switch tube Q1 and the freewheeling tube Q2 according to the clock signal, the first current limiting signal I limit1 , the second current limiting signal I limit2 , and the third current limiting signal I limit3 holding, when receiving the control current limit signal I limit1 first of the switch Q1 is turned off, the freewheeling transistor Q2 is turned on, and receiving the second current limit signal I limit2 after the time t1
  • the switch tube Q1 is turned off, and the freewheeling tube Q2 is turned on.
  • the switch tube Q1 is turned on and the freewheel tube Q2 is turned off.
  • the switch tube Q1 is an NMOS tube
  • the freewheel tube Q2 is a PMOS tube.
  • the booster circuit extracts the current signal through the drain D terminal of the switch transistor Q1 during current detection.
  • the I1I2 and I3 current sources are simultaneously turned on during t1.
  • the current detecting circuit only needs to detect a small current, and the current limiting circuit will start.
  • the main control circuit will be turned off.
  • the I3 current source is turned off, and the current limit value is pulled high for the second stage charging.
  • I2 is turned off at the end of the current limit, leaving only the I1 current source, and the circuit enters the normal operating mode.
  • the clock circuit can change the length of time t1 and t2 when counting the times t1 and t2.
  • the counting circuit will start counting.
  • the length of the control time can be controlled by the frequency of the CLK and the number of DFFs.
  • the CLK frequency is slower, the more DFF, the longer T1 will be.
  • the faster the CLK frequency the less the number of DFFs, and the shorter T1 will be.
  • counting T2 it can be generated by using a set of identical circuits.
  • an embodiment of the present invention further provides a current limiting starting method of a boost converter. Since the principle of solving the problem of the above circuit is similar to the current limiting starting method of the boost converter, the implementation of the foregoing method may be See the implementation of the above circuit.
  • a current limiting starting method for a boost converter includes a switching transistor Q1, a freewheeling tube Q2, and a main control circuit, the main control circuit is connected with a control comparison circuit, and the control comparison circuit is respectively connected There is a first current source I1, a second current source I2 and a third current source I3, and the current limiting starting method comprises:
  • the first current source I1 and the second current source I2 are turned on in t2, the third current source I3 is turned off, and the switching transistor Q1 is turned off and the freewheeling tube Q2 is turned on;
  • the first current source I1 is turned on, the second current source I2 and the third current source I3 are turned off, and the switching transistor Q1 is turned on and the freewheeling tube Q2 is turned off.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

一种升压转换器的限流启动方法及电路。升压变换器包括开关管（Q1）、续流管（Q2）以及主控电路。限流启动电路包括电流检测电路、控制比较电路和时钟电路。电流检测电路用于检测开关管漏极的电流。控制比较电路分别连接有第一电流源（I1）、第二电流源（I2）和第三电流源（I3），用于在升压转换器开始启动后分别产生第一限流信号（I limit1）、第二限流信号（I limit2）和第三限流信号（I limit3）。主控电路适于根据时钟信号（CLK）、第一限流信号、第二限流信号以及第三限流信号产生开关管和续流管的驱动信号。升压转换器的限流启动方法及电路可以达到快速启动及限流的双重目的。

Description

一种升压转换器的限流启动方法及电路 技术领域
本发明涉及升压转换电路领域，特别涉及一种升压转换器的限流启动方法及电路。
背景技术
在音频放大器的应用上，可以通过升压变换器产生一个较高的PVDD输出电压来达到较高的输出功率。图1是常见的一种升压变换器的电路结构示意图。请参考图1，所述升压变换器包括输入电压VBAT、储能电感L、升压电路、输出电容C和输出电压PVDD。在应用升压变换器进行电压转换的时候，在低功率的时候效率较差，因这时多了一组升压电路的动作，而如果在低电压时将输出电压PVDD控制在输入电压VBAT，当大功率时才将升压电路启动的话则会有突波电流及爆音的问题。
升压电路在启动时为避免突波电流太大对系统本身及电感元件造成损坏，一般会采用限流电路对升压电路进行限流的动作，并且限流都会做的很慢，避免元件受损。但针对某些应用，例如音频放大器的应用上，限流太慢的话会对声音造成音爆，因为大部份声音的频率是在100～10kHz之间，也就是升压电路必需在100us内打到目标电位，否则的话输出的音乐会有爆音的现象发生，请参阅图2，在启动过慢是会产生音爆。传统的快速限流电路在一开始启动时的突波最大，因 刚开始启动时PVDD对VBAT的夹压最大，而且一开始电感上的电流是最小的，所以传统的限流方法会出现如图3所示的波形，从而产生爆音。
已公开的专利CN103701312A提供了一种升压变换器的限流电路及方法，其对升压变换器中的开关管和续流管都进行限流控制，实现了全负载范围内的限流，但是其在开始启动时也会产生上述的音爆现象。
发明内容
针对以上问题，本发明专利目的在于设计了一种升压转换器的限流启动方法及电路，可以达到快速启动及限流的双重目的。
本发明具体是通过以下技术方案实现的：
一种升压转换器的限流启动电路，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，所述限流启动电路包括：
电流检测电路，用于检测开关管Q1漏极的电流；
控制比较电路，分别连接有第一电流源I1、第二电流源I2和第三电流源I3，用于在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并产生第一限流信号Ilimitl，在启动后t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并产生第二限流信号Ilimit2，以及在限流结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并产生第三限流信号I limit3；
时钟电路，用于计数所述时间t1和t2并产生时钟信号；
所述主控电路适于根据时钟信号、所述第一限流信号I limit1、第二限流信号I limit2以及第三限流信号I limit3产生所述开关管Q1和续流管Q2的驱动信号，在接收到所述第一限流信号I limit1时控制所述开关管Q1截止、续流管Q2导通，在所述t1时间结束后且接收到所述第二限流信号I limit2时保持所述开关管Q1截止、续流管Q2导通，在接收到所述第三限流信号I limit3时控制所述开关管Q1导通、续流管Q2截止。
具体的，本发明所述开关管Q1为NMOS管，所述续流管Q2为PMOS管。
具体的，本发明所述t2时间内限流电流值大于所述t1时间内的限流电流值。
一种升压转换器的限流启动方法，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，所述主控电路连接有控制比较电路，所述控制比较电路分别连接有第一电流源I1、第二电流源I2和第三电流源I3，所述限流启动方法包括：
在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并控制所述开关管Q1截止、续流管Q2导通；
在t1时间结束后，t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并保持所述开关管Q1截止、续流管Q2导通；
在t2时间结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并控制所述开关管Q1导通、续流管Q2截止。
具体的，本发明所述开关管Q1为NMOS管，所述续流管Q2为PMOS管。
具体的，本发明所述t2时间内限流电流值大于所述t1时间内的限流电流值。
本发明提供的升压转换器的限流启动方法及电路，与现有技术相比，采用两阶段限流法，在一开始启动时利用较小的限流来达到限制突波的效果，而在经过t1时间后，再将限流放大进行第二阶段的限流，以此方式来达到限制突波，可以达到快速启动及限流的双重目的。
附图说明
以下参照附图对本发明实施例作进一步说明，其中：
图1是一种常见的升压变换器的电路结构图；
图2是现有技术的升压变换器启动过慢的信号图；
图3是现有技术的限流电路的信号图；
图4是本发明升压转换器的限流启动方法的限流电路信号图；
图5是本发明升压转换器的限流启动电路的电路图；
图6是本发明升压转换器的限流启动电路的电流检测图；
图7是本发明升压转换器的限流启动电路的时钟电路图。
具体实施方式
下面结合附图和具体实施例对本发明作进一步的详细说明。
正如背景技术中所描述的，传统快速限流电路在一开始启动时的突波最大，因刚开始启动时输出电压PVDD对输入电压VBAT的夹压最大，而且一开始电感上的电流是最小的，故现有传统的作法会出现图3所示的波形。请参阅图4，本发明提供的升压转换器的限流启动方法及电路，采用两阶段限流法，在一开始启动时利用较小的限流来达到限制突波的效果，而在经过t1时间后，再将限流放大进行第二阶段的限流，以此方式来达到限制突波，可以达到快速启动及限流的双重目的。
本发明提出了一种升压转换器的限流启动电路，请参阅图5，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，所述限流启动电路包括：
电流检测电路，用于检测开关管Q1漏极的电流；
控制比较电路，分别连接有第一电流源I1、第二电流源I2和第三电流源I3，用于在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并产生第一限流信号I limit1，在启动后t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并产生第二限流信号I limit2，以及在限流结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并产生第三限流信号I limit3；
时钟电路，用于计数所述时间t1和t2并产生时钟信号；
所述主控电路适于根据时钟信号、所述第一限流信号I limit1、第二 限流信号I limit2以及第三限流信号I limit3产生所述开关管Q1和续流管Q2的驱动信号，在接收到所述第一限流信号I limit1时控制所述开关管Q1截止、续流管Q2导通，在所述t1时间结束后且接收到所述第二限流信号I limit2时保持所述开关管Q1截止、续流管Q2导通，在接收到所述第三限流信号I limit3时控制所述开关管Q1导通、续流管Q2截止。
具体的，所述开关管Q1为NMOS管，所述续流管Q2为PMOS管。请参阅图6，升压电路在作电流检测时会透过检测开关管Q1的漏极D端，将电流的信号提取出来。在升压电路刚开始启动的时候，在t1时间内I1I2及I3电流源同时打开，这时电流检测电路只需要检测到较小的电流，限流电路就会启动，这时主控电路会关掉开关管Q1，同时打开续流管Q2，将电感电流充到PVDD。而在t2时间的时候关掉I3电流源，将限流值拉高进行第二段充电。最后在限流结束的时候关掉I2只留下I1电流源，电路进入正常操作模式。
请参阅图7，时钟电路在计数t1及t2时间的时候，可改变t1及t2的时间长短。当EN讯号启动的时候，计数电路会开始计数，这时候可以透过CLK的频率及DFF的数目在控制时间的长短。而当CLK频率愈慢，DFF数目愈多，T1会愈长。反之，当CLK频率愈快，DFF数目愈少，T1会愈短。而在计数T2的时候，可以利用一组相同的电路来产生。
基于同一发明构思，本发明实施例中还提供了一种升压转换器的限流启动方法，由于上述电路解决问题的原理与升压转换器的限流启 动方法相似，因此上述方法的实施可以参见上述电路的实施。
一种升压转换器的限流启动方法，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，所述主控电路连接有控制比较电路，所述控制比较电路分别连接有第一电流源I1、第二电流源I2和第三电流源I3，所述限流启动方法包括：
在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并控制所述开关管Q1截止、续流管Q2导通；
在t1时间结束后，t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并保持所述开关管Q1截止、续流管Q2导通；
在t2时间结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并控制所述开关管Q1导通、续流管Q2截止。
以上所述本发明的具体实施方式，并不构成对本发明保护范围的限定。任何根据本发明的技术构思所做出的各种其他相应的改变与变形，均应包含在本发明权利要求的保护范围内。

Claims (6)

  1. 一种升压转换器的限流启动电路，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，其特征在于，所述限流启动电路包括：
    电流检测电路，用于检测开关管Q1漏极的电流；
    控制比较电路，分别连接有第一电流源I1、第二电流源I2和第三电流源I3，用于在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并产生第一限流信号Ilimit1，在启动后t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并产生第二限流信号Ilimit2，以及在限流结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并产生第三限流信号I limit3；
    时钟电路，用于计数所述时间t1和t2并产生时钟信号；
    所述主控电路适于根据时钟信号、所述第一限流信号I limit1、第二限流信号I limit2以及第三限流信号I limit3产生所述开关管Q1和续流管Q2的驱动信号，在接收到所述第一限流信号I limit1时控制所述开关管Q1截止、续流管Q2导通，在所述t1时间结束后且接收到所述第二限流信号I limit2时保持所述开关管Q1截止、续流管Q2导通，在接收到所述第三限流信号I limit3时控制所述开关管Q1导通、续流管Q2截止。
  2. 根据权利要求1所述的升压转换器的限流启动电路，其特征在于，所述开关管Q1为NMOS管，所述续流管Q2为PMOS管。
  3. 根据权利要求1所述的升压转换器的限流启动电路，其特征在于，所述t2时间内限流电流值大于所述t1时间内的限流电流值。
  4. 一种升压转换器的限流启动方法，所述升压变换器包括开关管Q1、续流管Q2以及主控电路，其特征在于，所述主控电路连接有控制比较电路，所述控制比较电路分别连接有第一电流源I1、第二电流源I2和第三电流源I3，所述限流启动方法包括：
    在升压转换器开始启动后t1时间内同时打开第一电流源I1、第二电流源I2和第三电流源I3并控制所述开关管Q1截止、续流管Q2导通；
    在t1时间结束后，t2时间内打开第一电流源I1和第二电流源I2，关闭第三电流源I3并保持所述开关管Q1截止、续流管Q2导通；
    在t2时间结束后打开第一电流源I1，关闭第二电流源I2和第三电流源I3并控制所述开关管Q1导通、续流管Q2截止。
  5. 根据权利要求4所述的升压转换器的限流启动方法，其特征在于，所述开关管Q1为NMOS管，所述续流管Q2为PMOS管。
  6. 根据权利要求4所述的升压转换器的限流启动方法，其特征在于，所述t2时间内限流电流值大于所述t1时间内的限流电流值。
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