WO2018192335A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2018192335A1
WO2018192335A1 PCT/CN2018/080075 CN2018080075W WO2018192335A1 WO 2018192335 A1 WO2018192335 A1 WO 2018192335A1 CN 2018080075 W CN2018080075 W CN 2018080075W WO 2018192335 A1 WO2018192335 A1 WO 2018192335A1
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WO
WIPO (PCT)
Prior art keywords
switching element
display panel
layer
signal line
control signal
Prior art date
Application number
PCT/CN2018/080075
Other languages
English (en)
French (fr)
Inventor
张鹏曲
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/304,102 priority Critical patent/US20200328230A1/en
Publication of WO2018192335A1 publication Critical patent/WO2018192335A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266Details of drivers for scan electrodes
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
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Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display panel, and a display device including the display panel.
  • TFT-LCD thin film transistor liquid crystal display products
  • the Fanout area (sector area) line density is increasing, and the peripheral layout space is less and less; in order to meet the resolution requirements, the design time ET (Cell Test) signal from the conventional gray level
  • the signal and RGB picture signals are converted into gray-scale picture signals, and the data signals are added by DO/DE (odd/even data signals), which brings defects in poor product interception, and some defects can only be in FOG (Flexible printed circuits).
  • DO/DE oddd/even data signals
  • FOG Flexible printed circuits
  • a display panel including:
  • a display area comprising M scan lines crisscrossed, N data lines, and a plurality of sub-pixels located in a sub-pixel area defined by each of the scan lines and the data lines;
  • the first test area includes N first switching elements and the nth first switching element corresponds to the nth data line; the first end of each of the first switching elements is connected to the test signal terminal, the control end and the first a control signal line connection;
  • nth auxiliary switching element corresponds to the nth first switching element, and the first end of the nth auxiliary switch is connected to the data line of the nth, and the second end is a second end of the nth first switching element is connected, and the control end is connected to the second control signal line;
  • M and N are positive integers and n ⁇ N.
  • each of the sub-pixels includes a second switching element; wherein the second switching element and the first switching element and the auxiliary switching element are both thin film transistors, and
  • the thin film transistor includes a gate layer, a gate insulating layer, an active layer, and a source/drain metal layer which are stacked.
  • the first switching element and the gate layer of the auxiliary switching element, the gate insulating layer, the active layer, and the source/drain metal layer and the gate of the second switching element are respectively disposed in the same layer and have the same material.
  • the first control signal line and the second control signal line are the same signal line.
  • the first control signal line and the second control signal line are different signal lines.
  • the display panel further includes:
  • the second test area includes an FPC test module disposed on a side of the display area opposite to the first test area.
  • the sub-pixel includes a pixel electrode and a common electrode; wherein the pixel electrode and the common electrode are disposed in different layers, and the pixel electrode is a comb structure.
  • the sub-pixel includes a pixel electrode and a common electrode; wherein the pixel electrode and the common electrode are disposed in the same layer and are both comb structures.
  • a display device including the above display panel is provided.
  • the scan line is connected to a gate driving circuit, and the data line is connected to a source driving circuit; wherein the gate driving circuit is disposed on the display panel.
  • FIG. 1 is a schematic structural view showing a conventional display panel
  • FIG. 2 is a schematic structural view showing a display panel in an exemplary embodiment of the present disclosure
  • FIG. 3 schematically shows a schematic structural view of another display panel in an exemplary embodiment of the present disclosure.
  • a photolithography process is indispensable.
  • a growth type PT (bump) occurs on a mask during a photolithography process (SD Mask) in which a source/drain metal layer of a thin film transistor is formed, resulting in a fixed position of the switching element.
  • SD Mask photolithography process
  • Source and drain metal residues (SD Remain) may occur. Since the growth position of the growth type PT is fixed, the position where the source/drain metal remains is relatively fixed.
  • the DPO side (the side opposite to the DP side on the display panel) inputs the scan signal, and the data signal is input from the bottom to the top, although the source and drain metal appear at the position of the switching element. Residue, but there is no defect in the detection, so it is easy to miss the detection when passing the ET signal detection.
  • the display module signal is from top to bottom, the voltage at the switching element 8 where the source and drain metal remains will be zero, and the display module signal is pulled low, thereby causing line defects here ( X-Line). According to statistics, the incidence of poor line is above 4%.
  • the present embodiment firstly provides a display panel, which can be displayed by an ADS (ADvanced Super Dimension Switch) display panel or an IPS (In-Plane Switching) display.
  • ADS Advanced Super Dimension Switch
  • IPS In-Plane Switching
  • the panel and the FFS (Fringe Field Switching) display panel are used to prevent the occurrence of line defects when the source/drain metal remains in the switching element.
  • the display panel may be other types of display panels, which is not specifically limited in the exemplary embodiment.
  • the above display panel may include a display area 1, a first test area 2, and an auxiliary switching element 3 and the like. among them:
  • the display area 1 may include M scanning lines, N data lines 7 and a plurality of sub-pixels located in a sub-pixel area defined by each of the scanning lines and the data lines 7.
  • the first test area 2 may include N first switching elements and the nth first switching element corresponds to the nth data line 7; the first end of each of the first switching elements is connected to the test signal terminal 3.
  • the control terminal is connected to the first control signal line 4.
  • N auxiliary switching elements 3 wherein the nth auxiliary switching element 3 corresponds to the nth first switching element, and the first end of the nth auxiliary switching element is connected to the nth data line 7 The second end is connected to the second end of the nth first switching element, and the control end is connected to the second control signal line 5; wherein, M and N are both positive integers and n ⁇ N.
  • the auxiliary switching element 3 is disposed between the display area 1 and each of the first switching elements in the first test area 2, and each of the auxiliary switching elements 3 and the second control signal line 5 Connection, even if the source/drain metal remains in the first switching element, since the auxiliary switching element 3 can be normally disconnected, the module signal returned from the display area 1 can still be terminated at the auxiliary switching element 3, and no line defect occurs. Occurs, thereby reducing the rate of defective products and reducing the waste of module materials.
  • the first control signal line 4 and the second control signal line 5 apply an ET voltage, and the ET signal is from bottom to top; the data signal voltage is applied to the data line 7, and the data signal is from bottom to top.
  • the test is normal at this time.
  • the module signal is returned, the module signal is from top to bottom. Even if the source/drain metal remains in the first switching element, since the auxiliary switching element 3 can be normally disconnected, the module signal returned by the display area 1 can still be assisted.
  • the switching element 3 is terminated so as not to affect the display of the picture.
  • the first switching element in which the source/drain metal remains is turned on, the module signal is pulled low, and a line defect occurs.
  • the sub-pixels include a second switching element, wherein the second switching element and the first switching element and the auxiliary switching element 3 may each be a thin film transistor, and the thin film transistor may A gate layer, a gate insulating layer, an active layer, and a source/drain metal layer are provided in a stacked manner. a gate layer, a gate insulating layer, an active layer, and a source/drain metal layer of the first switching element and the auxiliary switching element, and a gate layer, a gate insulating layer, an active layer, and a source of the second switching element
  • the drain metal layers are respectively disposed in the same layer and have the same material.
  • the thin film transistor may be an N-type TFT or a P-type TFT, which is not particularly limited in the present exemplary embodiment.
  • the order of the layers of the thin film transistor in the present exemplary embodiment is not particularly limited.
  • the thin film transistor may be a top gate type or a bottom gate type. All fall within the scope of protection of the present disclosure.
  • the same layer structure of each switching element can be formed in the same photolithography process, which can effectively simplify the process steps and thereby reduce the cost.
  • the first control signal line 4 and the second control signal line 5 may be different signal lines.
  • the first control signal line 4 and the second control signal line 5 may also be the same signal line 10.
  • the first control signal line 4 and the second control signal line 5 are set to be the same control signal line 10, it is possible to reduce the circuit wiring and facilitate the narrow bezel setting of the display device.
  • the display panel may further include a second test area 9 including an FPC (Flexible Printed Circuit) test module.
  • FPC Flexible Printed Circuit
  • the test signal terminal 6 is connected to the FPC test module, the gradation potential is supplied from the FPC, and the gradation potential VG is supplied from the FPC.
  • a signal ⁇ R for selecting a data line for R is supplied to the R terminal.
  • a signal ⁇ G for selecting a data line for G is supplied to the G terminal.
  • a signal ⁇ B for selecting a data line for B is supplied to the B terminal.
  • a control signal ⁇ C is supplied to the control terminal.
  • the even data signal DE is supplied to the even test signal terminals.
  • An odd data signal DO is supplied to the odd test signal terminals.
  • the FPC test module By setting up the FPC test module, it is possible to receive signals from the data source for more in-depth and accurate testing of the display area. And by setting the FPC test module and the auxiliary switch component on both sides of the display area, a reasonable layout of the display panel structure is realized, and the occupied space of the peripheral layout is reduced.
  • the display panel sub-pixel further includes: the sub-pixel includes a pixel electrode and a common electrode; wherein the pixel electrode and the common electrode are disposed in different layers, and the pixel electrode is a comb structure.
  • the sub-pixel includes a pixel electrode and a common electrode; wherein the pixel electrode and the common electrode may also be disposed in the same layer, and both are comb structures.
  • the display panel provided by the present disclosure has advantages and positive effects in that: by providing an auxiliary switching element between the display area and each of the first switching elements, and each auxiliary switching element and the second control signal In the line connection, even if the source/drain metal remains in the first switching element, since the auxiliary switching element can be normally disconnected, the module signal returned from the display area can be terminated at the auxiliary switching element without causing a line defect.
  • a display device comprising the above display panel.
  • the scan line on the display panel is connected to the gate driving circuit, and the data line on the display panel is connected to the source driving circuit.
  • the gate driving circuit can be disposed on the display panel.
  • the display device is provided with two sets of switching elements, and even if the first switching element in the first test area has source/drain metal residual, the module signal of the display area downward can still be the auxiliary switching element corresponding to the first switching element. The termination is performed so that the module signal is not pulled down and the display device is normally displayed.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
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Abstract

一种显示面板,以及一种包括该显示面板的显示装置。所述显示面板包括:显示区(1),包括纵横交错的M条扫描线、N条数据线(7)以及位于由各所述扫描线以及数据线(7)限定的子像素区域内的多个子像素;第一测试区(2),包括N个第一开关元件且第n个所述第一开关元件对应第n条数据线(7);各所述第一开关元件的第一端与测试信号端子(6)连接、控制端与第一控制信号线(4)连接;N个辅助开关元件(3),其中第n个所述辅助开关元件(3)对应第n个第一开关元件,且第n个所述辅助开关元件的第一端与第n条所述数据线(7)连接、第二端与第n个所述第一开关元件的第二端连接、控制端与第二控制信号线(5)连接;其中,M、N均为正整数且n≤N。

Description

显示面板及显示装置 技术领域
本公开涉及显示技术领域,具体涉及一种显示面板,以及一种包括该显示面板的显示装置。
背景技术
在薄膜晶体管液晶显示产品(TFT-LCD)中,随着用户体验需求的不断提升,对高分辨率(TFT-LCD)产品的需求也不断提高。
由于现在对产品分辨率要求越来越高,Fanout区(扇形区)线密集程度在增加,外围布局空间越来越少;为了满足分辨率要求,设计时ET(Cell Test)信号从常规灰阶信号、RGB画面信号转变成只有灰阶画面信号,Data信号采用DO/DE(奇数/偶数数据信号)的加入方式,同时带来不良产品拦截上的缺陷,部分不良只能在FOG(Flexible printed circuits board On Glass,柔性线路板与玻璃电路板接装工艺)状态下的特殊画面才能拦截,一旦不良高发,将大量浪费模组资材。
需要说明的是,在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解,因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
根据本公开的一个方面,提供一种显示面板,包括:
显示区,包括纵横交错的M条扫描线、N条数据线以及位于由各所述扫描线以及数据线限定的子像素区域内的多个子像素;
第一测试区,包括N个第一开关元件且第n个所述第一开关元件对应第n条数据线;各所述第一开关元件的第一端与测试信号端子连接、控制端与第一控制信号线连接;
N个辅助开关元件,其中第n个所述辅助开关元件对应第n个第一开关元件,且第n个所述辅助开关的第一端与第n条所述数据线连接、第二端与第n个所述第一开关元件的第二端连接、控制端与第二控制信号线连接;
其中,M、N均为正整数且n≤N。
在本公开的一种示例性实施例中,各所述子像素均包括第二开关元件;其中, 所述第二开关元件与所述第一开关元件及辅助开关元件均为薄膜晶体管,且所述薄膜晶体管包括层叠设置的栅极层、栅极绝缘层、有源层以及源漏金属层。
在本公开的一种示例性实施例中,所述第一开关元件以及辅助开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层与所述第二开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层分别同层设置且材料相同。
在本公开的一种示例性实施例中,所述第一控制信号线与所述第二控制信号线为同一信号线。
在本公开的一种示例性实施例中,所述第一控制信号线与所述第二控制信号线为不同的信号线。
在本公开的一种示例性实施例中,所述显示面板还包括:
第二测试区,包括设置在所述显示区与所述第一测试区相对一侧的FPC测试模块。
在本公开的一种示例性实施例中,所述子像素包括像素电极和公共电极;其中,所述像素电极和公共电极不同层设置,且所述像素电极为梳状结构。
在本公开的一种示例性实施例中,所述子像素包括像素电极和公共电极;其中,所述像素电极和公共电极同层设置,且均为梳状结构。
根据本公开的另一个方面,提供一种显示装置,包括上述的显示面板。
在本公开的一种示例性实施例中,所述扫描线连接栅极驱动电路,所述数据线连接源驱动电路;其中,所述栅极驱动电路设置在所述显示面板上。
本公开的其他特性和优点将通过下面的详细描述变得显然,或部分地通过本公开的实践而习得。
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分,示出了符合本公开的实施例,并与说明书一起用于解释本公开的原理。显而易见地,下面描述中的附图仅仅是本公开的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1示意性示出一种现有显示面板的结构示意图;
图2示意性示出本公开示例性实施例中一种显示面板的结构示意图;
图3示意性示出本公开示例性实施例中另一种显示面板的结构示意图。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而,示例实施方式能够以多种形式实施,且不应被理解为限于在此阐述的范例;相反,提供这些实施方式使得本公开将更加全面和完整,并将示例实施方式的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中。在下面的描述中,提供许多具体细节从而给出对本公开的实施方式的充分理解。然而,本领域技术人员将意识到,可以实践本公开的技术方案而省略所述特定细节中的一个或更多,或者可以采用其它的方法、组元、装置、步骤等。在其它情况下,不详细示出或描述公知技术方案以避免喧宾夺主而使得本公开的各方面变得模糊。
此外,附图仅为本公开的示意性图解,并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分,因而将省略对它们的重复描述。附图中所示的一些方框图是功能实体,不一定必须与物理或逻辑上独立的实体相对应。可以采用软件形式来实现这些功能实体,或在一个或多个硬件模块或集成电路中实现这些功能实体,或在不同网络和/或处理器装置和/或微控制器装置中实现这些功能实体。
用语“一个”、“一”、“该”和“所述”用以表示存在一个或多个要素/组成部分/等;用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等;用语“第一”和“第二”等仅作为标记使用,不是对其对象的数量限制。
在显示面板制程中,光刻工艺是必不可少的。例如,参考图1所示,由于在形成薄膜晶体管的源漏金属层的光刻工艺(SD Mask)过程中,掩膜板上会出现生长型PT(凸起),导致在开关元件的固定位置可能出现源漏金属残留(SD Remain)。由于这种生长型PT的发生位置固定,进而源漏金属残留出现的位置也相对固定。
当对出现源漏金属残留的当产品施加ET信号时,DPO侧(显示面板上与DP侧相对的一侧)输入扫描信号,同时数据信号由下向上输入,虽然在开关元件位置出现源漏金属残留,但在检测时不会出现不良,因此在通过ET信号检测时容易发生漏检。在正常画面显示过程中,显示模组信号由上向下时,会出现源漏金属残留的位置的开关元件8处电压为零,显示模组信号被拉低,进而导致此处产生线不良(X-Line)。据统计,线不良的发生率在4%以上。
为解决上述问题,本示例实施方式首先提出了一种显示面板,可以为ADS(ADvanced Super Dimension Switch,高级超维场转换技术)显示面板、IPS(In-Plane Switching,横向电场效应显示技术)显示面板以及FFS(Fringe Field Switching,边 缘场开关技术)显示面板,用于防止开关元件发生源漏金属残留时,产生线不良情况的发生。当然,在本公开的其他示例性实施例中,上述显示面板也可以为其他类型的显示面板,本示例性实施例中对此不做特殊限定。
参考图2中所示,上述显示面板可以包括显示区1、第一测试区2以及辅助开关元件3等部分。其中:
所述显示区1可以包括纵横交错的M条扫描线、N条数据线7以及位于由各所述扫描线以及数据线7限定的子像素区域内的多个子像素。
所述第一测试区2可以包括N个第一开关元件且第n个所述第一开关元件对应第n条数据线7;各所述第一开关元件的第一端与测试信号端子3连接、控制端与第一控制信号线4连接。
N个辅助开关元件3,其中第n个所述辅助开关元件3对应第n个第一开关元件,且第n个所述辅助开关元件的第一端与第n条所述数据线7连接、第二端与第n个所述第一开关元件的第二端连接、控制端与第二控制信号线5连接;其中,M、N均为正整数且n≤N。
本示例实施方式所提供的显示面板中,通过在显示区1与第一测试区2内各第一开关元件之间设置辅助开关元件3,并将各辅助开关元件3与第二控制信号线5连接,即使在第一开关元件发生源漏金属残留,由于辅助开关元件3能够正常的断开,显示区1返回的模组信号仍然能够在辅助开关元件3处终止,不会产生线不良情况的发生,从而降低次品率,减小对模组资材的浪费。
检测时,参见图2或图3,第一控制信号线4与所述第二控制信号线5施加ET电压,ET信号由下向上;在数据线7施加数据信号电压,数据信号由下向上,此时测试正常。当返回模组信号时,模组信号由上向下,即使在第一开关元件发生源漏金属残留,由于辅助开关元件3能够正常的断开,显示区1返回的模组信号仍然能够在辅助开关元件3处终止,从而不会影响画面的显示。当没有辅助开关元件7,存在源漏金属残留的第一开关元件导通,模组信号将被拉低,出现线不良的情况。
下面,将结合图2至图3对本示例实施方式中的显示面板进行更详细的说明。
本示例实施方式中,上述的子像素均包括第二开关元件;其中,所述第二开关元件与所述第一开关元件及辅助开关元3件均可以为薄膜晶体管,且所述薄膜晶体管可以包括层叠设置的栅极层、栅极绝缘层、有源层以及源漏金属层。所述第一开关元件以及辅助开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层与所述第二开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层分别同层设置且材料相同。所述薄膜晶体管可以采用N型TFT或P型TFT,本示例性实施例中对此不做特 殊限定。此外,本领域技术人员容易理解的是,本示例实施方式中对于薄膜晶体管的各层顺序不进行特殊限定,举例而言,所述薄膜晶体管可以为顶栅型,也可以为底栅型,这些均属于本公开的保护范围。
通过将第一开关元件以及辅助开关元件与第二开关元件的各层结构同层设置,各开关元件的同一层结构可以在同一次光刻工艺中形成,可以有效简化工艺步骤,从而降低成本。
此外,本示例实施方式中,上述的显示面板中,所述第一控制信号线4与所述第二控制信号线5可以为不同的信号线。当然,参考图3所示,在本公开的其他示例性实施例中,所述第一控制信号线4与所述第二控制信号线5也可以为同一信号线10。当设置所述第一控制信号线4与所述第二控制信号线5为同一控制信号线10时,可以有利于减少电路布线,便于实现显示装置的窄边框设置。
此外,本示例实施方式中,上述的显示面板还可以包括第二测试区9,所述第二测试区9包括FPC(Flexible Printed Circuit,可挠性印刷电路板)测试模块。参考图2或图3所示,所述第一测试区2可以设置在显示面板的DPO侧,所述第二测试区9设置在所述显示面板的DP侧。
在检验时,测试信号端子6与FPC测试模块连接,由FPC供给灰度电位,由FPC供给灰度电位VG。对R端子供给用以选择R用数据线的信号φR。对G端子供给用以选择G用数据线的信号φG。对B端子供给用以选择B用数据线的信号φB。对控制端子供给控制信号φC。对偶数测试信号端子供给偶数数据信号DE。对奇数测试信号端子供给奇数数据信号DO。
通过设置FPC测试模块,能够接收数据源的信号,从而对显示区进行更深入和准确的测试。并且通过将FPC测试模块和辅助开关元件分别设置在所述显示区的两侧,实现对显示面板结构的合理布局,减小外围布局的占用空间。
本示例实施方式中,上述显示面板子像素还包括:子像素包括像素电极和公共电极;其中,所述像素电极和公共电极为不同层设置,且所述像素电极为梳状结构。在本公开的其他示例性实施例中,上述子像素包括像素电极和公共电极;其中,所述像素电极和公共电极也可以为同层设置,且均为梳状结构。通过设置梳状结构的像素电极,可以借助梳状结构的像素电极的狭缝边缘所产生的电场以及像素电极与公共电极间产生的电场形成多维电场,进而可以使液晶盒内梳状结构的像素电极以及公共电极正上方所有取向液晶分子都能够产生旋转,从而可以提高液晶工作效率并增大了透光效率。
由上述技术方案可知,本公开提供的一种显示面板,其优点和积极效果在于: 通过在显示区与各第一开关元件之间设置辅助开关元件,并将各辅助开关元件与第二控制信号线连接,即使在第一开关元件发生源漏金属残留,由于辅助开关元件能够正常断开,显示区返回的模组信号仍然能够在辅助开关元件处终止,不会产生线不良情况。
根据本公开的一些实施例,还提供了一种显示装置,包括上述的显示面板。所述显示面板上的扫描线连接栅极驱动电路,所述显示面板上的数据线连接源驱动电路。并且,可以将所述栅极驱动电路设置在所述显示面板上。该显示装置由于设置有两组开关元件,即使在第一测试区内的第一开关元件出现源漏金属残留,显示区向下的模组信号仍然可以在该第一开关元件对应的辅助开关元件处终止,从而不会拉低模组信号,保证显示装置的正常显示。
本领域技术人员在考虑说明书及实践这里公开的发明后,将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本公开的真正范围和精神由所附的权利要求指出。

Claims (10)

  1. 一种显示面板,其中,包括:
    显示区,包括纵横交错的M条扫描线、N条数据线以及位于由各所述扫描线以及数据线限定的子像素区域内的多个子像素;
    第一测试区,包括N个第一开关元件且第n个所述第一开关元件对应第n条数据线;各所述第一开关元件的第一端与测试信号端子连接、控制端与第一控制信号线连接;
    N个辅助开关元件,其中,第n个所述辅助开关元件对应第n个第一开关元件,且第n个所述辅助开关元件的第一端与第n条所述数据线连接、第二端与第n个所述第一开关元件的第二端连接、控制端与第二控制信号线连接;
    其中,M、N均为正整数且n≤N。
  2. 根据权利要求1所述的显示面板,其中,各所述子像素均包括第二开关元件;其中,所述第二开关元件与所述第一开关元件及辅助开关元件均为薄膜晶体管,且所述薄膜晶体管包括层叠设置的栅极层、栅极绝缘层、有源层以及源漏金属层。
  3. 根据权利要求2所述的显示面板,其中,所述第一开关元件以及辅助开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层与所述第二开关元件的栅极层、栅极绝缘层、有源层以及源漏金属层分别同层设置且材料相同。
  4. 根据权利要求1所述的显示面板,其中,所述第一控制信号线与所述第二控制信号线为同一信号线。
  5. 根据权利要求1所述的显示面板,其中,所述第一控制信号线与所述第二控制信号线为不同的信号线。
  6. 根据权利要求1所述的显示面板,其中,所述显示面板还包括:
    第二测试区,包括设置在所述显示区与所述第一测试区相对一侧的FPC测试模块。
  7. 根据权利要求1所述的显示面板,其中,所述子像素包括像素电极和公共电极;其中,所述像素电极和公共电极不同层设置,且所述像素电极为梳状结构。
  8. 根据权利要求1所述的显示面板,其中,所述子像素包括像素电极和公共电极;其中,所述像素电极和公共电极同层设置,且均为梳状结构。
  9. 一种显示装置,其中,该显示装置包括权利要求1至8任一项所述的显示面板。
  10. 根据权利要求9所述的显示装置,其中,所述扫描线连接栅极驱动电路,所述数据线连接源驱动电路;其中,所述栅极驱动电路设置在所述显示面板上。
PCT/CN2018/080075 2017-04-19 2018-03-22 显示面板及显示装置 WO2018192335A1 (zh)

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