WO2018189130A3 - Verfahren und vorrichtung zur chemischen bearbeitung eines halbleiter-substrats - Google Patents

Verfahren und vorrichtung zur chemischen bearbeitung eines halbleiter-substrats Download PDF

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Publication number
WO2018189130A3
WO2018189130A3 PCT/EP2018/059069 EP2018059069W WO2018189130A3 WO 2018189130 A3 WO2018189130 A3 WO 2018189130A3 EP 2018059069 W EP2018059069 W EP 2018059069W WO 2018189130 A3 WO2018189130 A3 WO 2018189130A3
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor substrate
chemically treating
treating
chemically
asymmetrically
Prior art date
Application number
PCT/EP2018/059069
Other languages
English (en)
French (fr)
Other versions
WO2018189130A2 (de
Inventor
Ihor Melnyk
Peter Fath
Wolfgang Jooss
Original Assignee
Rct Solutions Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE102017206455.2A external-priority patent/DE102017206455A1/de
Application filed by Rct Solutions Gmbh filed Critical Rct Solutions Gmbh
Publication of WO2018189130A2 publication Critical patent/WO2018189130A2/de
Publication of WO2018189130A3 publication Critical patent/WO2018189130A3/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30608—Anisotropic liquid etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
    • H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67706—Mechanical details, e.g. roller, belt
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/6776—Continuous loading and unloading into and out of a processing chamber, e.g. transporting belts within processing chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers

Abstract

Die Erfindung betrifft eine Vorrichtung und ein Verfahren zur asymmetrischen Bearbeitung von Wafern (2) in einem einzigen Prozessschritt.
PCT/EP2018/059069 2017-04-13 2018-04-10 Verfahren und vorrichtung zur chemischen bearbeitung eines halbleiter-substrats WO2018189130A2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE102017206455.2 2017-04-13
DE102017206455.2A DE102017206455A1 (de) 2017-04-13 2017-04-13 Verfahren und Vorrichtung zur chemischen Bearbeitung eines Halbleiter-Substrats
DE102017215482 2017-09-04
DE102017215482.9 2017-09-04

Publications (2)

Publication Number Publication Date
WO2018189130A2 WO2018189130A2 (de) 2018-10-18
WO2018189130A3 true WO2018189130A3 (de) 2018-12-06

Family

ID=61913182

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2018/059069 WO2018189130A2 (de) 2017-04-13 2018-04-10 Verfahren und vorrichtung zur chemischen bearbeitung eines halbleiter-substrats

Country Status (2)

Country Link
CN (2) CN108735595A (de)
WO (1) WO2018189130A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112877741B (zh) * 2021-01-13 2022-05-03 硅密芯镀(海宁)半导体技术有限公司 气泡去除方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007073887A1 (de) * 2005-12-16 2007-07-05 Gebr. Schmid Gmbh + Co. Vorrichtung und verfahren zur oberflächenbehandlung von substraten
WO2016150788A1 (de) * 2015-03-25 2016-09-29 Rct Solutions Gmbh Vorrichtung und verfahren zur chemischen behandlung eines halbleiter-substrats
DE102015113589A1 (de) * 2015-08-17 2017-02-23 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren und Vorrichtung zum Aufbereiten eines HNO3 enthaltenden flüssigen Prozessmittels

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011056495A1 (de) 2011-12-15 2013-06-20 Rena Gmbh Verfahren zum einseitigen Glattätzen eines Siliziumsubstrats
DE102014110222B4 (de) 2014-07-21 2016-06-23 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren und Vorrichtung zur Strukturierung von Ober- und Unterseite eines Halbleitersubstrats

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007073887A1 (de) * 2005-12-16 2007-07-05 Gebr. Schmid Gmbh + Co. Vorrichtung und verfahren zur oberflächenbehandlung von substraten
WO2016150788A1 (de) * 2015-03-25 2016-09-29 Rct Solutions Gmbh Vorrichtung und verfahren zur chemischen behandlung eines halbleiter-substrats
DE102015113589A1 (de) * 2015-08-17 2017-02-23 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren und Vorrichtung zum Aufbereiten eines HNO3 enthaltenden flüssigen Prozessmittels

Also Published As

Publication number Publication date
WO2018189130A2 (de) 2018-10-18
CN208433367U (zh) 2019-01-25
CN108735595A (zh) 2018-11-02

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