WO2018188133A1 - Goa驱动单元及goa驱动电路 - Google Patents

Goa驱动单元及goa驱动电路 Download PDF

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Publication number
WO2018188133A1
WO2018188133A1 PCT/CN2017/082712 CN2017082712W WO2018188133A1 WO 2018188133 A1 WO2018188133 A1 WO 2018188133A1 CN 2017082712 W CN2017082712 W CN 2017082712W WO 2018188133 A1 WO2018188133 A1 WO 2018188133A1
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Prior art keywords
control signal
thin film
signal
film transistor
switching element
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French (fr)
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马伟欣
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US15/533,836 priority Critical patent/US10380929B2/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0213—Addressing of scan or signal lines controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Definitions

  • the invention belongs to the technical field of display panel driving, and particularly relates to a GOA driving unit and a GOA driving circuit.
  • GOA Gate on array
  • the GAO driving circuit is used to sequentially output line scanning signals to each pixel unit row.
  • a forward scanning manner from the first row to the last row of the pixel unit row may be employed, or a reverse scanning manner from the last row to the first row of the pixel unit row may be employed.
  • a selection signal for controlling the scanning direction is generally transmitted by setting a bidirectional selecting unit.
  • the GOA driver circuit is generally constructed using TFT devices. During the operation of the GOA driver circuit, some of the TFT devices are always on. That is, for the P-type TFT, a low-level signal is continuously applied to the gate thereof, and for the N-type TFT, a high-level signal is continuously applied to the gate thereof.
  • the TFT device When the TFT device is turned on for a long time, it will be subjected to the continuous action of stress. Under the action of the stress, the electron mobility of the TFT device will change, which may cause the turn-on voltage of the TFT device to shift. Causes the TFT device to fail.
  • the bidirectional selection unit in the GOA driving circuit the TFT device constituting the bidirectional selection unit needs to be always turned on during the line scanning process, and the risk of failure of the TFT device is high, which will seriously affect the reliability of the GOA driving circuit.
  • One of the technical problems to be solved by the present invention is to reduce the risk of failure of the TFT device in the GOA driving circuit and improve the reliability of the GOA driving circuit.
  • an embodiment of the present invention first provides a GOA driving unit. It comprises a bidirectional selection unit for transmitting a selection signal for controlling a scanning direction of the GOA driving unit, the bidirectional selection unit being configured to:
  • the bidirectional selection unit comprises a first switching element
  • the signal input end of the first switching element receives the first selection signal
  • the first control terminal receives the first control signal
  • the second control terminal receives the second control signal
  • the signal output end outputs the first selection signal under the action of the first control signal and the second control signal
  • the signal input end of the first switching element receives the second selection signal
  • the first control terminal receives the third control signal
  • the second control terminal receives the fourth control signal
  • the signal output terminal outputs the second selection signal under the action of the third control signal and the fourth control signal.
  • the first switching element includes a first thin film transistor and a second thin film transistor, and a source and a drain of the first thin film transistor are respectively connected to a source and a drain of the second thin film transistor;
  • the gate of the first thin film transistor receives the first control signal or the third control signal, and the gate of the second thin film transistor receives the second control signal or the fourth control signal;
  • the bidirectional selection unit includes a second switching element and a third switching element,
  • the signal input end of the second switching element receives the first selection signal, the first control end thereof receives the first control signal, and the second control end thereof receives the second control signal;
  • the third switching element Receiving, by the signal input end, the second selection signal, the first control end thereof receives the third control signal, and the second control end thereof receives the fourth control signal;
  • the signal output end of the second switching element outputs the first selection signal under the action of the first control signal and the second control signal; the third switching element is in the third control Signal And being in a closed state under the action of the fourth control signal;
  • the signal output end of the third switching element outputs the second selection signal under the action of the third control signal and the fourth control signal; the second switching element is in the first control The signal is turned off by the action of the second control signal.
  • the second switching element includes a first thin film transistor and a second thin film transistor, a source of the first thin film transistor is correspondingly connected to a source of the second thin film transistor; and the third switching element includes a first a thin film transistor and a fourth thin film transistor, wherein a source of the third thin film transistor is connected to a source of the fourth thin film transistor; and drains of the thin film transistors are connected together;
  • a gate of the first thin film transistor receives the first control signal
  • a gate of the second thin film transistor receives the second control signal
  • a gate of the third thin film transistor receives the third control signal
  • the gate of the fourth thin film transistor receives the fourth control signal
  • a drain connected with each thin film transistor as a signal output terminal common to the second switching element and the third switching element.
  • the first control signal, the second control signal, the third control signal and the fourth control signal are both square wave signals.
  • the square wave signal has a frequency in the range of 0.0005 Hz to 30 Hz.
  • the amplitude of the square wave signal has a high voltage of +9V and a low voltage of -7V.
  • each of the thin film transistors is an N-type thin film transistor or a P-type thin film transistor.
  • Embodiments of the present invention also provide a GOA driving circuit that is constructed by cascading the above-described GOA driving units.
  • the TFT devices in the GOA driving circuit are controlled to be turned on and off by using control signals complementary to each other in the working timing, so that the TFT devices can be alternately turned on during the line scanning driving process, so as to shorten the time during which the TFT device is continuously turned on, and effectively improve.
  • the effect of stress on the TFT device thereby reducing the risk of failure of the TFT device and improving the reliability of the GOA driver circuit.
  • FIG. 1 is a schematic structural diagram of a bidirectional selection unit according to an embodiment of the present invention.
  • FIG. 2 is a timing diagram of control signals applied when the bidirectional selection unit of FIG. 1 operates;
  • FIG. 3 is a schematic structural diagram of a bidirectional selecting unit according to another embodiment of the present invention.
  • FIG. 4 is a timing diagram of control signals applied when the bidirectional selection unit of FIG. 3 operates.
  • the embodiment of the present invention firstly proposes a GOA driving unit in which a bidirectional selecting unit is disposed, and a plurality of control signals complementary to each other in time series are applied to the bidirectional selecting unit.
  • Each of the control signals controls the different signal transmission paths within the bidirectional selection unit to be turned on in mutually complementary timings, that is, the bidirectional selection unit can behave in a continuously on state.
  • the selection signal is transmitted by using multiple paths in the bidirectional selection unit to switch the selection signal, the actual on-time of each path is smaller than the continuous on-time of the bidirectional selection unit, thereby facilitating the reduction of stress to the TFT device. Impact.
  • the first control signal is matched with the second control signal to control the first selection signal required for the bidirectional selection unit to transmit the forward scan.
  • the first control signal corresponds to the first timing
  • the second control signal corresponds to the second timing
  • the first control signal and the second control signal respectively act on the bidirectional selection unit in the first timing and the second timing, so that the bidirectional selection unit is
  • the first timing and the second timing are always in an on state, and output a first selection signal, wherein the first timing and the second timing are complementary to each other.
  • the second control signal is matched with the fourth control signal to control the second selection signal required for the bidirectional selection unit to transmit the reverse scan.
  • the third control signal corresponds to the third timing
  • the fourth control signal corresponds to the fourth timing
  • the third control signal and the fourth control signal respectively act on the bidirectional selection unit in the third timing and the fourth timing, so that the bidirectional selection unit is Always in the third and fourth timings, and lose A second selection signal is output, wherein the third timing and the fourth timing are complementary to each other.
  • the first timing and the second timing complementary to each other, and the third timing and the fourth timing complementary to each other, are waveforms alternately changing from high to low level from the waveform of the timing signal corresponding thereto.
  • the timing diagram of the timing signal is expressed as: at the same time, the first control signal corresponding to the first timing is a high level or a low level, and the second control signal corresponding to the second timing is a low level or a high level; At the same time, the third control signal corresponding to the third timing is a high level or a low level, and the fourth control signal corresponding to the fourth timing is a low level or a high level.
  • FIG. 1 is a schematic structural diagram of a bidirectional selecting unit in a GOA driving unit according to an embodiment of the present invention.
  • the bidirectional selection unit is constituted by a first switching element K1 having a first control terminal C1, a second control terminal C2, a signal input terminal IN and a signal output terminal OUT.
  • the first switch K1 is composed of two TFT devices connected in parallel. As shown in FIG. 1, the first thin film transistor T1 and the second thin film transistor T2 respectively constitute two parallel transmission channels.
  • the source s1 of T1 is connected to the source s2 of T2 as the signal input terminal IN of the first switching element K1.
  • the drain d1 of T1 is connected to the drain d2 of T2 as the signal output terminal OUT of the first switching element K1.
  • the gate g1 of T1 serves as the first control terminal C1 of the first switching element K1
  • the gate g2 of T2 serves as the second control terminal C2 of the first switching element K1.
  • the first switching element K1 transmits the selection signal
  • the first control signal or the third control signal is received by the gate g1 of T1
  • the second control signal or the fourth control signal is received by the gate g2 of T2
  • the first control signal The second control signal is complementary to each other in timing
  • the third control signal and the fourth control signal are mutually complementary in time series.
  • FIG. 2 is a timing chart of a control signal applied when the bidirectional selection unit operates, that is, a waveform diagram of a control signal input by the first control terminal C1 and the second control terminal C2 of the first switching element K1.
  • the control signal received by C1 is the first control signal CK1
  • the control signal received by C2 is the second control signal CK2
  • the first selection signal INF the first selection
  • the signal INF controls the forward scanning of the GOA driving circuit and is connected to the signal input terminal IN.
  • the waveforms of CK1 and CK2 are square waves complementary to each other in time series.
  • T1 When CK1 is high and CK2 is low, T1 is on, first selection signal INF The path formed by T1 is transmitted to the signal output terminal OUT. At this time, T2 is in the closed state. When CK1 is low and CK2 is high, T2 is on, and the first selection signal INF is transmitted to the signal output terminal OUT via the path formed by T2. At this time, T1 is in the closed state. It can be seen that under the action of CK1 and CK2, the two thin film transistors constituting the first switching element K1 can be alternately opened, and the first switching element K1 as a whole is in a state of maintaining continuous conduction to realize the first selection signal INF. Continuous output.
  • control signal received by C1 is the third control signal CK3
  • control signal received by C2 is the fourth control signal CK4, the second selection signal INB, and the second selection signal INB.
  • the waveforms of CK3 and CK4 are square waves complementary to each other in time series.
  • T1 When CK3 is high and CK4 is low, T1 is on, and the second selection signal INB is transmitted to the signal output terminal OUT via the path formed by T1. At this time, T2 is in the closed state. When CK3 is low and CK4 is high, T2 is turned on, and the second selection signal INB is transmitted to the signal output terminal OUT via the path formed by T2. At this time, T1 is in the closed state. It can be seen that under the action of CK3 and CK4, the two thin film transistors constituting the first switching element K1 can be alternately turned on, and the first switching element K1 as a whole is in a state of maintaining continuous conduction to realize the second selection signal INB. Continuous output.
  • T1 and T2 are turned on during the high level of the square wave signals CK1, CK2, CK3, and CK4, respectively.
  • the pulse width time of the square wave should generally be made. Not shorter than 1/60 second, that is, the frequency of the square wave signal is up to 30 Hz.
  • the continuous conduction time of T1 and T2 should not exceed 1000 seconds, that is, the frequency of the square wave signal should be greater than or equal to 0.0005 Hz.
  • the bidirectional selection unit in this embodiment implements a selection output function for the INF signal and the INB signal. Moreover, in the process implementation, the channel width-to-length ratio of the TFT device can be further adjusted, so that the conductance of each TFT device can meet the design requirements.
  • the gates of the first thin film transistor T1 and the second thin film transistor T2 are controlled by high and low levels, and the actual turn-on times of T1 and T2 are smaller than those of the first switching element K1.
  • the turn-on time can weaken the effect of the Stress function on the thin film transistor and reduce the risk of failure of the TFT device.
  • FIG. 3 is a schematic structural diagram of a bidirectional selecting unit in a GOA driving unit according to another embodiment of the present invention.
  • the bidirectional selection unit is composed of a second switching element K2 and a third switching element K3.
  • the second switching element K2 has a first control terminal C2.1, a second control terminal C2.2, a signal input terminal IN2 and a signal output terminal OUT2.
  • the third switching component K3 has a first control terminal C3. .1, a second control terminal C3.2, a signal input terminal IN3 and a signal output terminal OUT3.
  • the second switching element K2 and the third switching element K3 are respectively constituted by two TFT devices in parallel.
  • the second switching element K2 includes a first thin film transistor T1 and a second thin film transistor T2, and T1 and T2 respectively constitute two parallel transmission channels.
  • the source s1 of T1 is connected to the source s2 of T2, and serves as the signal input terminal IN2 of the second switching element K2, and is connected to the first selection signal INF (forward scanning signal).
  • the drain d1 of T1 is connected to the drain d2 of T2 as the signal output terminal OUT2 of the second switching element K2.
  • the third switching element K3 includes a third thin film transistor T3 and a fourth thin film transistor T4, and T3 and T4 respectively constitute two parallel transmission channels.
  • the source s3 of T3 is connected to the source s4 of T4, and serves as the signal input terminal IN3 of the third switching element K3, and is connected to the second selection signal INB (reverse scan signal).
  • the drain d3 of T3 is connected to the drain d4 of T4 as the signal output terminal OUT3 of the third switching element K3.
  • OUT2 is connected to OUT3.
  • the gate g1 of T1 serves as the first control terminal C2.1 of the second switching element K2 and is connected to the first control signal CK1.
  • the gate g2 of T2 serves as the second control terminal C2.2 of the second switching element K2 and is connected to the second control signal CK2.
  • the gate g3 of T3 serves as the first control terminal C3.1 of the third switching element K3 and is connected to the third control signal CK3.
  • the gate g4 of T4 serves as the second control terminal C3.2 of the third switching element K3 and is connected to the fourth control signal CK4.
  • FIG. 4 shows the timing of each control signal when the bidirectional selection unit operates.
  • the waveforms of CK1 and CK2 are square waves complementary to each other in time series.
  • the first selection signal INF is transmitted to the signal output terminal OUT2 (OUT3) via the path formed by T1.
  • CK1 is low
  • CK2 is high
  • T2 is on
  • T1 is off
  • the first selection signal INF is transmitted to the signal output terminal OUT2 (OUT3) via the path formed by T2.
  • CK3 and CK4 are always maintained at a low level, that is, both T3 and T4 are in a closed state, and the transmission path of the second selection signal INB is blocked.
  • the waveforms of CK3 and CK4 are square waves complementary to each other in time series.
  • the second selection signal INB is transmitted to the signal output terminal OUT3 (OUT2) via the path formed by T3.
  • CK3 is low, CK4 is high, T4 is on, and T3 is off.
  • the second selection signal INB is transmitted to the signal output terminal OUT3 (OUT2) via the path formed by T4.
  • CK1 and CK2 are always maintained at a low level, that is, both T1 and T2 are in a closed state, and the transmission path of the first selection signal INF is blocked.
  • the bidirectional selection unit of this embodiment implements a selection output function for the INF signal and the INB signal. It can be seen from the above working process that under the action of the control signals CK1-CK4, the thin film transistors constituting the bidirectional selecting unit are alternately turned on, and the bidirectional selecting unit as a whole is in a state of maintaining continuous conduction, and the actual opening of each thin film transistor is performed. The time is significantly lower than the turn-on time of the bidirectional selection unit, so that the influence of the Stress function on the thin film transistor can be weakened, and the risk of failure of the TFT device can be reduced.
  • the pulse width time of the square wave should be generally not shorter than 1/60 second, that is, the frequency of the square wave signal is the highest. It is 30Hz.
  • the continuous conduction time of each TFT device should not exceed 1000 seconds, that is, the frequency of the square wave signal should be greater than or equal to 0.0005 Hz.
  • the amplitude voltage of the square wave signal can be determined according to the actual situation of the display panel.
  • the high voltage of the amplitude of the square wave signal is +9V, and the low voltage is -7V, which ensures reliable opening and closing of each TFT device.
  • the GOA driving circuit can be constructed by cascading the GOA driving units having the above-described bidirectional selecting unit.
  • the GOA driving circuit has a bidirectional scanning function, and the risk of device failure due to the Stress function of the TFT device of the bidirectional selecting unit is significantly reduced, and the reliability of the GOA driving circuit is improved.

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Abstract

一种GOA驱动单元及GOA驱动电路，GOA驱动单元包括双向选择单元，双向选择单元在时序相互互补的第一控制信号（CK1）与第二控制信号（CK2）作用下开启，并输出第一选择信号（INF）；双向选择单元在时序相互互补的第三控制信号（CK3）与第四控制信号（CK4）作用下开启，并输出第二选择信号（INB）。GOA驱动单元能够降低Stress作用的影响，提高GOA驱动电路的可靠性。

Description

GOA驱动单元及GOA驱动电路
相关申请的交叉引用
本申请要求享有2017年04月11日提交的名称为“GOA驱动单元及GOA驱动电路”的中国专利申请CN201710227247.0的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本发明属于显示面板驱动技术领域，特别涉及一种GOA驱动单元及GOA驱动电路。
背景技术
目前，GOA(Gate on array)驱动技术已经广泛应用于显示面板的驱动中，GAO驱动电路用于依次向各像素单元行输出行扫描信号。在对显示面板进行驱动时，可以采用从像素单元行的第一行至最末一行的正向扫描方式，也可以采用从像素单元行的最末一行至第一行的反向扫描方式。在GOA驱动电路中，一般通过设置双向选择单元来传输控制扫描方向的选择信号。
GOA驱动电路一般采用TFT器件构成。在GOA驱动电路的工作过程中，一部分TFT器件会始终处于开启的状态中。即，对于P型TFT，对其栅极持续施加低电平信号，对于N型TFT，对其栅极持续施加高电平信号。而当TFT器件长时间处于开启状态时，其将受到应力(Stress)的持续作用，在该应力的作用下，TFT器件的电子迁移率将发生变化，进而导致TFT器件的开启电压发生偏移，造成TFT器件失效。例如GOA驱动电路中的双向选择单元，构成该双向选择单元的TFT器件需要在行扫描过程中始终保持开启的状态，其TFT器件失效的风险较高，将严重影响GOA驱动电路的可靠性。
发明内容
本发明所要解决的技术问题之一是降低GOA驱动电路中的TFT器件的失效风险，提高GOA驱动电路的可靠性。
为了解决上述技术问题，本发明的实施例首先提供了一种GOA驱动单元， 其包括双向选择单元，所述双向选择单元用于传输控制所述GOA驱动单元的扫描方向的选择信号，所述双向选择单元被配置为：
接收第一控制信号与第二控制信号，所述第一控制信号与所述第二控制信号分别在第一时序和第二时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元正向扫描的第一选择信号；其中，所述第一时序和所述第二时序相互互补；
接收第三控制信号与第四控制信号，所述第三控制信号与所述第四控制信号分别在第三时序和第四时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元反向扫描的第二选择信号；其中，所述第三时序和所述第四时序相互互补。
优选地，所述双向选择单元包括第一开关元件，
正向扫描时，所述第一开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号，其信号输出端在所述第一控制信号与第二控制信号的作用下输出所述第一选择信号；
反向扫描时，所述第一开关元件的信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号，其信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号。
优选地，所述第一开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极和漏极分别与所述第二薄膜晶体管的源极和漏极对应连接；
所述第一薄膜晶体管的栅极接收所述第一控制信号或所述第三控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号或所述第四控制信号；
以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为第一开关元件的信号输入端，以所述第一薄膜晶体管与所述第二薄膜晶体管的漏极作为第一开关元件的信号输出端。
优选地，所述双向选择单元包括第二开关元件与第三开关元件，
所述第二开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号；所述第三开关元件的信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号；
正向扫描时，所述第二开关元件的信号输出端在所述第一控制信号与第二控制信号的作用下输出所述第一选择信号；所述第三开关元件在所述第三控制信号 与第四控制信号的作用下处于关闭状态；
反向扫描时，所述第三开关元件的信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号；所述第二开关元件在所述第一控制信号与第二控制信号的作用下处于关闭状态。
优选地，所述第二开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极与所述第二薄膜晶体管的源极对应连接；所述第三开关元件包括第三薄膜晶体管与第四薄膜晶体管，所述第三薄膜晶体管的源极与所述第四薄膜晶体管的源极对应连接；各薄膜晶体管的漏极连接在一起；
所述第一薄膜晶体管的栅极接收所述第一控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号，所述第三薄膜晶体管的栅极接收所述第三控制信号，所述第四薄膜晶体管的栅极接收所述第四控制信号；
以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为所述第二开关元件的信号输入端，以所述第三薄膜晶体管与所述第四薄膜晶体管的源极作为所述第三开关元件的信号输入端，以各薄膜晶体管连接在一起的漏极作为所述第二开关元件与所述第三开关元件公共的信号输出端。
优选地，所述第一控制信号，所述第二控制信号，所述第三控制信号与所述第四控制信号均为方波信号。
优选地，所述方波信号的频率范围为0.0005Hz-30Hz。
优选地，所述方波信号的幅值的高电压为+9V，低电压为-7V。
优选地，各薄膜晶体管为N型薄膜晶体管或P型薄膜晶体管。
本发明的实施例还提供了一种GOA驱动电路，所述GOA驱动电路由上述GOA驱动单元级联构成。
通过采用工作时序相互互补的控制信号控制GOA驱动电路中TFT器件的开启与关闭，使得在行扫描驱动过程中，各TFT器件能够交替导通，以缩短TFT器件处于持续开启状态的时间，有效改善应力作用对TFT器件的影响，进而降低TFT器件发生失效的风险，提高了GOA驱动电路的可靠性。
本发明的其他优点、目标，和特征在某种程度上将在随后的说明书中进行阐述，并且在某种程度上，基于对下文的考察研究对本领域技术人员而言将是显而易见的，或者可以从本发明的实践中得到教导。本发明的目标和其他优点可以通过下面的说明书，权利要求书，以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本申请的技术方案或现有技术的进一步理解，并且构成说明书的一部分。其中，表达本申请实施例的附图与本申请的实施例一起用于解释本申请的技术方案，但并不构成对本申请技术方案的限制。
图1是根据本发明一实施例的双向选择单元的结构示意图；
图2是图1所示双向选择单元工作时所施加的控制信号的时序图；
图3是根据本发明另一实施例的双向选择单元的结构示意图；
图4是图3所示双向选择单元工作时所施加的控制信号的时序图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成相应技术效果的实现过程能充分理解并据以实施。本申请实施例以及实施例中的各个特征，在不相冲突前提下可以相互结合，所形成的技术方案均在本发明的保护范围之内。
为了降低应力Stress对TFT器件的影响，本发明实施例首先提出一种GOA驱动单元，在该GOA驱动单元中设置有双向选择单元，采用在时序上相互互补的多个控制信号作用于双向选择单元，各控制信号分别在相互互补的时序中控制双向选择单元内部不同的信号传输通路导通，即，使双向选择单元可以表现为处于持续开启的状态中。但由于在双向选择单元的内部是采用多个通路分时导通来传输选择信号的，每个通路的实际导通时间均小于双向选择单元的持续开启时间，因此有利于降低应力Stress对TFT器件的影响。
具体的，利用第一控制信号与第二控制信号相互配合，控制双向选择单元传输正向扫描时所需的第一选择信号。第一控制信号对应于第一时序，第二控制信号对应于第二时序，第一控制信号与第二控制信号分别在第一时序和第二时序中作用于双向选择单元，使双向选择单元在第一时序和第二时序中始终处于开启状态，并输出第一选择信号，其中，第一时序和第二时序相互互补。
利用第三控制信号与第四控制信号相互配合，控制双向选择单元传输反向扫描时所需的第二选择信号。第三控制信号对应于第三时序，第四控制信号对应于第四时序，第三控制信号与第四控制信号分别在第三时序和第四时序中作用于双向选择单元，使双向选择单元在第三时序和第四时序中始终处于开启状态，并输 出第二选择信号，其中，第三时序和第四时序相互互补。
相互互补的第一时序和第二时序，以及相互互补的第三时序和第四时序，从与其对应的时序信号的波形上来看，均为高低电平交替变化的波形。在时序信号的时序图表现为，同一时刻，对应于第一时序的第一控制信号为高电平或低电平，对应于第二时序的第二控制信号为低电平或高电平；同一时刻，对应于第三时序的第三控制信号为高电平或低电平，对应于第四时序的第四控制信号为低电平或高电平。
下面以两个具体的实施例对本发明作进一步说明。
第一实施例：
图1为本发明一具体实施例GOA驱动单元中双向选择单元的结构示意图。如图1所示，双向选择单元由第一开关元件K1构成，该第一开关元件K1具有一个第一控制端C1，一个第二控制端C2，一个信号输入端IN以及一个信号输出端OUT。
进一步地，第一开关K1由两个TFT器件并联构成。如图1所示，第一薄膜晶体管T1与第二薄膜晶体管T2分别构成两条并联的传输通道。其中，T1的源极s1与T2的源极s2相连接，作为第一开关元件K1的信号输入端IN。T1的漏极d1与T2的漏极d2相连接，作为第一开关元件K1的信号输出端OUT。T1的栅极g1作为第一开关元件K1的第一控制端C1，T2的栅极g2作为第一开关元件K1的第二控制端C2。
在第一开关元件K1传输选择信号时，利用T1的栅极g1接收第一控制信号或第三控制信号，利用T2的栅极g2接收第二控制信号或第四控制信号，且第一控制信号与第二控制信号在时序上相互互补，第三控制信号与第四控制信号在时序上相互互补。
图2为双向选择单元工作时所施加的控制信号的时序图，即由第一开关元件K1的第一控制端C1与第二控制端C2所输入的控制信号的波形图。
具体的，如图2所示，正向扫描时，C1所接收的控制信号为第一控制信号CK1，C2所接收的控制信号为第二控制信号CK2，第一选择信号INF，该第一选择信号INF控制GOA驱动电路的正向扫描，接入信号输入端IN。其中，CK1与CK2的波形为时序上相互互补的方波。
当CK1为高电平，CK2为低电平时，T1处于开启状态，第一选择信号INF 经由T1所构成的通路传输至信号输出端OUT。此时T2处于关闭的状态。当CK1为低电平，CK2为高电平时，T2处于开启状态，第一选择信号INF经由T2所构成的通路传输至信号输出端OUT。此时T1处于关闭的状态。可以看出，在CK1与CK2的作用下，构成第一开关元件K1的两个薄膜晶体管可以交替打开，第一开关元件K1整体表现为保持持续导通的状态，以实现第一选择信号INF的持续输出。
进一步如图2所示，反向扫描时，C1所接收的控制信号为第三控制信号CK3，C2所接收的控制信号为第四控制信号CK4，第二选择信号INB，该第二选择信号INB控制GOA驱动电路的反向扫描，接入信号输入端IN。其中，CK3与CK4的波形为时序上相互互补的方波。
当CK3为高电平，CK4为低电平时，T1处于开启状态，第二选择信号INB经由T1所构成的通路传输至信号输出端OUT。此时T2处于关闭的状态。当CK3为低电平，CK4为高电平时，T2处于开启状态，第二选择信号INB经由T2所构成的通路传输至信号输出端OUT。此时T1处于关闭的状态。可以看出，在CK3与CK4的作用下，构成第一开关元件K1的两个薄膜晶体管可以交替打开，第一开关元件K1整体表现为保持持续导通的状态，以实现第二选择信号INB的持续输出。
另外，由图2所示，T1和T2分别在方波信号CK1、CK2、CK3以及CK4的高电平期间导通，为保证T1和T2能够可靠地开启，一般应使方波的脉宽时间不短于1/60秒，即方波信号的频率最高为30Hz。同时，为降低Stress作用对TFT器件的特性所产生的影响，应使T1和T2的持续导通时间不超过1000秒，即方波信号的频率应大于或等于0.0005Hz。
本实施例中的双向选择单元实现了对INF信号与INB信号的选择输出功能。并且在工艺实施上，可以进一步对TFT器件的沟道宽长比进行调整，使得每个TFT器件的电导均能达到设计要求。
在本实施例中，第一薄膜晶体管T1与第二薄膜晶体管T2的栅极所承载的是高、低电平交替变化的控制信号，T1与T2的实际开启时间均小于第一开关元件K1的开启时间，因而可以弱化Stress作用对薄膜晶体管的影响，降低TFT器件发生失效的风险。
第二实施例：
图3为本发明另一具体实施例GOA驱动单元中双向选择单元的结构示意图。如图3所示，双向选择单元由第二开关元件K2与第三开关元件K3构成。该第二开关元件K2具有一个第一控制端C2.1，一个第二控制端C2.2，一个信号输入端IN2以及一个信号输出端OUT2，该第三开关元件K3具有一个第一控制端C3.1，一个第二控制端C3.2，一个信号输入端IN3以及一个信号输出端OUT3。
进一步地，第二开关元件K2与第三开关元件K3分别由两个TFT器件并联构成。如图3所示，第二开关元件K2包括第一薄膜晶体管T1与第二薄膜晶体管T2，T1与T2分别构成两条并联的传输通道。其中，T1的源极s1与T2的源极s2相连接，作为第二开关元件K2的信号输入端IN2，并连接第一选择信号INF(正向扫描信号)。T1的漏极d1与T2的漏极d2相连接，作为第二开关元件K2的信号输出端OUT2。第三开关元件K3包括第三薄膜晶体管T3与第四薄膜晶体管T4，T3与T4分别构成两条并联的传输通道。其中，T3的源极s3与T4的源极s4相连接，作为第三开关元件K3的信号输入端IN3，并连接第二选择信号INB(反向扫描信号)。T3的漏极d3与T4的漏极d4相连接，作为第三开关元件K3的信号输出端OUT3。且OUT2与OUT3连接在一起。
进一步地，T1的栅极g1作为第二开关元件K2的第一控制端C2.1，并与第一控制信号CK1相连接。T2的栅极g2作为第二开关元件K2的第二控制端C2.2，并与第二控制信号CK2相连接。T3的栅极g3作为第三开关元件K3的第一控制端C3.1，并与第三控制信号CK3相连接。T4的栅极g4作为第三开关元件K3的第二控制端C3.2，并与第四控制信号CK4相连接。
图4示出了双向选择单元工作时各控制信号的时序，如图4所示，正向扫描时，CK1和CK2的波形为时序上相互互补的方波。当CK1为高电平时，CK2为低电平，T1处于开启状态，而T2处于关闭状态。第一选择信号INF经由T1所构成的通路传输至信号输出端OUT2(OUT3)。当CK1为低电平时，CK2为高电平，T2处于开启状态，而T1处于关闭状态。第一选择信号INF经由T2所构成的通路传输至信号输出端OUT2(OUT3)。而在正向扫描过程中，CK3与CK4始终维持为低电平，即T3和T4均处于关闭状态，第二选择信号INB的传输路径被阻塞。
进一步如图4所示，反向扫描时，CK3和CK4的波形为时序上相互互补的方波。当CK3为高电平时，CK4为低电平，T3处于开启状态，而T4处于关闭状态。第二选择信号INB经由T3所构成的通路传输至信号输出端OUT3(OUT2)。 当CK3为低电平时，CK4为高电平，T4处于开启状态，而T3处于关闭状态。第二选择信号INB经由T4所构成的通路传输至信号输出端OUT3(OUT2)。而在反向扫描过程中，CK1与CK2始终维持为低电平，即T1和T2均处于关闭状态，第一选择信号INF的传输路径被阻塞。
本实施例的双向选择单元实现了对INF信号与INB信号的选择输出功能。且从上述工作过程可以看出，在控制信号CK1-CK4的作用下，构成双向选择单元的各薄膜晶体管交替打开，双向选择单元整体表现为保持持续导通的状态，而各薄膜晶体管的实际开启时间相比于双向选择单元的开启时间显著降低，因而可以弱化Stress作用对薄膜晶体管的影响，降低TFT器件发生失效的风险。
同样的，在本实施例中，根据TFT的器件特性，为保证各TFT器件均能够可靠地开启，一般应使方波的脉宽时间不短于1/60秒，即方波信号的频率最高为30Hz。同时，为降低Stress作用对各TFT器件的特性所产生的影响，应使各TFT器件的持续导通时间不超过1000秒，即方波信号的频率应大于或等于0.0005Hz。
进一步的，在前述各实施例中，方波信号的幅值电压可以根据显示面板的实际情况进行确定。例如在本发明的一个实施例中，使方波信号的幅值的高电压为+9V，低电压为-7V，可以保证各TFT器件的可靠开启与关闭。
容易理解的是，将前述各实施例中的N型TFT器件全部或部分替换为P型TFT器件，并对应变换控制信号的波形，也可以用于实现本发明。
将具有上述双向选择单元的GOA驱动单元进行级联，就可构成GOA驱动电路。该GOA驱动电路具有双向扫描功能，且其中双向选择单元的TFT器件由于Stress作用而出现器件失效的风险将显著降低，GOA驱动电路的可靠性得以提高。具体的实施方案可参见前述实施例的相关内容获取，此处不再赘述。
虽然本发明所揭露的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (18)

  1. 一种GOA驱动单元，包括双向选择单元，所述双向选择单元用于传输控制所述GOA驱动单元的扫描方向的选择信号，所述双向选择单元被配置为：
    接收第一控制信号与第二控制信号，所述第一控制信号与所述第二控制信号分别在第一时序和第二时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元正向扫描的第一选择信号；其中，所述第一时序和所述第二时序相互互补；
    接收第三控制信号与第四控制信号，所述第三控制信号与所述第四控制信号分别在第三时序和第四时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元反向扫描的第二选择信号；其中，所述第三时序和所述第四时序相互互补。
  2. 根据权利要求1所述的GOA驱动单元，其中，所述双向选择单元包括第一开关元件，
    正向扫描时，所述第一开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号，其信号输出端在所述第一控制信号与第二控制信号的作用下输出所述第一选择信号；
    反向扫描时，所述第一开关元件的信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号，其信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号。
  3. 根据权利要求2所述的GOA驱动单元，其中，
    所述第一开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极和漏极分别与所述第二薄膜晶体管的源极和漏极对应连接；
    所述第一薄膜晶体管的栅极接收所述第一控制信号或所述第三控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号或所述第四控制信号；
    以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为第一开关元件的信号输入端，以所述第一薄膜晶体管与所述第二薄膜晶体管的漏极作为第一开关元件的信号输出端。
  4. 根据权利要求1所述的GOA驱动单元，其中，所述双向选择单元包括第二开关元件与第三开关元件，
    所述第二开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号；所述第三开关元件的 信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号；
    正向扫描时，所述第二开关元件的信号输出端在所述第一控制信号与第二控制信号的作用下输出所述第一选择信号；所述第三开关元件在所述第三控制信号与第四控制信号的作用下处于关闭状态；
    反向扫描时，所述第三开关元件的信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号；所述第二开关元件在所述第一控制信号与第二控制信号的作用下处于关闭状态。
  5. 根据权利要求4所述的GOA驱动单元，其中，
    所述第二开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极与所述第二薄膜晶体管的源极对应连接；所述第三开关元件包括第三薄膜晶体管与第四薄膜晶体管，所述第三薄膜晶体管的源极与所述第四薄膜晶体管的源极对应连接；各薄膜晶体管的漏极连接在一起；
    所述第一薄膜晶体管的栅极接收所述第一控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号，所述第三薄膜晶体管的栅极接收所述第三控制信号，所述第四薄膜晶体管的栅极接收所述第四控制信号；
    以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为所述第二开关元件的信号输入端，以所述第三薄膜晶体管与所述第四薄膜晶体管的源极作为所述第三开关元件的信号输入端，以各薄膜晶体管连接在一起的漏极作为所述第二开关元件与所述第三开关元件公共的信号输出端。
  6. 根据权利要求5所述的GOA驱动单元，其中，所述第一控制信号，所述第二控制信号，所述第三控制信号与所述第四控制信号均为方波信号。
  7. 根据权利要求6所述的GOA驱动单元，其中，所述方波信号的频率范围为0.0005Hz-30Hz。
  8. 根据权利要求7所述的GOA驱动单元，其中，所述方波信号的幅值的高电压为+9V，低电压为-7V。
  9. 根据权利要求5所述的GOA驱动单元，其中，各薄膜晶体管为N型薄膜晶体管或P型薄膜晶体管。
  10. 一种GOA驱动电路，所述GOA驱动电路由GOA驱动单元级联构成；
    所述GOA驱动单元，包括双向选择单元，所述双向选择单元用于传输控制所述GOA驱动单元的扫描方向的选择信号，所述双向选择单元被配置为：
    接收第一控制信号与第二控制信号，所述第一控制信号与所述第二控制信号分别在第一时序和第二时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元正向扫描的第一选择信号；其中，所述第一时序和所述第二时序相互互补；
    接收第三控制信号与第四控制信号，所述第三控制信号与所述第四控制信号分别在第三时序和第四时序中使所述双向选择单元处于开启状态，并输出用于控制所述GOA驱动单元反向扫描的第二选择信号；其中，所述第三时序和所述第四时序相互互补。
  11. 根据权利要求10所述的GOA驱动电路，其中，所述双向选择单元包括第一开关元件，
    正向扫描时，所述第一开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号，其信号输出端在所述第一控制信号与第二控制信号的作用下输出所述第一选择信号；
    反向扫描时，所述第一开关元件的信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号，其信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号。
  12. 根据权利要求11所述的GOA驱动电路，其中，
    所述第一开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极和漏极分别与所述第二薄膜晶体管的源极和漏极对应连接；
    所述第一薄膜晶体管的栅极接收所述第一控制信号或所述第三控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号或所述第四控制信号；
    以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为第一开关元件的信号输入端，以所述第一薄膜晶体管与所述第二薄膜晶体管的漏极作为第一开关元件的信号输出端。
  13. 根据权利要求10所述的GOA驱动电路，其中，所述双向选择单元包括第二开关元件与第三开关元件，
    所述第二开关元件的信号输入端接收所述第一选择信号，其第一控制端接收所述第一控制信号，其第二控制端接收所述第二控制信号；所述第三开关元件的信号输入端接收所述第二选择信号，其第一控制端接收所述第三控制信号，其第二控制端接收所述第四控制信号；
    正向扫描时，所述第二开关元件的信号输出端在所述第一控制信号与第二控 制信号的作用下输出所述第一选择信号；所述第三开关元件在所述第三控制信号与第四控制信号的作用下处于关闭状态；
    反向扫描时，所述第三开关元件的信号输出端在所述第三控制信号与第四控制信号的作用下输出所述第二选择信号；所述第二开关元件在所述第一控制信号与第二控制信号的作用下处于关闭状态。
  14. 根据权利要求13所述的GOA驱动电路，其中，
    所述第二开关元件包括第一薄膜晶体管与第二薄膜晶体管，所述第一薄膜晶体管的源极与所述第二薄膜晶体管的源极对应连接；所述第三开关元件包括第三薄膜晶体管与第四薄膜晶体管，所述第三薄膜晶体管的源极与所述第四薄膜晶体管的源极对应连接；各薄膜晶体管的漏极连接在一起；
    所述第一薄膜晶体管的栅极接收所述第一控制信号，所述第二薄膜晶体管的栅极接收所述第二控制信号，所述第三薄膜晶体管的栅极接收所述第三控制信号，所述第四薄膜晶体管的栅极接收所述第四控制信号；
    以所述第一薄膜晶体管与所述第二薄膜晶体管的源极作为所述第二开关元件的信号输入端，以所述第三薄膜晶体管与所述第四薄膜晶体管的源极作为所述第三开关元件的信号输入端，以各薄膜晶体管连接在一起的漏极作为所述第二开关元件与所述第三开关元件公共的信号输出端。
  15. 根据权利要求14所述的GOA驱动电路，其中，所述第一控制信号，所述第二控制信号，所述第三控制信号与所述第四控制信号均为方波信号。
  16. 根据权利要求15所述的GOA驱动电路，其中，所述方波信号的频率范围为0.0005Hz-30Hz。
  17. 根据权利要求16所述的GOA驱动电路，其中，所述方波信号的幅值的高电压为+9V，低电压为-7V。
  18. 根据权利要求14所述的GOA驱动电路，其中，各薄膜晶体管为N型薄膜晶体管或P型薄膜晶体管。
PCT/CN2017/082712 2017-04-11 2017-05-02 Goa驱动单元及goa驱动电路 Ceased WO2018188133A1 (zh)

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