WO2018176795A1 - 触控驱动电路、触控面板及显示装置 - Google Patents

触控驱动电路、触控面板及显示装置 Download PDF

Info

Publication number
WO2018176795A1
WO2018176795A1 PCT/CN2017/105824 CN2017105824W WO2018176795A1 WO 2018176795 A1 WO2018176795 A1 WO 2018176795A1 CN 2017105824 W CN2017105824 W CN 2017105824W WO 2018176795 A1 WO2018176795 A1 WO 2018176795A1
Authority
WO
WIPO (PCT)
Prior art keywords
output
signal
input
gate
nand gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/105824
Other languages
English (en)
French (fr)
Inventor
黄飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Ordos Yuansheng Optoelectronics Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US15/765,415 priority Critical patent/US10509496B2/en
Publication of WO2018176795A1 publication Critical patent/WO2018176795A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96Touch switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2354/00Aspects of interface with display user
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present disclosure relates to a touch driving circuit, a touch panel, and a display device.
  • the human-computer interaction mode has evolved from the original mechanical button mode to the current touch sensing mode; in the human-computer interaction process of the touch sensing mode, the touch driving circuit plays an important role.
  • a touch driving circuit including:
  • An input unit configured to receive an input signal of a forward scan or a reverse scan
  • a shift register unit configured to shift register the input signal to generate an output control signal
  • An enable signal input unit configured to control an output of an output enable signal of the integrated circuit by outputting a control signal
  • the output unit is configured to output a corresponding output signal according to the output enable signal.
  • the input unit includes:
  • a first transmission gate for receiving an input signal for forward scanning
  • a second transmission gate for receiving an input signal of the reverse scan.
  • the input unit is configured to:
  • the input signal is active low.
  • the shift register unit includes a first group of NAND gates and a second group of NAND gates connected end to end.
  • the first set of NAND gates includes a first NAND gate and a second NAND gate
  • the second set of NAND gates includes a third NAND gate and a fourth NAND gate.
  • One input of the first NAND gate is connected to the clock signal, the other input of the first NAND gate is connected to the output of the second NAND gate, and the output of the first NAND gate is connected to the second NAND gate
  • the other input of the second NAND gate is connected to the output of the fourth NAND gate and an input of the third NAND gate.
  • the other input of the third NAND gate receives the input signal output from the input unit, and the output of the third NAND gate is connected to the other input of the fourth NAND gate.
  • the enable signal input unit comprises: a third transmission gate, an N-type metal oxide semiconductor tube, and an inverter.
  • the inverter may control the N-type metal oxide semiconductor tube according to an output control signal outputted by the shift register unit, and an output of the third transfer gate may be turned on when the N-type metal oxide semiconductor tube is turned on Pull down the negative power input pin (VGL) of the LCD.
  • the enable signal input unit is configured to: according to an output control signal output by the shift register unit, control the switch of the third transmission gate after being processed by the inverter, and control the integrated circuit through the switch of the third transmission gate; Output enable signal.
  • the output unit includes: four inverters, a fourth transmission gate, a fifth transmission gate, and an AND gate.
  • the output unit is configured to:
  • the output enable signal and the integrated circuit signal are ANDed by the AND gate; when the output enable signal is high, the output signal is output; when the output enable signal is low, the reference voltage signal of the liquid crystal molecule deflection is output.
  • a touch panel is further provided, including the touch driving circuit described above.
  • a display device including the above touch panel.
  • FIG. 1 is a block diagram showing the structure of a touch driving circuit according to some embodiments of the present disclosure
  • FIG. 2 is a schematic diagram of a touch drive circuit in accordance with some alternative embodiments of the present disclosure
  • FIG. 3 is a schematic diagram of timing information in accordance with some embodiments of the present disclosure.
  • FIG. 1 is a structural block diagram of a touch driving circuit according to an embodiment of the present disclosure. As shown in FIG. 1 , the method includes:
  • An input unit 101 a shift register unit 201, an enable signal input unit 301, and an output unit 401;
  • the input unit 101 is configured to: input an input signal of a forward scan or a reverse scan;
  • the input unit 101 of the embodiment of the present disclosure includes: a first transmission gate 1-1 and a second transmission gate 1-2.
  • composition of the input unit is only an alternative embodiment of the present disclosure, and any circuit configuration that can realize the input of the forward scan input signal and the reverse scan input signal can be applied to the embodiments of the present disclosure.
  • the input unit 101 is configured to:
  • the input signal of the forward scan is transmitted through the first transmission gate 1-1;
  • the reverse scan input signal is transmitted through the second transmission gate 1-2;
  • the input signal is active low.
  • the shift register unit 201 is configured to: perform shift register on the input signal to generate an output control signal;
  • the shift register unit of the embodiment of the present disclosure is composed of two sets of NAND gates that are connected end to end.
  • the first set of NAND gates may include a first NAND gate 2-1 and a second NAND gate 2-2
  • the second set of NAND gates may include The third NAND gate 2-3 and the fourth NAND gate 2-4.
  • the enable signal input unit 301 is configured to: control the output of the output enable signal of the integrated circuit by the level of the output control signal;
  • the embodiment of the present disclosure enables the signal input unit 301 to include: a third transmission gate 3-1, an N-type metal oxide transistor 3-2, and an inverter 3-3, wherein the inverter 3 -3 controlling the on and off of the N-type metal oxide semiconductor tube 3-2 according to an output control signal output from the shift register unit 201, the output of the third transfer gate 3-1 being in the N-type metal oxide semiconductor When tube 3-2 is turned on, it is pulled low to the negative power input pin (VGL) of the LCD.
  • VGL negative power input pin
  • the enable signal input unit 301 is configured to: according to the output control signal output by the shift register unit 201, control the switch of the third transmission gate 3-1 after being processed by the inverter 3-3, and pass the third transmission gate.
  • the switch of 3-1 controls the level of the output enable signal of the integrated circuit.
  • the output unit 401 is configured to output a corresponding output signal according to the level of the output enable signal.
  • the output unit 401 includes: four inverters, a fourth transmission gate 4-1, a fifth transmission gate 4-2, and an AND gate 4-3; wherein, four inverses
  • the phase converter includes a first inverter 4-4-1, a second inverter 4-4-2, a third inverter 4-4-3, and a fourth inverter 4-4-4.
  • the output unit 401 of this disclosure may be configured to:
  • the output enable signal and the integrated circuit signal are ANDed by the gate; when the output enable signal is high, the output signal is output; when the output enable signal is low, the reference voltage (VCOM) signal of the liquid crystal molecule is outputted .
  • the embodiment of the present disclosure completes a part of the work that needs to be completed inside the integrated circuit, and then transfers the output enable signal and the integrated circuit signal to the display screen, thereby reducing the utilization rate of the integrated circuit.
  • the technical solution of the present application includes: an input unit, a shift register unit, an enable signal input unit, and an output unit; wherein the input unit is configured to: input an input signal of forward scan or reverse scan; shift The register unit is configured to: shift register the input signal to generate an output control signal; the enable signal input unit is configured to: control the output of the output enable signal of the integrated circuit by the level of the output control signal; the output unit is configured to : Outputs the corresponding output signal according to the level of the output enable signal.
  • Embodiments of the present disclosure implement a touch drive circuit while reducing the use of an integrated circuit.
  • the input unit includes: a first transmission gate 1-1 and a second transmission gate 1-2.
  • the input signal of the forward scan is transmitted through the port 1 of the first transmission gate 1-1; when the scan is reversed, the input signal of the reverse scan is transmitted through the port 2 of the second transmission gate 1-2;
  • the input signal transmitted by the first transmission gate 1-1 is active at the low level; during the reverse scanning, the input signal transmitted by the second transmission gate 1-2 is active at the low level; in the input unit 101, the port 3.
  • Port 4, port 5, and port 6 transmit DC high and low level signals; specifically, port 3, port 4 input signals are the same, port 5 and port 6 input signals are the same, when forward scanning, port 3 and port 4 is low level, port 5, port 6 are high level; conversely, in reverse scan, port 3 and port 4 are high level, port 5, port 6 are low level.
  • the shift register unit 201 is composed of two sets of NAND gates connected end to end; configured to: shift register the input signal to generate an output control signal; the shift register unit 201 may be configured by the first NAND gate 2-1, The second NAND gate 2-2, the third NAND gate 2-3 and the fourth NAND gate 2-4 are formed; wherein the first input port of the first NAND gate 2-1 is the port 7, receiving the first a clock signal, the second input port of the first NAND gate 2-1 is connected to the output port of the second NAND gate 2-2, and receives the signal output by the second NAND gate 2-2 output port; the second NAND gate The first input port of 2-2 is connected to the output port of the first NAND gate 2-1, receives the signal output by the first NAND gate 2-1, and the second input port of the second NAND gate 2-2 The output port of the NAND gate 2-4 is connected to receive the signal outputted by the fourth NAND gate 2-4; the first input port of the third NAND gate 2-3 is connected to the input unit 101, and the third NAND gate
  • the NAND gate can be seen as a superposition of the AND gate and the NOT gate.
  • the port 7 inputs the first clock signal, and assuming that the first clock signal is TP_CK, the multi-level connection is adopted in the display screen according to the driving circuit, and the second clock signal (TP_CKB) used in the next stage is opposite to the first clock signal.
  • the first clock signal and the second clock signal are used alternately.
  • the touch driving circuit of the present disclosure as the touch driving circuit of the present stage, in the touch driving circuit of the first stage, the shift register unit 201 and the enable signal input unit 301 are cascaded by three inverters, and the shift is performed.
  • the output signal of the register unit 201 performs three inversions to increase the driving capability of the signal (the voltage constant current increases), and the inverted signal of the first two stages is an intermediate output signal (defined as STV_OUT) to the next stage driving circuit.
  • Port 1 of the input unit, the signal inverted by the third stage is input to the enable signal input unit 301.
  • the output of the touch drive circuit of this level is OUT1, the output of the touch drive circuit of the next stage is OUT2, the first clock signal is input to the port 7 of the touch drive circuit of the first stage, and the port 7 of the touch drive circuit of the next stage is input.
  • the two clock signals, the input signals of the other ports are the same, and the subsequent cascades are alternately connected in the above manner.
  • the enable signal input unit 301 includes: a third transfer gate 3-1, an N-type metal oxide transistor 3-2, and an inverter 3-3; the enable signal input unit 301 is configured to: output power through the control signal Flat high and low control integrated power
  • the output enable signal of the path (abbreviated as EXVCOM in the embodiment of the present disclosure); wherein the output enable signal is input by port 8 of the third transmission gate 3-1.
  • the input terminal of the inverter 3-3 is electrically connected to the output signal of the shift register unit 201 after three times of inversion, and the output terminal of the inverter 3-3 is electrically connected to the gate of the N-type metal oxide transistor 3-2. pole.
  • the drain of the N-type metal oxide transistor 3-2 is electrically connected to the output terminal of the third transfer gate 3-1, and the source of the N-type metal oxide transistor 3-2 (ie, the port 12) is electrically connected to the low-level liquid crystal The negative power input pin (VGL) of the display.
  • the inverter controls the N-type metal oxide semiconductor transistor according to an output control signal output from the shift register unit, and when the signal inverted by the inverter 3-3 is at a high level, the N of the enable signal input unit 301 is enabled.
  • the metal oxide transistor (NMOS transistor) 3-2 is turned on, and the output of the enable signal input unit 301 (ie, the output of the third transfer gate 301) is pulled low to the negative power input pin (VGL) of the liquid crystal display. .
  • the output unit 401 samples the selected output signal according to the output enable signal, and the reference voltage (VCOM) signal of the liquid crystal molecule deflection in the embodiment of the present disclosure and the reference voltage (VCOM) of the liquid crystal molecule deflection in the display pixel (Display Pixel) in the related art.
  • the signal is the same.
  • the output enable signal is high, the output signal is output; when the output enable signal is low, the reference voltage (VCOM) signal of the liquid crystal molecule deflection is output.
  • port 9 is the VCOM signal input by the integrated circuit.
  • the timing of the input signal ie, the input signal scanned by the input unit in FIG. 3
  • the timing of the molecularly deflected reference voltage signal ie, the enable input signal of the integrated circuit output in FIG. 3
  • the timing of the output enable signal ie, the touch scan signal output by the integrated circuit in FIG. 3
  • the output signal ie, The timing of the selective output touch scan signal in FIG. 3 and the timing of the drive signal outputted by the drive circuit (ie, the signal output by the touch drive circuit in FIG. 3).
  • the reference voltage signal for enabling the output signal and the output liquid crystal molecules to be deflected by the integrated circuit is input by the integrated circuit, wherein the reference voltage signal deflected by the integrated circuit output liquid crystal molecules is a sampling signal whose frequency is much higher than the enable output signal.
  • the output signal is a reference voltage signal signal that is output by the integrated circuit output liquid crystal molecules selected by the enable output signal.
  • the input signal is transmitted to the first input port of the third NAND gate 2-3 of the shift register unit 201 via the first transmission gate 1-1 or the second transmission gate 1-2, and the third NAND gate 2
  • the output of 3 is high level
  • the first input end of the first NAND gate 2-1 (ie, port 7) receives the first clock signal
  • the output port of the first NAND gate 2-1 outputs a high level
  • the output of the shift register unit 201 is at a high level; after the output of the shift register unit 201, the intermediate output signal (STV_OUT) outputted through the two-stage inverter is at a high level, and then goes low through the first-stage inverter.
  • Output port 10 (OUT); at time T2, the input signal high level is transmitted to the shift register unit 201 via the first transfer gate 1-1 or the second transfer gate 1-2 to input the third NAND gate 2-3
  • One input port The first clock signal is input from the port 7 to the first NAND gate 2-1, and the output of the output port of the second NAND gate 2-2 is high at the time T1, and the second NAND gate 2-2
  • the output port is connected to the second input port of the first NAND gate 2-1, so at the time T2, the signal output by the second NAND gate 2-2 is low, and the output signal of the shift register unit 201 at this time Low level, after the two-stage inverter output STV_OUT is low level, and then goes through the first-stage inverter to the high level input to the enable signal input unit 301, and then a direct high level input to the third
  • the transmission gate 3-1 is turned into a low level through the inverter 3-3 and then input to the third transmission gate 3-1, and the third transmission gate 3-1 is turned on
  • each group of the output signals may include two or more high-frequency pulse signals, and the signals output by the touch driving circuit are used to feed the transmitting electrodes of the touch panel, and the receiving electrodes are sampled according to the signal changes of the transmitting electrodes. After that, input to the touch integrated circuit for processing.
  • an embodiment of the present disclosure further provides a touch panel including: a touch driving circuit; wherein the touch driving circuit includes:
  • An input unit a shift register unit, an enable signal input unit, and an output unit;
  • the input unit is configured to: input an input signal of a forward scan or a reverse scan;
  • the input unit of the embodiment of the disclosure includes: a first transmission gate and a second transmission gate.
  • composition of the input unit is only an optional embodiment of the present disclosure, as long as the positive
  • circuit configuration to the input of the scanned input signal and the input of the reverse-scanned input signal can be applied to embodiments of the present disclosure.
  • the input unit is configured to:
  • the forward scanning input signal is transmitted through the first transmission gate
  • the reverse scan input signal is transmitted through the second transmission gate
  • the input signal is active low.
  • the shift register unit is configured to: perform shift register on the input signal to generate an output control signal;
  • the shift register unit of the embodiment of the present disclosure is composed of two sets of NAND gates that are connected end to end.
  • the enable signal input unit is configured to: control an output of the output enable signal of the integrated circuit by outputting a level of the control signal;
  • the enable signal input unit of the embodiment of the disclosure includes: a third transfer gate, an N-type metal oxide transistor, and an inverter, wherein the inverter can control the signal according to an output of the shift register unit output
  • the N-type MOS transistor is controlled, and an output of the third transfer gate can be pulled down to a negative power input pin of the liquid crystal display when the N-type MOS transistor is turned on.
  • the enable signal input unit is configured to: according to the output control signal outputted by the shift register unit, control the switch of the third transfer gate after being processed by the inverter, and control the output of the integrated circuit through the switch of the third transfer gate;
  • the level of the signal can be high or low.
  • the output unit is configured to output a corresponding output signal according to the level of the output enable signal.
  • the output unit of the embodiment of the present disclosure includes: four inverters, a fourth transmission gate, a fifth transmission gate, and an AND gate.
  • the output unit of the embodiment of the disclosure is configured to:
  • the output enable signal and the integrated circuit signal are ANDed by the gate; when the output enable signal is high, the output signal is output; when the output enable signal is low, the reference voltage (VCOM) signal of the liquid crystal molecule is outputted .
  • Embodiments of the present disclosure transfer a portion of the work that was originally required to be performed inside the integrated circuit to the display screen, thereby reducing the utilization rate of the integrated circuit.
  • the technical solution of the present application includes: an input unit, a shift register unit, an enable signal input unit, and an output unit; wherein the input unit is configured to: input an input signal of forward scan or reverse scan; shift Send The memory unit is configured to: shift register the input signal to generate an output control signal; the enable signal input unit is configured to: control the output of the output enable signal of the integrated circuit by the level of the output control signal; output unit configuration To: output the corresponding output signal according to the level of the output enable signal.
  • Embodiments of the present disclosure implement a touch drive circuit while reducing the use of an integrated circuit.
  • the present disclosure further provides a display device, including the above touch panel, wherein the touch panel includes a touch driving circuit, and the touch driving circuit includes: an input unit, a shift register unit, and an enable signal input. Unit and output unit; among them,
  • the input unit is configured to: input an input signal of a forward scan or a reverse scan;
  • the input unit of the embodiment of the disclosure includes: a first transmission gate and a second transmission gate.
  • composition of the input unit is only an alternative embodiment of the present disclosure, and any circuit structure that can realize the input of the forward scan input signal and the reverse scan input signal can be applied to the embodiment of the present disclosure.
  • the input unit is configured to:
  • the forward scanning input signal is transmitted through the first transmission gate
  • the reverse scan input signal is transmitted through the second transmission gate
  • the input signal is active low.
  • the shift register unit is configured to: perform shift register on the input signal to generate an output control signal;
  • the shift register unit of the embodiment of the present disclosure is composed of two sets of NAND gates that are connected end to end.
  • the enable signal input unit is configured to: control an output of the output enable signal of the integrated circuit by outputting a level of the control signal;
  • the enabling signal input unit of the embodiment of the disclosure includes: a third transmission gate, an N-type metal oxide transistor, and an inverter.
  • the enable signal input unit is configured to: according to the output control signal outputted by the shift register unit, control the switch of the third transfer gate after being processed by the inverter, and control the output of the integrated circuit through the switch of the third transfer gate;
  • the level of the signal can be high or low.
  • the output unit is configured to output a corresponding output signal according to the level of the output enable signal.
  • the output unit of the embodiment of the present disclosure includes: four inverters, a fourth transmission gate, a fifth transmission gate, and one With the door.
  • the output unit of the embodiment of the disclosure is configured to:
  • the input signal is ANDed by the output enable signal and the integrated circuit signal; when the output enable signal is high, the output signal is output; when the output enable signal is low, the reference voltage (VCOM) of the liquid crystal molecule deflection is output. signal.
  • Embodiments of the present disclosure transfer a portion of the work that was originally required to be performed inside the integrated circuit to the display screen, thereby reducing the utilization rate of the integrated circuit.
  • the technical solution of the present application includes: an input unit, a shift register unit, an enable signal input unit, and an output unit; wherein the input unit is configured to: input an input signal of forward scan or reverse scan; shift The register unit is configured to: shift register the input signal to generate an output control signal; the enable signal input unit is configured to: control the output of the output enable signal of the integrated circuit by the level of the output control signal; the output unit is configured to : Outputs the corresponding output signal according to the level of the output enable signal.
  • Embodiments of the present disclosure implement a touch drive circuit while reducing the use of an integrated circuit.
  • each module/unit in the foregoing embodiment may be implemented in the form of hardware, for example, by implementing an integrated circuit to implement its corresponding function, or may be implemented in the form of a software function module, for example, being executed by a processor and stored in a memory. Programs/instructions to implement their respective functions.
  • the present disclosure is not limited to any specific form of combination of hardware and software.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)

Abstract

本公开涉及触控驱动电路、触控面板及显示装置。触控驱动电路,包括:输入单元,被配置为接收正向扫描或反向扫描的输入信号;移位寄存器单元,被配置为对输入信号进行移位寄存,以生成输出控制信号;使能信号输入单元,被配置为通过输出控制信号控制集成电路的输出使能信号的输出;输出单元,被配置为根据输出使能信号输出相应的输出信号。本发明实施例在减少集成电路的使用情况下实现了触控驱动电路。

Description

触控驱动电路、触控面板及显示装置
相关申请的交叉引用
本公开要求于2017年3月31日提交到中国专利局的中国发明专利申请No.201710210136.9的优先权,其全部内容通过引用包含于此。
技术领域
本公开涉及触控驱动电路、触控面板及显示装置。
背景技术
随着移动设备的不断发展,人机互动方式已由原来的机械按键模式发展到当前的触控感知模式;在触动感知模式的人机交互过程中,触控驱动电路起到很重要的作用。
发明内容
以下是对本公开详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
根据本公开的一些实施例,提供了一种触控驱动电路,包括:
输入单元,被配置为接收正向扫描或反向扫描的输入信号;
移位寄存器单元,被配置为对输入信号进行移位寄存,以生成输出控制信号;
使能信号输入单元,被配置为通过输出控制信号控制集成电路的输出使能信号的输出;
输出单元,被配置为根据输出使能信号输出相应的输出信号。
可选的,所述输入单元包括:
第一传输门,用于接收正向扫描的输入信号;和
第二传输门,用于接收反向扫描的输入信号。
可选的,所述输入单元被配置为:
在正向扫描时,通过所述第一传输门传输正向扫描的输入信号;
在反向扫描时,通过所述第二传输门传输反向扫描的输入信号;
其中,所述输入信号低电平有效。
可选的,所述移位寄存器单元包括首尾相接的第一组与非门和第二组与非门。
可选的,第一组与非门包括第一与非门和第二与非门,第二组与非门包括第三与非门和第四与非门,
第一与非门的一个输入端连接到时钟信号,第一与非门的另一个输入端连接到第二与非门的输出端,第一与非门的输出端连接到第二与非门的一个输入端、第四与非门的一个输入端以及所述移位寄存器单元的输出端,
第二与非门的另一个输入端连接到第四与非门的输出端以及第三与非门的一个输入端,
第三与非门的另一个输入端接收从所述输入单元输出的输入信号,第三与非门的输出端连接到第四与非门的另一个输入端。
可选的,所述使能信号输入单元包括:第三传输门、一个N型金属氧化物半导体管和一个反相器。其中,所述反相器可以根据移位寄存器单元输出的输出控制信号控制所述N型金属氧化物半导体管,第三传输门的输出可以在所述N型金属氧化物半导体管导通时被拉低至低电平液晶显示屏的负电源输入脚(VGL)。
可选的,所述使能信号输入单元配置为:根据移位寄存器单元输出的输出控制信号,经反相器处理后控制第三传输门的开关,通过第三传输门的开关控制集成电路的输出使能信号。
可选的,所述输出单元包括:四个反相器、第四传输门、第五传输门和一个与门。
可选的,所述输出单元被配置为:
通过与门将输出使能信号和集成电路信号进行与运算;在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压信号。
根据本公开的另一些实施例,还提供一种触控面板,包括上述的触控驱动电路。
根据本公开的又一些实施例,还提供一种显示装置,包括上述的触控面板。
本公开的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本公开而了解。本公开的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本公开技术方案的进一步理解,并且构成说明书的一部分,与本申请的实施例一起用于解释本公开的技术方案,并不构成对本公开技术方案的限制。
图1为根据本公开的一些实施例的触控驱动电路的结构框图;
图2为根据本公开的一些可选实施例的触控驱动电路的原理图;
图3为根据本公开的一些实施例的时序信息示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白,下文中将结合附图对本公开的实施例进行详细说明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且,虽然在流程图中示出了逻辑顺序,但是在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤。
图1为本公开实施例触控驱动电路的结构框图,如图1所示,包括:
输入单元101、移位寄存器单元201、使能信号输入单元301和输出单元401;其中,
输入单元101配置为:输入正向扫描或反向扫描的输入信号;
可选的,本公开实施例输入单元101包括:第一传输门1-1和第二传输门1-2。
需要说明的是,输入单元的上述组成只是本公开的一个可选实施例,只要可以实现正向扫描的输入信号和反向扫描的输入信号的输入的电路结构均可以应用于本公开实施例。
可选的,输入单元101是配置为:
正向扫描时,通过第一传输门1-1传输正向扫描的输入信号;
反向扫描时,通过第二传输门1-2传输反向扫描的输入信号;
其中,输入信号低电平有效。
需要说明的是,本公开实施例输入信号低电平有效,可以有效的降低触控驱动电路的功耗。
移位寄存器单元201配置为:对输入信号进行移位寄存,以生成输出控制信号;
可选的,本公开实施例移位寄存器单元由两组首尾相接的与非门组成。在一个可选的示例中,第一组与非门可以包括第一与非门2-1和第二与非门2-2,第二组与非门可以包 括第三与非门2-3和第四与非门2-4。
使能信号输入单元301配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;
可选的,本公开实施例使能信号输入单元301包括:第三传输门3-1、一个N型金属氧化物晶体管3-2和一个反相器3-3,其中所述反相器3-3根据移位寄存器单元201输出的输出控制信号控制所述N型金属氧化物半导体管3-2的导通和截止,第三传输门3-1的输出在所述N型金属氧化物半导体管3-2导通时被拉低至低电平液晶显示屏的负电源输入脚(VGL)。
可选的,使能信号输入单元301配置为:根据移位寄存器单元201输出的输出控制信号,经反相器3-3处理后控制第三传输门3-1的开关,通过第三传输门3-1的开关控制集成电路的输出使能信号的电平高低。
输出单元401配置为:根据输出使能信号的电平高低输出相应的输出信号。
可选的,根据本公开一个实施例的输出单元401包括:四个反相器、第四传输门4-1、第五传输门4-2和一个与门4-3;其中,四个反相器包括:第一反相器4-4-1、第二反相器4-4-2、第三反相器4-4-3、第四反相器4-4-4。
可选的,本公开实施例输出单元401可以配置为:
通过与门将输出使能信号和集成电路信号进行与运算;在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压(VCOM)信号。
本公开实施例把一部分原来需要在集成电路内部完成的工作,在输出使能信号和集成电路信号进行与运算后转移到显示屏上完成,减少了集成电路的使用率。
与相关技术相比,本申请技术方案包括:输入单元、移位寄存器单元、使能信号输入单元和输出单元;其中,输入单元配置为:输入正向扫描或反向扫描的输入信号;移位寄存器单元配置为:对输入信号进行移位寄存,以生成输出控制信号;使能信号输入单元配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;输出单元配置为:根据输出使能信号的电平高低输出相应的输出信号。本公开实施例在减少集成电路的使用情况下实现了触控驱动电路。
图2为本公开可选实施例触控驱动电路的原理图,如图2所示,输入单元包括:第一传输门1-1和第二传输门1-2。正向扫描时,通过第一传输门1-1的端口1传输正向扫描的输入信号;反向扫描时,通过第二传输门1-2的端口2传输反向扫描的输入信号;其中, 正向扫描时,第一传输门1-1传输的输入信号在低电平有效;反向扫描时,第二传输门1-2传输的输入信号在低电平有效;输入单元101中,端口3、端口4、端口5、端口6传输直流高低电平信号;具体的,端口3,端口4输入的信号相同,端口5和端口6输入的信号相同,当正向扫描时,端口3和端口4都是低电平,端口5,端口6都是高电平;反之,反向扫描时,端口3和端口4都是高电平,端口5,端口6都是低电平。
移位寄存器单元201由两组首尾相接的与非门组成;配置为:对输入信号进行移位寄存,以生成输出控制信号;移位寄存器单元201可以由第一与非门2-1、第二与非门2-2、第三与非门2-3和第四与非门2-4组成;其中,第一与非门2-1的第一输入端口为端口7,接收第一时钟信号,第一与非门2-1的第二输入端口与第二与非门2-2的输出端口连接,接收第二与非门2-2输出端口输出的信号;第二与非门2-2的第一输入端口与第一与非门2-1的输出端口连接,接收第一与非门2-1输出的信号,第二与非门2-2的第二输入端口与第四与非门2-4的输出端口连接,接收第四与非门2-4输出的信号;第三与非门2-3的第一输入端口与输入单元101连接,第三与非门2-3的第二输入端口与第四与非门2-4的输出端口连接,接收第四与非门2-4输出的信号;第四与非门2-4的第一输入端与第一与非门2-1的输出端口连接,接收第一与非门2-1输出端口输出的信号,第四与非门2-4的第二输入端与第三与非门2-3的输出端口连接,接收第三与非门2-3的输出端口输出的信号;其中,与非门是数字电路的一种基本逻辑电路。若当输入均为高电平,则输出为低电平;若输入中至少有一个为低电平,则输出为高电平。与非门可以看作是与门和非门的叠加。其中,端口7输入第一时钟信号,假设第一时钟信号为TP_CK,则按照驱动电路在显示屏中采用多级连接,下一级采用的第二时钟信号(TP_CKB)与第一时钟信号相反,第一时钟信号和第二时钟信号交替使用。本公开实施例上述触控驱动电路作为本级触控驱动电路,本级触控驱动电路中,移位寄存器单元201和使能信号输入单元301中间由三个反相器级联,对移位寄存器单元201的输出信号进行三次反相的作用来提升信号的驱动能力(电压不变电流增大),前两级反相后的信号为中间输出信号(定义为STV_OUT)给下一级驱动电路的输入单元的端口1,经第三级反相后的信号被输入使能信号输入单元301。本级触控驱动电路的输出为OUT1,下一级触控驱动电路的输出为OUT2,本级触控驱动电路的端口7输入第一时钟信号,下一级触控驱动电路的端口7输入第二时钟信号,其他端口的输入信号都相同,后续级联按照上述方式交替连接。
使能信号输入单元301包括:第三传输门3-1、一个N型金属氧化物晶体管3-2和一个反相器3-3;使能信号输入单元301配置为:通过输出控制信号的电平高低控制集成电 路的输出使能信号(本公开实施例简称为EXVCOM)的输出;其中,输出使能信号由第三传输门3-1的端口8输入。反相器3-3的输入端电连接到经过三次反相后的移位寄存器单元201的输出信号,反相器3-3的输出端电连接到N型金属氧化物晶体管3-2的栅极。N型金属氧化物晶体管3-2的漏极电连接到第三传输门3-1的输出端,N型金属氧化物晶体管3-2的源极(即端口12)电连接到低电平液晶显示屏的负电源输入脚(VGL)。这样,反相器根据移位寄存器单元输出的输出控制信号控制所述N型金属氧化物半导体管,经过反相器3-3反相的信号为高电平时,使能信号输入单元301的N型金属氧化物晶体管(NMOS管)3-2打开,使能信号输入单元301的输出(即第三传输门301的输出)被拉低至低电平液晶显示屏的负电源输入脚(VGL)。
输出单元401根据输出使能信号采样选择的输出信号,本公开实施例液晶分子偏转的参考电压(VCOM)信号与相关技术中的显示像素(Display Pixel)中的液晶分子偏转的参考电压(VCOM)信号相同,在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压(VCOM)信号。其中,端口9为集成电路输入的VCOM信号。
图3为本公开实施例时序信息示意图,如图3所示,包括输入信号(即图3中的输入单元扫描的输入信号)的时序、第一时钟信号的时序和第二时钟信号的时序,输出控制信号(即图3中的移位寄存器单元输出信号)的时序,输出控制信号的反向信号(即图3中的移位寄存器单元输出信号的反向信号)的时序;集成电路输出液晶分子偏转的参考电压信号(即图3中的集成电路输出的使能输入信号)的时序,输出使能信号(即图3中的集成电路输出的触控扫描信号)的时序,输出信号(即图3中的选择性输出的触控扫描信号)的时序和驱动电路输出的驱动信号(即图3中的触控驱动电路输出的信号)的时序。
本公开实施例,使能输出信号与集成电路输出液晶分子偏转的参考电压信号由集成电路给入,其中集成电路输出液晶分子偏转的参考电压信号为频率远高于使能输出信号的采样信号,输出信号为使能输出信号选择出的集成电路输出液晶分子偏转的参考电压信号信号。
T1时刻,输入信号经过第一传输门1-1或第二传输门1-2传输至移位寄存器单元201的第三与非门2-3的第一输入端口,第三与非门2-3的输出为高电平,第一与非门2-1的第一输入端(即端口7)接收第一时钟信号,第一与非门2-1的输出端口输出为高电平,则移位寄存器单元201的输出为高电平;移位寄存器单元201输出后,经过两级反相器输出的中间输出信号(STV_OUT)为高电平,再经过一级反相器为低电平输入至使能信号输 入单元301,然后一路直接低电平输入至第三传输门3-1,一路经过反相器3-3变为高电平再输入至第三传输门3-1,这时第三传输门3-1关闭,端口8输入的使能输入信号不能通过使能信号输入单元301的第三传输门3-1输出至输出单元401;高电平使得使能信号输入单元301的N型金属氧化物晶体管(NMOS管)3-2打开,使能信号输入单元301的输出被拉低至低电平液晶显示屏的负电源输入脚(VGL),然后经过输出单元401的三级反相器4-4-1、4-4-2、4-4-3变为高电平后,经过一级反相器4-4-4变为低电平,并同时输入至第四传输门4-1和第五传输门4-2,这时,第四传输门4-1关闭,第五传输门4-2打开,从端口11输入的VCOM经过第五传输门4-2输出至输出单元401的输出端口10(OUT);T2时刻,输入信号高电平经过第一传输门1-1或第二传输门1-2传输至移位寄存器单元201输入第三与非门2-3的第一输入端口,第一时钟信号高电平从端口7输入第一与非门2-1,由于T1时刻第二与非门2-2的输出端口的输出为高电平,且第二与非门2-2的输出端口与第一与非门2-1的第二输入端口连接,所以在T2时刻,第二与非门2-2输出的信号为低电平,这时移位寄存器单元201的输出信号为低电平,再经过两级反相器输出STV_OUT为低电平,再经过一级反相器变为高电平输入至使能信号输入单元301,然后一路直接高电平输入至第三传输门3-1,一路经过反相器3-3变为低电平再输入至第三传输门3-1,第三传输门3-1打开,使能输入信号经过第三传输门3-1输出一个高电平的脉冲信号,并输入至输出单元401,经过输出单元401的三级反相器4-4-1、4-4-2、4-4-3变为低电平输入至两个传输门4-1、4-2,再经过一级反相器4-4-4变为高电平输入至两个传输门4-1、4-2,这时第四传输门4-1打开,第五传输门4-2关闭,输出输出信号(触控扫描信号)。
本公开实施例,输出信号每组可以包括两个或两个以上高频脉冲信号,触控驱动电路输出的信号用来给入触控面板的发射电极,接收电极根据发射电极的信号变化进行采样后,输入至触控集成电路进行处理。
另一方面,本公开实施例还提供一种触控面板,包括:触控驱动电路;其中,触控驱动电路包括:
输入单元、移位寄存器单元、使能信号输入单元和输出单元;其中,
输入单元配置为:输入正向扫描或反向扫描的输入信号;
可选的,本公开实施例输入单元包括:第一传输门和第二传输门。
需要说明的是,输入单元的上述组成只是本公开的一个可选实施例,只要可以实现正 向扫描的输入信号和反向扫描的输入信号的输入的电路结构均可以应用与本公开实施例。
可选的,输入单元是配置为:
正向扫描时,通过第一传输门传输正向扫描的输入信号;
反向扫描时,通过第二传输门传输反向扫描的输入信号;
其中,输入信号低电平有效。
需要说明的是,本公开实施例输入信号低电平有效,可以有效的降低触控驱动电路的功耗。
移位寄存器单元配置为:对输入信号进行移位寄存,以生成输出控制信号;
可选的,本公开实施例移位寄存器单元由两组首尾相接的与非门组成。
使能信号输入单元配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;
可选的,本公开实施例使能信号输入单元包括:第三传输门、一个N型金属氧化物晶体管和一个反相器,其中所述反相器可以根据移位寄存器单元输出的输出控制信号控制所述N型金属氧化物半导体管,第三传输门的输出可以在所述N型金属氧化物半导体管导通时被拉低至低电平液晶显示屏的负电源输入脚。
可选的,使能信号输入单元配置为:根据移位寄存器单元输出的输出控制信号,经反相器处理后控制第三传输门的开关,通过第三传输门的开关控制集成电路的输出使能信号的电平高低。
输出单元配置为:根据输出使能信号的电平高低输出相应的输出信号。
可选的,本公开实施例输出单元包括:四个反相器、第四传输门、第五传输门和一个与门。
可选的,本公开实施例输出单元是配置为:
通过与门将输出使能信号和集成电路信号进行与运算;在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压(VCOM)信号。
本公开实施例把一部分原来需要在集成电路内部完成的工作转移到显示屏上完成,减少了集成电路的使用率。
与相关技术相比,本申请技术方案包括:输入单元、移位寄存器单元、使能信号输入单元和输出单元;其中,输入单元配置为:输入正向扫描或反向扫描的输入信号;移位寄 存器单元配置为:对输入信号进行移位寄存,以生成输出控制信号;使能信号输入单元配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;输出单元配置为:根据输出使能信号的电平高低输出相应的输出信号。本公开实施例在减少集成电路的使用情况下实现了触控驱动电路。
再一方面,本公开实施例还提供一种显示装置,包括上述的触控面板;其中触控面板包括触控驱动电路;触控驱动电路包括:输入单元、移位寄存器单元、使能信号输入单元和输出单元;其中,
输入单元配置为:输入正向扫描或反向扫描的输入信号;
可选的,本公开实施例输入单元包括:第一传输门和第二传输门。
需要说明的是,输入单元的上述组成只是本公开的一个可选实施例,只要可以实现正向扫描的输入信号和反向扫描的输入信号的输入的电路结构均可以应用与本公开实施例。
可选的,输入单元是配置为:
正向扫描时,通过第一传输门传输正向扫描的输入信号;
反向扫描时,通过第二传输门传输反向扫描的输入信号;
其中,输入信号低电平有效。
需要说明的是,本公开实施例输入信号低电平有效,可以有效的降低触控驱动电路的功耗。
移位寄存器单元配置为:对输入信号进行移位寄存,以生成输出控制信号;
可选的,本公开实施例移位寄存器单元由两组首尾相接的与非门组成。
使能信号输入单元配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;
可选的,本公开实施例使能信号输入单元包括:第三传输门、一个N型金属氧化物晶体管和一个反相器。
可选的,使能信号输入单元配置为:根据移位寄存器单元输出的输出控制信号,经反相器处理后控制第三传输门的开关,通过第三传输门的开关控制集成电路的输出使能信号的电平高低。
输出单元配置为:根据输出使能信号的电平高低输出相应的输出信号。
可选的,本公开实施例输出单元包括:四个反相器、第四传输门、第五传输门和一个 与门。
可选的,本公开实施例输出单元是配置为:
将输入信号通过输出使能信号和集成电路信号进行与运算;在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压(VCOM)信号。
本公开实施例把一部分原来需要在集成电路内部完成的工作转移到显示屏上完成,减少了集成电路的使用率。
与相关技术相比,本申请技术方案包括:输入单元、移位寄存器单元、使能信号输入单元和输出单元;其中,输入单元配置为:输入正向扫描或反向扫描的输入信号;移位寄存器单元配置为:对输入信号进行移位寄存,以生成输出控制信号;使能信号输入单元配置为:通过输出控制信号的电平高低控制集成电路的输出使能信号的输出;输出单元配置为:根据输出使能信号的电平高低输出相应的输出信号。本公开实施例在减少集成电路的使用情况下实现了触控驱动电路。
本领域普通技术人员可以理解上述方法中的全部或部分步骤可通过程序来指令相关硬件(例如处理器)完成,所述程序可以存储于计算机可读存储介质中,如只读存储器、磁盘或光盘等。可选地,上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现。相应地,上述实施例中的每个模块/单元可以采用硬件的形式实现,例如通过集成电路来实现其相应功能,也可以采用软件功能模块的形式实现,例如通过处理器执行存储于存储器中的程序/指令来实现其相应功能。本公开不限制于任何特定形式的硬件和软件的结合。
虽然本公开所揭露的实施方式如上,但所述的内容仅为便于理解本公开而采用的实施方式,并非用以限定本公开。任何本公开所属领域内的技术人员,在不脱离本公开所揭露的精神和范围的前提下,可以在实施的形式及细节上进行任何的修改与变化,但本公开的专利保护范围,仍须以所附的权利要求书所界定的范围为准。

Claims (11)

  1. 一种触控驱动电路,包括:
    输入单元,被配置为接收正向扫描或反向扫描的输入信号;
    移位寄存器单元,被配置为对输入信号进行移位寄存,以生成输出控制信号;
    使能信号输入单元,被配置为通过输出控制信号控制集成电路的输出使能信号的输出;
    输出单元,被配置为根据输出使能信号输出相应的输出信号。
  2. 根据权利要求1所述的触控驱动电路,其中所述输入单元包括:
    第一传输门,用于接收正向扫描的输入信号;和
    第二传输门,用于接收反向扫描的输入信号。
  3. 根据权利要求2所述的触控驱动电路,其中所述输入单元被配置为:
    在正向扫描时,通过所述第一传输门传输正向扫描的输入信号;
    在反向扫描时,通过所述第二传输门传输反向扫描的输入信号,
    其中,所述输入信号低电平有效。
  4. 根据权利要求1所述的触控驱动电路,其中所述移位寄存器单元包括首尾相接的第一组与非门和第二组与非门。
  5. 根据权利要求4所述的触控驱动电路,其中第一组与非门包括第一与非门和第二与非门,第二组与非门包括第三与非门和第四与非门,
    第一与非门的一个输入端连接到时钟信号,第一与非门的另一个输入端连接到第二与非门的输出端,第一与非门的输出端连接到第二与非门的一个输入端、第四与非门的一个输入端以及所述移位寄存器单元的输出端,
    第二与非门的另一个输入端连接到第四与非门的输出端以及第三与非门的一个输入端,
    第三与非门的另一个输入端接收从所述输入单元输出的输入信号,第三与非门的输出端连接到第四与非门的另一个输入端。
  6. 根据权利要求1所述的触控驱动电路,其中所述使能信号输入单元包括:第三传输门、一个N型金属氧化物半导体管和一个反相器,其中所述反相器根据移位寄存器单元输出的输出控制信号控制所述N型金属氧化物半导体管,第三传输门的输出在所述N型金属氧化物半导体管导通时被拉低至低电平液晶显示屏的负电源输入脚。
  7. 根据权利要求6所述的触控驱动电路,其特征在于,
    所述使能信号输入单元配置为:根据移位寄存器单元输出的输出控制信号,经反相器处理后控制第三传输门的开关,通过第三传输门的开关控制集成电路的输出使能信号。
  8. 根据权利要求1~7任一项所述的触控驱动电路,其特征在于,所述输出单元包括:四个反相器、第四传输门、第五传输门和一个与门。
  9. 根据权利要求8述的触控驱动电路,其特征在于,所述输出单元被配置为:
    通过所述与门将输出使能信号和集成电路信号进行与运算;在输出使能信号为高电平时,输出输出信号;在输出使能信号为低电平时,输出液晶分子偏转的参考电压信号。
  10. 一种触控面板,其特征在于,包括权利要求1~9任一项所述的触控驱动电路。
  11. 一种显示装置,其特征在于,包括权利要求10所述的触控面板。
PCT/CN2017/105824 2017-03-31 2017-10-12 触控驱动电路、触控面板及显示装置 Ceased WO2018176795A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/765,415 US10509496B2 (en) 2017-03-31 2017-10-12 Touch driving circuit, touch panel and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710210136.9 2017-03-31
CN201710210136.9A CN106959782B (zh) 2017-03-31 2017-03-31 一种触控驱动电路、触控面板及显示装置

Publications (1)

Publication Number Publication Date
WO2018176795A1 true WO2018176795A1 (zh) 2018-10-04

Family

ID=59483172

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/105824 Ceased WO2018176795A1 (zh) 2017-03-31 2017-10-12 触控驱动电路、触控面板及显示装置

Country Status (3)

Country Link
US (1) US10509496B2 (zh)
CN (1) CN106959782B (zh)
WO (1) WO2018176795A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106959782B (zh) * 2017-03-31 2019-11-26 京东方科技集团股份有限公司 一种触控驱动电路、触控面板及显示装置
CN110472606B (zh) 2019-08-21 2022-05-20 京东方科技集团股份有限公司 一种超声波识别模组、其驱动方法及显示装置
CN112863586B (zh) * 2021-01-26 2024-10-22 京东方科技集团股份有限公司 移位寄存器及其控制方法、栅极驱动电路和显示面板
CN116741073B (zh) * 2023-04-18 2026-04-17 武汉天马微电子有限公司 一种驱动电路及显示面板

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102831867A (zh) * 2012-07-26 2012-12-19 北京大学深圳研究生院 栅极驱动单元电路及其栅极驱动电路和一种显示器
CN103823589A (zh) * 2014-01-24 2014-05-28 京东方科技集团股份有限公司 一种触摸电路及驱动方法、触摸显示装置
CN104360781A (zh) * 2014-11-12 2015-02-18 京东方科技集团股份有限公司 触控电极的驱动单元、驱动电路、触控面板及驱动方法
CN104834427A (zh) * 2015-05-27 2015-08-12 京东方科技集团股份有限公司 触控驱动电路及其驱动方法、阵列基板及触控显示装置
CN105741739A (zh) * 2016-04-22 2016-07-06 京东方科技集团股份有限公司 栅极驱动电路及显示装置
CN106201111A (zh) * 2016-08-05 2016-12-07 京东方科技集团股份有限公司 触控驱动电路和触控显示器件
CN106959782A (zh) * 2017-03-31 2017-07-18 京东方科技集团股份有限公司 一种触控驱动电路、触控面板及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4396814B2 (ja) * 2003-09-01 2010-01-13 セイコーエプソン株式会社 静電容量検出装置及び電子機器
US9477345B2 (en) * 2015-01-30 2016-10-25 Lg Display Co., Ltd. Display device, and device and method for driving the same
JP2017016400A (ja) * 2015-07-01 2017-01-19 株式会社ジャパンディスプレイ 表示装置
CN105788509B (zh) * 2016-05-25 2019-12-13 京东方科技集团股份有限公司 Goa扫描单元、goa扫描电路、显示面板及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102831867A (zh) * 2012-07-26 2012-12-19 北京大学深圳研究生院 栅极驱动单元电路及其栅极驱动电路和一种显示器
CN103823589A (zh) * 2014-01-24 2014-05-28 京东方科技集团股份有限公司 一种触摸电路及驱动方法、触摸显示装置
CN104360781A (zh) * 2014-11-12 2015-02-18 京东方科技集团股份有限公司 触控电极的驱动单元、驱动电路、触控面板及驱动方法
CN104834427A (zh) * 2015-05-27 2015-08-12 京东方科技集团股份有限公司 触控驱动电路及其驱动方法、阵列基板及触控显示装置
CN105741739A (zh) * 2016-04-22 2016-07-06 京东方科技集团股份有限公司 栅极驱动电路及显示装置
CN106201111A (zh) * 2016-08-05 2016-12-07 京东方科技集团股份有限公司 触控驱动电路和触控显示器件
CN106959782A (zh) * 2017-03-31 2017-07-18 京东方科技集团股份有限公司 一种触控驱动电路、触控面板及显示装置

Also Published As

Publication number Publication date
US10509496B2 (en) 2019-12-17
CN106959782B (zh) 2019-11-26
US20190073068A1 (en) 2019-03-07
CN106959782A (zh) 2017-07-18

Similar Documents

Publication Publication Date Title
TWI415052B (zh) 開關裝置與應用該開關裝置之移位暫存器電路
CN102982777B (zh) 显示装置的栅极驱动电路
CN104575430B (zh) 移位寄存器单元及其驱动方法、栅极驱动电路、显示装置
KR102824856B1 (ko) Goa 회로 및 디스플레이 패널
CN103236272B (zh) 移位寄存器单元及其驱动方法、栅极驱动装置与显示装置
CN104269145B (zh) 一种移位寄存器、栅极驱动电路及显示装置
WO2019080572A1 (zh) 移位寄存单元、其驱动方法、栅极驱动电路及显示装置
WO2016150089A1 (zh) 移位寄存器、栅极驱动电路、显示面板及显示装置
EP3675115B1 (en) Shift register, driving method therefor, gate driving circuit and display apparatus
CN104282255A (zh) 移位寄存器、栅极驱动电路及其驱动方法、显示装置
CN107516505B (zh) 移位寄存器单元及其驱动方法、栅极驱动电路和显示面板
WO2016150061A1 (zh) 一种移位寄存器、栅极驱动电路、显示面板及显示装置
WO2017107295A1 (zh) 适用于In Cell型触控显示面板的的GOA电路
WO2017117844A1 (zh) 阵列基板上栅极驱动电路及使用所述电路的液晶显示器
TWI532033B (zh) 顯示面板與閘極驅動器
WO2016206240A1 (zh) 移位寄存器单元及其驱动方法、移位寄存器和显示装置
WO2017202124A1 (zh) 一种栅极驱动电路及显示面板
CN109427409B (zh) 移位寄存器、栅极驱动电路、显示面板及驱动方法
WO2018176795A1 (zh) 触控驱动电路、触控面板及显示装置
WO2017008488A1 (zh) 移位寄存单元、移位寄存器、栅极驱动电路和显示装置
CN120356442B (zh) 降噪电路和栅极驱动电路
WO2019080619A1 (zh) 移位寄存器单元及其驱动方法、栅极驱动电路及显示装置
WO2025020474A1 (zh) 移位寄存器及其驱动方法和显示面板
US20220270532A1 (en) Shift register, gate drive circuit, display device, and driving method for same
JP5575871B2 (ja) シフトレジスタ、信号線駆動回路、液晶表示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17904068

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17904068

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 17/03/2020)

122 Ep: pct application non-entry in european phase

Ref document number: 17904068

Country of ref document: EP

Kind code of ref document: A1