WO2018129825A1

WO2018129825A1 - Smart half-bridge sine-wave voltage conversion circuit based on pfc interleaved flyback

Info

Publication number: WO2018129825A1
Application number: PCT/CN2017/080983
Authority: WO
Inventors: 廖志刚
Original assignee: 广东百事泰电子商务股份有限公司
Priority date: 2017-01-11
Filing date: 2017-04-19
Publication date: 2018-07-19
Also published as: CN106856378A

Abstract

Provided is a smart half-bridge sine-wave voltage conversion circuit based on PFC interleaved flyback, comprising: an input rectifier filter unit (10); a PFC boost unit (20); an interleaved-flyback isolation transform unit (30), comprising a first switch tube (Q6), a second switch tube (Q7), a first transformer (T1), a second transformer (T2), a first diode (D6), a second diode (D5), a third diode (D7), and a fourth diode (D8); a DC filter unit (40), comprising a first capacitor (C7) and a second capacitor (C8); a cathode of the third diode (D7) is connected to the rear end ground by means of the first capacitor (C7); an anode of the fourth diode (D8) is connected to the rear end ground by means of the second capacitor (C8); an inverting phase-inversion unit (60), comprising a fourth switch tube (Q2), a fifth switch tube (Q4), a third electrolytic capacitor (C3), a fourth electrolytic capacitor (C4), and a filter inductor (L3); the rear end of the filter inductor (L3) and the negative electrode of the third electrolytic capacitor (C3) are used as the output end of the inverting phase-inversion unit (60). It is possible to filter out high-frequency pulses by using the filter inductor, such that a load is able to obtain a high-quality operating-frequency sinusoidal alternating current, while also reducing circuit cost.

Description

Intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback

Technical field

The invention relates to a voltage conversion circuit, in particular to an intelligent half-bridge sine wave voltage conversion circuit based on PFC interleaved flyback.

Background technique

In the prior art, the intelligent buck-boost conversion device from AC to AC is also called a travel plug. In this device, the voltage conversion circuit is a key circuit thereof, and is a circuit capable of realizing AC-AC conversion, which can be AC-AC conversion realizes the function of buck-boost and stabilizes voltage and frequency. However, most of the current AC-AC portable device market is a non-isolated topology circuit with low PF value, low output voltage quality, and poor safety and reliability. Especially in the voltage conversion process, more ripple interference is generated, which in turn affects the voltage quality. In addition, the existing sinusoidal voltage conversion circuit has defects such as complicated circuit structure, slow response speed, and high cost. In practical applications, due to the high-speed switching of the switching tube during the voltage conversion process, a certain high-frequency pulse signal exists on the output side of the circuit, thereby affecting the quality of the output voltage, and thus it is difficult to meet the conversion requirement.

Summary of the invention

The technical problem to be solved by the present invention is to provide a method for reducing ripple in a circuit, simplifying circuit structure, reducing circuit cost, filtering high frequency crosstalk, and improving output voltage quality, and Safe and reliable intelligent half-bridge sine wave voltage conversion circuit based on PFC interleaved flyback.

In order to solve the above technical problems, the present invention adopts the following technical solutions.

An intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback, comprising an input rectification and filtering unit for rectifying and filtering a grid voltage, and for boosting and converting an output voltage of an input rectification and filtering unit a PFC boosting unit, and: an interleaved flyback isolation conversion unit, including a first switching transistor, a second switching transistor, a first transformer, a second transformer, a first diode, a second diode, and a third a pole tube and a fourth diode, a first end of the first transformer primary winding is connected to an output end of the PFC boosting unit, and a second end of the first transformer primary winding is connected to a drain of the first switching tube a source of the first switching transistor is connected to the front end, a drain of the first switching transistor is connected to an anode of the first diode, and a cathode of the first diode is connected to the PFC through a first resistor An output end of the boosting unit, the first resistor is connected in parallel with a third capacitor, a first end of the second transformer primary winding is connected to an output end of the PFC boosting unit, and a second end of the second transformer primary winding Connected to the second Off the drain tube, said second switch tube The source is connected to the front end, the drain of the second switch is connected to the anode of the second diode, and the cathode of the second diode is connected to the output of the PFC boost unit through the second resistor. The second resistor has a fourth capacitor connected in parallel, and the gate of the first switch tube and the gate of the second switch tube are respectively used to access two PWM pulse signals with opposite phases, the first transformer secondary winding The first end of the second transformer is connected to the anode of the third diode, the second end of the second winding of the first transformer is connected to the rear end, and the first end of the secondary winding of the second transformer is connected to the rear end. a second end of the second transformer secondary winding is coupled to a cathode of the fourth diode, and a cathode of the third diode and an anode of the fourth diode serve as an output of the interleaved flyback isolation conversion unit; a DC filter unit includes a first capacitor and a second capacitor, a cathode of the third diode is connected to the back end through a first capacitor, and an anode of the fourth diode is connected to the cathode through a second capacitor End ground; an inverter inverter unit, including a fourth switch tube, a fifth open a transistor, a third electrolytic capacitor, a fourth electrolytic capacitor and a filter inductor, wherein a drain of the fourth switch is connected to an anode of an output of the interleaved flyback isolation unit, and a source of the fourth switch is connected to a fifth a drain of the switch transistor, a source of the fifth switch transistor is connected to a negative terminal of an output terminal of the interleaved flyback isolation conversion unit, and a gate of the fourth switch transistor and a gate of the fifth switch transistor are respectively used for accessing Two PWM pulses are opposite in phase, the source of the fourth switch is also connected to the front end of the filter inductor, the anode of the third electrolytic capacitor is connected to the drain of the fourth switch, and the third electrolytic capacitor The negative electrode is connected to the back end, the negative electrode of the third electrolytic capacitor is further connected to the positive electrode of the fourth electrolytic capacitor, and the negative electrode of the fourth electrolytic capacitor is connected to the source of the fifth switching transistor, and the rear end of the filter inductor And a negative electrode of the third electrolytic capacitor is used as an output end of the inverter inverting unit.

Preferably, a first resistor is connected between the gate and the source of the fourth switching transistor, and a second resistor is connected between the gate and the source of the fifth switching transistor.

Preferably, the input rectification filtering unit comprises a socket, an insurance, a lightning protection resistor, a common mode suppression inductor, a safety capacitor and a rectifier bridge, and the fuse is connected to a neutral line or a live line of the socket, and the common mode rejection The front end of the inductor is connected in parallel to the socket, the lightning protection resistor is connected in parallel to the front end of the common mode suppression inductor, and the input ends of the safety capacitor and the rectifier bridge are both connected in parallel to the rear end of the common mode suppression inductor, and the output end of the rectifier bridge There is a filter capacitor in parallel.

Preferably, the PFC boosting unit includes a boosting inductor, a third switching transistor, a first rectifying diode and a second electrolytic capacitor, and a front end of the boosting inductor is connected to an output end of the input rectifying and filtering unit, the liter The back end of the voltage inductor is connected to the drain of the third switch tube, the source of the third switch tube is connected to the front end, and the gate of the third switch tube is used to access a PWM control signal, the third The drain of the switch tube is connected to the anode of the first rectifier diode, the cathode of the first rectifier diode is used as the output end of the PFC boost unit, and the cathode of the first rectifier diode is connected to the anode of the second electrolytic capacitor, and the second electrolytic capacitor The negative pole is connected to the front end.

Preferably, an MCU control unit is further included, the gate of the first switch tube, the gate of the second switch tube and the gate of the third switch tube are respectively connected to the MCU control unit, and the MCU control unit is used for respectively Output PWM signal No. to the first switch tube, the second switch tube and the third switch tube to control the on/off state of the first switch tube, the second switch tube and the third switch tube.

Preferably, the MCU control unit includes a single chip microcomputer and peripheral circuits thereof.

Preferably, the method further includes an AC sampling unit connected between the input end of the input rectifying and filtering unit and the MCU control unit, wherein the AC sampling unit is configured to collect the voltage of the AC side of the input rectifying and filtering unit and feed back to MCU control unit.

Preferably, the AC sampling unit includes an operational amplifier, and two input ends of the operational amplifier are respectively connected to an input end of the input rectifying and filtering unit through a current limiting resistor, and an output end of the operational amplifier is connected to the MCU control unit. .

Preferably, a first sampling resistor is connected between the source and the front end of the third switching transistor, and a source of the third switching transistor is connected to the MCU control unit, and the MCU is used by the first sampling resistor. The control unit collects an electrical signal of the source of the third switching transistor.

Preferably, the method further includes a DC voltage sampling unit, the DC voltage sampling unit includes a second sampling resistor and a third sampling resistor connected in series, and a front end of the second sampling resistor is connected to an output of the interleaved flyback isolation unit. The back end of the third sampling resistor is connected to the MCU control unit, and the MCU control unit collects the electrical signal output by the interleaved flyback isolation conversion unit by the second sampling resistor and the third sampling resistor.

In the intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback, the input rectification filtering unit rectifies and filters the grid voltage, and then outputs the pulsating DC voltage, and then uses the PFC boosting unit to perform the pulsating DC voltage. Boost processing, in the interleaved flyback isolation conversion unit, wherein the first switch tube and the second switch tube are mutually conductive, when the first switch tube is turned on, the second switch tube is turned off, and the current is controlled by the first transformer primary winding, A switching tube forms a loop to the front end, the first transformer primary winding starts to store energy; when the second switching tube is turned on, the first switching tube is turned off, and the current is formed by the second transformer primary winding, the second switching tube, and the front end. The primary winding of the second transformer begins to store energy, and the primary winding of the first transformer is coupled to the secondary winding through the first transformer core, and then charges the first capacitor through the third diode to form a positive direction on the first capacitor. Voltage; then the first switching transistor is turned on again, the second switching transistor is turned off, the first transformer stores energy, and the second transformer secondary winding passes through the fourth diode Charging a second capacitor, a negative voltage on the second capacitor; so that the DC bus to form a positive and negative DC voltage. The first diode, the second diode, the first resistor, the second resistor, the third capacitor, and the fourth capacitor in the above circuit are absorption circuits of the first switch tube and the second switch tube, respectively, for absorbing the first The peak voltage generated by the leakage inductance of a transformer and a second transformer is used to reduce the voltage stress of the switching tube. The above-mentioned interleaved flyback isolation unit achieves the following beneficial effects: due to the use of the alternating conduction, the current ripple in the circuit is small, the application is flexible, and the EMI, EMC interference in the circuit is small, and the circuit operating frequency is high. Therefore, the power density can be increased, and in addition, the output voltage can be changed by changing the primary and secondary turns ratios of the first transformer and the second transformer, and Now boost or step down. Based on the above characteristics, the present invention achieves the beneficial effects of reducing ripple in the circuit, simplifying the circuit structure, reducing the circuit cost, improving the output voltage quality, and being safe and reliable. On the basis of the above, the invention provides a filter inductor at the output end of the inverter inverting unit, and the filter inductor can filter out the high frequency pulse of the alternating current, so that the load can obtain high quality power frequency sinusoidal alternating current, thereby increasing the output voltage. Quality to meet power needs.

DRAWINGS

Figure 1 is a circuit schematic of a sinusoidal voltage conversion circuit.

2 is a circuit schematic diagram of an AC sampling unit in a preferred embodiment of the present invention.

3 is a circuit schematic diagram of an MCU control unit in a preferred embodiment of the present invention.

detailed description

The invention will now be described in greater detail with reference to the drawings and embodiments.

The invention discloses an intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback. As shown in FIG. 1 to FIG. 3, it comprises an input rectification and filtering unit 10 for rectifying and filtering a grid voltage. The PFC boosting unit 20 that performs boost conversion on the output voltage of the input rectifying and filtering unit 10, and:

An interleaved flyback isolation conversion unit 30 includes a first switching transistor Q6, a second switching transistor Q7, a first transformer T1, a second transformer T2, a first diode D6, a second diode D5, and a third a first tube D7 and a fourth diode D8, the first end of the first winding of the first transformer T1 is connected to the output end of the PFC boosting unit 20, and the second end of the primary winding of the first transformer T1 is connected to the first end a drain of the switch transistor Q6, a source of the first switch transistor Q6 is connected to the front end, a drain of the first switch transistor Q6 is connected to an anode of the first diode D6, the first diode The cathode of D6 is connected to the output end of the PFC boosting unit 20 through a first resistor R26, the first resistor R26 is connected in parallel with a third capacitor C5, and the first end of the second winding of the second transformer T2 is connected to the PFC boosting unit. The output end of the second transformer T2 is connected to the drain of the second switching transistor Q7, the source of the second switching transistor Q7 is connected to the front end, and the second switching transistor Q7 The drain is connected to the anode of the second diode D5, and the cathode of the second diode D5 is connected by the second resistor R27 The output of the PFC boosting unit 20, the second resistor R27 is connected in parallel with a fourth capacitor C6, and the gate of the first switching transistor Q6 and the gate of the second switching transistor Q7 are respectively used to access two opposite phases. The PWM pulse signal, the first end of the secondary winding of the first transformer T1 is connected to the anode of the third diode D7, and the second end of the secondary winding of the first transformer T1 is connected to the back end, The first end of the secondary winding of the second transformer T2 is connected to the back end, and the second end of the secondary winding of the second transformer T2 is connected to the cathode of the fourth diode D8, the third diode D7 The cathode of the cathode and the fourth diode D8 serves as an output of the interleaved flyback isolation conversion unit 30;

A DC filter unit 40 includes a first capacitor C7 and a second capacitor C8, and the cathode of the third diode D7 passes through a capacitor C7 is connected to the back end, and the anode of the fourth diode D8 is connected to the back end through the second capacitor C8;

An inverter inverter unit 60 includes a fourth switching transistor Q2, a fifth switching transistor Q4, a third electrolytic capacitor C3, a fourth electrolytic capacitor C4, and a filter inductor L3. The drain of the fourth switching transistor Q2 is connected to The output terminal of the interleaved flyback isolation unit 30 is positive, the source of the fourth switch Q2 is connected to the drain of the fifth switch Q4, and the source of the fifth switch Q4 is connected to the interleaved flyback isolation converter. The output of the unit 30 is negative, the gate of the fourth switch Q2 and the gate of the fifth switch Q4 are respectively used to access two PWM pulses of opposite phase, the source of the fourth switch Q2 Also connected to the front end of the filter inductor L3, the anode of the third electrolytic capacitor C3 is connected to the drain of the fourth switching transistor Q2, the cathode of the third electrolytic capacitor C3 is connected to the back end, and the third electrolytic capacitor C3 The negative electrode is also connected to the positive electrode of the fourth electrolytic capacitor C4, the negative electrode of the fourth electrolytic capacitor C4 is connected to the source of the fifth switching transistor Q4, the rear end of the filter inductor L3 and the negative electrode of the third electrolytic capacitor C3 are The output of the inverter inverting unit 60 is output.

In the sinusoidal voltage conversion circuit, the input rectification and filtering unit 10 rectifies and filters the grid voltage to output a pulsating DC voltage, and then uses the PFC boosting unit 20 to boost the pulsating DC voltage in the interleaved flyback isolation unit. 30, wherein the first switch tube Q6 and the second switch tube Q7 are mutually conductive, when the first switch tube Q6 is turned on, the second switch tube Q7 is turned off, the current is from the first transformer T1 primary winding, the first switch tube Q6 to The front end forms a loop, the primary winding of the first transformer T1 starts to store energy; when the second switching tube Q7 is turned on, the first switching tube Q6 is turned off, and the current is composed of the second transformer T2 primary winding, the second switching tube Q7, and the front end. In the circuit, the primary winding of the second transformer T2 starts to store energy, and the primary winding of the first transformer T1 is coupled to the secondary winding through the core of the first transformer T1, and then charged to the first capacitor C7 via the third diode D7. A forward voltage is formed on a capacitor C7; then the first switching transistor Q6 is turned on again, the second switching transistor Q7 is turned off, the first transformer T1 stores energy, and the second transformer T2 secondary winding passes through the fourth diode D8. A second charging capacitor C8, a negative voltage on the second capacitor C8; so that the DC bus is formed on the positive and negative DC voltage. The first diode D6, the second diode D5, the first resistor R26, the second resistor R27, the third capacitor C5, and the fourth capacitor C6 in the above circuit are the first switch tube Q6 and the second switch tube Q7, respectively. The absorbing circuit is configured to absorb the spike voltage generated by the leakage inductance of the first transformer T1 and the second transformer T2 to reduce the voltage stress of the switching tube. The above-mentioned interleaved flyback isolation unit achieves the following beneficial effects: due to the use of the alternating conduction, the current ripple in the circuit is small, the application is flexible, and the EMI, EMC interference in the circuit is small, and the circuit operating frequency is high. Therefore, the power density can be increased. Further, the output voltage can be changed by changing the primary and secondary turns ratios of the first transformer T1 and the second transformer T2, thereby achieving step-up or step-down. Based on the above characteristics, the present invention achieves the beneficial effects of reducing ripple in the circuit, simplifying the circuit structure, reducing the circuit cost, improving the output voltage quality, and being safe and reliable. On the basis of the above, the invention provides a filter inductor L3 at the output end of the inverter inverting unit 60, and the filter inductor L3 can filter out the high frequency pulse in the alternating current, so that the load can obtain high quality power frequency sinusoidal alternating current, thereby improving Output voltage quality to full Power supply needs.

Further, a first resistor R17 is connected between the gate and the source of the fourth switching transistor Q2, and a second resistor R23 is connected between the gate and the source of the fifth switching transistor Q4.

In the inverter inverter unit 60, when the fourth switching transistor Q2 is turned on, the fourth switching transistor Q2, the load, and the fourth electrolytic capacitor C4 form a loop, and the first high-frequency pulse level is generated to the load, and the fourth When the switch tube Q2 is turned off, the freewheeling circuit is formed by the fourth electrolytic capacitor C4, the body diode of the fifth switch tube Q4, and the filter inductor L3; when the fifth switch tube Q4 is turned on, the fifth switch tube Q4, the load, and the third The electrolytic capacitor C3 forms a loop, and a second high-frequency pulse level is formed on the load. When the fifth switching transistor Q4 is turned off, the body diode of the fourth switching transistor Q2, the third electrolytic capacitor C3, the load, and the filter inductor L3 forms a freewheeling circuit. The high frequency driving PWM signal of the fourth switching transistor Q2 and the fifth switching transistor Q4 is sent to the GATE pole of the fourth switching transistor Q2 and the fifth switching transistor Q4 after being changed by the power frequency modulation. The driving signals of the fourth switching transistor Q2 and the fifth switching transistor Q4 are modulated by the power frequency, and the current flowing through the fourth switching transistor Q2 and the fifth switching transistor Q4 is sinusoidal. Since the filter inductor L3 has a high resistance characteristic to the high frequency pulse, the high frequency component is filtered by the filter inductor L3, and a power frequency sinusoidal alternating voltage is formed on the load. At the same time, the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4 also have a filtering function, and can form a DC filter circuit with the filter inductor L3. The inverter circuit is simple in control, and the circuit uses only two MOS tubes, which is low in cost.

As shown in FIG. 1 , the input rectification and filtering unit 10 includes a socket, a fuse F2, a lightning protection resistor RV1, a common mode suppression inductor L1, a safety capacitor CX1, and a rectifier bridge DB1, and the fuse F2 is connected in series. The front end of the common mode suppression inductor L1 is connected in parallel to the socket, and the lightning protection resistor RV1 is connected in parallel to the front end of the common mode suppression inductor L1, and the input of the safety capacitor CX1 and the rectifier bridge DB1. The terminals are both connected in parallel to the rear end of the common mode rejection inductor L1, and the output terminal of the rectifier bridge DB1 is connected with a filter capacitor C1 in parallel.

Regarding the boosting portion, the PFC boosting unit 20 includes a boosting inductor L2, a third switching transistor Q5, a first rectifier diode D1, and a second electrolytic capacitor C2, and the front end of the boosting inductor L2 is connected to the input rectification filter. The output end of the unit 10, the rear end of the boosting inductor L2 is connected to the drain of the third switching transistor Q5, the source of the third switching transistor Q5 is connected to the front end, and the gate of the third switching transistor Q5 For connecting a PWM control signal, the drain of the third switching transistor Q5 is connected to the anode of the first rectifier diode D1, and the cathode of the first rectifier diode D1 is used as an output terminal of the PFC boosting unit 20, and the first The cathode of one rectifier diode D1 is connected to the anode of the second electrolytic capacitor C2, and the cathode of the second electrolytic capacitor C2 is connected to the front end.

The PFC boosting unit 20, when sampling the filter capacitor C1, outputs a half-wave AC voltage, and the PFC enters the boost mode to improve the PF value of the AC-to-AC intelligent buck conversion topology circuit, and is filtered by the second electrolytic capacitor C2 after boosting. After the voltage is 400V, the specific boosting principle is as follows: When the third switching transistor Q5 is turned on, the current on the filter capacitor C1 is increased. The voltage inductor L2, the third switch tube Q5 to GND form a loop, the boost inductor L2 stores energy; when the third switch tube Q5 is turned off, the boost inductor has a much higher induced electromotive force than the input voltage, and the induced electromotive force After the rectification tube D1 is rectified, a unidirectional pulse voltage is formed, and then sent to the capacitor of the second electrolytic capacitor C2 for filtering, and filtered into a DC voltage of 400V. And the third switch tube Q5 increases or decreases the on-time of the third switch tube Q5 according to the change of the input AC correction wave acquired by the control chip, so that the current and the voltage phase are aligned to increase the PF value.

As a preferred manner, referring to FIG. 3, the embodiment further includes an MCU control unit 80, a gate of the first switching transistor Q6, a gate of the second switching transistor Q7, and a gate of the third switching transistor Q5. Connected to the MCU control unit 80, the MCU control unit 80 is configured to respectively output PWM signals to the first switch tube Q6, the second switch tube Q7 and the third switch tube Q5 to control the first switch tube Q6 and the second switch. The tube Q7 and the third switching tube Q5 are in an on-off state. Further, the MCU control unit 80 includes a single chip U1 and its peripheral circuits.

In order to facilitate the monitoring of the electrical signal on the AC side, referring to FIG. 2, the embodiment further includes an AC sampling unit 70 connected between the input end of the input rectifying and filtering unit 10 and the MCU control unit 80. The AC sampling unit 70 is configured to collect the voltage of the AC side of the input rectification filtering unit 10 and feed back to the MCU control unit 80.

Further, the AC sampling unit 70 includes an operational amplifier U9B, and two input ends of the operational amplifier U9B are respectively connected to an input end of the input rectifying and filtering unit 10 through a current limiting resistor, and an output end of the operational amplifier U9B Connected to the MCU control unit 80.

In order to facilitate real-time acquisition of the current, a first sampling resistor R2A is connected between the source and the front end of the third switching transistor Q5, and the source of the third switching transistor Q5 is connected to the MCU control unit 80. The first sampling resistor R2A causes the MCU control unit 80 to collect an electrical signal of the source of the third switching transistor Q5.

As a preferred manner, in order to collect the DC side electrical signal, the embodiment further includes a DC voltage sampling unit 50, and the DC voltage sampling unit 50 includes a second sampling resistor R13 and a third sampling resistor R15 connected in series. The front end of the second sampling resistor R13 is connected to the output end of the interleaved flyback isolation unit 30, and the rear end of the third sampling resistor R15 is connected to the MCU control unit 80, and the second sampling resistor R13 and The third sampling resistor R15 causes the MCU control unit 80 to acquire the electrical signal output by the interleaved flyback isolation conversion unit 30.

The intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback disclosed in the invention has a high PF value, can realize isolation between the power grid and the output end, and has high security. The output voltage can be automatically adjusted within the input full voltage range, the output frequency can be fixed, and the output voltage is sinusoidal output, and the AC voltage has an automatic shaping function. In addition, the circuit of the invention is simple, convenient to control, and contains voltage and current. Sampling circuit to prevent surge voltage and current.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and is in the technical scope of the present invention. Modifications, equivalent substitutions or improvements made within the scope of the invention are intended to be included within the scope of the invention.

Claims

An intelligent half-bridge sinusoidal voltage conversion circuit based on PFC interleaved flyback, characterized in that it comprises an input rectification filtering unit (10) for rectifying and filtering a grid voltage, and an input rectification filtering unit (10) The output voltage is boosted by the PFC boost unit (20), as well as:

An interleaved flyback isolation conversion unit (30) includes a first switching transistor (Q6), a second switching transistor (Q7), a first transformer (T1), a second transformer (T2), and a first diode (D6) a second diode (D5), a third diode (D7), and a fourth diode (D8), the first end of the first transformer (T1) primary winding being connected to the PFC boosting unit ( The output end of 20), the second end of the primary winding of the first transformer (T1) is connected to the drain of the first switching transistor (Q6), and the source of the first switching transistor (Q6) is connected to the front end ground, The drain of the first switching transistor (Q6) is connected to the anode of the first diode (D6), and the cathode of the first diode (D6) is connected to the PFC boosting unit through the first resistor (R26) The output end of (20), the first resistor (R26) is connected in parallel with a third capacitor (C5), and the first end of the second transformer (T2) primary winding is connected to the output end of the PFC boost unit (20) a second end of the second transformer (T2) primary winding is connected to a drain of the second switching transistor (Q7), a source of the second switching transistor (Q7) is connected to the front end, and the second switch The drain of the tube (Q7) is connected to the anode of the second diode (D5), The cathode of the second diode (D5) is connected to the output end of the PFC boosting unit (20) through a second resistor (R27), and the second resistor (R27) is connected in parallel with a fourth capacitor (C6). The gate of a switching transistor (Q6) and the gate of the second switching transistor (Q7) are respectively used to access two PWM pulse signals of opposite phases, and the first end of the secondary winding of the first transformer (T1) is connected. At the anode of the third diode (D7), the second end of the secondary winding of the first transformer (T1) is connected to the back end, and the first end of the secondary winding of the second transformer (T2) is connected to At the rear end, the second end of the second transformer (T2) secondary winding is connected to the cathode of the fourth diode (D8), the cathode of the third diode (D7) and the fourth diode The anode of (D8) serves as the output of the staggered flyback isolation conversion unit (30);

a DC filter unit (40) includes a first capacitor (C7) and a second capacitor (C8), and a cathode of the third diode (D7) is connected to the back end through a first capacitor (C7). The anode of the fourth diode (D8) is connected to the back end through a second capacitor (C8);

An inverter inverter unit (60) includes a fourth switch tube (Q2), a fifth switch tube (Q4), a third electrolytic capacitor (C3), a fourth electrolytic capacitor (C4), and a filter inductor (L3). The drain of the fourth switching transistor (Q2) is connected to the positive terminal of the output of the interleaved flyback isolation conversion unit (30), and the source of the fourth switching transistor (Q2) is connected to the fifth switching transistor (Q4). a drain, a source of the fifth switching transistor (Q4) is connected to an output negative terminal of the interleaved flyback isolation conversion unit (30), a gate of the fourth switching transistor (Q2) and a fifth switching transistor (Q4) The gates are respectively used to access two PWM pulse signals of opposite phase, the source of the fourth switch (Q2) is also connected to the front end of the filter inductor (L3), and the third electrolytic capacitor (C3) The positive electrode is connected to the drain of the fourth switching transistor (Q2), and the third electrolytic capacitor The negative electrode of (C3) is connected to the rear end, the negative electrode of the third electrolytic capacitor (C3) is also connected to the positive electrode of the fourth electrolytic capacitor (C4), and the negative electrode of the fourth electrolytic capacitor (C4) is connected to the fifth switch. The source of the tube (Q4), the back end of the filter inductor (L3) and the cathode of the third electrolytic capacitor (C3) serve as the output terminals of the inverter inverter unit (60).
The intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback according to claim 1, wherein a first resistor is connected between a gate and a source of the fourth switching transistor (Q2) ( R17), a second resistor (R23) is connected between the gate and the source of the fifth switching transistor (Q4).
The intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback according to claim 1, wherein the input rectification filtering unit (10) comprises a socket, a fuse (F2), and a lightning protection resistor (RV1). a common mode suppression inductor (L1), a safety capacitor (CX1), and a rectifier bridge (DB1), the fuse (F2) being connected in series to a neutral or a live line of the socket, the common mode suppression inductor (L1) The front end is connected in parallel to the socket, and the lightning protection resistor (RV1) is connected in parallel to the front end of the common mode suppression inductor (L1), and the input terminals of the safety capacitor (CX1) and the rectifier bridge (DB1) are connected in parallel to the common mode suppression inductor ( The back end of L1) has a filter capacitor (C1) connected in parallel with the output of the rectifier bridge (DB1).
The intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback according to claim 1, wherein the PFC boosting unit (20) comprises a boosting inductor (L2) and a third switching transistor ( Q5), a first rectifying diode (D1) and a second electrolytic capacitor (C2), a front end of the boosting inductor (L2) is connected to an output end of the input rectifying and filtering unit (10), and the boosting inductor (L2) The back end is connected to the drain of the third switch tube (Q5), the source of the third switch tube (Q5) is connected to the front end, and the gate of the third switch tube (Q5) is used to access a PWM a control signal, a drain of the third switching transistor (Q5) is connected to an anode of the first rectifier diode (D1), and a cathode of the first rectifier diode (D1) is used as an output terminal of the PFC boosting unit (20), and The cathode of the first rectifier diode (D1) is connected to the anode of the second electrolytic capacitor (C2), and the cathode of the second electrolytic capacitor (C2) is connected to the front end.
The intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback according to claim 4, further comprising an MCU control unit (80), a gate of the first switch tube (Q6), The gate of the second switching transistor (Q7) and the gate of the third switching transistor (Q5) are respectively connected to the MCU control unit (80), and the MCU control unit (80) is configured to respectively output a PWM signal to the first switching transistor (Q6), a second switching transistor (Q7) and a third switching transistor (Q5) for controlling the on-off state of the first switching transistor (Q6), the second switching transistor (Q7), and the third switching transistor (Q5).
The intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback according to claim 5, wherein the MCU control unit (80) comprises a single chip (U1) and its peripheral circuits.
The intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback according to claim 5, further comprising an AC sampling unit (70) connected to the input rectification filter Between the input of the unit (10) and the MCU control unit (80), the AC sampling unit (70) is used for collecting input rectification The voltage on the AC side of the filtering unit (10) is fed back to the MCU control unit (80).
The intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback according to claim 7, wherein said AC sampling unit (70) comprises an operational amplifier (U9B), said operational amplifier (U9B) The two input terminals are respectively connected to the input end of the input rectifying and filtering unit (10) through a current limiting resistor, and the output end of the operational amplifier (U9B) is connected to the MCU control unit (80).
The intelligent half-bridge sine wave voltage conversion circuit based on PFC staggered flyback according to claim 5, wherein a first sampling resistor is connected between the source and the front end of the third switching transistor (Q5) (R2A), the source of the third switching transistor (Q5) is connected to the MCU control unit (80), and the MCU control unit (80) acquires the third switching transistor by the first sampling resistor (R2A) ( Q5) The electrical signal of the source.
The intelligent half-bridge sinusoidal voltage conversion circuit based on PFC staggered flyback according to claim 5, further comprising a DC voltage sampling unit (50), wherein the DC voltage sampling unit (50) comprises a second sampling resistor (R13) and a third sampling resistor (R15) connected in series, a front end of the second sampling resistor (R13) being connected to an output of the interleaved flyback isolation unit (30), the third sampling resistor The back end of (R15) is connected to the MCU control unit (80), and the MCU control unit (80) acquires the interleaved flyback isolation conversion unit by the second sampling resistor (R13) and the third sampling resistor (R15) ( 30) The electrical signal output.