WO2018120482A1

WO2018120482A1 - Pfc staggered flyback full bridge-based smart correction wave voltage conversion circuit

Info

Publication number: WO2018120482A1
Application number: PCT/CN2017/079188
Authority: WO
Inventors: 廖志刚
Original assignee: 广东百事泰电子商务股份有限公司
Priority date: 2016-12-27
Filing date: 2017-04-01
Publication date: 2018-07-05
Also published as: CN106787754A

Abstract

A PFC staggered flyback full bridge-based smart correction wave voltage conversion circuit, comprising: an input unit (10); a PFC boost unit (20); a staggered flyback isolation transformer unit (30), comprising a first switch transistor (Q6), a second switch transistor (Q7), a first transformer (T1), a second transformer (T2), a second rectifying diode (D7) and a third rectifying diode (D8), a first end of a primary winding of the first transformer (T1) and a first end of a primary winding of the second transformer (T2) both being connected to an output terminal of the PFC boost unit (20), a second end of the primary winding of the first transformer (T1) being connected to a drain electrode of the first switch transistor (Q6), a second end of the primary winding of the second transformer (T2) being connected to a drain electrode of the second switch transistor (Q7), and a cathode of the second rectifying diode (D7) and a cathode of the third rectifying diode (D8) forming a staggered flyback isolation transformer unit input terminal after being connected; a DC filter unit (40); and an inverter unit (60). The present conversion circuit can decrease ripple interference and increase output voltage quality.

Description

Intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge

Technical field

The invention relates to a voltage conversion circuit, in particular to an intelligent correction wave voltage conversion circuit based on a PFC interleaved flyback full bridge.

Background technique

In the prior art, the intelligent buck-boost conversion device from AC to AC is also called a travel plug. In this device, the voltage conversion circuit is a key circuit thereof, and is a circuit capable of realizing AC-AC conversion, which can be AC-AC conversion realizes the function of buck-boost and stabilizes voltage and frequency. However, most of the current AC-AC portable device market is a non-isolated topology circuit with low PF value, low output voltage quality, and poor safety and reliability. Especially in the voltage conversion process, more ripple interference is generated, which in turn affects the voltage quality.

Summary of the invention

The technical problem to be solved by the present invention is to provide a PFC-based interleaving method capable of reducing ripple in a circuit, improving a PF value of a voltage conversion device, improving output voltage quality, and being safe and reliable in view of the deficiencies of the prior art. The intelligent correction wave voltage conversion circuit of the full bridge.

In order to solve the above technical problems, the present invention adopts the following technical solutions.

An intelligent correction wave voltage conversion circuit based on PFC staggered flyback full bridge includes: an input unit for supplying a DC voltage; and a PFC boost unit connected to an output end of the input unit for inputting The output voltage of the unit is boosted and converted; an interleaved flyback isolation conversion unit includes a first switching transistor, a second switching transistor, a first transformer, a second transformer, a second rectifier diode, and a third rectifier diode, a first end of a primary winding of the transformer and a first end of the primary winding of the second transformer are both connected to an output end of the PFC boosting unit, and a second end of the primary winding of the first transformer is connected to a drain of the first switching tube, The second end of the second transformer primary winding is connected to the drain of the second switching tube, the source of the first switching tube and the source of the second switching tube are both connected to the front end, the first switching tube The gate of the gate and the second switch tube are used to access two PWM pulses of opposite phase, the first end of the second winding of the first transformer is connected to the anode of the second rectifier diode, the second change Pressure a first end of the secondary winding is coupled to the anode of the third rectifier diode, and a second end of the first transformer secondary winding and a second end of the second transformer secondary winding are both coupled to the back end, the second The cathode of the rectifier diode is connected to the cathode of the third rectifier diode as an output terminal of the interleaved flyback isolation conversion unit; a DC filter unit includes a first electrolytic capacitor, and the anode of the first electrolytic capacitor is connected And at the output end of the interleaved flyback isolation unit, the negative pole of the first electrolytic capacitor is connected to the back end; an inverter inverting unit is connected to the output end of the interleaved flyback isolation unit, the inverter is inverted The unit is configured to perform inverter conversion on the output voltage of the interleaved flyback isolation conversion unit and output the alternating current.

Preferably, the interleaved flyback isolation conversion unit further includes a first freewheeling diode, a first resistor and a first capacitor, and an anode of the first freewheeling diode is connected to a drain of the first switching transistor, the A cathode of a freewheeling diode is coupled to an output of the PFC boost unit via a first resistor, the first capacitor being coupled in parallel with the first resistor.

Preferably, the interleaved flyback isolation conversion unit further includes a second freewheeling diode, a second resistor and a second capacitor, wherein an anode of the second freewheeling diode is connected to a drain of the second switching transistor, the The cathode of the two freewheeling diode is connected to the output of the PFC boosting unit via a second resistor, which is connected in parallel to the second resistor.

Preferably, the input unit comprises a socket, an insurance, a lightning protection resistor, a common mode suppression inductor, a safety capacitor and a rectifier bridge, wherein the fuse is connected to a neutral or a live line of the socket, and the common mode suppresses the inductance. The front end is connected in parallel to the socket, the lightning protection resistor is connected in parallel to the front end of the common mode suppression inductor, and the input terminals of the safety capacitor and the rectifier bridge are both connected in parallel with the rear end of the common mode suppression inductor, and the output ends of the rectifier bridge are connected in parallel Filter capacitor.

Preferably, the PFC boosting unit includes a boosting inductor, a third switching transistor, a first rectifier diode and a second electrolytic capacitor, and a front end of the boosting inductor is connected to an output end of the input unit, the boosting inductor The back end is connected to the drain of the third switch tube, the source of the third switch tube is connected to the front end, and the gate of the third switch tube is used to access a PWM control signal, the third switch tube The drain is connected to the anode of the first rectifier diode, the cathode of the first rectifier diode is used as the output end of the PFC boosting unit, and the cathode of the first rectifier diode is connected to the anode of the second electrolytic capacitor, and the cathode of the second electrolytic capacitor Connect to the front end.

Preferably, an MCU control unit is further included, the gate of the first switch tube, the gate of the second switch tube and the gate of the third switch tube are respectively connected to the MCU control unit, and the MCU control unit is used for respectively The PWM signal is output to the first switch tube, the second switch tube and the third switch tube to control the on/off state of the first switch tube, the second switch tube and the third switch tube.

Preferably, the method further includes an AC sampling unit connected between the input end of the input unit and the MCU control unit, wherein the AC sampling unit is configured to collect the voltage of the AC side of the input unit and feed back to the MCU control unit.

Preferably, a first sampling resistor is connected between the source and the front end of the third switching transistor, and a source of the third switching transistor is connected to the MCU control unit, and the MCU is used by the first sampling resistor. The control unit collects an electrical signal of the source of the third switching transistor.

Preferably, a DC voltage sampling unit is further included, and the DC voltage sampling unit includes a serial connection a second sampling resistor connected to the output end of the interleaved flyback isolation unit, and a third sampling resistor connected to the MCU control unit by the second The sampling resistor and the third sampling resistor cause the MCU control unit to collect the electrical signal output by the interleaved flyback isolation conversion unit.

Preferably, the inverter inverter unit comprises an inverter bridge composed of a fourth switch tube, a fifth switch tube, a sixth switch tube and a seventh switch tube, and a gate and a fifth switch of the fourth switch tube a gate of the tube, a gate of the sixth switch tube, and a gate of the seventh switch tube are respectively connected to the MCU control unit, and the fourth switch tube, the fifth switch tube, and the sixth switch tube are controlled by the MCU control unit And the seventh switch tube is turned on or off to enable the inverter inverting unit to output an alternating voltage.

In the intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge disclosed in the present invention, the DC voltage outputted by the input unit is boosted by the PFC boosting unit, and then output to the interleaved flyback isolation conversion unit, wherein A switch tube and a second switch tube are staggered and turned on. When the first switch tube is turned on, the second switch tube is turned off, and the current is formed by the first transformer primary winding and the first switch tube to the front end to form a loop, the first transformer primary The winding starts to reserve; when the second switching tube is turned on, the first switching tube is turned off, the current is formed by the second transformer primary winding, the second switching tube, and the front end, and the second transformer primary winding starts to store energy, and the first transformer The electric energy of the primary winding is coupled to the secondary winding through its magnetic core, and is supplied to the load via the second rectifier diode; then the first switching tube is turned on again, the second switching tube is turned off, the first transformer is stored, and the second transformer is energized. The stage winding supplies power to the load through a third rectifier diode. In the above-mentioned interleaved flyback isolation conversion unit, since the alternating conduction mode is adopted, the current ripple in the circuit is small and the application is flexible, especially when the load is small, only one reverse excitation circuit can be activated, and at the same time The EMI and EMC interference of the above circuit are small, and the circuit operating frequency is high to increase the power density. In addition, the output voltage can be changed by changing the turns ratio of the first transformer and the second transformer, thereby implementing step-up or step-down.

DRAWINGS

FIG. 1 is a circuit schematic diagram of a modified wave voltage conversion circuit.

2 is a circuit schematic diagram of an AC sampling unit in a preferred embodiment of the present invention.

3 is a circuit schematic diagram of an MCU control unit in a preferred embodiment of the present invention.

detailed description

The invention will now be described in greater detail with reference to the drawings and embodiments.

The invention discloses an intelligent correction wave voltage conversion circuit based on a PFC staggered flyback full bridge, which is combined with FIG. 1 to FIG. 3 and includes:

An input unit 10 for providing a DC voltage;

a PFC boosting unit 20 connected to the output of the input unit 10 for boosting the output voltage of the input unit 10 Pressure conversion

An interleaved flyback isolation conversion unit 30 includes a first switching transistor Q6, a second switching transistor Q7, a first transformer T1, a second transformer T2, a second rectifier diode D7, and a third rectifier diode D8, the first transformer The first end of the T1 primary winding and the first end of the second transformer T2 primary winding are both connected to the output end of the PFC boosting unit 20, and the second end of the primary winding of the first transformer T1 is connected to the first switching transistor Q6. a drain, a second end of the second winding of the second transformer T2 is connected to a drain of the second switching transistor Q7, and a source of the first switching transistor Q6 and a source of the second switching transistor Q7 are connected to the front end The gate of the first switching transistor Q6 and the gate of the second switching transistor Q7 are used to access two PWM pulses with opposite phases, and the first end of the secondary winding of the first transformer T1 is connected to the second The anode of the rectifier diode D7, the first end of the secondary winding of the second transformer T2 is connected to the anode of the third rectifier diode D8, the second end of the secondary winding of the first transformer T1 and the secondary winding of the second transformer T2 The second ends are both connected to the back end, and the second rectification is D7 cathode tube and the cathode of the third rectifier diode D8 is connected to an output terminal of the interleaved flyback isolation converting unit 30;

A DC filter unit 40 includes a first electrolytic capacitor C3, an anode of the first electrolytic capacitor C3 is connected to an output end of the interleaved flyback isolation unit 30, and a cathode of the first electrolytic capacitor C3 is connected to a rear end. ;

An inverter inverting unit 60 is connected to the output end of the interleaved flyback isolation unit 30 for inverting the output voltage of the interleaved flyback isolation unit 30 to output an alternating current.

In the correction wave voltage conversion circuit, the DC voltage output from the input unit 10 is boosted by the PFC boosting unit 20, and then output to the interleave flyback isolation unit 30, wherein the first switching transistor Q6 and the second switching transistor Q7 When the first switch tube Q6 is turned on, the second switch tube Q7 is turned off, and the current is formed by the first transformer T1 primary winding and the first switch tube Q6 to the front end to form a loop, and the first transformer T1 primary winding starts to reserve. When the second switching transistor Q7 is turned on, the first switching transistor Q6 is turned off, the current is formed by the second transformer T2 primary winding, the second switching transistor Q7, the front end to form a loop, and the second transformer T2 primary winding starts to store energy, and at the same time After the electric energy of the primary winding of the transformer T1 is coupled to the secondary winding through the magnetic core, the second rectifying diode D7 is supplied with power to the load; then the first switching tube Q6 is turned on again, and the second switching tube Q7 is turned off, the first transformer T1 The energy storage, the secondary winding of the second transformer T2 supplies power to the load through the third rectifier diode D8. In the above-mentioned interleaved flyback isolation conversion unit 30, since the alternating conduction mode is adopted, the current ripple in the circuit is small and the application is flexible, especially when the load is small, only one reverse excitation circuit is required to be activated. At the same time, the above circuit has less EMI and EMC interference, and the circuit operating frequency is higher, which can increase the power density. In addition, the output voltage can be changed by changing the turns ratio of the first transformer T1 and the second transformer T2, thereby achieving boost or drop. Pressure. The first switching transistor Q6 and the second switching transistor Q7 in this embodiment modulate the high frequency PWM signal with a power frequency, and the first switching transistor Q6 and the second switching transistor Q7 adjust the output voltage according to the sinusoidal variation characteristic.

As shown in FIG. 1 , the interleaved flyback isolation unit 30 further includes a first freewheeling diode D6 , a first resistor R26 and a first capacitor C5 , and the first freewheeling diode D6 The anode is connected to the drain of the first switching transistor Q6, the cathode of the first freewheeling diode D6 is connected to the output end of the PFC boosting unit 20 through a first resistor R26, and the first capacitor C5 is connected in parallel to the first resistor R26. . The interleaved flyback isolation unit 30 further includes a second freewheeling diode D5, a second resistor R27 and a second capacitor C6. The anode of the second freewheeling diode D5 is connected to the drain of the second switching transistor Q7. The cathode of the second freewheeling diode D5 is connected to the output of the PFC boosting unit 20 via a second resistor R27, and the second capacitor C6 is connected in parallel to the second resistor R27.

In the above circuit, the second freewheeling diode D5, the first freewheeling diode D6, the first resistor R26, the second resistor R27, the first capacitor C5, and the second capacitor C6 are the first switching transistor Q6 and the second switching transistor Q7, respectively. The attracting circuit is configured to absorb the spike voltage generated by the leakage inductance of the first transformer T1 and the second transformer T1 to reduce the voltage stress of the switching tube.

In the input part, the input part converts the grid voltage into a DC voltage for use by the subsequent circuit. Specifically, the input unit 10 includes a socket, an insurance F2, a lightning protection resistor RV1, and a common mode suppression inductor L1. The capacitor CX1 and the rectifier bridge DB1 are connected in series to the neutral or the live line of the socket, the front end of the common mode suppression inductor L1 is connected in parallel to the socket, and the lightning protection resistor RV1 is connected in parallel to the common mode suppression inductor L1. The front end, the input terminals of the safety capacitor CX1 and the rectifier bridge DB1 are both connected in parallel with the rear end of the common mode suppression inductor L1, and the output terminal of the rectifier bridge DB1 is connected with a filter capacitor C1 in parallel.

Regarding the boosting portion, the PFC boosting unit 20 includes a boosting inductor L2, a third switching transistor Q5, a first rectifier diode D1, and a second electrolytic capacitor C2. The front end of the boosting inductor L2 is connected to the input unit 10. The output end of the boosting inductor L2 is connected to the drain of the third switching transistor Q5, the source of the third switching transistor Q5 is connected to the front end, and the gate of the third switching transistor Q5 is used for A PWM control signal is connected, a drain of the third switching transistor Q5 is connected to an anode of the first rectifier diode D1, a cathode of the first rectifier diode D1 is used as an output end of the PFC boosting unit 20, and the first rectification is performed. The cathode of the diode D1 is connected to the anode of the second electrolytic capacitor C2, and the cathode of the second electrolytic capacitor C2 is connected to the front end.

The PFC boosting unit 20, when sampling the filter capacitor C1 to output a half-wave AC voltage, the PFC enters the boost mode to improve the PF value of the AC-to-AC intelligent buck conversion topology circuit, and after boosting, passes through the second electrolytic capacitor C2. The filtered voltage is 400V. The specific boosting principle is as follows: When the third switching transistor Q5 is turned on, the current on the filter capacitor C1 is formed by the boost inductor L2 and the third switch transistor Q5 to GND, and the boost inductor L2 is stored. Energy; when the third switching transistor Q5 is turned off, an induced electromotive force is formed on the boosting inductor that is much higher than the input voltage, and the induced electromotive force is rectified by the first rectifying diode D1 to form a unidirectional pulse voltage and then sent to the second electrolytic capacitor. The C2 capacitor is filtered and filtered into a DC voltage of 400V. And the third switch tube Q5 is increased or decreased according to the input AC sine wave change taken by the control chip. Turn on the on-time of Q5 to make the current and voltage phases consistent to increase the PF value.

As a preferred manner, the embodiment further includes an MCU control unit 80. The gate of the first switch Q6, the gate of the second switch Q7, and the gate of the third switch Q5 are respectively connected to the MCU control. The unit 80, the MCU control unit 80 is configured to respectively output PWM signals to the first switch tube Q6, the second switch tube Q7 and the third switch tube Q5 to control the first switch tube Q6, the second switch tube Q7 and the third unit The switch tube Q5 is on and off. Further, the MCU control unit 80 includes a single chip U1 and its peripheral circuits.

In order to facilitate monitoring the electrical signal on the AC side, as shown in FIG. 2, an AC sampling unit 70 is further included. The AC sampling unit 70 is connected between the input end of the input unit 10 and the MCU control unit 80. The AC sampling unit is The 70 is used to collect the voltage on the AC side of the input unit 10 and feed back to the MCU control unit 80. Regarding the specific composition of the AC sampling unit 70, the AC sampling unit 70 includes an operational amplifier U9B, and the two input ends of the operational amplifier U9B are respectively connected to the input end of the input unit 10 through a current limiting resistor. The output of the U9B is connected to the MCU control unit 80.

In order to facilitate real-time acquisition of the current, a first sampling resistor R2A is connected between the source and the front end of the third switching transistor Q5, and the source of the third switching transistor Q5 is connected to the MCU control unit 80. The first sampling resistor R2A causes the MCU control unit 80 to collect an electrical signal of the source of the third switching transistor Q5.

As a preferred manner, in order to collect the DC side electrical signal, the embodiment further includes a DC voltage sampling unit 50, and the DC voltage sampling unit 50 includes a second sampling resistor R13 and a third sampling resistor R15 connected in series. The front end of the second sampling resistor R13 is connected to the output end of the interleaved flyback isolation unit 30, and the rear end of the third sampling resistor R15 is connected to the MCU control unit 80, and the second sampling resistor R13 and The third sampling resistor R15 causes the MCU control unit 80 to acquire the electrical signal output by the interleaved flyback isolation conversion unit 30.

Referring to FIG. 3, the inverter inverting unit 60 includes an inverter bridge composed of a fourth switching transistor Q1, a fifth switching transistor Q2, a sixth switching transistor Q3, and a seventh switching transistor Q4. The gate of the fourth switching transistor Q1, the gate of the fifth switching transistor Q2, the gate of the sixth switching transistor Q3, and the gate of the seventh switching transistor Q4 are respectively connected to the MCU control unit 80, and are controlled by the MCU. The unit 80 controls the fourth switching transistor Q1, the fifth switching transistor Q2, the sixth switching transistor Q3, and the seventh switching transistor Q4 to be turned on or off, so that the inverter inverting unit 60 outputs an alternating voltage.

In the inverter inverter unit 60, the DC voltage filtered by the first electrolytic capacitor C3 forms a loop through the fourth switching transistor Q1, the load, and the seventh switching transistor Q4 to supply power to the load to form a first half cycle power frequency level; The second half cycle power frequency level forms a loop through the fifth switch tube Q2, the load, and the sixth switch tube Q3, so that a complete power frequency correction wave AC voltage is formed on the load. The PWM signal outputted by the single chip U1 is sent to the PWM1H, PWM1L, PWM2H, and PWM2L to the fourth switch tube Q1, the fifth switch tube Q2, and the sixth switch tube after being driven by the driving circuit. Q3, the GATE pole of the seventh switch tube Q4. The phase and frequency in the inverter inverter circuit operate in accordance with the mode set in the control chip.

The intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge disclosed in the invention has high PF value, high isolation between power grid and output end, high security, and interaction between DC and DC unit Working mode EMC, EMI interference is small, power application is flexible. The output voltage can be automatically adjusted within the input full voltage range, and the output frequency is fixed, and the output voltage is a modified wave output, and has an automatic shaping function for the AC voltage. In addition, the present invention includes a voltage and current sampling circuit, which can effectively prevent waves. Surge voltage and current.

The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention. All modifications, equivalents, and improvements made within the technical scope of the present invention are intended to be included within the scope of the present invention.

Claims

An intelligent correction wave voltage conversion circuit based on PFC staggered flyback full bridge, characterized in that it comprises:

An input unit (10) for providing a DC voltage;

a PFC boosting unit (20) connected to the output end of the input unit (10) for boosting the output voltage of the input unit (10);

An interleaved flyback isolation conversion unit (30) includes a first switching transistor (Q6), a second switching transistor (Q7), a first transformer (T1), a second transformer (T2), and a second rectifier diode (D7) And a third rectifier diode (D8), the first end of the first transformer (T1) primary winding and the first end of the second transformer (T2) primary winding are both connected to the output of the PFC boost unit (20), a second end of the primary winding of the first transformer (T1) is connected to a drain of the first switching transistor (Q6), and a second end of the primary winding of the second transformer (T2) is connected to a second switching transistor (Q7) a drain, a source of the first switching transistor (Q6) and a source of the second switching transistor (Q7) are both connected to the front end, a gate of the first switching transistor (Q6) and a second switching transistor The gate of (Q7) is used to access two PWM pulses of opposite phase, the first end of the secondary winding of the first transformer (T1) is connected to the anode of the second rectifier diode (D7), the second The first end of the secondary winding of the transformer (T2) is connected to the anode of the third rectifier diode (D8), the second end of the secondary winding of the first transformer (T1) and the second winding of the second transformer (T2) two Are connected to the rear end, the rear of the second rectifier diode (D7) and the cathode of a third rectifier diode (D8) cathode is connected to a separator interleaved flyback conversion unit (30) output terminal;

a DC filter unit (40) includes a first electrolytic capacitor (C3), and an anode of the first electrolytic capacitor (C3) is connected to an output terminal of the interleaved flyback isolation unit (30), the first electrolytic capacitor The negative electrode of (C3) is connected to the rear end;

An inverter inverting unit (60) is coupled to an output of the interleaved flyback isolation unit (60) for outputting the output voltage of the interleaved flyback isolation unit (30) After the inverter is converted, the AC power is output.
The intelligent modified wave voltage conversion circuit based on PFC interleaved flyback full bridge according to claim 1, wherein the interleaved flyback isolation conversion unit (30) further comprises a first freewheeling diode (D6), a first resistor (R26) and a first capacitor (C5), an anode of the first freewheeling diode (D6) is connected to a drain of the first switching transistor (Q6), and the first freewheeling diode (D6) The cathode is connected to the output of the PFC boost unit (20) through a first resistor (R26), which is connected in parallel to the first resistor (R26).
The intelligent modified wave voltage conversion circuit based on PFC interleaved flyback full bridge according to claim 1, wherein the interleaved flyback isolation conversion unit (30) further comprises a second freewheeling diode (D5), a second resistor (R27) and a second capacitor (C6), an anode of the second freewheeling diode (D5) is connected to a drain of the second switching transistor (Q7), and the second freewheeling diode (D5) The cathode is connected to the output of the PFC boost unit (20) through a second resistor (R27) The second capacitor (C6) is connected in parallel to the second resistor (R27).
The intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge according to claim 1, wherein the input unit (10) comprises a socket, a fuse (F2), a lightning protection resistor (RV1), Common mode suppression inductor (L1), safety capacitor (CX1) and rectifier bridge (DB1), the fuse (F2) is connected in series to the neutral or the live line of the socket, and the front end of the common mode suppression inductor (L1) is connected in parallel In the socket, the lightning protection resistor (RV1) is connected in parallel to the front end of the common mode suppression inductor (L1), and the input terminals of the safety capacitor (CX1) and the rectifier bridge (DB1) are connected in parallel to the common mode suppression inductor (L1). The back end of the rectifier bridge (DB1) has a filter capacitor (C1) connected in parallel.
The intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge according to claim 1, wherein the PFC boosting unit (20) comprises a boosting inductor (L2) and a third switching transistor ( Q5), a first rectifier diode (D1) and a second electrolytic capacitor (C2), a front end of the boost inductor (L2) is connected to an output end of the input unit (10), and the boost inductor (L2) is behind The terminal is connected to the drain of the third switching transistor (Q5), the source of the third switching transistor (Q5) is connected to the front end, and the gate of the third switching transistor (Q5) is used for accessing a PWM control signal. The drain of the third switching transistor (Q5) is connected to the anode of the first rectifier diode (D1), and the cathode of the first rectifier diode (D1) is used as an output terminal of the PFC boosting unit (20), and the first The cathode of a rectifier diode (D1) is connected to the anode of the second electrolytic capacitor (C2), and the cathode of the second electrolytic capacitor (C2) is connected to the front end.
The intelligent modified wave voltage conversion circuit based on PFC interleaved flyback full bridge according to claim 5, further comprising an MCU control unit (80), a gate of the first switching transistor (Q6), The gate of the second switching transistor (Q7) and the gate of the third switching transistor (Q5) are respectively connected to the MCU control unit (80), and the MCU control unit (80) is configured to respectively output a PWM signal to the first switching transistor (Q6), a second switching transistor (Q7) and a third switching transistor (Q5) for controlling the on-off state of the first switching transistor (Q6), the second switching transistor (Q7), and the third switching transistor (Q5).
The intelligent modified wave voltage conversion circuit based on PFC interleaved flyback full bridge according to claim 6, further comprising an AC sampling unit (70) connected to the input unit ( The input terminal of 10) is connected to the MCU control unit (80) for collecting the voltage of the AC side of the input unit (10) and feeding back to the MCU control unit (80).
The intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge according to claim 6, wherein a first sampling resistor is connected between a source and a front end of the third switching transistor (Q5). (R2A), the source of the third switching transistor (Q5) is connected to the MCU control unit (80), and the MCU control unit (80) acquires the third switching transistor by the first sampling resistor (R2A) ( Q5) The electrical signal of the source.
The intelligent modified wave voltage conversion circuit based on PFC interleaved flyback full bridge according to claim 6, further comprising a DC voltage sampling unit (50), wherein said DC voltage sampling unit (50) comprises Tandem a second sampling resistor (R13) and a third sampling resistor (R15), a front end of the second sampling resistor (R13) is connected to an output of the interleaved flyback isolation unit (30), and the third sampling resistor (R15) The back end is connected to the MCU control unit (80), and the MCU control unit (80) acquires the interleaved flyback isolation conversion unit (30) by the second sampling resistor (R13) and the third sampling resistor (R15) The electrical signal output.
The intelligent modified wave voltage conversion circuit based on PFC staggered flyback full bridge according to claim 6, wherein the inverter inverting unit (60) comprises a fourth switching tube (Q1) and a fifth switch. An inverter bridge composed of a tube (Q2), a sixth switch tube (Q3), and a seventh switch tube (Q4), a gate of the fourth switch tube (Q1), a gate of the fifth switch tube (Q2), The gate of the sixth switching transistor (Q3) and the gate of the seventh switching transistor (Q4) are respectively connected to the MCU control unit (80), and the fourth switching transistor (Q1) is controlled by the MCU control unit (80) The fifth switching transistor (Q2), the sixth switching transistor (Q3), and the seventh switching transistor (Q4) are turned on or off to cause the inverter inverting unit (60) to output an alternating voltage.